| # STM32 Minimum Development Board Configuration |
| # |
| # Copyright (c) 2019, embedjournal.com |
| # |
| # SPDX-License-Identifier: Apache-2.0 |
| # |
| |
| CONFIG_ARM=y |
| CONFIG_BOARD_STM32_MIN_DEV_BLACK=y |
| CONFIG_SOC_SERIES_STM32F1X=y |
| CONFIG_SOC_STM32F103X8=y |
| |
| # 72MHz system clock |
| CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=72000000 |
| |
| # enable uart driver |
| CONFIG_SERIAL=y |
| |
| # enable console |
| CONFIG_CONSOLE=y |
| CONFIG_UART_CONSOLE=y |
| |
| # enable pinmux |
| CONFIG_PINMUX=y |
| |
| # enable GPIO |
| CONFIG_GPIO=y |
| |
| # clock configuration |
| CONFIG_CLOCK_CONTROL=y |
| CONFIG_CLOCK_STM32_HSE_CLOCK=8000000 |
| CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y |
| |
| # use HSE as PLL input |
| CONFIG_CLOCK_STM32_PLL_SRC_HSE=y |
| # produce 72MHz clock at PLL output |
| CONFIG_CLOCK_STM32_PLL_XTPRE=n |
| CONFIG_CLOCK_STM32_PLL_MULTIPLIER=9 |
| CONFIG_CLOCK_STM32_AHB_PRESCALER=1 |
| |
| # APB1 clock must not exceed 36MHz limit |
| CONFIG_CLOCK_STM32_APB1_PRESCALER=2 |
| CONFIG_CLOCK_STM32_APB2_PRESCALER=1 |
