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# Nordic Semiconductor nRF52 MCU line
# Copyright (c) 2016-2019 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
config SOC_NRF52810
depends on SOC_SERIES_NRF52X
bool
select HAS_HW_NRF_BPROT
select HAS_HW_NRF_CCM
select HAS_HW_NRF_CLOCK
select HAS_HW_NRF_COMP
select HAS_HW_NRF_ECB
select HAS_HW_NRF_EGU0
select HAS_HW_NRF_EGU1
select HAS_HW_NRF_GPIO0
select HAS_HW_NRF_GPIOTE
select HAS_HW_NRF_PDM
select HAS_HW_NRF_POWER
select HAS_HW_NRF_PPI
select HAS_HW_NRF_PWM0
select HAS_HW_NRF_QDEC
select HAS_HW_NRF_RNG
select HAS_HW_NRF_RTC0
select HAS_HW_NRF_RTC1
select HAS_HW_NRF_SAADC
select HAS_HW_NRF_SPI0
select HAS_HW_NRF_SPIM0
select HAS_HW_NRF_SPIS0
select HAS_HW_NRF_SWI0
select HAS_HW_NRF_SWI1
select HAS_HW_NRF_SWI2
select HAS_HW_NRF_SWI3
select HAS_HW_NRF_SWI4
select HAS_HW_NRF_SWI5
select HAS_HW_NRF_TEMP
select HAS_HW_NRF_TIMER0
select HAS_HW_NRF_TIMER1
select HAS_HW_NRF_TIMER2
select HAS_HW_NRF_TWI0
select HAS_HW_NRF_TWIM0
select HAS_HW_NRF_TWIS0
select HAS_HW_NRF_UART0
select HAS_HW_NRF_UARTE0
select HAS_HW_NRF_WDT
config SOC_NRF52811
depends on SOC_SERIES_NRF52X
bool
select HAS_HW_NRF_BPROT
select HAS_HW_NRF_CCM
select HAS_HW_NRF_CLOCK
select HAS_HW_NRF_COMP
select HAS_HW_NRF_ECB
select HAS_HW_NRF_EGU0
select HAS_HW_NRF_EGU1
select HAS_HW_NRF_GPIO0
select HAS_HW_NRF_GPIOTE
select HAS_HW_NRF_PDM
select HAS_HW_NRF_POWER
select HAS_HW_NRF_PPI
select HAS_HW_NRF_PWM0
select HAS_HW_NRF_QDEC
select HAS_HW_NRF_RADIO_BLE_CODED
select HAS_HW_NRF_RADIO_IEEE802154
select HAS_HW_NRF_RNG
select HAS_HW_NRF_RTC0
select HAS_HW_NRF_RTC1
select HAS_HW_NRF_SAADC
select HAS_HW_NRF_SPI0
select HAS_HW_NRF_SPIM0
select HAS_HW_NRF_SPIS0
select HAS_HW_NRF_SPI1
select HAS_HW_NRF_SPIM1
select HAS_HW_NRF_SPIS1
select HAS_HW_NRF_SWI0
select HAS_HW_NRF_SWI1
select HAS_HW_NRF_SWI2
select HAS_HW_NRF_SWI3
select HAS_HW_NRF_SWI4
select HAS_HW_NRF_SWI5
select HAS_HW_NRF_TEMP
select HAS_HW_NRF_TIMER0
select HAS_HW_NRF_TIMER1
select HAS_HW_NRF_TIMER2
select HAS_HW_NRF_TWI0
select HAS_HW_NRF_TWIM0
select HAS_HW_NRF_TWIS0
select HAS_HW_NRF_UART0
select HAS_HW_NRF_UARTE0
select HAS_HW_NRF_WDT
config SOC_NRF52832
depends on SOC_SERIES_NRF52X
bool
select SOC_COMPATIBLE_NRF52832
select CPU_HAS_FPU
select HAS_HW_NRF_BPROT
select HAS_HW_NRF_CCM
select HAS_HW_NRF_CLOCK
select HAS_HW_NRF_COMP
select HAS_HW_NRF_ECB
select HAS_HW_NRF_EGU0
select HAS_HW_NRF_EGU1
select HAS_HW_NRF_EGU2
select HAS_HW_NRF_EGU3
select HAS_HW_NRF_EGU4
select HAS_HW_NRF_EGU5
select HAS_HW_NRF_GPIO0
select HAS_HW_NRF_GPIOTE
select HAS_HW_NRF_I2S
select HAS_HW_NRF_LPCOMP
select HAS_HW_NRF_MWU
select HAS_HW_NRF_NFCT
select HAS_HW_NRF_PDM
select HAS_HW_NRF_POWER
select HAS_HW_NRF_PPI
select HAS_HW_NRF_PWM0
select HAS_HW_NRF_PWM1
select HAS_HW_NRF_PWM2
select HAS_HW_NRF_QDEC
select HAS_HW_NRF_RNG
select HAS_HW_NRF_RTC0
select HAS_HW_NRF_RTC1
select HAS_HW_NRF_RTC2
select HAS_HW_NRF_SAADC
select HAS_HW_NRF_SPI0
select HAS_HW_NRF_SPI1
select HAS_HW_NRF_SPI2
select HAS_HW_NRF_SPIM0
select HAS_HW_NRF_SPIM1
select HAS_HW_NRF_SPIM2
select HAS_HW_NRF_SPIS0
select HAS_HW_NRF_SPIS1
select HAS_HW_NRF_SPIS2
select HAS_HW_NRF_SWI0
select HAS_HW_NRF_SWI1
select HAS_HW_NRF_SWI2
select HAS_HW_NRF_SWI3
select HAS_HW_NRF_SWI4
select HAS_HW_NRF_SWI5
select HAS_HW_NRF_TEMP
select HAS_HW_NRF_TIMER0
select HAS_HW_NRF_TIMER1
select HAS_HW_NRF_TIMER2
select HAS_HW_NRF_TIMER3
select HAS_HW_NRF_TIMER4
select HAS_HW_NRF_TWI0
select HAS_HW_NRF_TWI1
select HAS_HW_NRF_TWIM0
select HAS_HW_NRF_TWIM1
select HAS_HW_NRF_TWIS0
select HAS_HW_NRF_TWIS1
select HAS_HW_NRF_UART0
select HAS_HW_NRF_UARTE0
select HAS_HW_NRF_WDT
config SOC_NRF52840
depends on SOC_SERIES_NRF52X
bool
select CPU_HAS_FPU
select HAS_HW_NRF_ACL
select HAS_HW_NRF_CC310
select HAS_HW_NRF_CCM
select HAS_HW_NRF_CLOCK
select HAS_HW_NRF_COMP
select HAS_HW_NRF_ECB
select HAS_HW_NRF_EGU0
select HAS_HW_NRF_EGU1
select HAS_HW_NRF_EGU2
select HAS_HW_NRF_EGU3
select HAS_HW_NRF_EGU4
select HAS_HW_NRF_EGU5
select HAS_HW_NRF_GPIO0
select HAS_HW_NRF_GPIO1
select HAS_HW_NRF_GPIOTE
select HAS_HW_NRF_I2S
select HAS_HW_NRF_LPCOMP
select HAS_HW_NRF_MWU
select HAS_HW_NRF_NFCT
select HAS_HW_NRF_PDM
select HAS_HW_NRF_POWER
select HAS_HW_NRF_PPI
select HAS_HW_NRF_PWM0
select HAS_HW_NRF_PWM1
select HAS_HW_NRF_PWM2
select HAS_HW_NRF_PWM3
select HAS_HW_NRF_QDEC
select HAS_HW_NRF_QSPI
select HAS_HW_NRF_RADIO_BLE_CODED
select HAS_HW_NRF_RADIO_IEEE802154
select HAS_HW_NRF_RNG
select HAS_HW_NRF_RTC0
select HAS_HW_NRF_RTC1
select HAS_HW_NRF_RTC2
select HAS_HW_NRF_SAADC
select HAS_HW_NRF_SPI0
select HAS_HW_NRF_SPI1
select HAS_HW_NRF_SPI2
select HAS_HW_NRF_SPIM0
select HAS_HW_NRF_SPIM1
select HAS_HW_NRF_SPIM2
select HAS_HW_NRF_SPIM3
select HAS_HW_NRF_SPIS0
select HAS_HW_NRF_SPIS1
select HAS_HW_NRF_SPIS2
select HAS_HW_NRF_SWI0
select HAS_HW_NRF_SWI1
select HAS_HW_NRF_SWI2
select HAS_HW_NRF_SWI3
select HAS_HW_NRF_SWI4
select HAS_HW_NRF_SWI5
select HAS_HW_NRF_TEMP
select HAS_HW_NRF_TIMER0
select HAS_HW_NRF_TIMER1
select HAS_HW_NRF_TIMER2
select HAS_HW_NRF_TIMER3
select HAS_HW_NRF_TIMER4
select HAS_HW_NRF_TWI0
select HAS_HW_NRF_TWI1
select HAS_HW_NRF_TWIM0
select HAS_HW_NRF_TWIM1
select HAS_HW_NRF_TWIS0
select HAS_HW_NRF_TWIS1
select HAS_HW_NRF_UART0
select HAS_HW_NRF_UARTE0
select HAS_HW_NRF_UARTE1
select HAS_HW_NRF_USBD
select HAS_HW_NRF_WDT
choice
prompt "nRF52x MCU Selection"
depends on SOC_SERIES_NRF52X
config SOC_NRF52810_QFAA
bool "NRF52810_QFAA"
select SOC_NRF52810
config SOC_NRF52811_QFAA
bool "NRF52811_QFAA"
select SOC_NRF52811
config SOC_NRF52832_CIAA
bool "NRF52832_CIAA"
select SOC_NRF52832
config SOC_NRF52832_QFAA
bool "NRF52832_QFAA"
select SOC_NRF52832
config SOC_NRF52832_QFAB
bool "NRF52832_QFAB"
select SOC_NRF52832
config SOC_NRF52840_QIAA
bool "NRF52840_QIAA"
select SOC_NRF52840
endchoice
config SOC_DCDC_NRF52X
bool
help
Enable nRF52 series System on Chip DC/DC converter.
config NFCT_PINS_AS_GPIOS
bool "NFCT pins as GPIOs"
depends on SOC_NRF52832 || SOC_NRF52840
help
P0.9 and P0.10 are usually reserved for NFC. This option switch
them to normal GPIO mode. HW enabling happens once in the device
lifetime, during the first system startup. Disabling this option will
not switch back these pins to NFCT mode. Doing this requires UICR
erase prior to flashing device using the image which has
this option disabled.
config GPIO_AS_PINRESET
bool "GPIO as pin reset (reset button)"
depends on SOC_SERIES_NRF52X
default y
config NRF_ENABLE_ICACHE
bool "Enable the instruction cache (I-Cache)"
depends on SOC_NRF52832 || SOC_NRF52840
default y