)]}'
{
  "commit": "c777ef255b1d0a695e3afcab1ed3af92d49887e0",
  "tree": "9dcb9041e1997033d1ef68d929261de86aa87c6a",
  "parents": [
    "6a31ed50b8294cf46e968511c70b9570f20159d1"
  ],
  "author": {
    "name": "Manuel Argüelles",
    "email": "manuel.arguelles@nxp.com",
    "time": "Sat Nov 04 09:10:03 2023 +0700"
  },
  "committer": {
    "name": "Anas Nashif",
    "email": "anas.nashif@intel.com",
    "time": "Mon Nov 06 19:02:32 2023 -0500"
  },
  "message": "spi: nxp_s32: use instance-based DT macros\n\nAt present, many of the NXP S32 shim drivers do not make use of\ndevicetree instance-based macros because the NXP S32 HAL relies on an\nindex-based approach, requiring knowledge of the peripheral instance\nindex during both compilation and runtime, and this index might not\nalign with the devicetree instance index.\n\nThe proposed solution in this patch eliminates this limitation by\ndetermining the peripheral instance index during compilation\nthrough macrobatics and defining the driver\u0027s ISR within the shim\ndriver itself.\n\nSigned-off-by: Manuel Argüelles \u003cmanuel.arguelles@nxp.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "f0d59ea443d9ca3d657001162f119c362fd44267",
      "old_mode": 33188,
      "old_path": "drivers/spi/spi_nxp_s32.c",
      "new_id": "5acfa1c68a8769d820de6d3809731f5ee4b9c1c6",
      "new_mode": 33188,
      "new_path": "drivers/spi/spi_nxp_s32.c"
    },
    {
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      "old_id": "3d01d1625bf05c4ebb8bd1c6cfc490c98edcac01",
      "old_mode": 33188,
      "old_path": "drivers/spi/spi_nxp_s32.h",
      "new_id": "68f0943b1309d430de5e11a5e0c46bd6da6e4380",
      "new_mode": 33188,
      "new_path": "drivers/spi/spi_nxp_s32.h"
    },
    {
      "type": "modify",
      "old_id": "0ec8c4e2ea7cbb0e291370e281de3ebea90cad71",
      "old_mode": 33188,
      "old_path": "west.yml",
      "new_id": "1998ae734324b8d8212e631a1a74b09edeef5479",
      "new_mode": 33188,
      "new_path": "west.yml"
    }
  ]
}