/*
 * Copyright 2023 NXP
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <zephyr/dt-bindings/pinctrl/imx8qm-pinctrl.h>

&iomuxc {
	iomuxc_uart2_rx_uart0_rts_b: IOMUXC_UART2_RX_UART0_RTS_B {
		pinmux = <SC_P_UART0_RTS_B IMX8QM_DMA_LPUART2_RX_UART0_RTS_B>;
	};

	iomuxc_uart2_tx_uart0_cts_b: IOMUXC_UART2_TX_UART0_CTS_B {
		pinmux = <SC_P_UART0_CTS_B IMX8QM_DMA_LPUART2_TX_UART0_CTS_B>;
	};
};

&pinctrl {
	lpuart2_default: lpuart2_default {
		group0 {
			pinmux = <&iomuxc_uart2_rx_uart0_rts_b>,
				<&iomuxc_uart2_tx_uart0_cts_b>;
		};
	};
};