/*
 * Copyright (c) 2018 SiFive Inc.
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/* GPIO 0 */
#define CONFIG_SIFIVE_GPIO_0_BASE_ADDR	SIFIVE_GPIO0_10012000_BASE_ADDRESS
#define CONFIG_SIFIVE_GPIO_0_IRQ_0		SIFIVE_GPIO0_10012000_IRQ_0
#define CONFIG_SIFIVE_GPIO_0_IRQ_1		SIFIVE_GPIO0_10012000_IRQ_1
#define CONFIG_SIFIVE_GPIO_0_IRQ_2		SIFIVE_GPIO0_10012000_IRQ_2
#define CONFIG_SIFIVE_GPIO_0_IRQ_3		SIFIVE_GPIO0_10012000_IRQ_3
#define CONFIG_SIFIVE_GPIO_0_IRQ_4		SIFIVE_GPIO0_10012000_IRQ_4
#define CONFIG_SIFIVE_GPIO_0_IRQ_5		SIFIVE_GPIO0_10012000_IRQ_5
#define CONFIG_SIFIVE_GPIO_0_IRQ_6		SIFIVE_GPIO0_10012000_IRQ_6
#define CONFIG_SIFIVE_GPIO_0_IRQ_7		SIFIVE_GPIO0_10012000_IRQ_7
#define CONFIG_SIFIVE_GPIO_0_IRQ_8		SIFIVE_GPIO0_10012000_IRQ_8
#define CONFIG_SIFIVE_GPIO_0_IRQ_9		SIFIVE_GPIO0_10012000_IRQ_9
#define CONFIG_SIFIVE_GPIO_0_IRQ_10		SIFIVE_GPIO0_10012000_IRQ_10
#define CONFIG_SIFIVE_GPIO_0_IRQ_11		SIFIVE_GPIO0_10012000_IRQ_11
#define CONFIG_SIFIVE_GPIO_0_IRQ_12		SIFIVE_GPIO0_10012000_IRQ_12
#define CONFIG_SIFIVE_GPIO_0_IRQ_13		SIFIVE_GPIO0_10012000_IRQ_13
#define CONFIG_SIFIVE_GPIO_0_IRQ_14		SIFIVE_GPIO0_10012000_IRQ_14
#define CONFIG_SIFIVE_GPIO_0_IRQ_15		SIFIVE_GPIO0_10012000_IRQ_15
#define CONFIG_SIFIVE_GPIO_0_IRQ_16		SIFIVE_GPIO0_10012000_IRQ_16
#define CONFIG_SIFIVE_GPIO_0_IRQ_17		SIFIVE_GPIO0_10012000_IRQ_17
#define CONFIG_SIFIVE_GPIO_0_IRQ_18		SIFIVE_GPIO0_10012000_IRQ_18
#define CONFIG_SIFIVE_GPIO_0_IRQ_19		SIFIVE_GPIO0_10012000_IRQ_19
#define CONFIG_SIFIVE_GPIO_0_IRQ_20		SIFIVE_GPIO0_10012000_IRQ_20
#define CONFIG_SIFIVE_GPIO_0_IRQ_21		SIFIVE_GPIO0_10012000_IRQ_21
#define CONFIG_SIFIVE_GPIO_0_IRQ_22		SIFIVE_GPIO0_10012000_IRQ_22
#define CONFIG_SIFIVE_GPIO_0_IRQ_23		SIFIVE_GPIO0_10012000_IRQ_23
#define CONFIG_SIFIVE_GPIO_0_IRQ_24		SIFIVE_GPIO0_10012000_IRQ_24
#define CONFIG_SIFIVE_GPIO_0_IRQ_25		SIFIVE_GPIO0_10012000_IRQ_25
#define CONFIG_SIFIVE_GPIO_0_IRQ_26		SIFIVE_GPIO0_10012000_IRQ_26
#define CONFIG_SIFIVE_GPIO_0_IRQ_27		SIFIVE_GPIO0_10012000_IRQ_27
#define CONFIG_SIFIVE_GPIO_0_IRQ_28		SIFIVE_GPIO0_10012000_IRQ_28
#define CONFIG_SIFIVE_GPIO_0_IRQ_29		SIFIVE_GPIO0_10012000_IRQ_29
#define CONFIG_SIFIVE_GPIO_0_IRQ_30		SIFIVE_GPIO0_10012000_IRQ_30
#define CONFIG_SIFIVE_GPIO_0_IRQ_31		SIFIVE_GPIO0_10012000_IRQ_31
#define CONFIG_SIFIVE_GPIO_0_SIZE		SIFIVE_GPIO0_10012000_SIZE

/* UART 0 */
#define CONFIG_SIFIVE_UART_0_BASE_ADDR	SIFIVE_UART0_10013000_BASE_ADDRESS
#define CONFIG_SIFIVE_UART_0_CURRENT_SPEED	SIFIVE_UART0_10013000_CURRENT_SPEED
#define CONFIG_SIFIVE_UART_0_IRQ_0		SIFIVE_UART0_10013000_IRQ_0
#define CONFIG_SIFIVE_UART_0_LABEL		SIFIVE_UART0_10013000_LABEL
#define CONFIG_SIFIVE_UART_0_SIZE		SIFIVE_UART0_10013000_SIZE

/* UART 1 */
#define CONFIG_SIFIVE_UART_1_BASE_ADDR	SIFIVE_UART0_10023000_BASE_ADDRESS
#define CONFIG_SIFIVE_UART_1_CURRENT_SPEED	SIFIVE_UART0_10023000_CURRENT_SPEED
#define CONFIG_SIFIVE_UART_1_IRQ_0		SIFIVE_UART0_10023000_IRQ_0
#define CONFIG_SIFIVE_UART_1_SIZE		SIFIVE_UART0_10023000_SIZE