# ADC configuration options

# Copyright (c) 2015 Intel Corporation
# SPDX-License-Identifier: Apache-2.0

config ADC_MCUX_ADC12
	bool "MCUX ADC12 driver"
	default y
	depends on DT_HAS_NXP_ADC12_ENABLED
	select PINCTRL
	help
	  Enable the MCUX ADC12 driver.

config ADC_MCUX_ADC16
	bool "MCUX ADC16 driver"
	default y
	depends on DT_HAS_NXP_KINETIS_ADC16_ENABLED
	select PINCTRL
	help
	  Enable the MCUX ADC16 driver.

config ADC_MCUX_12B1MSPS_SAR
	bool "MCUX 12B1MSPS SAR ADC driver"
	default y
	select PINCTRL
	depends on DT_HAS_NXP_MCUX_12B1MSPS_SAR_ENABLED
	help
	  Enable the MCUX 12B1MSPS SAR ADC driver.

config ADC_MCUX_LPADC
	bool "MCUX LPADC driver"
	default y
	select ADC_CONFIGURABLE_INPUTS
	select REGULATOR
	select PINCTRL
	depends on DT_HAS_NXP_LPC_LPADC_ENABLED
	help
	  Enable the MCUX LPADC driver.

config ADC_MCUX_SAR_ADC
	bool "MCUX SAR ADC driver"
	default y
	select ADC_CONFIGURABLE_INPUTS
	depends on DT_HAS_NXP_SAR_ADC_ENABLED
	help
	  Enable the MCUX SAR ADC driver.

config ADC_MCUX_GAU
	bool "MCUX GAU ADC driver"
	default y
	depends on DT_HAS_NXP_GAU_ADC_ENABLED
	select ADC_CONFIGURABLE_INPUTS
	help
	  Enable the GAU ADC driver

if ADC_MCUX_ADC16

choice
	prompt "Clock Divide Selection"
	default ADC_MCUX_ADC16_CLK_DIV_RATIO_1

config ADC_MCUX_ADC16_CLK_DIV_RATIO_1
	bool "Divide ratio is 1"

config ADC_MCUX_ADC16_CLK_DIV_RATIO_2
	bool "Divide ratio is 2"

config ADC_MCUX_ADC16_CLK_DIV_RATIO_4
	bool "Divide ratio is 4"

config ADC_MCUX_ADC16_CLK_DIV_RATIO_8
	bool "Divide ratio is 8"

endchoice

choice ADC_MCUX_ADC16_VREF
	prompt "Voltage Reference Selection"
	default ADC_MCUX_ADC16_VREF_DEFAULT

config ADC_MCUX_ADC16_VREF_DEFAULT
	bool "Default voltage reference pair V_REFH and V_REFL"

config ADC_MCUX_ADC16_VREF_ALTERNATE
	bool "Alternate reference pair"

endchoice

config ADC_MCUX_ADC16_ENABLE_EDMA
	bool "EDMA for adc driver"
	depends on DMA_MCUX_EDMA
	help
	  Enable the MCUX ADC16 driver.

if ADC_MCUX_ADC16_ENABLE_EDMA

config ADC_MCUX_ADC16_HW_TRIGGER
	bool "ADC HW TRIGGER"
	default y
	help
	  Support HW Trigger ADC

endif # ADC_MCUX_ADC16_ENABLE_EDMA

endif # ADC_MCUX_ADC16


if ADC_MCUX_LPADC

config LPADC_DO_OFFSET_CALIBRATION
	bool "Do offset calibration"
	help
	  Do offset calibration

config LPADC_CHANNEL_COUNT
	int "LPADC channel count"
	default 15
	range 1 15
	help
	  Amount of hardware command channels to use, reduce to save RAM.
	  The user can reduce this value if their application uses fewer than
	  15 ADC channels. This value corresponds to how many of the CMD
	  registers can be configured within the ADC.


endif # ADC_MCUX_LPADC

if ADC_MCUX_SAR_ADC

config SAR_ADC_CHANNEL_COUNT
	int "SAR_ADC channel count"
	default 8
	range 1 8
	help
	  Amount of hardware channels to use, reduce to save RAM.
	  The user can reduce this value if their application uses fewer than
	  8 ADC channels.

endif # ADC_MCUX_SAR_ADC