/*
 * Copyright (c) 2023 TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <mem.h>
#include <freq.h>
#include <arm/armv7-m.dtsi>
#include <zephyr/dt-bindings/interrupt-controller/renesas-ra-icu.h>

/ {
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-m4";
			reg = <0>;
		};
	};

	clocks {
		mosc: mosc {
			compatible = "fixed-clock";
			clock-frequency = <1200000>;
			status = "disabled";
			#clock-cells = <0>;
		};

		sosc: sosc {
			compatible = "fixed-clock";
			clock-frequency = <32768>;
			status = "disabled";
			#clock-cells = <0>;
		};

		hoco: hoco {
			compatible = "fixed-clock";
			clock-frequency = <24000000>;
			status = "okay";
			#clock-cells = <0>;
		};

		moco: moco {
			compatible = "fixed-clock";
			clock-frequency = <8000000>;
			status = "okay";
			#clock-cells = <0>;
		};

		loco: loco {
			compatible = "fixed-clock";
			clock-frequency = <32768>;
			status = "okay";
			#clock-cells = <0>;
		};

		pll: pll {
			compatible = "fixed-factor-clock";
			status = "disabled";
			clocks = <&mosc>;
			clock-div = <2>;
			clock-mult = <8>;
			#clock-cells = <0>;
		};
	};

	sram0: memory0@20000000 {
		compatible = "mmio-sram";
		reg = <0x20000000 DT_SIZE_K(32)>;
	};

	soc {
		interrupt-parent = <&icu>;
		icu: interrupt-controller@40006000 {
			compatible = "renesas,ra-interrupt-controller-unit";
			reg = <0x40006000 0x40>;
			reg-names = "icu";
			interrupt-controller;
			#interrupt-cells = <3>;
		};

		cgc: cgc@4001e000 {
			compatible = "renesas,ra-clock-generation-circuit";
			reg = <0x4001e000 0x40 0x40047000 0x10>;
			reg-names = "system", "mstp";
			#clock-cells = <1>;

			clock-source = <&moco>;
			iclk-div = <16>;
			pclka-div = <16>;
			pclkb-div = <16>;
			pclkc-div = <16>;
			pclkd-div = <16>;
			fclk-div = <16>;
		};

		fcu: flash-controller@4001c000 {
			compatible = "renesas,ra-flash-controller";
			reg = <0x4001c000 0x44>;
			reg-names = "fcache";

			#address-cells = <1>;
			#size-cells = <1>;

			flash0: flash0@0 {
				compatible = "soc-nv-flash";
				reg = <0x00000000 DT_SIZE_K(256)>;
			};

			flash1: flash1@40100000 {
				compatible = "soc-nv-flash";
				reg = <0x40100000 DT_SIZE_K(8)>;
			};
		};

		ioport0: gpio@40040000 {
			compatible = "renesas,ra-gpio";
			reg = <0x40040000 0x20>;
			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <16>;
			interrupts = <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ2>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ3>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ6>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ7>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ10>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ15>;
			interrupt-names = "port-irq2", "port-irq3", "port-irq6",
					  "port-irq7", "port-irq10", "port-irq15";
			port-irq2-pins = <2>;
			port-irq3-pins = <4>;
			port-irq6-pins = <0>;
			port-irq7-pins = <1 15>;
			port-irq10-pins = <5>;
			port-irq15-pins = <11>;
			status = "disabled";
		};

		ioport1: gpio@40040020 {
			compatible = "renesas,ra-gpio";
			reg = <0x40040020 0x20>;
			gpio-controller;
			#gpio-cells = <2>;
			interrupts = <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ0>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ1>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ2>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ3>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ4>;
			interrupt-names = "port-irq0", "port-irq1", "port-irq2",
					  "port-irq3", "port-irq4";
			port-irq0-pins = <5>;
			port-irq1-pins = <1>;
			port-irq2-pins = <0>;
			port-irq3-pins = <10>;
			port-irq4-pins = <11>;
			ngpios = <16>;
			status = "disabled";
		};

		ioport2: gpio@40040040 {
			compatible = "renesas,ra-gpio";
			reg = <0x40040040 0x20>;
			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <16>;
			interrupts = <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ0>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ1>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ2>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ3>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ9>;
			interrupt-names = "port-irq0", "port-irq1", "port-irq2",
					  "port-irq3", "port-irq9";
			port-irq0-pins = <6>;
			port-irq1-pins = <5>;
			port-irq2-pins = <13>;
			port-irq3-pins = <12>;
			status = "disabled";
		};

		ioport3: gpio@40040060 {
			compatible = "renesas,ra-gpio";
			reg = <0x40040060 0x20>;
			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <16>;
			interrupts = <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ5>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ6>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ8>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ9>;
			interrupt-names = "port-irq5", "port-irq6", "port-irq8", "port-irq9";
			port-irq5-pins = <2>;
			port-irq6-pins = <1>;
			port-irq8-pins = <5>;
			port-irq9-pins = <4>;
			status = "disabled";
		};

		ioport4: gpio@40040080 {
			compatible = "renesas,ra-gpio";
			reg = <0x40040080 0x20>;
			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <16>;
			interrupts = <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ0>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ4>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ5>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ6>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ7>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ8>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ9>;
			interrupt-names = "port-irq0", "port-irq4", "port-irq5", "port-irq6",
					  "port-irq7", "port-irq8", "port-irq9";
			port-irq0-pins = <0>;
			port-irq4-pins = <2 11>;
			port-irq5-pins = <1 10>;
			port-irq6-pins = <9>;
			port-irq7-pins = <8>;
			port-irq8-pins = <15>;
			port-irq9-pins = <14>;
			status = "disabled";
		};

		ioport5: gpio@400400a0 {
			compatible = "renesas,ra-gpio";
			reg = <0x400400a0 0x20>;
			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <16>;
			interrupts = <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ11>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ12>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_PORT_IRQ14>;
			interrupt-names = "port-irq11", "port-irq12", "port-irq14";
			port-irq11-pins = <1>;
			port-irq12-pins = <2>;
			port-irq14-pins = <5>;
			status = "disabled";
		};

		pinctrl: pinctrl@40040800 {
			compatible = "renesas,ra-pinctrl";
			reg = <0x40040800 0x500 0x40040d03 0x1>;
			reg-names = "pfs", "pmisc_pwpr";
			status = "okay";
		};

		sci0: sci@40070000 {
			compatible = "renesas,ra-sci";
			reg = <0x40070000 0x20>;
			interrupts = <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI0_RXI>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI0_TXI>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI0_TEI>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI0_ERI>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI0_AM>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI0_RXI_OR_ERI>;
			interrupt-names = "rxi", "txi", "tei", "eri", "am", "rxi-or-eri";
			clocks = <&cgc RA_CLOCK_SCI(0)>;
			#clock-cells = <1>;
			status = "disabled";
			uart {
				compatible = "renesas,ra-uart-sci";
				status = "disabled";
			};
		};

		sci1: sci@40070020 {
			compatible = "renesas,ra-sci";
			reg = <0x40070020 0x20>;
			interrupts = <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI1_RXI>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI1_TXI>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI1_TEI>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI1_ERI>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI1_AM>;
			interrupt-names = "rxi", "txi", "tei", "eri", "am";
			clocks = <&cgc RA_CLOCK_SCI(1)>;
			#clock-cells = <1>;
			status = "disabled";
			uart {
				compatible = "renesas,ra-uart-sci";
				status = "disabled";
			};
		};

		sci9: sci@40070120 {
			compatible = "renesas,ra-sci";
			reg = <0x40070120 0x20>;
			interrupts = <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI9_RXI>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI9_TXI>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI9_TEI>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI9_ERI>,
				     <RA_ICU_IRQ_UNSPECIFIED 0 RA_ICU_SCI9_AM>;
			interrupt-names = "rxi", "txi", "tei", "eri", "am";
			clocks = <&cgc RA_CLOCK_SCI(9)>;
			#clock-cells = <1>;
			status = "disabled";
			uart {
				compatible = "renesas,ra-uart-sci";
				status = "disabled";
			};
		};
	};
};

&nvic {
	arm,num-irq-priority-bits = <4>;
};