/*
 * Copyright (c) 2019 SEAL AG
 * Copyright (c) 2020 Thomas Stranger
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <st/g0/stm32g030.dtsi>

/ {
	soc {
		lpuart1: serial@40008000 {
			compatible = "st,stm32-lpuart", "st,stm32-uart";
			reg = <0x40008000 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00100000>;
			resets = <&rctl STM32_RESET(APB1L, 20U)>;
			interrupts = <29 0>;
			status = "disabled";
		};

		timers2: timers@40000000 {
			compatible = "st,stm32-timers";
			reg = <0x40000000 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000001>;
			resets = <&rctl STM32_RESET(APB1L, 0U)>;
			interrupts = <15 0>;
			interrupt-names = "global";
			st,prescaler = <0>;
			status = "disabled";

			pwm {
				compatible = "st,stm32-pwm";
				status = "disabled";
				#pwm-cells = <3>;
			};
		};
	};
};