| # Copyright (c) 2014-2015 Wind River Systems, Inc. |
| # Copyright (c) 2016 Cadence Design Systems, Inc. |
| # Copyright (c) 2019 Intel Corp. |
| # SPDX-License-Identifier: Apache-2.0 |
| |
| config CAVS_TIMER |
| bool "CAVS DSP Wall Clock Timer on Intel SoC" |
| select TICKLESS_CAPABLE |
| select TIMER_HAS_64BIT_CYCLE_COUNTER |
| help |
| The DSP wall clock timer is a timer driven directly by |
| external oscillator and is external to the CPU core(s). |
| It is not as fast as the internal core clock, but provides |
| a common and synchronized counter for all CPU cores (which |
| is useful for SMP). |
