# Intel CAVS SoC family configuration options
#
# Copyright (c) 2020 Intel Corporation
# SPDX-License-Identifier: Apache-2.0

config SOC_FAMILY_INTEL_ADSP
	select WINSTREAM
	select ARCH_SUPPORTS_COREDUMP
	bool

if SOC_FAMILY_INTEL_ADSP

config SOC_FAMILY
	string
	default "intel_adsp"

# Select SoC Part No. and configuration options
source "soc/xtensa/intel_adsp/*/Kconfig.soc"

config CAVS_IPC
	bool
	default y if !SOF
	help
	  Driver for the host IPC interrupt delivery mechanism.
	  Currently SOF has its own driver for this hardware.

config CAVS_CLOCK
	bool
	help
	  Driver for the CAVS clocks. Allow type of clock (and
	  thus frequency) to be chosen.

config HP_SRAM_RESERVE
	int "Bytes to reserve at start of HP-SRAM"
	default 65536
	help
	  Bytes to reserve at the start of HP-SRAM.  Zephyr will not
	  place any symbols here, though the host windows have
	  addresses here.  The SOF application also makes direct use
	  of this region, so be very careful changing this value.

config ADSP_WIN0_OFFSET
	int "Byte offset of host window zero"
	default 16384
	help
	  Offset of the first host shared memory window (used for the
	  "firmware status register" at boot) within the reserved
	  region at the start of HP-SRAM.

config ADSP_WIN3_OFFSET
	int "Byte offset of host window three"
	default 40960
	help
	  Offset of the fourth host shared memory window (used for
	  printk/log output) within the reserved region at the start
	  of HP-SRAM.

config ADSP_TRACE_SIMCALL
	bool "Emit SIMCALL output in addition to window tracing"
	help
	  When true, the trace_out layer will also use a SIMCALL
	  instruction to emit the passed data to the standard output
	  of an enclosing simulator process.  All window contents will
	  remain identical.

endif # SOC_FAMILY_INTEL_ADSP