dts: arm:st: stm32f4: fix dma phandle lists
Correct STM32F4xx SoCs DMA lists that were not split by phandle and
seemed to form unique phandles. This is not currently as issue with
existing DT parsing macros and tools but may generate build errors
if tools are more strict on the DTS implementation formats.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
diff --git a/dts/arm/st/f4/stm32f401.dtsi b/dts/arm/st/f4/stm32f401.dtsi
index 60a2780..e21c4bc 100644
--- a/dts/arm/st/f4/stm32f401.dtsi
+++ b/dts/arm/st/f4/stm32f401.dtsi
@@ -55,8 +55,8 @@
reg = <0x40003800 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 14)>;
interrupts = <36 5>;
- dmas = <&dma1 4 0 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL
- &dma1 3 0 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>;
+ dmas = <&dma1 4 0 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>,
+ <&dma1 3 0 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>;
dma-names = "tx", "rx";
status = "disabled";
};
@@ -68,8 +68,8 @@
reg = <0x40003c00 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 15)>;
interrupts = <51 5>;
- dmas = <&dma1 5 0 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL
- &dma1 0 0 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>;
+ dmas = <&dma1 5 0 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>,
+ <&dma1 0 0 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>;
dma-names = "tx", "rx";
status = "disabled";
};
diff --git a/dts/arm/st/f4/stm32f410.dtsi b/dts/arm/st/f4/stm32f410.dtsi
index 1aa1790..c1922e8 100644
--- a/dts/arm/st/f4/stm32f410.dtsi
+++ b/dts/arm/st/f4/stm32f410.dtsi
@@ -42,8 +42,8 @@
reg = <0x40013000 0x400>;
clocks = <&rcc STM32_CLOCK(APB2, 12)>;
interrupts = <35 5>;
- dmas = <&dma2 3 3 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL
- &dma2 2 3 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>;
+ dmas = <&dma2 3 3 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>,
+ <&dma2 2 3 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>;
dma-names = "tx", "rx";
status = "disabled";
};
@@ -55,8 +55,8 @@
reg = <0x40003800 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 14)>;
interrupts = <36 5>;
- dmas = <&dma1 4 0 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL
- &dma1 3 0 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>;
+ dmas = <&dma1 4 0 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>,
+ <&dma1 3 0 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>;
dma-names = "tx", "rx";
status = "disabled";
};
@@ -68,8 +68,8 @@
reg = <0x40015000 0x400>;
clocks = <&rcc STM32_CLOCK(APB2, 20)>;
interrupts = <85 5>;
- dmas = <&dma2 6 7 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL
- &dma2 5 7 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>;
+ dmas = <&dma2 6 7 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>,
+ <&dma2 5 7 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>;
dma-names = "tx", "rx";
status = "disabled";
};
diff --git a/dts/arm/st/f4/stm32f411.dtsi b/dts/arm/st/f4/stm32f411.dtsi
index 6654d29..1cf4355 100644
--- a/dts/arm/st/f4/stm32f411.dtsi
+++ b/dts/arm/st/f4/stm32f411.dtsi
@@ -35,8 +35,8 @@
reg = <0x40013000 0x400>;
clocks = <&rcc STM32_CLOCK(APB2, 12)>;
interrupts = <35 5>;
- dmas = <&dma2 3 3 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL
- &dma2 2 3 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>;
+ dmas = <&dma2 3 3 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>,
+ <&dma2 2 3 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>;
dma-names = "tx", "rx";
status = "disabled";
};
@@ -48,8 +48,8 @@
reg = <0x40013400 0x400>;
clocks = <&rcc STM32_CLOCK(APB2, 13)>;
interrupts = <84 5>;
- dmas = <&dma2 1 4 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL
- &dma2 0 4 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>;
+ dmas = <&dma2 1 4 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>,
+ <&dma2 0 4 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>;
dma-names = "tx", "rx";
status = "disabled";
};
@@ -61,8 +61,8 @@
reg = <0x40015000 0x400>;
clocks = <&rcc STM32_CLOCK(APB2, 20)>;
interrupts = <85 5>;
- dmas = <&dma2 6 7 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL
- &dma2 5 7 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>;
+ dmas = <&dma2 6 7 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>,
+ <&dma2 5 7 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>;
dma-names = "tx", "rx";
status = "disabled";
};
diff --git a/dts/arm/st/f4/stm32f412.dtsi b/dts/arm/st/f4/stm32f412.dtsi
index a9deba7..9308334 100644
--- a/dts/arm/st/f4/stm32f412.dtsi
+++ b/dts/arm/st/f4/stm32f412.dtsi
@@ -85,8 +85,8 @@
reg = <0x40013400 0x400>;
clocks = <&rcc STM32_CLOCK(APB2, 13)>;
interrupts = <84 5>;
- dmas = <&dma2 1 4 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL
- &dma2 0 4 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>;
+ dmas = <&dma2 1 4 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>,
+ <&dma2 0 4 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>;
dma-names = "tx", "rx";
status = "disabled";
};
diff --git a/dts/arm/st/f4/stm32f446.dtsi b/dts/arm/st/f4/stm32f446.dtsi
index 0231fba..fb5ec32 100644
--- a/dts/arm/st/f4/stm32f446.dtsi
+++ b/dts/arm/st/f4/stm32f446.dtsi
@@ -31,8 +31,8 @@
reg = <0x40013000 0x400>;
clocks = <&rcc STM32_CLOCK(APB2, 12)>;
interrupts = <35 5>;
- dmas = <&dma2 3 3 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL
- &dma2 2 3 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>;
+ dmas = <&dma2 3 3 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>,
+ <&dma2 2 3 STM32_DMA_MEM_INC STM32_DMA_FIFO_FULL>;
dma-names = "tx", "rx";
status = "disabled";
};
