diff --git a/drivers/sensor/bmi270/bmi270.c b/drivers/sensor/bmi270/bmi270.c
index 925ca81..c1e0537 100644
--- a/drivers/sensor/bmi270/bmi270.c
+++ b/drivers/sensor/bmi270/bmi270.c
@@ -23,24 +23,26 @@
 #define BMI270_CONFIG_FILE_POLL_PERIOD_US       10000
 #define BMI270_INTER_WRITE_DELAY_US             1000
 
-static int reg_read(uint8_t reg, uint8_t *data, uint16_t length,
-		    struct bmi270_data *dev)
+static int reg_read(const struct device *dev, uint8_t reg, uint8_t *data, uint16_t length)
 {
-	return i2c_burst_read(dev->i2c, dev->i2c_addr, reg, data, length);
+	struct bmi270_data *drv_dev = dev->data;
+
+	return i2c_burst_read(drv_dev->i2c, drv_dev->i2c_addr, reg, data, length);
 }
 
-static int reg_write(uint8_t reg, const uint8_t *data, uint16_t length,
-		     struct bmi270_data *dev)
+static int reg_write(const struct device *dev, uint8_t reg, const uint8_t *data, uint16_t length)
 {
-	return i2c_burst_write(dev->i2c, dev->i2c_addr, reg, data, length);
+	struct bmi270_data *drv_dev = dev->data;
+
+	return i2c_burst_write(drv_dev->i2c, drv_dev->i2c_addr, reg, data, length);
 }
 
-static int reg_write_with_delay(uint8_t reg, const uint8_t *data, uint16_t length,
-		     struct bmi270_data *dev, uint32_t delay_us)
+static int reg_write_with_delay(const struct device *dev, uint8_t reg, const uint8_t *data,
+				uint16_t length, uint32_t delay_us)
 {
 	int ret = 0;
 
-	ret = reg_write(reg, data, length, dev);
+	ret = reg_write(dev, reg, data, length);
 	if (ret == 0) {
 		k_usleep(delay_us);
 	}
@@ -115,19 +117,20 @@
 	return reg;
 }
 
-static int set_accel_odr_osr(const struct sensor_value *odr,
-			     const struct sensor_value *osr, struct bmi270_data *dev)
+static int set_accel_odr_osr(const struct device *dev, const struct sensor_value *odr,
+			     const struct sensor_value *osr)
 {
+	struct bmi270_data *drv_dev = dev->data;
 	uint8_t acc_conf, odr_bits, pwr_ctrl, osr_bits;
 	int ret = 0;
 
 	if (odr || osr) {
-		ret = reg_read(BMI270_REG_ACC_CONF, &acc_conf, 1, dev);
+		ret = reg_read(dev, BMI270_REG_ACC_CONF, &acc_conf, 1);
 		if (ret != 0) {
 			return ret;
 		}
 
-		ret = reg_read(BMI270_REG_PWR_CTRL, &pwr_ctrl, 1, dev);
+		ret = reg_read(dev, BMI270_REG_PWR_CTRL, &pwr_ctrl, 1);
 		if (ret != 0) {
 			return ret;
 		}
@@ -159,11 +162,11 @@
 						   BMI270_ACC_FILT_PWR_OPT);
 		}
 
-		dev->acc_odr = odr_bits;
+		drv_dev->acc_odr = odr_bits;
 	}
 
 	if (osr) {
-		if (dev->acc_odr >= BMI270_ACC_ODR_100_HZ) {
+		if (drv_dev->acc_odr >= BMI270_ACC_ODR_100_HZ) {
 			/* Performance mode */
 			/* osr->val2 should be unused */
 			switch (osr->val1) {
@@ -218,7 +221,7 @@
 	}
 
 	if (odr || osr) {
-		ret = reg_write(BMI270_REG_ACC_CONF, &acc_conf, 1, dev);
+		ret = reg_write(dev, BMI270_REG_ACC_CONF, &acc_conf, 1);
 		if (ret != 0) {
 			return ret;
 		}
@@ -227,20 +230,20 @@
 		k_usleep(BMI270_TRANSC_DELAY_SUSPEND);
 
 		pwr_ctrl &= BMI270_PWR_CTRL_MSK;
-		ret = reg_write_with_delay(BMI270_REG_PWR_CTRL, &pwr_ctrl, 1, dev,
+		ret = reg_write_with_delay(dev, BMI270_REG_PWR_CTRL, &pwr_ctrl, 1,
 			BMI270_INTER_WRITE_DELAY_US);
 	}
 
 	return ret;
 }
 
-static int set_accel_range(const struct sensor_value *range,
-			   struct bmi270_data *dev)
+static int set_accel_range(const struct device *dev, const struct sensor_value *range)
 {
+	struct bmi270_data *drv_dev = dev->data;
 	int ret = 0;
 	uint8_t acc_range, reg;
 
-	ret = reg_read(BMI270_REG_ACC_RANGE, &acc_range, 1, dev);
+	ret = reg_read(dev, BMI270_REG_ACC_RANGE, &acc_range, 1);
 	if (ret != 0) {
 		return ret;
 	}
@@ -249,19 +252,19 @@
 	switch (range->val1) {
 	case 2:
 		reg = BMI270_ACC_RANGE_2G;
-		dev->acc_range = 2;
+		drv_dev->acc_range = 2;
 		break;
 	case 4:
 		reg = BMI270_ACC_RANGE_4G;
-		dev->acc_range = 4;
+		drv_dev->acc_range = 4;
 		break;
 	case 8:
 		reg = BMI270_ACC_RANGE_8G;
-		dev->acc_range = 8;
+		drv_dev->acc_range = 8;
 		break;
 	case 16:
 		reg = BMI270_ACC_RANGE_16G;
-		dev->acc_range = 16;
+		drv_dev->acc_range = 16;
 		break;
 	default:
 		return -ENOTSUP;
@@ -269,8 +272,8 @@
 
 	acc_range = BMI270_SET_BITS_POS_0(acc_range, BMI270_ACC_RANGE,
 					  reg);
-	ret = reg_write_with_delay(BMI270_REG_ACC_RANGE, &acc_range, 1, dev,
-		BMI270_INTER_WRITE_DELAY_US);
+	ret = reg_write_with_delay(dev, BMI270_REG_ACC_RANGE, &acc_range, 1,
+				   BMI270_INTER_WRITE_DELAY_US);
 
 	return ret;
 }
@@ -301,19 +304,20 @@
 	return reg;
 }
 
-static int set_gyro_odr_osr(const struct sensor_value *odr,
-			    const struct sensor_value *osr, struct bmi270_data *dev)
+static int set_gyro_odr_osr(const struct device *dev, const struct sensor_value *odr,
+			    const struct sensor_value *osr)
 {
+	struct bmi270_data *drv_dev = dev->data;
 	uint8_t gyr_conf, odr_bits, pwr_ctrl, osr_bits;
 	int ret = 0;
 
 	if (odr || osr) {
-		ret = reg_read(BMI270_REG_GYR_CONF, &gyr_conf, 1, dev);
+		ret = reg_read(dev, BMI270_REG_GYR_CONF, &gyr_conf, 1);
 		if (ret != 0) {
 			return ret;
 		}
 
-		ret = reg_read(BMI270_REG_PWR_CTRL, &pwr_ctrl, 1, dev);
+		ret = reg_read(dev, BMI270_REG_PWR_CTRL, &pwr_ctrl, 1);
 		if (ret != 0) {
 			return ret;
 		}
@@ -353,7 +357,7 @@
 						   BMI270_GYR_FILT_NOISE_PWR);
 		}
 
-		dev->gyr_odr = odr_bits;
+		drv_dev->gyr_odr = odr_bits;
 	}
 
 	if (osr) {
@@ -375,7 +379,7 @@
 	}
 
 	if (odr || osr) {
-		ret = reg_write(BMI270_REG_GYR_CONF, &gyr_conf, 1, dev);
+		ret = reg_write(dev, BMI270_REG_GYR_CONF, &gyr_conf, 1);
 		if (ret != 0) {
 			return ret;
 		}
@@ -384,20 +388,20 @@
 		k_usleep(BMI270_TRANSC_DELAY_SUSPEND);
 
 		pwr_ctrl &= BMI270_PWR_CTRL_MSK;
-		ret = reg_write_with_delay(BMI270_REG_PWR_CTRL, &pwr_ctrl, 1, dev,
+		ret = reg_write_with_delay(dev, BMI270_REG_PWR_CTRL, &pwr_ctrl, 1,
 			BMI270_INTER_WRITE_DELAY_US);
 	}
 
 	return ret;
 }
 
-static int set_gyro_range(const struct sensor_value *range,
-			  struct bmi270_data *dev)
+static int set_gyro_range(const struct device *dev, const struct sensor_value *range)
 {
+	struct bmi270_data *drv_dev = dev->data;
 	int ret = 0;
 	uint8_t gyr_range, reg;
 
-	ret = reg_read(BMI270_REG_GYR_RANGE, &gyr_range, 1, dev);
+	ret = reg_read(dev, BMI270_REG_GYR_RANGE, &gyr_range, 1);
 	if (ret != 0) {
 		return ret;
 	}
@@ -406,36 +410,36 @@
 	switch (range->val1) {
 	case 125:
 		reg = BMI270_GYR_RANGE_125DPS;
-		dev->gyr_range = 125;
+		drv_dev->gyr_range = 125;
 		break;
 	case 250:
 		reg = BMI270_GYR_RANGE_250DPS;
-		dev->gyr_range = 250;
+		drv_dev->gyr_range = 250;
 		break;
 	case 500:
 		reg = BMI270_GYR_RANGE_500DPS;
-		dev->gyr_range = 500;
+		drv_dev->gyr_range = 500;
 		break;
 	case 1000:
 		reg = BMI270_GYR_RANGE_1000DPS;
-		dev->gyr_range = 1000;
+		drv_dev->gyr_range = 1000;
 		break;
 	case 2000:
 		reg = BMI270_GYR_RANGE_2000DPS;
-		dev->gyr_range = 2000;
+		drv_dev->gyr_range = 2000;
 		break;
 	default:
 		return -ENOTSUP;
 	}
 
 	gyr_range = BMI270_SET_BITS_POS_0(gyr_range, BMI270_GYR_RANGE, reg);
-	ret = reg_write_with_delay(BMI270_REG_GYR_RANGE, &gyr_range, 1, dev,
+	ret = reg_write_with_delay(dev, BMI270_REG_GYR_RANGE, &gyr_range, 1,
 		BMI270_INTER_WRITE_DELAY_US);
 
 	return ret;
 }
 
-static int8_t write_config_file(struct bmi270_data *dev)
+static int8_t write_config_file(const struct device *dev)
 {
 	int8_t ret = 0;
 	uint16_t index = 0;
@@ -450,13 +454,13 @@
 		/* Store 4 to 11 bits of address in the second byte */
 		addr_array[1] = (uint8_t)((index / 2) >> 4);
 
-		ret = reg_write_with_delay(BMI270_REG_INIT_ADDR_0, addr_array, 2, dev,
+		ret = reg_write_with_delay(dev, BMI270_REG_INIT_ADDR_0, addr_array, 2,
 			BMI270_INTER_WRITE_DELAY_US);
 
 		if (ret == 0) {
-			ret = reg_write_with_delay(BMI270_REG_INIT_DATA,
+			ret = reg_write_with_delay(dev, BMI270_REG_INIT_DATA,
 				(bmi270_config_file + index),
-				BMI270_WR_LEN, dev, BMI270_INTER_WRITE_DELAY_US);
+				BMI270_WR_LEN, BMI270_INTER_WRITE_DELAY_US);
 		}
 	}
 
@@ -473,7 +477,7 @@
 		return -ENOTSUP;
 	}
 
-	ret = reg_read(BMI270_REG_ACC_X_LSB, data, 12, drv_dev);
+	ret = reg_read(dev, BMI270_REG_ACC_X_LSB, data, 12);
 	if (ret == 0) {
 		drv_dev->ax = (int16_t)sys_get_le16(&data[0]);
 		drv_dev->ay = (int16_t)sys_get_le16(&data[2]);
@@ -534,7 +538,6 @@
 static int bmi270_attr_set(const struct device *dev, enum sensor_channel chan,
 			   enum sensor_attribute attr, const struct sensor_value *val)
 {
-	struct bmi270_data *drv_dev = dev->data;
 	int ret = -ENOTSUP;
 
 	if ((chan == SENSOR_CHAN_ACCEL_X) || (chan == SENSOR_CHAN_ACCEL_Y)
@@ -542,13 +545,13 @@
 	    || (chan == SENSOR_CHAN_ACCEL_XYZ)) {
 		switch (attr) {
 		case SENSOR_ATTR_SAMPLING_FREQUENCY:
-			ret = set_accel_odr_osr(val, NULL, drv_dev);
+			ret = set_accel_odr_osr(dev, val, NULL);
 			break;
 		case SENSOR_ATTR_OVERSAMPLING:
-			ret = set_accel_odr_osr(NULL, val, drv_dev);
+			ret = set_accel_odr_osr(dev, NULL, val);
 			break;
 		case SENSOR_ATTR_FULL_SCALE:
-			ret = set_accel_range(val, drv_dev);
+			ret = set_accel_range(dev, val);
 			break;
 		default:
 			ret = -ENOTSUP;
@@ -558,13 +561,13 @@
 		   || (chan == SENSOR_CHAN_GYRO_XYZ)) {
 		switch (attr) {
 		case SENSOR_ATTR_SAMPLING_FREQUENCY:
-			ret = set_gyro_odr_osr(val, NULL, drv_dev);
+			ret = set_gyro_odr_osr(dev, val, NULL);
 			break;
 		case SENSOR_ATTR_OVERSAMPLING:
-			ret = set_gyro_odr_osr(NULL, val, drv_dev);
+			ret = set_gyro_odr_osr(dev, NULL, val);
 			break;
 		case SENSOR_ATTR_FULL_SCALE:
-			ret = set_gyro_range(val, drv_dev);
+			ret = set_gyro_range(dev, val);
 			break;
 		default:
 			ret = -ENOTSUP;
@@ -604,7 +607,7 @@
 
 	k_usleep(BMI270_POWER_ON_TIME);
 
-	ret = reg_read(BMI270_REG_CHIP_ID, &chip_id, 1, drv_dev);
+	ret = reg_read(dev, BMI270_REG_CHIP_ID, &chip_id, 1);
 	if (ret != 0) {
 		return ret;
 	}
@@ -616,14 +619,14 @@
 	}
 
 	soft_reset_cmd = BMI270_CMD_SOFT_RESET;
-	ret = reg_write(BMI270_REG_CMD, &soft_reset_cmd, 1, drv_dev);
+	ret = reg_write(dev, BMI270_REG_CMD, &soft_reset_cmd, 1);
 	if (ret != 0) {
 		return ret;
 	}
 
 	k_usleep(BMI270_SOFT_RESET_TIME);
 
-	ret = reg_read(BMI270_REG_PWR_CONF, &adv_pwr_save, 1, drv_dev);
+	ret = reg_read(dev, BMI270_REG_PWR_CONF, &adv_pwr_save, 1);
 	if (ret != 0) {
 		return ret;
 	}
@@ -631,25 +634,25 @@
 	adv_pwr_save = BMI270_SET_BITS_POS_0(adv_pwr_save,
 					     BMI270_PWR_CONF_ADV_PWR_SAVE,
 					     BMI270_PWR_CONF_ADV_PWR_SAVE_DIS);
-	ret = reg_write(BMI270_REG_PWR_CONF, &adv_pwr_save, 1, drv_dev);
+	ret = reg_write(dev, BMI270_REG_PWR_CONF, &adv_pwr_save, 1);
 	if (ret != 0) {
 		return ret;
 	}
 
 	init_ctrl = BMI270_PREPARE_CONFIG_LOAD;
-	ret = reg_write(BMI270_REG_INIT_CTRL, &init_ctrl, 1, drv_dev);
+	ret = reg_write(dev, BMI270_REG_INIT_CTRL, &init_ctrl, 1);
 	if (ret != 0) {
 		return ret;
 	}
 
-	ret = write_config_file(drv_dev);
+	ret = write_config_file(dev);
 
 	if (ret != 0) {
 		return ret;
 	}
 
 	init_ctrl = BMI270_COMPLETE_CONFIG_LOAD;
-	ret = reg_write(BMI270_REG_INIT_CTRL, &init_ctrl, 1, drv_dev);
+	ret = reg_write(dev, BMI270_REG_INIT_CTRL, &init_ctrl, 1);
 	if (ret != 0) {
 		return ret;
 	}
@@ -660,7 +663,7 @@
 	 * report an error
 	 */
 	for (tries = 0; tries <= BMI270_CONFIG_FILE_RETRIES; tries++) {
-		ret = reg_read(BMI270_REG_INTERNAL_STATUS, &msg, 1, drv_dev);
+		ret = reg_read(dev, BMI270_REG_INTERNAL_STATUS, &msg, 1);
 		if (ret != 0) {
 			return ret;
 		}
@@ -680,7 +683,7 @@
 	adv_pwr_save = BMI270_SET_BITS_POS_0(adv_pwr_save,
 					     BMI270_PWR_CONF_ADV_PWR_SAVE,
 					     BMI270_PWR_CONF_ADV_PWR_SAVE_EN);
-	ret = reg_write_with_delay(BMI270_REG_PWR_CONF, &adv_pwr_save, 1, drv_dev,
+	ret = reg_write_with_delay(dev, BMI270_REG_PWR_CONF, &adv_pwr_save, 1,
 		BMI270_INTER_WRITE_DELAY_US);
 
 	return ret;