# MIMXRT1060-EVK board

# Copyright 2018,2023 NXP
# SPDX-License-Identifier: Apache-2.0

if BOARD_MIMXRT1060_EVK || BOARD_MIMXRT1060_EVK_HYPERFLASH || BOARD_MIMXRT1060_EVKB

config BOARD
	default "mimxrt1060_evk" if BOARD_MIMXRT1060_EVK
	default "mimxrt1060_evk_hyperflash" if BOARD_MIMXRT1060_EVK_HYPERFLASH
	default "mimxrt1060_evkb" if BOARD_MIMXRT1060_EVKB

choice CODE_LOCATION
	default CODE_FLEXSPI
endchoice

if FLASH

config FLASH_MCUX_FLEXSPI_NOR
	default y if BOARD_MIMXRT1060_EVK
	default y if BOARD_MIMXRT1060_EVKB
	default n if BOARD_MIMXRT1060_EVK_HYPERFLASH

config FLASH_MCUX_FLEXSPI_HYPERFLASH
	default y if BOARD_MIMXRT1060_EVK_HYPERFLASH
	default n if BOARD_MIMXRT1060_EVK
	default n if BOARD_MIMXRT1060_EVKB

endif #FLASH

config KSCAN
	default y if LVGL

config INPUT
	default y if KSCAN

if INPUT

config INPUT_FT5336_INTERRUPT
	default y

endif # INPUT

if NETWORKING

config NET_L2_ETHERNET
	default y

config ETH_MCUX_PHY_RESET
	default y

endif # NETWORKING

if LVGL

config LV_Z_POINTER_KSCAN
	default y

# LVGL should allocate buffers equal to size of display
config LV_Z_VDB_SIZE
	default 100

# Enable double buffering
config LV_Z_DOUBLE_VDB
	default y

# Force full refresh. This prevents memory copy associated with partial
# display refreshes, which is not necessary for the eLCDIF driver
config LV_Z_FULL_REFRESH
	default y

config LV_DPI_DEF
	default 128

config LV_Z_BITS_PER_PIXEL
	default 16

# Force display buffers to be aligned to cache line size (32 bytes)
config LV_Z_VDB_ALIGN
	default 32


choice LV_COLOR_DEPTH
	default LV_COLOR_DEPTH_16
endchoice

endif # LVGL

endif # BOARD_MIMXRT1060_EVK || BOARD_MIMXRT1060_EVK_HYPERFLASH || BOARD_MIMXRT1060_EVKB