/*
 * Copyright (c) 2019 Linaro Limited
 * Copyright (c) 2019 Centaur Analytics, Inc
 * Copyright (c) 2020 Teslabs Engineering S.L.
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include <arm/armv7-m.dtsi>
#include <dt-bindings/clock/stm32_clock.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/i2c/i2c.h>
#include <dt-bindings/pwm/pwm.h>

/ {
	chosen {
		zephyr,entropy = &rng;
		zephyr,flash-controller = &flash;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-m7";
			reg = <0>;
			#address-cells = <1>;
			#size-cells = <1>;

			mpu: mpu@e000ed90 {
				compatible = "arm,armv7m-mpu";
				reg = <0xe000ed90 0x40>;
				arm,num-mpu-regions = <16>;
			};
		};
	};

	soc {
		flash: flash-controller@52002000 {
			compatible = "st,stm32-flash-controller", "st,stm32h7-flash-controller";
			label = "FLASH_CTRL";
			reg = <0x52002000 0x400>;
			interrupts = <4 0>;

			#address-cells = <1>;
			#size-cells = <1>;
		};

		rcc: rcc@58024400 {
			compatible = "st,stm32-rcc";
			#clock-cells = <2>;
			reg = <0x58024400 0x400>;
			label = "STM32_CLK_RCC";
		};

		pinctrl: pin-controller@58020000 {
			compatible = "st,stm32-pinmux";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x58020000 0x2400>;

			gpioa: gpio@58020000 {
				compatible = "st,stm32-gpio";
				gpio-controller;
				#gpio-cells = <2>;
				reg = <0x58020000 0x400>;
				clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000001>;
				label = "GPIOA";
			};

			gpiob: gpio@58020400 {
				compatible = "st,stm32-gpio";
				gpio-controller;
				#gpio-cells = <2>;
				reg = <0x58020400 0x400>;
				clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000002>;
				label = "GPIOB";
			};

			gpioc: gpio@58020800 {
				compatible = "st,stm32-gpio";
				gpio-controller;
				#gpio-cells = <2>;
				reg = <0x58020800 0x400>;
				clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000004>;
				label = "GPIOC";
			};

			gpiod: gpio@58020C00 {
				compatible = "st,stm32-gpio";
				gpio-controller;
				#gpio-cells = <2>;
				reg = <0x58020C00 0x400>;
				clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000008>;
				label = "GPIOD";
			};

			gpioe: gpio@58021000 {
				compatible = "st,stm32-gpio";
				gpio-controller;
				#gpio-cells = <2>;
				reg = <0x58021000 0x400>;
				clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000010>;
				label = "GPIOE";
			};

			gpiof: gpio@58021400 {
				compatible = "st,stm32-gpio";
				gpio-controller;
				#gpio-cells = <2>;
				reg = <0x58021400 0x400>;
				clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000020>;
				label = "GPIOF";
			};

			gpiog: gpio@58021800 {
				compatible = "st,stm32-gpio";
				gpio-controller;
				#gpio-cells = <2>;
				reg = <0x58021800 0x400>;
				clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000040>;
				label = "GPIOG";
			};

			gpioh: gpio@58021C00 {
				compatible = "st,stm32-gpio";
				gpio-controller;
				#gpio-cells = <2>;
				reg = <0x58021C00 0x400>;
				clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000080>;
				label = "GPIOH";
			};

			gpioi: gpio@58022000 {
				compatible = "st,stm32-gpio";
				gpio-controller;
				#gpio-cells = <2>;
				reg = <0x58022000 0x400>;
				clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000100>;
				label = "GPIOI";
			};

			gpioj: gpio@58022400 {
				compatible = "st,stm32-gpio";
				gpio-controller;
				#gpio-cells = <2>;
				reg = <0x58022400 0x400>;
				clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000200>;
				label = "GPIOJ";
			};

			gpiok: gpio@58022800 {
				compatible = "st,stm32-gpio";
				gpio-controller;
				#gpio-cells = <2>;
				reg = <0x58022800 0x400>;
				clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x00000400>;
				label = "GPIOK";
			};
		};

		wwdg1: watchdog@50003000 {
			compatible = "st,stm32-window-watchdog";
			reg = <0x50003000 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB3 0x00000800>;
			interrupts = <0 7>;
			status = "disabled";
			label = "WWDG_1";
		};

		usart1: serial@40011000 {
			compatible = "st,stm32-usart", "st,stm32-uart";
			reg = <0x40011000 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000010>;
			interrupts = <37 0>;
			status = "disabled";
			label = "UART_1";
		};
		usart2: serial@40004400 {
			compatible = "st,stm32-usart", "st,stm32-uart";
			reg = <0x40004400 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00020000>;
			interrupts = <38 0>;
			status = "disabled";
			label = "UART_2";
		};
		usart3: serial@40004800 {
			compatible = "st,stm32-usart", "st,stm32-uart";
			reg = <0x40004800 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>;
			interrupts = <39 0>;
			status = "disabled";
			label = "UART_3";
		};
		uart4: serial@40004c00 {
			compatible ="st,stm32-uart";
			reg = <0x40004c00 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>;
			interrupts = <52 0>;
			status = "disabled";
			label = "UART_4";
		};
		uart5: serial@40005000 {
			compatible = "st,stm32-uart";
			reg = <0x40005000 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00100000>;
			interrupts = <53 0>;
			status = "disabled";
			label = "UART_5";
		};
		usart6: serial@40011400 {
			compatible = "st,stm32-usart", "st,stm32-uart";
			reg = <0x40011400 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000020>;
			interrupts = <71 0>;
			status = "disabled";
			label = "UART_6";
		};
		uart7: serial@40007800 {
			compatible = "st,stm32-uart";
			reg = <0x40007800 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x40000000>;
			interrupts = <82 0>;
			status = "disabled";
			label = "UART_7";
		};
		uart8: serial@40007c00 {
			compatible = "st,stm32-uart";
			reg = <0x40007c00 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>;
			interrupts = <83 0>;
			status = "disabled";
			label = "UART_8";
		};

		rtc: rtc@58004000 {
			compatible = "st,stm32-rtc";
			reg = <0x58004000 0x400>;
			interrupts = <41 0>;
			clocks = <&rcc STM32_CLOCK_BUS_APB4 0x00010000>;
			prescaler = <32768>;
			status = "disabled";
			label = "RTC_0";
		};

		i2c1: i2c@40005400 {
			compatible = "st,stm32-i2c-v2";
			clock-frequency = <I2C_BITRATE_STANDARD>;
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x40005400 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00200000>;
			interrupts = <31 0>, <32 0>;
			interrupt-names = "event", "error";
			status = "disabled";
			label = "I2C_1";
		};

		i2c2: i2c@40005800 {
			compatible = "st,stm32-i2c-v2";
			clock-frequency = <I2C_BITRATE_STANDARD>;
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x40005800 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>;
			interrupts = <33 0>, <34 0>;
			interrupt-names = "event", "error";
			status = "disabled";
			label = "I2C_2";
		};

		i2c3: i2c@40005c00 {
			compatible = "st,stm32-i2c-v2";
			clock-frequency = <I2C_BITRATE_STANDARD>;
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x40005c00 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>;
			interrupts = <72 0>, <73 0>;
			interrupt-names = "event", "error";
			status = "disabled";
			label = "I2C_3";
		};

		i2c4: i2c@58001c00 {
			compatible = "st,stm32-i2c-v2";
			clock-frequency = <I2C_BITRATE_STANDARD>;
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x58001c00 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB4 0x00000080>;
			interrupts = <95 0>, <96 0>;
			interrupt-names = "event", "error";
			status = "disabled";
			label = "I2C_4";
		};

		timers1: timers@40010000 {
			compatible = "st,stm32-timers";
			reg = <0x40010000 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000001>;
			interrupts = <24 0>, <25 0>, <26 0>, <27 0>;
			interrupt-names = "brk", "up", "trgcom", "cc";
			status = "disabled";
			label = "TIMERS_1";

			pwm {
				compatible = "st,stm32-pwm";
				status = "disabled";
				st,prescaler = <10000>;
				label = "PWM_1";
				#pwm-cells = <3>;
			};
		};

		timers2: timers@40000000 {
			compatible = "st,stm32-timers";
			reg = <0x40000000 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000001>;
			interrupts = <28 0>;
			interrupt-names = "global";
			status = "disabled";
			label = "TIMERS_2";

			pwm {
				compatible = "st,stm32-pwm";
				status = "disabled";
				st,prescaler = <0>;
				label = "PWM_2";
				#pwm-cells = <3>;
			};
		};

		timers3: timers@40000400 {
			compatible = "st,stm32-timers";
			reg = <0x40000400 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000002>;
			interrupts = <29 0>;
			interrupt-names = "global";
			status = "disabled";
			label = "TIMERS_3";

			pwm {
				compatible = "st,stm32-pwm";
				status = "disabled";
				st,prescaler = <10000>;
				label = "PWM_3";
				#pwm-cells = <3>;
			};
		};

		timers4: timers@40000800 {
			compatible = "st,stm32-timers";
			reg = <0x40000800 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000004>;
			interrupts = <30 0>;
			interrupt-names = "global";
			status = "disabled";
			label = "TIMERS_4";

			pwm {
				compatible = "st,stm32-pwm";
				status = "disabled";
				st,prescaler = <10000>;
				label = "PWM_4";
				#pwm-cells = <3>;
			};
		};

		timers5: timers@40000c00 {
			compatible = "st,stm32-timers";
			reg = <0x40000c00 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000008>;
			interrupts = <50 0>;
			interrupt-names = "global";
			status = "disabled";
			label = "TIMERS_5";

			pwm {
				compatible = "st,stm32-pwm";
				status = "disabled";
				st,prescaler = <0>;
				label = "PWM_5";
				#pwm-cells = <3>;
			};
		};

		timers6: timers@40001000 {
			compatible = "st,stm32-timers";
			reg = <0x40001000 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000010>;
			interrupts = <54 0>;
			interrupt-names = "global";
			status = "disabled";
			label = "TIMERS_6";

			pwm {
				compatible = "st,stm32-pwm";
				status = "disabled";
				st,prescaler = <10000>;
				label = "PWM_6";
				#pwm-cells = <3>;
			};
		};

		timers7: timers@40001400 {
			compatible = "st,stm32-timers";
			reg = <0x40001400 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000020>;
			interrupts = <55 0>;
			interrupt-names = "global";
			status = "disabled";
			label = "TIMERS_7";

			pwm {
				compatible = "st,stm32-pwm";
				status = "disabled";
				st,prescaler = <10000>;
				label = "PWM_7";
				#pwm-cells = <3>;
			};
		};

		timers8: timers@40010400 {
			compatible = "st,stm32-timers";
			reg = <0x40010400 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000002>;
			interrupts = <43 0>, <44 0>, <45 0>, <46 0>;
			interrupt-names = "brk", "up", "trgcom", "cc";
			status = "disabled";
			label = "TIMERS_8";

			pwm {
				compatible = "st,stm32-pwm";
				status = "disabled";
				st,prescaler = <10000>;
				label = "PWM_8";
				#pwm-cells = <3>;
			};
		};

		timers12: timers@40001800 {
			compatible = "st,stm32-timers";
			reg = <0x40001800 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000040>;
			interrupts = <43 0>;
			interrupt-names = "global";
			status = "disabled";
			label = "TIMERS_12";

			pwm {
				compatible = "st,stm32-pwm";
				status = "disabled";
				st,prescaler = <10000>;
				label = "PWM_12";
				#pwm-cells = <3>;
			};
		};

		timers13: timers@40001c00 {
			compatible = "st,stm32-timers";
			reg = <0x40001c00 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000080>;
			interrupts = <44 0>;
			interrupt-names = "global";
			status = "disabled";
			label = "TIMERS_13";

			pwm {
				compatible = "st,stm32-pwm";
				status = "disabled";
				st,prescaler = <10000>;
				label = "PWM_13";
				#pwm-cells = <3>;
			};
		};

		timers14: timers@40002000 {
			compatible = "st,stm32-timers";
			reg = <0x40002000 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000100>;
			interrupts = <45 0>;
			interrupt-names = "global";
			status = "disabled";
			label = "TIMERS_14";

			pwm {
				compatible = "st,stm32-pwm";
				status = "disabled";
				st,prescaler = <10000>;
				label = "PWM_14";
				#pwm-cells = <3>;
			};
		};

		timers15: timers@40014000 {
			compatible = "st,stm32-timers";
			reg = <0x40014000 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00010000>;
			interrupts = <116 0>;
			interrupt-names = "global";
			status = "disabled";
			label = "TIMERS_15";

			pwm {
				compatible = "st,stm32-pwm";
				status = "disabled";
				st,prescaler = <10000>;
				label = "PWM_15";
				#pwm-cells = <3>;
			};
		};

		timers16: timers@40014400 {
			compatible = "st,stm32-timers";
			reg = <0x40014400 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00020000>;
			interrupts = <117 0>;
			interrupt-names = "global";
			status = "disabled";
			label = "TIMERS_16";

			pwm {
				compatible = "st,stm32-pwm";
				status = "disabled";
				st,prescaler = <10000>;
				label = "PWM_16";
				#pwm-cells = <3>;
			};
		};

		timers17: timers@40014800 {
			compatible = "st,stm32-timers";
			reg = <0x40014800 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00040000>;
			interrupts = <118 0>;
			interrupt-names = "global";
			status = "disabled";
			label = "TIMERS_17";

			pwm {
				compatible = "st,stm32-pwm";
				status = "disabled";
				st,prescaler = <10000>;
				label = "PWM_17";
				#pwm-cells = <3>;
			};
		};

		adc1_2: adc@40022000 {
			compatible = "st,stm32-adc";
			reg = <0x40022000 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000020>;
			interrupts = <18 0>;
			status = "disabled";
			label = "ADC_1_2";
			#io-channel-cells = <1>;
		};

		adc3: adc@58026000 {
			compatible = "st,stm32-adc";
			reg = <0x58026000 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_AHB4 0x01000000>;
			interrupts = <127 0>;
			status = "disabled";
			label = "ADC_3";
			#io-channel-cells = <1>;
		};

		dma1: dma@40020000 {
			compatible = "st,stm32-dma";
			#dma-cells = <4>;
			reg = <0x40020000 0x400>;
			interrupts = <11 0>, <12 0>, <13 0>, <14 0>, <15 0>, <16 0>,
						 <17 0>, <47 0>;
			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000020>;
			status = "disabled";
			label = "DMA_1";
		};

		dma2: dma@40020400 {
			compatible = "st,stm32-dma";
			#dma-cells = <4>;
			reg = <0x40020400 0x400>;
			interrupts = <11 0>, <12 0>, <13 0>, <14 0>, <15 0>, <16 0>,
						 <17 0>, <47 0>;
			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000020>;
			status = "disabled";
			label = "DMA_2";
		};

		rng: rng@48021800 {
			compatible = "st,stm32-rng";
			reg = <0x48021800 0x400>;
			clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000040>;
			interrupts = <80 0>;
			status = "disabled";
			label = "RNG";
		};

		mac: ethernet@40028000 {
			compatible = "st,stm32-ethernet";
			reg = <0x40028000 0x8000>;
			label = "ETH_0";
			interrupts = <61 0>;
			clock-names = "stmmaceth", "mac-clk-tx", "mac-clk-rx";
			clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00008000>,
				 <&rcc STM32_CLOCK_BUS_AHB1 0x00010000>,
				 <&rcc STM32_CLOCK_BUS_AHB1 0x00020000>;
			status = "disabled";
		};
	};
};

&nvic {
	arm,num-irq-priority-bits = <4>;
};