# MIMXRT595-EVK board

# Copyright 2022-2023, NXP
# SPDX-License-Identifier: Apache-2.0

if BOARD_MIMXRT595_EVK

config BOARD
	default "mimxrt595_evk_cm33"

config FLASH_MCUX_FLEXSPI_MX25UM51345G
	default y if FLASH

choice FLASH_MCUX_FLEXSPI_XIP_MEM_TARGET
	default FLASH_MCUX_FLEXSPI_XIP_MEM_SRAM
endchoice

config FXOS8700_DRDY_INT1
	default y
	depends on FXOS8700_TRIGGER

if DMA_MCUX_LPC

# Memory from the heap pool is used to allocate DMA descriptors for
# channels that use multiple blocks for a DMA transfer.
# Adjust HEAP_MEM_POOL_MIN_SIZE in case you need more memory.
config HEAP_MEM_POOL_ADD_SIZE_BOARD
	int
	default 4096

endif # DMA_MCUX_LPC

# Turn on Device Level Power Management as we wish
# to reconfigure the FlexSPI pins for power savings
# when transitioning the SoC to Deep Low Power modes.
config PM_DEVICE
	default y if PM

config REGULATOR
	default y if PM || POWEROFF

endif # BOARD_MIMXRT595_EVK