/*
 * Copyright (c) 2023 STMicroelectronics
 * Copyright (c) 2023 Thomas Stranger
 *
 * SPDX-License-Identifier: Apache-2.0
 */
#include <mem.h>
#include <st/h5/stm32h563.dtsi>

/ {
	sram1: memory@20000000 {
		compatible = "zephyr,memory-region", "mmio-sram";
		reg = <0x20000000 DT_SIZE_K(256)>;
		zephyr,memory-region = "SRAM1";
	};

	sram2: memory@20040000 {
		compatible = "zephyr,memory-region", "mmio-sram";
		reg = <0x20040000 DT_SIZE_K(64)>;
		zephyr,memory-region = "SRAM2";
	};

	sram3: memory@20050000 {
		compatible = "zephyr,memory-region", "mmio-sram";
		reg = <0x20050000 DT_SIZE_K(320)>;
		zephyr,memory-region = "SRAM3";
	};

	soc {
		flash-controller@40022000 {
			flash0: flash@8000000 {
				reg = <0x08000000 DT_SIZE_M(2)>;
			};
		};
	};
};