# Copyright (c) 2020 Stephanos Ioannidis <root@stephanos.io>
# Copyright (c) 2020-2021 Gerson Fernando Budke <nandojve@gmail.com>
# SPDX-License-Identifier: Apache-2.0

include: ethernet.yaml

properties:
    reg:
      required: true

    num-queues:
      type: int
      required: true
      description: |
        Number of hardware TX and RX queues.

    max-frame-size:
      type: int
      default: 1518
      description: |
        Maximum ethernet frame size.  The current ethernet frame sizes
        supported by hardware are 1518, 1536 and 10240 (jumbo frames).  This
        means that normally gmac will reject any frame above max-frame-size
        value.  The default value is 1518, which represents an usual
        IEEE 802.3 ethernet frame:

          Ethernet Frame [ 14 MAC HEADER | 1500 MTU | 4 FCS ] = 1518 bytes

        When using value 1536 it is possible extend ethernet MAC HEADER up
        to 32 bytes.  The hardware have support to jumbo frames and it can be
        enabled by selecting the value 10240.

    max-speed:
      type: int
      default: 100
      description: |
        This specifies maximum speed in Mbit/s supported by the device.  The
        gmac driver supports 10Mbit/s and 100Mbit/s.  Using 100, as default
        value, enables driver to configure 10 and 100Mbit/s speeds.

    phy-connection-type:
      type: string
      enum:
        - "rmii"
        - "mii"
      default: "rmii"
      description: |
        Phy connection type define the physical interface connection between
        PHY and MAC.  The default value uses gmac register reset value, which
        represents Reduced Media-Independent Interface (RMII) mode.

        This property must be used with pinctrl-0.

    pinctrl-0:
      type: phandles
      required: false
      description: |
        PIO pin configuration for the various GMAC signals that include GTXCK,
        GTXEN, GTX[3..0], GTXER, GRXCK, GRXDV, GRX[3..0], GRXER, GCRS, GCOL,
        GMDC, and GMDIO.  Which signals are used vary based on if the PHY
        connection is MII or RMII (see datasheet for more details).  We expect
        that the phandles will reference pinctrl nodes.  These nodes will have
        a nodelabel that matches the Atmel SoC HAL defines and be of the form
        p<port><pin><periph>_<inst>_<signal>.

        For example the GMAC on SAME7x would be for RMII
          pinctrl-0 = <&pd0a_gmac_gtxck &pd1a_gmac_gtxen
                       &pd2a_gmac_gtx0 &pd3a_gmac_gtx1
                       &pd4a_gmac_grxdv &pd5a_gmac_grx0
                       &pd6a_gmac_grx1 &pd7a_gmac_grxer
                       &pd8a_gmac_gmdc &pd9a_gmac_gmdio>;

        This property must be used with phy-connection-type.