# Copyright (c) 2018, NXP
# SPDX-License-Identifier: Apache-2.0

description: NXP FlexSPI controller

compatible: "nxp,imx-flexspi"

include: [spi-controller.yaml, pinctrl-device.yaml]

properties:
  reg:
    required: true

  interrupts:
    required: true

  ahb-bufferable:
    type: boolean
    description: |
      Enable AHB bufferable write access by setting register field
      AHBCR[BUFFERABLEEN].

  ahb-cacheable:
    type: boolean
    description: |
      Enable AHB cacheable read access by setting register field
      AHBCR[CACHEABLEEN].

  ahb-prefetch:
    type: boolean
    description: |
      Enable AHB read prefetch by setting register field AHBCR[PREFETCHEN].

  ahb-read-addr-opt:
    type: boolean
    description: |
      Remove burst start address alignment limitation by setting register
      field AHBCR[READADDROPT].

  combination-mode:
    type: boolean
    description: |
      Combine port A and port B data pins to support octal mode access by
      setting register field MCR0[COMBINATIONEN].

  sck-differential-clock:
    type: boolean
    description: |
      Enable/disable SCKB pad use as SCKA differential clock output,
      when enabled, Port B flash access is not available.

  rx-clock-source:
    type: int
    default: 0
    enum:
      - 0 # Loopback internally
      - 1 # Loopback from DQS pad
      - 2 # Loopback from SCK pad
      - 3 # External input from DQS pad
    description: |
      Source clock for flash read. See the RXCLKSRC field in register MCR0.
      The default corresponds to the reset value of the register field.

child-binding:
  description: NXP FlexSPI port

  include: nxp,imx-flexspi-device.yaml