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pigweed / gonk / 8f9f689b782748678e97b843665c0773b70d223b
commit8f9f689b782748678e97b843665c0773b70d223b[log] [tgz]
authorAnthony DiGirolamo <tonymd@google.com>Fri Jan 26 20:06:14 2024 +0000
committerCQ Bot Account <pigweed-scoped@luci-project-accounts.iam.gserviceaccount.com>Fri Jan 26 20:06:14 2024 +0000
tree9acf4ad63bb522f1b922ed69032615f335efafcf
parent918840c1be48efa9260cff3204e8520101649e65 [diff]
lib/adc: Continuous read fixes

- Shorten delay to 1ms between each continuous read
- Use WaitForFpgaIOValid() between continous reads instead of
  checking for a pulse.
- Update to latest verilog with fixed valid signal handling.

Change-Id: Ieca3a955803b06287245e90f5574b8abdd35ace6
Reviewed-on: https://pigweed-review.googlesource.com/c/gonk/+/189370
Reviewed-by: Umang Shah <umangshah@google.com>
Commit-Queue: Anthony DiGirolamo <tonymd@google.com>
8 files changed
tree: 9acf4ad63bb522f1b922ed69032615f335efafcf
  1. applications/
  2. build_overrides/
  3. fpga/
  4. lib/
  5. scripts/
  6. targets/
  7. third_party/
  8. tools/
  9. activate.sh ⇨ bootstrap.sh
  10. .gitignore
  11. .gitmodules
  12. .gn
  13. banner.txt
  14. bootstrap.sh
  15. BUILD.gn
  16. BUILDCONFIG.gn
  17. OWNERS
  18. pigweed.json
  19. README.md
README.md

Gonk

Getting Started

  1. Clone the repo

    git clone https://pigweed.googlesource.com/pigweed/gonk

  2. Source bootstrap.sh to download all compilers and tooling into the environment directory:

    . ./bootstrap.sh

    This should init all git submodules for you.

  3. From here on the Pigweed environment is activated. You can activate the environment in a new shell without re-running bootstrap by sourcing activate.sh

    . ./activate.sh

Compile:

Build for the host and device by running:

pw build

This is mostly a shortcut with nice output for running gn gen out/gn and ninja -C out/gn.

The build commands are defined in: //tools/gonk_tools/build_project.py.

Gonk Verilog:

The Verilog build requires the following to be installed on Linux:

sudo apt install fpga-icestorm nextpnr-ice40 yosys

Run this to compile the Gonk Verilog:

pw build

The bitstream files will be written with the .bin extenson under ./out/gn/obj/fpga/*/*.bin along with log output files.

For example:

$ ls ./out/gn/obj/fpga/toplevel/
nextpnr-log.txt
toplevel.asc
toplevel.bin
toplevel.json
toplevel_timing_report.json
toplevel_timing_report.txt
yosys-log.txt

Gonk fpga_config Example

Flash the stm32f7 and launch the write_fpga.py script on a bitstream file.

Flash with dfu-util

  1. Unplug gonk from USB and replug with MODE button held down.

  2. Run pw flash on the MCU binary.

    pw flash ./out/gn/arduino_size_optimized/obj/applications/fpga_config/fpga_config.bin

Write the FPGA bitstream

  1. Write an FPGA bitstream with the write_fpga.py script:

    python ./tools/gonk_tools/write_fpga.py ./applications/fpga_config/fpga_blinky.bin

Gonk spi_flash_test Example

Flash with dfu-util

  1. Unplug gonk from USB and replug with MODE button held down.

  2. Run pw flash on the MCU binary.

    pw flash ./out/gn/arduino_size_optimized/obj/applications/spi_flash_test/spi_flash_test.bin

  3. Unplug Gonk from USB and replug to reset the hardware. SPI bus issues have been observed without this step.

  4. Connect over serial.

    python -m serial.tools.miniterm --raw /dev/ttyGonk 1000000

    You should see output matching:

    --- Miniterm on /dev/ttyGonk  1000000,8,N,1 ---
--- Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H ---
INF  Device id: 1f 84 1
INF  Device id: 1f 84 1
INF  Device id: 1f 84 1
INF  Device id: 1f 84 1

Flash with BlackMagic Probe:

./scripts/flash-with-blackmagic-probe.sh ./out/gn/arduino_size_optimized/obj/applications/spi_flash_test/bin/spi_flash_test.elf

pw_system Example

Run on Host

Run the host app and connect to it via pw-system-console:

./out/gn/host_device_simulator.speed_optimized/obj/applications/system_example/bin/system_example & \
  pw-system-console --socket-addr default \
    --proto-globs third_party/pigweed/pw_rpc/echo.proto ; \
  killall system_example

Run on Device

Flashing

openocd -s $PW_PIGWEED_CIPD_INSTALL_DIR/share/openocd/scripts \
  -f $GONK_ROOT/targets/stm32f769i_disc0_stm32cube/openocd_stm32f7xx.cfg \
  -c "program out/gn/stm32f769i_disc0_stm32cube.size_optimized/obj/applications/system_example/bin/system_example.elf reset exit"

Updating STM32Cube

Checkout the desired commits in each of these submodules:

third_party/stm32cube_f7/cmsis_core
third_party/stm32cube_f7/cmsis_device
third_party/stm32cube_f7/hal_driver

Then run from Gonk root:

python -m pw_stm32cube_build gen_file_list third_party/stm32cube_f7

Pin Map

Misc

NetSTM32 PinSTM32 FunctionFunction
STATUSPB13GPIO_OutputSTAT LED

SPI Flash Connection

NetFPGA IO#STM32 PinSTM32 FunctionFlash Pin
ICE_SPI_SS71PD2GPIO_OutputS#
ICE_SPI_MISO68PB4SPI1_MISODQ1
ICE_SPI_MOSI67PB5SPI1_MOSIDQ0
ICE_SPI_SCK70PB3SPI1_SCKC
FLASH_HOLD63PC11GPIO_OutputHOLD#/DQ3
FLASH_WP64PC12GPIO_OutputW#/VPP/DQ2

FPGA Connection

NetFunctionFPGA IO#STM32 PinSTM32 FunctionNotes
FPGA_IO_SPARE_0_2rst_i135PA0GPIO_OutputActive high
FPGA_IO_SPARE_0_0mode_i137PB11GPIO_OutputFPGA operation mode
DSPI_CSvalid_o75PB6GPIO_OutputData/Transfer Valid
FPGA_IO_SPARE_1_1miso_i101PC2SPI1_MISO
FPGA_IO_SPARE_1_0mosi_i99PC3SPI1_MOSI
I2C_O_SDAcs_n79PB9SPI1_NSS
FPGA_IO_SPARE_0_1sclk_i136PB10SPI1_SCK
FPGA_IO_SPARE_2_049PA7
FPGA_IO_SPARE_2_148PA6
FPGA_IO_SPARE_2_247PA5
FPGA_IO_SPARE_2_345PA4