Remove references to pigweed's mimxrt595_evk target
This project's mimxrt595_evk target referenced the Pigweed
mimxrt595_evk target in an attempt to reuse that target.
However Pigweed's target has several references to "//targets...",
which worked when building this repo, but would not work if
this target was being used by another downstream project.
This change makes //targets/mimxrt595_evk largely a copy of
Pigweeds, but with the necessary additions (FreeRTOS, etc.) needed
by this project.
Change-Id: Ib3c556b0a6633b98a5cf3f47866864266bd85bac
Reviewed-on: https://pigweed-review.googlesource.com/c/pigweed/experimental/+/129434
Commit-Queue: Chris Mumford <cmumford@google.com>
Reviewed-by: Anthony DiGirolamo <tonymd@google.com>
diff --git a/targets/mimxrt595_evk/BUILD.bazel b/targets/mimxrt595_evk/BUILD.bazel
new file mode 100644
index 0000000..64e72a2
--- /dev/null
+++ b/targets/mimxrt595_evk/BUILD.bazel
@@ -0,0 +1,38 @@
+# Copyright 2021 The Pigweed Authors
+#
+# Licensed under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License. You may obtain a copy of
+# the License at
+#
+# https://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+# License for the specific language governing permissions and limitations under
+# the License.
+
+load(
+ "//pw_build:pigweed.bzl",
+ "pw_cc_library",
+)
+
+package(default_visibility = ["//visibility:public"])
+
+licenses(["notice"])
+
+# TODO(pwbug/545): These just list sources files to pass presubmit and aren't
+# expected to actually work.
+pw_cc_library(
+ name = "boot",
+ srcs = [
+ "boot.cc",
+ "vector_table.c",
+ ],
+ deps = [
+ "//pw_boot",
+ "//pw_boot_cortex_m",
+ "//pw_preprocessor",
+ "//pw_sys_io_mcuxpresso",
+ ],
+)
diff --git a/targets/mimxrt595_evk/BUILD.gn b/targets/mimxrt595_evk/BUILD.gn
index 519a80a..58ab0f0 100644
--- a/targets/mimxrt595_evk/BUILD.gn
+++ b/targets/mimxrt595_evk/BUILD.gn
@@ -23,7 +23,7 @@
import("target_toolchains.gni")
generate_toolchains("target_toolchains") {
- toolchains = toolchains_list
+ toolchains = pw_target_toolchain_mimxrt595_evk_list
}
declare_args() {
@@ -32,7 +32,9 @@
pw_MIMXRT595_EVK_SDK = ""
# When compiling with an MCUXpresso SDK, this variable is set to the path of
- # the manifest file within the SDK installation.
+ # the manifest file within the SDK installation. When set, a pw_source_set
+ # for a sample project SDK is created at
+ # "//targets/mimxrt595_evk/sample_sdk".
pw_target_mimxrt595_evk_MANIFEST = ""
# This list should contain the necessary defines for setting linker script
@@ -89,7 +91,7 @@
if (current_toolchain != default_toolchain) {
pw_linker_script("flash_linker_script") {
defines = pw_target_mimxrt595_evk_LINK_CONFIG_DEFINES
- linker_script = "$dir_pigweed/targets/mimxrt595_evk/mimxrt595_flash.ld"
+ linker_script = "mimxrt595_flash.ld"
}
}
@@ -111,11 +113,13 @@
deps += [ "$dir_pw_malloc" ]
}
sources = [
- "$dir_pigweed/targets/mimxrt595_evk/vector_table.c",
"boot.cc",
+ "vector_table.c",
]
}
+}
+if (pw_third_party_mcuxpresso_SDK != "") {
pw_mcuxpresso_sdk("mimxrt595_sdk") {
manifest = pw_target_mimxrt595_evk_MANIFEST
include = [
diff --git a/targets/mimxrt595_evk/mimxrt595_executable.gni b/targets/mimxrt595_evk/mimxrt595_executable.gni
new file mode 100644
index 0000000..e29ca91
--- /dev/null
+++ b/targets/mimxrt595_evk/mimxrt595_executable.gni
@@ -0,0 +1,64 @@
+# Copyright 2021 The Pigweed Authors
+#
+# Licensed under the Apache License, Version 2.0 (the "License"); you may not
+# use this file except in compliance with the License. You may obtain a copy of
+# the License at
+#
+# https://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+# License for the specific language governing permissions and limitations under
+# the License.
+
+import("//build_overrides/pigweed.gni")
+
+import("$dir_pw_build/exec.gni")
+import("$dir_pw_malloc/backend.gni")
+
+# Executable wrapper that includes some baremetal startup code.
+template("mimxrt595_executable") {
+ group(target_name) {
+ deps = [
+ ":${target_name}__binary",
+ ":${target_name}__elf",
+ ]
+ }
+
+ # .elf binary created by the standard toolchain.
+ _base_target_name = target_name
+ executable("${target_name}__elf") {
+ output_name = "${_base_target_name}"
+ forward_variables_from(invoker, "*")
+ if (!defined(deps)) {
+ deps = []
+ }
+ deps += [ "$dir_pigweed_experimental/targets/mimxrt595_evk:boot" ]
+ if (pw_malloc_BACKEND != "") {
+ if (!defined(configs)) {
+ configs = []
+ }
+ configs += [ "$dir_pw_malloc:pw_malloc_wrapper_config" ]
+ }
+ }
+
+ # .bin binary created by extracting from the toolchain output.
+ pw_exec("${target_name}__binary") {
+ if (defined(invoker.output_dir)) {
+ _output_dir = invoker.output_dir
+ } else {
+ _output_dir = target_out_dir
+ }
+
+ outputs = [ "${_output_dir}/${_base_target_name}.bin" ]
+ deps = [ ":${_base_target_name}__elf" ]
+
+ program = "arm-none-eabi-objcopy"
+ args = [
+ "-Obinary",
+ "<TARGET_FILE(:${_base_target_name}__elf)>",
+ rebase_path(outputs[0], root_build_dir),
+ ]
+ }
+}
diff --git a/targets/mimxrt595_evk/mimxrt595_flash.ld b/targets/mimxrt595_evk/mimxrt595_flash.ld
new file mode 100644
index 0000000..8c54099
--- /dev/null
+++ b/targets/mimxrt595_evk/mimxrt595_flash.ld
@@ -0,0 +1,308 @@
+/*
+ * Copyright 2021 The Pigweed Authors
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may not
+ * use this file except in compliance with the License. You may obtain a copy of
+ * the License at
+ *
+ * https://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+ * License for the specific language governing permissions and limitations under
+ * the License.
+ */
+
+/* This linker script is derived from pw_boot_cortex_m/basic_cortex_m.ld for use
+ * with the NXP MIMXRT595-EVK, booting from FLASH.
+ */
+
+/* Provide useful error messages when required configurations are not set. */
+#ifndef PW_BOOT_VECTOR_TABLE_BEGIN
+#error "PW_BOOT_VECTOR_TABLE_BEGIN is not defined, and is required to use pw_boot_cortex_m"
+#endif // PW_BOOT_VECTOR_TABLE_BEGIN
+
+#ifndef PW_BOOT_VECTOR_TABLE_SIZE
+#error "PW_BOOT_VECTOR_TABLE_SIZE is not defined, and is required to use pw_boot_cortex_m"
+#endif // PW_BOOT_VECTOR_TABLE_SIZE
+
+#ifndef PW_BOOT_FLASH_BEGIN
+#error "PW_BOOT_FLASH_BEGIN is not defined, and is required to use pw_boot_cortex_m"
+#endif // PW_BOOT_FLASH_BEGIN
+
+#ifndef PW_BOOT_FLASH_SIZE
+#error "PW_BOOT_FLASH_SIZE is not defined, and is required to use pw_boot_cortex_m"
+#endif // PW_BOOT_FLASH_SIZE
+
+#ifndef PW_BOOT_RAM_BEGIN
+#error "PW_BOOT_RAM_BEGIN is not defined, and is required to use pw_boot_cortex_m"
+#endif // PW_BOOT_RAM_BEGIN
+
+#ifndef PW_BOOT_RAM_SIZE
+#error "PW_BOOT_RAM_SIZE is not defined, and is required to use pw_boot_cortex_m"
+#endif // PW_BOOT_RAM_SIZE
+
+#ifndef PW_BOOT_HEAP_SIZE
+#error "PW_BOOT_HEAP_SIZE is not defined, and is required to use pw_boot_cortex_m"
+#endif // PW_BOOT_HEAP_SIZE
+
+#ifndef PW_BOOT_MIN_STACK_SIZE
+#error "PW_BOOT_MIN_STACK_SIZE is not defined, and is required to use pw_boot_cortex_m"
+#endif // PW_BOOT_MIN_STACK_SIZE
+
+
+/* Note: This technically doesn't set the firmware's entry point. Setting the
+ * firmware entry point is done by setting vector_table[1]
+ * (Reset_Handler). However, this DOES tell the compiler how to optimize
+ * when --gc-sections is enabled.
+ */
+ENTRY(pw_boot_Entry)
+
+MEMORY
+{
+ /* Flash Config for bootloader */
+ FLASH_CONFIG(rx) : \
+ ORIGIN = 0x08000400, \
+ LENGTH = 0x00000200
+ /* Vector Table (typically in flash) */
+ VECTOR_TABLE(rx) : \
+ ORIGIN = PW_BOOT_VECTOR_TABLE_BEGIN, \
+ LENGTH = PW_BOOT_VECTOR_TABLE_SIZE
+ /* Internal Flash */
+ FLASH(rx) : \
+ ORIGIN = PW_BOOT_FLASH_BEGIN, \
+ LENGTH = PW_BOOT_FLASH_SIZE
+ /* Internal SRAM */
+ RAM(rwx) : \
+ ORIGIN = PW_BOOT_RAM_BEGIN, \
+ LENGTH = PW_BOOT_RAM_SIZE
+ /* USB SRAM */
+ USB_SRAM(rw) : \
+ ORIGIN = 0x40140000, \
+ LENGTH = 0x00004000
+
+ /* Each memory region above has an associated .*.unused_space section that
+ * overlays the unused space at the end of the memory segment. These segments
+ * are used by pw_bloat.bloaty_config to create the utilization data source
+ * for bloaty size reports.
+ *
+ * These sections MUST be located immediately after the last section that is
+ * placed in the respective memory region or lld will issue a warning like:
+ *
+ * warning: ignoring memory region assignment for non-allocatable section
+ * '.VECTOR_TABLE.unused_space'
+ *
+ * If this warning occurs, it's also likely that LLD will have created quite
+ * large padded regions in the ELF file due to bad cursor operations. This
+ * can cause ELF files to balloon from hundreds of kilobytes to hundreds of
+ * megabytes.
+ *
+ * Attempting to add sections to the memory region AFTER the unused_space
+ * section will cause the region to overflow.
+ */
+}
+
+SECTIONS
+{
+ .flash_config :
+ {
+ . = ALIGN(4);
+ KEEP(*(.flash_conf))
+ } >FLASH_CONFIG
+
+ /* This is the link-time vector table. If used, the VTOR (Vector Table Offset
+ * Register) MUST point to this memory location in order to be used. This can
+ * be done by ensuring this section exists at the default location of the VTOR
+ * so it's used on reset, or by explicitly setting the VTOR in a bootloader
+ * manually to point to &pw_boot_vector_table_addr before interrupts are
+ * enabled.
+ *
+ * The ARMv8-M architecture requires this is at least aligned to 128 bytes,
+ * and aligned to a power of two that is greater than 4 times the number of
+ * supported exceptions. 512 has been selected as it accommodates this
+ * device's vector table.
+ */
+ .vector_table : ALIGN(512)
+ {
+ pw_boot_vector_table_addr = .;
+ KEEP(*(.vector_table))
+ } >VECTOR_TABLE
+
+ /* Represents unused space in the VECTOR_TABLE segment. This MUST be the last
+ * section assigned to the VECTOR_TABLE region.
+ */
+ .VECTOR_TABLE.unused_space (NOLOAD) : ALIGN(4)
+ {
+ . = ABSOLUTE(ORIGIN(VECTOR_TABLE) + LENGTH(VECTOR_TABLE));
+ } >VECTOR_TABLE
+
+ /* Main executable code. */
+ .code : ALIGN(4)
+ {
+ . = ALIGN(4);
+ /* Application code. */
+ *(.text)
+ *(.text*)
+ KEEP(*(.init))
+ KEEP(*(.fini))
+
+ . = ALIGN(4);
+ /* Constants.*/
+ *(.rodata)
+ *(.rodata*)
+
+ /* Glue ARM to Thumb code, and vice-versa */
+ *(.glue_7)
+ *(.glue_7t)
+
+ /* Exception handling frame */
+ *(.eh_frame)
+
+ /* .preinit_array, .init_array, .fini_array are used by libc.
+ * Each section is a list of function pointers that are called pre-main and
+ * post-exit for object initialization and tear-down.
+ * Since the region isn't explicitly referenced, specify KEEP to prevent
+ * link-time garbage collection. SORT is used for sections that have strict
+ * init/de-init ordering requirements. */
+ . = ALIGN(4);
+ PROVIDE_HIDDEN(__preinit_array_start = .);
+ KEEP(*(.preinit_array*))
+ PROVIDE_HIDDEN(__preinit_array_end = .);
+
+ PROVIDE_HIDDEN(__init_array_start = .);
+ KEEP(*(SORT(.init_array.*)))
+ KEEP(*(.init_array*))
+ PROVIDE_HIDDEN(__init_array_end = .);
+
+ PROVIDE_HIDDEN(__fini_array_start = .);
+ KEEP(*(SORT(.fini_array.*)))
+ KEEP(*(.fini_array*))
+ PROVIDE_HIDDEN(__fini_array_end = .);
+ } >FLASH
+
+ /* Used by unwind-arm/ */
+ .ARM : ALIGN(4) {
+ __exidx_start = .;
+ *(.ARM.exidx*)
+ __exidx_end = .;
+ } >FLASH
+
+ /* Explicitly initialized global and static data. (.data)*/
+ .static_init_ram : ALIGN(4)
+ {
+ *(CodeQuickAccess)
+ *(DataQuickAccess)
+ *(.data)
+ *(.data*)
+ . = ALIGN(4);
+ } >RAM AT> FLASH
+
+ /* Represents unused space in the FLASH segment. This MUST be the last section
+ * assigned to the FLASH region.
+ */
+ .FLASH.unused_space (NOLOAD) : ALIGN(4)
+ {
+ . = ABSOLUTE(ORIGIN(FLASH) + LENGTH(FLASH));
+ } >FLASH
+
+ /* The .zero_init_ram, .heap, and .stack sections below require (NOLOAD)
+ * annotations for LLVM lld, but not GNU ld, because LLVM's lld intentionally
+ * interprets the linker file differently from ld:
+ *
+ * https://discourse.llvm.org/t/lld-vs-ld-section-type-progbits-vs-nobits/5999/3
+ *
+ * Zero initialized global/static data (.bss) is initialized in
+ * pw_boot_Entry() via memset(), so the section doesn't need to be loaded from
+ * flash. The .heap and .stack sections don't require any initialization,
+ * as they only represent allocated memory regions, so they also do not need
+ * to be loaded.
+ */
+ .zero_init_ram (NOLOAD) : ALIGN(4)
+ {
+ *(.bss)
+ *(.bss*)
+ *(COMMON)
+ . = ALIGN(4);
+ } >RAM
+
+ .heap (NOLOAD) : ALIGN(4)
+ {
+ pw_boot_heap_low_addr = .;
+ . = . + PW_BOOT_HEAP_SIZE;
+ . = ALIGN(4);
+ pw_boot_heap_high_addr = .;
+ } >RAM
+
+ /* Link-time check for stack overlaps.
+ *
+ * The ARMv8-M architecture requires 8-byte alignment of the stack pointer
+ * rather than 4 in some contexts, so this region is 8-byte aligned (see
+ * ARMv8-M Architecture Reference Manual DDI0553 section B3.8).
+ */
+ .stack (NOLOAD) : ALIGN(8)
+ {
+ /* Set the address that the main stack pointer should be initialized to. */
+ pw_boot_stack_low_addr = .;
+ HIDDEN(_stack_size = ORIGIN(RAM) + LENGTH(RAM) - .);
+ /* Align the stack to a lower address to ensure it isn't out of range. */
+ HIDDEN(_stack_high = (. + _stack_size) & ~0x7);
+ ASSERT(_stack_high - . >= PW_BOOT_MIN_STACK_SIZE,
+ "Error: Not enough RAM for desired minimum stack size.");
+ . = _stack_high;
+ pw_boot_stack_high_addr = .;
+ } >RAM
+
+ /* Represents unused space in the RAM segment. This MUST be the last section
+ * assigned to the RAM region.
+ */
+ .RAM.unused_space (NOLOAD) : ALIGN(4)
+ {
+ . = ABSOLUTE(ORIGIN(RAM) + LENGTH(RAM));
+ } >RAM
+
+ m_usb_bdt (NOLOAD) :
+ {
+ . = ALIGN(512);
+ *(m_usb_bdt)
+ } >USB_SRAM
+
+ m_usb_global (NOLOAD) :
+ {
+ *(m_usb_global)
+ } >USB_SRAM
+
+ /* Represents unused space in the USB_SRAM segment. This MUST be the last
+ * section assigned to the USB_SRAM region.
+ */
+ .USB_SRAM.unused_space (NOLOAD) : ALIGN(4)
+ {
+ . = ABSOLUTE(ORIGIN(USB_SRAM) + LENGTH(USB_SRAM));
+ } >USB_SRAM
+
+ /* Discard unwind info. */
+ .ARM.extab 0x0 (INFO) :
+ {
+ KEEP(*(.ARM.extab*))
+ }
+
+ .ARM.attributes 0 : { *(.ARM.attributes) }
+}
+
+/* Symbols used by core_init.c: */
+/* Start of .static_init_ram in FLASH. */
+_pw_static_init_flash_start = LOADADDR(.static_init_ram);
+
+/* Region of .static_init_ram in RAM. */
+_pw_static_init_ram_start = ADDR(.static_init_ram);
+_pw_static_init_ram_end = _pw_static_init_ram_start + SIZEOF(.static_init_ram);
+
+/* Region of .zero_init_ram. */
+_pw_zero_init_ram_start = ADDR(.zero_init_ram);
+_pw_zero_init_ram_end = _pw_zero_init_ram_start + SIZEOF(.zero_init_ram);
+
+/* Size of image for bootloader header. */
+_pw_image_size = _pw_static_init_flash_start + (_pw_static_init_ram_end - _pw_static_init_ram_start) - pw_boot_vector_table_addr;
+
+/* arm-none-eabi expects `end` symbol to point to start of heap for sbrk. */
+PROVIDE(end = _pw_zero_init_ram_end);
diff --git a/targets/mimxrt595_evk/target_docs.rst b/targets/mimxrt595_evk/target_docs.rst
new file mode 100644
index 0000000..7b6b3c8
--- /dev/null
+++ b/targets/mimxrt595_evk/target_docs.rst
@@ -0,0 +1,142 @@
+.. _target-mimxrt595-evk:
+
+-------------
+mimxrt595-evk
+-------------
+The NXP MIMXRT595-EVK_ evaluation board is a demonstration target for on-device
+Pigweed development
+
+.. _MIMXRT595-EVK: https://www.nxp.com/design/development-boards/i-mx-evaluation-and-development-boards/i-mx-rt595-evaluation-kit:MIMXRT595-EVK
+
+Configuring
+===========
+Step 1: Download SDK
+--------------------
+To configure this Pigweed target you will first need to download an NXP
+`MCUXpresso SDK`_ for your device and unpack it within your project source tree.
+
+.. _MCUXpresso SDK: https://mcuxpresso.nxp.com/en/welcome
+
+Step 2: Create SDK source set
+-----------------------------
+You'll next need to create a source set based on the downloaded SDK, and set
+the ``pw_third_party_mcuxpresso_SDK`` build arg to the name of the source set
+you create. See :ref:`module-pw_build_mcuxpresso` for more details.
+
+Alternatively to get started you can start with the basic project template by
+setting the ``pw_target_mimxrt595_evk_MANIFEST`` build arg to the location of
+the manifest file within the unpacked SDK, and then setting the
+``pw_third_party_mcuxpresso_SDK`` to the ``sample_sdk`` source set within the
+Pigweed target directory.
+
+.. code:: sh
+
+ $ gn args out
+ # Modify and save the args file to use the sample SDK.
+ pw_target_mimxrt595_evk_MANIFEST = "//third_party/mcuxpresso/sdk/EVK-MIMXRT595_manifest_v3_8.xml"
+ pw_third_party_mcuxpresso_SDK = "//targets/mimxrt595_evk:sample_sdk"
+
+Building
+========
+Once configured, to build for this Pigweed target, simply build the top-level
+"mimxrt595" Ninja target.
+
+.. code:: sh
+
+ $ ninja -C out mimxrt595
+
+Running and Debugging
+=====================
+First Time Setup
+----------------
+The MIMXRT595-EVK comes with an integrated Link2 debug probe that can operate in
+either CMSIS-DAP or SEGGER J-Link mode. CMSIS-DAP is how the board will likely
+come by default, but J-Link is the mode that is currently known to work, so
+you'll need to flash the Link2 with the correct firmware.
+
+1. Download and install the LPCScrypt_ utility from the NXP website.
+
+2. Place a jumper over **JP1** (not **J1**). If you're having trouble locating
+ this, it's in the top-right of the board in a block of four jumpers closest
+ to the USB ports.
+
+3. Connect a USB cable into the top-right USB port (**J40**) and your computer.
+
+4. Run ``scripts/boot_lpcscrypt`` from the LPCScrypt installation.
+
+5. Run ``scripts/program_JLINK`` from the LPCScrypt installation, press the
+ *SPACE* key to update the firmware.
+
+6. Unplug the USB cable and remove the **JP1** jumper.
+
+Now is also a good time to download and install the J-Link_ package from the
+SEGGER website.
+
+.. _LPCScrypt: https://www.nxp.com/design/microcontrollers-developer-resources/lpcscrypt-v2-1-2:LPCSCRYPT
+.. _J-Link: https://www.segger.com/downloads/jlink/
+
+General Setup
+-------------
+Each time you prepare the MIMXRT595-EVK for use, you'll need to do a few steps.
+You don't need to repeat these if you leave everything setup and don't
+disconnect or reboot.
+
+1. Ensure the **SW7** DIP switches are set to Off-Off-On (boot from QSPI Flash).
+
+2. Connect a USB cable into the top-right USB port (**J40**) and your computer.
+
+3. Start the J-Link GDB Server and leave this running:
+
+ .. code-block:: sh
+
+ JLinkGDBServer -select USB -device MIMXRT595S -endian little -if SWD -speed 4000 -noir
+
+On Linux, you may need to install the `libncurses5` library to use the tools:
+
+.. code-block:: sh
+
+ sudo apt install libncurses5
+
+Running and Debugging
+---------------------
+Use ``arm-none-eabi-gdb`` to load an executable into the target, debug, and run
+it.
+
+.. code-block::
+ :emphasize-lines: 1,6,10,12,20
+
+ (gdb) target remote :2331
+ Remote debugging using :2331
+ warning: No executable has been specified and target does not support
+ determining executable automatically. Try using the "file" command.
+ 0x08000000 in ?? ()
+ (gdb) file out/mimxrt595_evk_debug/obj/pw_status/test/status_test.elf
+ A program is being debugged already.
+ Are you sure you want to change the file? (y or n) y
+ Reading symbols from out/mimxrt595_evk_debug/obj/pw_status/test/status_test.elf...
+ (gdb) monitor reset
+ Resetting target
+ (gdb) load
+ Loading section .flash_config, size 0x200 lma 0x8000400
+ Loading section .vector_table, size 0x168 lma 0x8001000
+ Loading section .code, size 0xb34c lma 0x8001180
+ Loading section .ARM, size 0x8 lma 0x800c4d0
+ Loading section .static_init_ram, size 0x3c8 lma 0x800c4d8
+ Start address 0x080048d0, load size 47748
+ Transfer rate: 15542 KB/sec, 6821 bytes/write.
+ (gdb) monitor reset
+ Resetting target
+
+You can now set any breakpoints you wish, and ``continue`` to run the
+executable.
+
+To reset the target use ``monitor reset``.
+
+To load an updated version of the same file, after resetting the target,
+use ``load`` and a second ``monitor reset`` as shown above.
+
+To debug a new file, use ``file`` before ``load``.
+
+Debug console is available on the USB serial port, e.g. ``/dev/ttyACM0``
+(Linux) or ``/dev/tty.usbmodem*`` (Mac).
+
diff --git a/targets/mimxrt595_evk/target_toolchains.gni b/targets/mimxrt595_evk/target_toolchains.gni
index 9bfa8d9..d518f10 100644
--- a/targets/mimxrt595_evk/target_toolchains.gni
+++ b/targets/mimxrt595_evk/target_toolchains.gni
@@ -1,4 +1,4 @@
-# Copyright 2022 The Pigweed Authors
+# Copyright 2021 The Pigweed Authors
#
# Licensed under the Apache License, Version 2.0 (the "License"); you may not
# use this file except in compliance with the License. You may obtain a copy of
@@ -14,47 +14,131 @@
import("//build_overrides/pigweed.gni")
-import("$dir_pigweed/targets/mimxrt595_evk/target_toolchains.gni")
-import("$dir_pigweed_experimental/targets/common_backends.gni")
-import("$dir_pw_protobuf_compiler/proto.gni")
-import("$dir_pw_third_party/nanopb/nanopb.gni")
+import("$dir_pw_boot/backend.gni")
+import("$dir_pw_log/backend.gni")
+import("$dir_pw_rpc/system_server/backend.gni")
+import("$dir_pw_sync/backend.gni")
+import("$dir_pw_sys_io/backend.gni")
+import("$dir_pw_toolchain/arm_gcc/toolchains.gni")
-target_toolchain_mimxrt595_evk = {
+_target_config = {
+ # Use the logging main.
+ pw_unit_test_MAIN = "$dir_pw_unit_test:logging_main"
+
+ # Configuration options for Pigweed executable targets.
+ pw_build_EXECUTABLE_TARGET_TYPE = "mimxrt595_executable"
+
+ pw_build_EXECUTABLE_TARGET_TYPE_FILE =
+ get_path_info("mimxrt595_executable.gni", "abspath")
+
+ # Facade backends
+ pw_assert_BACKEND = dir_pw_assert_basic
+ pw_boot_BACKEND = "$dir_pw_boot_cortex_m"
+ pw_sync_INTERRUPT_SPIN_LOCK_BACKEND =
+ "$dir_pw_sync_baremetal:interrupt_spin_lock"
+ pw_sync_MUTEX_BACKEND = "$dir_pw_sync_baremetal:mutex"
+ pw_rpc_CONFIG = "$dir_pw_rpc:disable_global_mutex"
+ pw_log_BACKEND = dir_pw_log_basic
+ pw_sys_io_BACKEND = "$dir_pw_sys_io_mcuxpresso"
+ pw_rpc_system_server_BACKEND = "$dir_pw_hdlc:hdlc_sys_io_system_server"
+
+ app_common_BACKEND =
+ "$dir_pigweed_experimental/applications/app_common_impl:mimxrt595"
+ pw_mipi_dsi_use_smart_dma = 1
+ pw_lcd_width = 400
+ pw_lcd_height = 392
+ pw_nxp_buffer_width = 392
+ pw_nxp_buffer_start_x = 4
+ pw_nxp_buffer_start_y = 0
+
+ pw_board_led_BACKEND = "$dir_pw_board_led_mimxrt595_evk"
+ pw_spin_delay_BACKEND = "$dir_pw_spin_delay_mcuxpresso"
+ pw_touchscreen_BACKEND = "$dir_pw_touchscreen_null"
+ pw_third_party_freertos_CONFIG =
+ "$dir_pigweed_experimental/targets/mimxrt595_evk:freertos_config"
+ pw_third_party_freertos_PORT = "$dir_pigweed_experimental/third_party/freertos:arm_cm33_ntz_freertos_port"
+
+ # Override the default pw_boot_cortex_m linker script and set the memory
+ # regions for the target.
+ pw_boot_cortex_m_LINKER_SCRIPT =
+ "$dir_pigweed_experimental/targets/mimxrt595_evk:flash_linker_script"
+ pw_target_mimxrt595_evk_LINK_CONFIG_DEFINES = [
+ "PW_BOOT_FLASH_BEGIN=0x08001180",
+ "PW_BOOT_FLASH_SIZE=0x001FEE80",
+ "PW_BOOT_HEAP_SIZE=200K",
+ "PW_BOOT_MIN_STACK_SIZE=1K",
+ "PW_BOOT_RAM_BEGIN=0x20080000",
+ "PW_BOOT_RAM_SIZE=0x00280000",
+ "PW_BOOT_VECTOR_TABLE_BEGIN=0x08001000",
+ "PW_BOOT_VECTOR_TABLE_SIZE=0x00000180",
+ ]
+
+ pw_build_LINK_DEPS = [
+ "$dir_pw_assert:impl",
+ "$dir_pw_log:impl",
+ ]
+
+ current_cpu = "arm"
+ current_os = ""
+}
+
+_toolchain_properties = {
+ final_binary_extension = ".elf"
+}
+
+_target_default_configs = [
+ "$dir_pw_build:extra_strict_warnings",
+ "$dir_pw_toolchain/arm_gcc:enable_float_printf",
+]
+
+pw_target_toolchain_mimxrt595_evk = {
_excluded_members = [
"defaults",
"name",
]
- _excluded_defaults = [
- "pw_cpu_exception_ENTRY_BACKEND",
- "pw_cpu_exception_HANDLER_BACKEND",
- "pw_cpu_exception_SUPPORT_BACKEND",
- ]
debug = {
name = "mimxrt595_evk_debug"
- _toolchain_base = pw_target_toolchain_mimxrt595_evk.debug
+ _toolchain_base = pw_toolchain_arm_gcc.cortex_m33f_debug
forward_variables_from(_toolchain_base, "*", _excluded_members)
+ forward_variables_from(_toolchain_properties, "*")
defaults = {
- forward_variables_from(_toolchain_base.defaults, "*", _excluded_defaults)
- forward_variables_from(toolchain_overrides, "*")
+ forward_variables_from(_toolchain_base.defaults, "*")
+ forward_variables_from(_target_config, "*")
+ default_configs += _target_default_configs
+ }
+ }
- app_common_BACKEND =
- "$dir_pigweed_experimental/applications/app_common_impl:mimxrt595"
- pw_mipi_dsi_use_smart_dma = 1
- pw_lcd_width = 400
- pw_lcd_height = 392
- pw_nxp_buffer_width = 392
- pw_nxp_buffer_start_x = 4
- pw_nxp_buffer_start_y = 0
+ speed_optimized = {
+ name = "mimxrt595_evk_speed_optimized"
+ _toolchain_base = pw_toolchain_arm_gcc.cortex_m33f_speed_optimized
+ forward_variables_from(_toolchain_base, "*", _excluded_members)
+ forward_variables_from(_toolchain_properties, "*")
+ defaults = {
+ forward_variables_from(_toolchain_base.defaults, "*")
+ forward_variables_from(_target_config, "*")
+ default_configs += _target_default_configs
+ }
+ }
- pw_board_led_BACKEND = "$dir_pw_board_led_mimxrt595_evk"
- pw_spin_delay_BACKEND = "$dir_pw_spin_delay_mcuxpresso"
- pw_touchscreen_BACKEND = "$dir_pw_touchscreen_null"
- pw_third_party_freertos_CONFIG =
- "$dir_pigweed_experimental/targets/mimxrt595_evk:freertos_config"
- pw_third_party_freertos_PORT = "$dir_pigweed_experimental/third_party/freertos:arm_cm33_ntz_freertos_port"
+ size_optimized = {
+ name = "mimxrt595_evk_size_optimized"
+ _toolchain_base = pw_toolchain_arm_gcc.cortex_m33f_size_optimized
+ forward_variables_from(_toolchain_base, "*", _excluded_members)
+ forward_variables_from(_toolchain_properties, "*")
+ defaults = {
+ forward_variables_from(_toolchain_base.defaults, "*")
+ forward_variables_from(_target_config, "*")
+ default_configs += _target_default_configs
}
}
}
-toolchains_list = [ target_toolchain_mimxrt595_evk.debug ]
+# This list just contains the members of the above scope for convenience to make
+# it trivial to generate all the toolchains in this file via a
+# `generate_toolchains` target.
+pw_target_toolchain_mimxrt595_evk_list = [
+ pw_target_toolchain_mimxrt595_evk.debug,
+ pw_target_toolchain_mimxrt595_evk.speed_optimized,
+ pw_target_toolchain_mimxrt595_evk.size_optimized,
+]
diff --git a/targets/mimxrt595_evk/vector_table.c b/targets/mimxrt595_evk/vector_table.c
new file mode 100644
index 0000000..98aac95
--- /dev/null
+++ b/targets/mimxrt595_evk/vector_table.c
@@ -0,0 +1,414 @@
+// Copyright 2021 The Pigweed Authors
+//
+// Licensed under the Apache License, Version 2.0 (the "License"); you may not
+// use this file except in compliance with the License. You may obtain a copy of
+// the License at
+//
+// https://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+// WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
+// License for the specific language governing permissions and limitations under
+// the License.
+
+#include <stdbool.h>
+
+#include "pw_boot/boot.h"
+#include "pw_boot_cortex_m/boot.h"
+#include "pw_preprocessor/compiler.h"
+
+// Extern symbols provided by linker script.
+// This symbol contains the size of the image.
+extern uint8_t _pw_image_size;
+
+// Default handler to insert into the ARMv8-M vector table (below).
+// This function exists for convenience. If a device isn't doing what you
+// expect, it might have hit a fault and ended up here.
+static void DefaultFaultHandler(void) {
+ while (true) {
+ // Wait for debugger to attach.
+ }
+}
+
+// Default interrupt handler that entries in the ARMv8-M vector table (below)
+// are aliased to, allowing them to be replaced at link time with OS or SDK
+// implementations. If a device isn't doing what you expect, it might have
+// raised an interrupt and ended up here.
+static void DefaultInterruptHandler(void) {
+ while (true) {
+ // Wait for debugger to attach.
+ }
+}
+
+// Default handlers to insert into the ARMv8-M vector table (below) that
+// are likely to be replaced by OS implementations.
+void SVC_Handler(void) PW_ALIAS(DefaultInterruptHandler);
+void DebugMon_Handler(void) PW_ALIAS(DefaultInterruptHandler);
+void PendSV_Handler(void) PW_ALIAS(DefaultInterruptHandler);
+void SysTick_Handler(void) PW_ALIAS(DefaultInterruptHandler);
+
+// Default handlers to insert into the ARMv8-M vector table (below) that
+// are call a driver implementation that may be provided by the SDK.
+static void WDT0_IRQHandler(void);
+static void DMA0_IRQHandler(void);
+static void GPIO_INTA_IRQHandler(void);
+static void GPIO_INTB_IRQHandler(void);
+static void PIN_INT0_IRQHandler(void);
+static void PIN_INT1_IRQHandler(void);
+static void PIN_INT2_IRQHandler(void);
+static void PIN_INT3_IRQHandler(void);
+static void UTICK0_IRQHandler(void);
+static void MRT0_IRQHandler(void);
+static void CTIMER0_IRQHandler(void);
+static void CTIMER1_IRQHandler(void);
+static void SCT0_IRQHandler(void);
+static void CTIMER3_IRQHandler(void);
+static void FLEXCOMM0_IRQHandler(void);
+static void FLEXCOMM1_IRQHandler(void);
+static void FLEXCOMM2_IRQHandler(void);
+static void FLEXCOMM3_IRQHandler(void);
+static void FLEXCOMM4_IRQHandler(void);
+static void FLEXCOMM5_IRQHandler(void);
+static void FLEXCOMM14_IRQHandler(void);
+static void FLEXCOMM15_IRQHandler(void);
+static void ADC0_IRQHandler(void);
+static void Reserved39_IRQHandler(void);
+static void ACMP_IRQHandler(void);
+static void DMIC0_IRQHandler(void);
+static void Reserved42_IRQHandler(void);
+static void HYPERVISOR_IRQHandler(void);
+static void SECURE_VIOLATION_IRQHandler(void);
+static void HWVAD0_IRQHandler(void);
+static void Reserved46_IRQHandler(void);
+static void RNG_IRQHandler(void);
+static void RTC_IRQHandler(void);
+static void DSP_TIE_EXPSTATE1_IRQHandler(void);
+static void MU_A_IRQHandler(void);
+static void PIN_INT4_IRQHandler(void);
+static void PIN_INT5_IRQHandler(void);
+static void PIN_INT6_IRQHandler(void);
+static void PIN_INT7_IRQHandler(void);
+static void CTIMER2_IRQHandler(void);
+static void CTIMER4_IRQHandler(void);
+static void OS_EVENT_IRQHandler(void);
+static void FLEXSPI0_FLEXSPI1_IRQHandler(void);
+static void FLEXCOMM6_IRQHandler(void);
+static void FLEXCOMM7_IRQHandler(void);
+static void USDHC0_IRQHandler(void);
+static void USDHC1_IRQHandler(void);
+static void SGPIO_INTA_IRQHandler(void);
+static void SGPIO_INTB_IRQHandler(void);
+static void I3C0_IRQHandler(void);
+static void USB0_IRQHandler(void);
+static void USB0_NEEDCLK_IRQHandler(void);
+static void WDT1_IRQHandler(void);
+static void USB_PHYDCD_IRQHandler(void);
+static void DMA1_IRQHandler(void);
+static void PUF_IRQHandler(void);
+static void POWERQUAD_IRQHandler(void);
+static void CASPER_IRQHandler(void);
+static void PMU_PMIC_IRQHandler(void);
+static void HASHCRYPT_IRQHandler(void);
+static void FLEXCOMM8_IRQHandler(void);
+static void FLEXCOMM9_IRQHandler(void);
+static void FLEXCOMM10_IRQHandler(void);
+static void FLEXCOMM11_IRQHandler(void);
+static void FLEXCOMM12_IRQHandler(void);
+static void FLEXCOMM13_IRQHandler(void);
+static void FLEXCOMM16_IRQHandler(void);
+static void I3C1_IRQHandler(void);
+static void FLEXIO_IRQHandler(void);
+static void LCDIF_IRQHandler(void);
+static void GPU_IRQHandler(void);
+static void MIPI_IRQHandler(void);
+static void Reserved88_IRQHandler(void);
+static void SDMA_IRQHandler(void);
+
+// This is the device's interrupt vector table. It's not referenced in any
+// code because the platform (EVKMIMXRT595) expects this table to be present
+// at the beginning of flash. The exact address is specified in the pw_boot
+// configuration as part of the target config.
+
+// This typedef is for convenience when building the vector table. With the
+// exception of SP_main (0th entry in the vector table), image length (8th),
+// type (9th), reserved 10th entry, and image load address (13th entry), all
+// the entries of the vector table are function pointers.
+typedef void (*InterruptHandler)(void);
+
+PW_KEEP_IN_SECTION(".vector_table")
+const InterruptHandler vector_table[] = {
+ // Core Level - CM33
+
+ // The starting location of the stack pointer.
+ // This address is NOT an interrupt handler/function pointer, it is simply
+ // the address that the main stack pointer should be initialized to. The
+ // value is reinterpret casted because it needs to be in the vector table.
+ [0] = (InterruptHandler)(&pw_boot_stack_high_addr),
+
+ // Reset handler, dictates how to handle reset interrupt. This is the
+ // address that the Program Counter (PC) is initialized to at boot.
+ [1] = pw_boot_Entry,
+
+ // NMI handler.
+ [2] = DefaultFaultHandler,
+ // HardFault handler.
+ [3] = DefaultFaultHandler,
+ // MemManage (MPU Fault) handler.
+ [4] = DefaultFaultHandler,
+ // BusFault handler.
+ [5] = DefaultFaultHandler,
+ // UsageFault handler.
+ [6] = DefaultFaultHandler,
+ // SecureFault handler.
+ [7] = DefaultFaultHandler,
+ // Image Length.
+ [8] = (InterruptHandler)(&_pw_image_size),
+ // Image Type.
+ [9] = 0,
+ // Reserved.
+ [10] = 0,
+ // SVCall handler.
+ [11] = SVC_Handler,
+ // DebugMon handler.
+ [12] = DebugMon_Handler,
+ // Image Load Address.
+ [13] = (InterruptHandler)(&pw_boot_vector_table_addr),
+ // PendSV handler.
+ [14] = PendSV_Handler,
+ // SysTick handler.
+ [15] = SysTick_Handler,
+
+ // Chip Level - MIMXRT595S_cm33
+
+ // Watchdog timer interrupt.
+ [16] = WDT0_IRQHandler,
+ // DMA interrupt.
+ [17] = DMA0_IRQHandler,
+ // GPIO Interrupt A.
+ [18] = GPIO_INTA_IRQHandler,
+ // GPIO Interrupt B.
+ [19] = GPIO_INTB_IRQHandler,
+ // General Purpose Input/Output interrupt 0.
+ [20] = PIN_INT0_IRQHandler,
+ // General Purpose Input/Output interrupt 1.
+ [21] = PIN_INT1_IRQHandler,
+ // General Purpose Input/Output interrupt 2.
+ [22] = PIN_INT2_IRQHandler,
+ // General Purpose Input/Output interrupt 3.
+ [23] = PIN_INT3_IRQHandler,
+ // Micro-tick Timer.
+ [24] = UTICK0_IRQHandler,
+ // Multi-Rate Timer.
+ [25] = MRT0_IRQHandler,
+ // Standard counter/timer CTIMER0.
+ [26] = CTIMER0_IRQHandler,
+ // Standard counter/timer CTIMER1.
+ [27] = CTIMER1_IRQHandler,
+ // SCTimer/PWM.
+ [28] = SCT0_IRQHandler,
+ // Standard counter/timer CTIMER3.
+ [29] = CTIMER3_IRQHandler,
+ // FlexComm interrupt.
+ [30] = FLEXCOMM0_IRQHandler,
+ // FlexComm interrupt.
+ [31] = FLEXCOMM1_IRQHandler,
+ // FlexComm interrupt.
+ [32] = FLEXCOMM2_IRQHandler,
+ // FlexComm interrupt.
+ [33] = FLEXCOMM3_IRQHandler,
+ // FlexComm interrupt.
+ [34] = FLEXCOMM4_IRQHandler,
+ // FlexComm interrupt.
+ [35] = FLEXCOMM5_IRQHandler,
+ // FlexComm interrupt. Standalone SPI.
+ [36] = FLEXCOMM14_IRQHandler,
+ // FlexComm interrupt. Standalone I2C.
+ [37] = FLEXCOMM15_IRQHandler,
+ // Analog-to-Digital Converter interrupt.
+ [38] = ADC0_IRQHandler,
+ // Reserved interrupt.
+ [39] = Reserved39_IRQHandler,
+ // Analog comparator Interrupts.
+ [40] = ACMP_IRQHandler,
+ // Digital Microphone Interface interrupt.
+ [41] = DMIC0_IRQHandler,
+ // Reserved interrupt.
+ [42] = Reserved42_IRQHandler,
+ // Hypervisor interrupt.
+ [43] = HYPERVISOR_IRQHandler,
+ // Secure violation interrupt.
+ [44] = SECURE_VIOLATION_IRQHandler,
+ // Hardware Voice Activity Detector interrupt.
+ [45] = HWVAD0_IRQHandler,
+ // Reserved interrupt.
+ [46] = Reserved46_IRQHandler,
+ // Random Number Generator interrupt.
+ [47] = RNG_IRQHandler,
+ // Real Time Clock Alarm interrupt OR Wakeup timer interrupt.
+ [48] = RTC_IRQHandler,
+ // DSP interrupt.
+ [49] = DSP_TIE_EXPSTATE1_IRQHandler,
+ // Messaging Unit - Side A.
+ [50] = MU_A_IRQHandler,
+ // General Purpose Input/Output interrupt 4.
+ [51] = PIN_INT4_IRQHandler,
+ // General Purpose Input/Output interrupt 5.
+ [52] = PIN_INT5_IRQHandler,
+ // General Purpose Input/Output interrupt 6.
+ [53] = PIN_INT6_IRQHandler,
+ // General Purpose Input/Output interrupt 7.
+ [54] = PIN_INT7_IRQHandler,
+ // Standard counter/timer CTIMER2.
+ [55] = CTIMER2_IRQHandler,
+ // Standard counter/timer CTIMER4.
+ [56] = CTIMER4_IRQHandler,
+ // Event timer M33 Wakeup/interrupt.
+ [57] = OS_EVENT_IRQHandler,
+ // FlexSPI0_IRQ OR FlexSPI1_IRQ.
+ [58] = FLEXSPI0_FLEXSPI1_IRQHandler,
+ // FlexComm interrupt.
+ [59] = FLEXCOMM6_IRQHandler,
+ // FlexComm interrupt.
+ [60] = FLEXCOMM7_IRQHandler,
+ // USDHC interrupt.
+ [61] = USDHC0_IRQHandler,
+ // USDHC interrupt.
+ [62] = USDHC1_IRQHandler,
+ // Secure GPIO HS interrupt 0.
+ [63] = SGPIO_INTA_IRQHandler,
+ // Secure GPIO HS interrupt 1.
+ [64] = SGPIO_INTB_IRQHandler,
+ // Improved Inter Integrated Circuit 0 interrupt.
+ [65] = I3C0_IRQHandler,
+ // USB device.
+ [66] = USB0_IRQHandler,
+ // USB Activity Wake-up Interrupt.
+ [67] = USB0_NEEDCLK_IRQHandler,
+ // Watchdog timer 1 interrupt.
+ [68] = WDT1_IRQHandler,
+ // USBPHY DCD interrupt.
+ [69] = USB_PHYDCD_IRQHandler,
+ // DMA interrupt.
+ [70] = DMA1_IRQHandler,
+ // QuidKey interrupt.
+ [71] = PUF_IRQHandler,
+ // Powerquad interrupt.
+ [72] = POWERQUAD_IRQHandler,
+ // Caspar interrupt.
+ [73] = CASPER_IRQHandler,
+ // Power Management Control interrupt.
+ [74] = PMU_PMIC_IRQHandler,
+ // SHA interrupt.
+ [75] = HASHCRYPT_IRQHandler,
+ // FlexComm interrupt.
+ [76] = FLEXCOMM8_IRQHandler,
+ // FlexComm interrupt.
+ [77] = FLEXCOMM9_IRQHandler,
+ // FlexComm interrupt.
+ [78] = FLEXCOMM10_IRQHandler,
+ // FlexComm interrupt.
+ [79] = FLEXCOMM11_IRQHandler,
+ // FlexComm interrupt.
+ [80] = FLEXCOMM12_IRQHandler,
+ // FlexComm interrupt.
+ [81] = FLEXCOMM13_IRQHandler,
+ // FlexComm interrupt.
+ [82] = FLEXCOMM16_IRQHandler,
+ // Improved Inter Integrated Circuit 1 interrupt.
+ [83] = I3C1_IRQHandler,
+ // Flexible I/O interrupt.
+ [84] = FLEXIO_IRQHandler,
+ // Liquid Crystal Display interface interrupt.
+ [85] = LCDIF_IRQHandler,
+ // Graphics Processor Unit interrupt.
+ [86] = GPU_IRQHandler,
+ // MIPI interrupt.
+ [87] = MIPI_IRQHandler,
+ // Reserved interrupt.
+ [88] = Reserved88_IRQHandler,
+ // Smart DMA Engine Controller interrupt.
+ [89] = SDMA_IRQHandler,
+};
+
+// Define handlers that call out to a driver handler provided by the SDK.
+#define DRIVER_HANDLER(_IRQHandler, _DriverIRQHandler) \
+ void _DriverIRQHandler(void) PW_ALIAS(DefaultInterruptHandler); \
+ static void _IRQHandler(void) { _DriverIRQHandler(); }
+
+DRIVER_HANDLER(WDT0_IRQHandler, WDT0_DriverIRQHandler);
+DRIVER_HANDLER(DMA0_IRQHandler, DMA0_DriverIRQHandler);
+DRIVER_HANDLER(GPIO_INTA_IRQHandler, GPIO_INTA_DriverIRQHandler);
+DRIVER_HANDLER(GPIO_INTB_IRQHandler, GPIO_INTB_DriverIRQHandler);
+DRIVER_HANDLER(PIN_INT0_IRQHandler, PIN_INT0_DriverIRQHandler);
+DRIVER_HANDLER(PIN_INT1_IRQHandler, PIN_INT1_DriverIRQHandler);
+DRIVER_HANDLER(PIN_INT2_IRQHandler, PIN_INT2_DriverIRQHandler);
+DRIVER_HANDLER(PIN_INT3_IRQHandler, PIN_INT3_DriverIRQHandler);
+DRIVER_HANDLER(UTICK0_IRQHandler, UTICK0_DriverIRQHandler);
+DRIVER_HANDLER(MRT0_IRQHandler, MRT0_DriverIRQHandler);
+DRIVER_HANDLER(CTIMER0_IRQHandler, CTIMER0_DriverIRQHandler);
+DRIVER_HANDLER(CTIMER1_IRQHandler, CTIMER1_DriverIRQHandler);
+DRIVER_HANDLER(SCT0_IRQHandler, SCT0_DriverIRQHandler);
+DRIVER_HANDLER(CTIMER3_IRQHandler, CTIMER3_DriverIRQHandler);
+DRIVER_HANDLER(FLEXCOMM0_IRQHandler, FLEXCOMM0_DriverIRQHandler);
+DRIVER_HANDLER(FLEXCOMM1_IRQHandler, FLEXCOMM1_DriverIRQHandler);
+DRIVER_HANDLER(FLEXCOMM2_IRQHandler, FLEXCOMM2_DriverIRQHandler);
+DRIVER_HANDLER(FLEXCOMM3_IRQHandler, FLEXCOMM3_DriverIRQHandler);
+DRIVER_HANDLER(FLEXCOMM4_IRQHandler, FLEXCOMM4_DriverIRQHandler);
+DRIVER_HANDLER(FLEXCOMM5_IRQHandler, FLEXCOMM5_DriverIRQHandler);
+DRIVER_HANDLER(FLEXCOMM14_IRQHandler, FLEXCOMM14_DriverIRQHandler);
+DRIVER_HANDLER(FLEXCOMM15_IRQHandler, FLEXCOMM15_DriverIRQHandler);
+DRIVER_HANDLER(ADC0_IRQHandler, ADC0_DriverIRQHandler);
+DRIVER_HANDLER(Reserved39_IRQHandler, Reserved39_DriverIRQHandler);
+DRIVER_HANDLER(ACMP_IRQHandler, ACMP_DriverIRQHandler);
+DRIVER_HANDLER(DMIC0_IRQHandler, DMIC0_DriverIRQHandler);
+DRIVER_HANDLER(Reserved42_IRQHandler, Reserved42_DriverIRQHandler);
+DRIVER_HANDLER(HYPERVISOR_IRQHandler, HYPERVISOR_DriverIRQHandler);
+DRIVER_HANDLER(SECURE_VIOLATION_IRQHandler, SECURE_VIOLATION_DriverIRQHandler);
+DRIVER_HANDLER(HWVAD0_IRQHandler, HWVAD0_DriverIRQHandler);
+DRIVER_HANDLER(Reserved46_IRQHandler, Reserved46_DriverIRQHandler);
+DRIVER_HANDLER(RNG_IRQHandler, RNG_DriverIRQHandler);
+DRIVER_HANDLER(RTC_IRQHandler, RTC_DriverIRQHandler);
+DRIVER_HANDLER(DSP_TIE_EXPSTATE1_IRQHandler,
+ DSP_TIE_EXPSTATE1_DriverIRQHandler);
+DRIVER_HANDLER(MU_A_IRQHandler, MU_A_DriverIRQHandler);
+DRIVER_HANDLER(PIN_INT4_IRQHandler, PIN_INT4_DriverIRQHandler);
+DRIVER_HANDLER(PIN_INT5_IRQHandler, PIN_INT5_DriverIRQHandler);
+DRIVER_HANDLER(PIN_INT6_IRQHandler, PIN_INT6_DriverIRQHandler);
+DRIVER_HANDLER(PIN_INT7_IRQHandler, PIN_INT7_DriverIRQHandler);
+DRIVER_HANDLER(CTIMER2_IRQHandler, CTIMER2_DriverIRQHandler);
+DRIVER_HANDLER(CTIMER4_IRQHandler, CTIMER4_DriverIRQHandler);
+DRIVER_HANDLER(OS_EVENT_IRQHandler, OS_EVENT_DriverIRQHandler);
+DRIVER_HANDLER(FLEXSPI0_FLEXSPI1_IRQHandler,
+ FLEXSPI0_FLEXSPI1_DriverIRQHandler);
+DRIVER_HANDLER(FLEXCOMM6_IRQHandler, FLEXCOMM6_DriverIRQHandler);
+DRIVER_HANDLER(FLEXCOMM7_IRQHandler, FLEXCOMM7_DriverIRQHandler);
+DRIVER_HANDLER(USDHC0_IRQHandler, USDHC0_DriverIRQHandler);
+DRIVER_HANDLER(USDHC1_IRQHandler, USDHC1_DriverIRQHandler);
+DRIVER_HANDLER(SGPIO_INTA_IRQHandler, SGPIO_INTA_DriverIRQHandler);
+DRIVER_HANDLER(SGPIO_INTB_IRQHandler, SGPIO_INTB_DriverIRQHandler);
+DRIVER_HANDLER(I3C0_IRQHandler, I3C0_DriverIRQHandler);
+DRIVER_HANDLER(USB0_IRQHandler, USB0_DriverIRQHandler);
+DRIVER_HANDLER(USB0_NEEDCLK_IRQHandler, USB0_NEEDCLK_DriverIRQHandler);
+DRIVER_HANDLER(WDT1_IRQHandler, WDT1_DriverIRQHandler);
+DRIVER_HANDLER(USB_PHYDCD_IRQHandler, USB_PHYDCD_DriverIRQHandler);
+DRIVER_HANDLER(DMA1_IRQHandler, DMA1_DriverIRQHandler);
+DRIVER_HANDLER(PUF_IRQHandler, PUF_DriverIRQHandler);
+DRIVER_HANDLER(POWERQUAD_IRQHandler, POWERQUAD_DriverIRQHandler);
+DRIVER_HANDLER(CASPER_IRQHandler, CASPER_DriverIRQHandler);
+DRIVER_HANDLER(PMU_PMIC_IRQHandler, PMU_PMIC_DriverIRQHandler);
+DRIVER_HANDLER(HASHCRYPT_IRQHandler, HASHCRYPT_DriverIRQHandler);
+DRIVER_HANDLER(FLEXCOMM8_IRQHandler, FLEXCOMM8_DriverIRQHandler);
+DRIVER_HANDLER(FLEXCOMM9_IRQHandler, FLEXCOMM9_DriverIRQHandler);
+DRIVER_HANDLER(FLEXCOMM10_IRQHandler, FLEXCOMM10_DriverIRQHandler);
+DRIVER_HANDLER(FLEXCOMM11_IRQHandler, FLEXCOMM11_DriverIRQHandler);
+DRIVER_HANDLER(FLEXCOMM12_IRQHandler, FLEXCOMM12_DriverIRQHandler);
+DRIVER_HANDLER(FLEXCOMM13_IRQHandler, FLEXCOMM13_DriverIRQHandler);
+DRIVER_HANDLER(FLEXCOMM16_IRQHandler, FLEXCOMM16_DriverIRQHandler);
+DRIVER_HANDLER(I3C1_IRQHandler, I3C1_DriverIRQHandler);
+DRIVER_HANDLER(FLEXIO_IRQHandler, FLEXIO_DriverIRQHandler);
+DRIVER_HANDLER(LCDIF_IRQHandler, LCDIF_DriverIRQHandler);
+DRIVER_HANDLER(GPU_IRQHandler, GPU_DriverIRQHandler);
+DRIVER_HANDLER(MIPI_IRQHandler, MIPI_DriverIRQHandler);
+DRIVER_HANDLER(Reserved88_IRQHandler, Reserved88_DriverIRQHandler);
+DRIVER_HANDLER(SDMA_IRQHandler, SDMA_DriverIRQHandler);
