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pigweed/third_party/github/FreeRTOS/FreeRTOS-Kernel-Partner-Supported-Ports
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Branches

  1. 14eddeb Add initial AURIX TC3xx GCC port (#33) by Ruka_J · 4 weeks ago upstream/main
  2. fccbbce Cadence/Xtensa: Enabling XT_USE_L2RAM overrides PRIVILEGED_DATA (#32) by Ian Thompson · 7 weeks ago
  3. a5b5d9b Xtensa Port v3.13 Updates (#31) by Ian Thompson · 4 months ago
  4. eb3214d add aurix tc4xx tricore-gcc port (#30) by Ruka_J · 4 months ago
  5. 48534e1 Supported new feature Interrupt Stack Management for U2x Port. (#28) by Trong Nguyen · 11 months ago

FreeRTOS Partner Supported Ports

This repository contains FreeRTOS ports supported by FreeRTOS partners. For a partner supported FreeRTOS port:

  • The code has not been reviewed by the FreeRTOS team.
  • FreeRTOS team has not verified the tests results but tests exist and are reported to be successful by the partner.
  • Customer queries as well as bugs are addressed by the partner.

A new FreeRTOS port can be directly contributed by a partner. Follow the steps below to contribute a FreeRTOS port to this repository:

  1. Write the FreeRTOS port for your Compiler and Architecture.
  2. Create a project in the FreeRTOS Partner Supported Demos Repository for your hardware for running tests as mentioned here.
  3. Make sure all the tests pass. Add the test results in the Pull Request description.
  4. Add a README file with the following information:
    1. How to use this port?
    2. Link to the test project created in Step 2.
    3. Any other relevant information.
  5. Raise a PR to merge the FreeRTOS port.
  6. Raise another PR to merge the test project in the FreeRTOS-Partner-Supported-Demos Repository.

License

This repository contains multiple directories, each individually licensed. Please see the LICENSE file in each directory.