FreeRTOS/Demo/CORTEX_A9_Cyclone_V_SoC_DK/Altera_Code/HardwareLibrary/include/socal/alt_mpul2.h

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/* Altera - ALT_MPUL2 */

#ifndef __ALTERA_ALT_MPUL2_H__
#define __ALTERA_ALT_MPUL2_H__

#ifdef __cplusplus
extern "C"
{
#endif  /* __cplusplus */

/*
 * Component : MPU L2 cache controller Module Address Space - ALT_MPUL2
 * MPU L2 cache controller Module Address Space
 * 
 * Address space allocated to the MPU L2 cache controller. For detailed information
 * about the use of this address space,
 * [url=http://infocenter.arm.com/help/topic/com.arm.doc.ddi0246e/index.html]click
 * here[/url] to access the ARM documentation for the L2C-301.
 * 
 */
/*
 * Register : Empty - reg
 * 
 * Placeholder
 * 
 * Register Layout
 * 
 *  Bits   | Access | Reset   | Description
 * :-------|:-------|:--------|:------------
 *  [31:0] | RW     | Unknown | Empty      
 * 
 */
/*
 * Field : Empty - fld
 * 
 * Placeholder
 * 
 * Field Access Macros:
 * 
 */
/* The Least Significant Bit (LSB) position of the ALT_MPUL2_REG_FLD register field. */
#define ALT_MPUL2_REG_FLD_LSB        0
/* The Most Significant Bit (MSB) position of the ALT_MPUL2_REG_FLD register field. */
#define ALT_MPUL2_REG_FLD_MSB        31
/* The width in bits of the ALT_MPUL2_REG_FLD register field. */
#define ALT_MPUL2_REG_FLD_WIDTH      32
/* The mask used to set the ALT_MPUL2_REG_FLD register field value. */
#define ALT_MPUL2_REG_FLD_SET_MSK    0xffffffff
/* The mask used to clear the ALT_MPUL2_REG_FLD register field value. */
#define ALT_MPUL2_REG_FLD_CLR_MSK    0x00000000
/* The reset value of the ALT_MPUL2_REG_FLD register field is UNKNOWN. */
#define ALT_MPUL2_REG_FLD_RESET      0x0
/* Extracts the ALT_MPUL2_REG_FLD field value from a register. */
#define ALT_MPUL2_REG_FLD_GET(value) (((value) & 0xffffffff) >> 0)
/* Produces a ALT_MPUL2_REG_FLD register field value suitable for setting the register. */
#define ALT_MPUL2_REG_FLD_SET(value) (((value) << 0) & 0xffffffff)

#ifndef __ASSEMBLY__
/*
 * WARNING: The C register and register group struct declarations are provided for
 * convenience and illustrative purposes. They should, however, be used with
 * caution as the C language standard provides no guarantees about the alignment or
 * atomicity of device memory accesses. The recommended practice for writing
 * hardware drivers is to use the SoCAL access macros and alt_read_word() and
 * alt_write_word() functions.
 * 
 * The struct declaration for register ALT_MPUL2_REG.
 */
struct ALT_MPUL2_REG_s
{
    uint32_t  fld : 32;  /* Empty */
};

/* The typedef declaration for register ALT_MPUL2_REG. */
typedef volatile struct ALT_MPUL2_REG_s  ALT_MPUL2_REG_t;
#endif  /* __ASSEMBLY__ */

/* The byte offset of the ALT_MPUL2_REG register from the beginning of the component. */
#define ALT_MPUL2_REG_OFST        0x0

#ifndef __ASSEMBLY__
/*
 * WARNING: The C register and register group struct declarations are provided for
 * convenience and illustrative purposes. They should, however, be used with
 * caution as the C language standard provides no guarantees about the alignment or
 * atomicity of device memory accesses. The recommended practice for writing
 * hardware drivers is to use the SoCAL access macros and alt_read_word() and
 * alt_write_word() functions.
 * 
 * The struct declaration for register group ALT_MPUL2.
 */
struct ALT_MPUL2_s
{
    volatile ALT_MPUL2_REG_t  reg;  /* ALT_MPUL2_REG */
};

/* The typedef declaration for register group ALT_MPUL2. */
typedef volatile struct ALT_MPUL2_s  ALT_MPUL2_t;
/* The struct declaration for the raw register contents of register group ALT_MPUL2. */
struct ALT_MPUL2_raw_s
{
    volatile uint32_t  reg;  /* ALT_MPUL2_REG */
};

/* The typedef declaration for the raw register contents of register group ALT_MPUL2. */
typedef volatile struct ALT_MPUL2_raw_s  ALT_MPUL2_raw_t;
#endif  /* __ASSEMBLY__ */


#ifdef __cplusplus
}
#endif  /* __cplusplus */
#endif  /* __ALTERA_ALT_MPUL2_H__ */