/* | |
* Copyright 2017, NXP | |
* All rights reserved. | |
* | |
* | |
* SPDX-License-Identifier: BSD-3-Clause | |
* | |
*/ | |
/* | |
* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* | |
!!GlobalInfo | |
product: Pins v3.0 | |
processor: LPC54018 | |
package_id: LPC54018JET180 | |
mcu_data: ksdk2_0 | |
processor_version: 0.0.0 | |
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** | |
*/ | |
#include "fsl_common.h" | |
#include "fsl_iocon.h" | |
#include "pin_mux.h" | |
/*FUNCTION********************************************************************** | |
* | |
* Function Name : BOARD_InitBootPins | |
* Description : Calls initialization functions. | |
* | |
*END**************************************************************************/ | |
void BOARD_InitBootPins(void) { | |
BOARD_InitPins(); | |
} | |
#define IOCON_PIO_DIGITAL_EN 0x0100u /*!< Enables digital function */ | |
#define IOCON_PIO_FUNC1 0x01u /*!< Selects pin function 1 */ | |
#define IOCON_PIO_INPFILT_OFF 0x0200u /*!< Input filter disabled */ | |
#define IOCON_PIO_INV_DI 0x00u /*!< Input function is not inverted */ | |
#define IOCON_PIO_MODE_INACT 0x00u /*!< No addition pin function */ | |
#define IOCON_PIO_OPENDRAIN_DI 0x00u /*!< Open drain is disabled */ | |
#define IOCON_PIO_SLEW_STANDARD 0x00u /*!< Standard mode, output slew rate control is enabled */ | |
#define PIN29_IDX 29u /*!< Pin number for pin 29 in a port 0 */ | |
#define PIN30_IDX 30u /*!< Pin number for pin 30 in a port 0 */ | |
#define PORT0_IDX 0u /*!< Port index */ | |
/* | |
* TEXT BELOW IS USED AS SETTING FOR TOOLS ************************************* | |
BOARD_InitPins: | |
- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'} | |
- pin_list: | |
- {pin_num: B13, peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI/CTIMER2_MAT3/SCT0_OUT8/TRACEDATA(2), mode: inactive, invert: disabled, | |
glitch_filter: disabled, slew_rate: standard, open_drain: disabled} | |
- {pin_num: A2, peripheral: FLEXCOMM0, signal: TXD_SCL_MISO, pin_signal: PIO0_30/FC0_TXD_SCL_MISO/CTIMER0_MAT0/SCT0_OUT9/TRACEDATA(1), mode: inactive, invert: disabled, | |
glitch_filter: disabled, slew_rate: standard, open_drain: disabled} | |
* BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS *********** | |
*/ | |
/*FUNCTION********************************************************************** | |
* | |
* Function Name : BOARD_InitPins | |
* | |
*END**************************************************************************/ | |
void BOARD_InitPins(void) { /* Function assigned for the Core #0 (ARM Cortex-M4) */ | |
CLOCK_EnableClock(kCLOCK_Iocon); /* Enables the clock for the IOCON block. 0 = Disable; 1 = Enable.: 0x01u */ | |
const uint32_t port0_pin29_config = ( | |
IOCON_PIO_FUNC1 | /* Pin is configured as FC0_RXD_SDA_MOSI */ | |
IOCON_PIO_MODE_INACT | /* No addition pin function */ | |
IOCON_PIO_INV_DI | /* Input function is not inverted */ | |
IOCON_PIO_DIGITAL_EN | /* Enables digital function */ | |
IOCON_PIO_INPFILT_OFF | /* Input filter disabled */ | |
IOCON_PIO_SLEW_STANDARD | /* Standard mode, output slew rate control is enabled */ | |
IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */ | |
); | |
IOCON_PinMuxSet(IOCON, PORT0_IDX, PIN29_IDX, port0_pin29_config); /* PORT0 PIN29 (coords: B13) is configured as FC0_RXD_SDA_MOSI */ | |
const uint32_t port0_pin30_config = ( | |
IOCON_PIO_FUNC1 | /* Pin is configured as FC0_TXD_SCL_MISO */ | |
IOCON_PIO_MODE_INACT | /* No addition pin function */ | |
IOCON_PIO_INV_DI | /* Input function is not inverted */ | |
IOCON_PIO_DIGITAL_EN | /* Enables digital function */ | |
IOCON_PIO_INPFILT_OFF | /* Input filter disabled */ | |
IOCON_PIO_SLEW_STANDARD | /* Standard mode, output slew rate control is enabled */ | |
IOCON_PIO_OPENDRAIN_DI /* Open drain is disabled */ | |
); | |
IOCON_PinMuxSet(IOCON, PORT0_IDX, PIN30_IDX, port0_pin30_config); /* PORT0 PIN30 (coords: A2) is configured as FC0_TXD_SCL_MISO */ | |
} | |
/******************************************************************************* | |
* EOF | |
******************************************************************************/ |