| <?xml version="1.0" encoding="UTF-8"?> |
| <!-- IMPORTANT: This is an internal file that has been generated |
| by the Xilinx ISE software. Any direct editing or |
| changes made to this file may result in unpredictable |
| behavior or data corruption. It is strongly advised that |
| users do not edit the contents of this file. --> |
| <messages> |
| <msg type="warning" file="ConstraintSystem" num="65" delta="new" >Constraint <arg fmt="%s" index="1"><NET "PCIe_Bridge/Bridge_Clk" PERIOD = 8 ns HIGH 50%;> [system.pcf(65973)]</arg> overrides constraint <arg fmt="%s" index="2"><NET "PCIe_Bridge/Bridge_Clk" PERIOD = 8 ns HIGH 50%;> [system.pcf(65972)]</arg>. |
| </msg> |
| |
| <msg type="warning" file="Timing" num="3223" delta="old" >Timing constraint <arg fmt="%s" index="1">TS_MC_RDEN_SEL_MUX = MAXDELAY FROM TIMEGRP "TNM_RDEN_SEL_MUX" TO TIMEGRP "TNM_CLK0" TS_MC_CLK * 4;</arg> ignored during timing analysis.</msg> |
| |
| <msg type="info" file="Timing" num="3386" delta="old" >Intersecting Constraints found and resolved. For more information, see the TSI report. Please consult the Xilinx Command Line Tools User Guide for information on generating a TSI report.</msg> |
| |
| <msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/sig_sb_txrem_n<0></arg> has no load. PAR will not attempt to route this signal. |
| </msg> |
| |
| <msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/sig_MB_TxREMn<0></arg> has no load. PAR will not attempt to route this signal. |
| </msg> |
| |
| <msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">xps_bram_if_cntlr_1_port_BRAM_Addr<30></arg> has no load. PAR will not attempt to route this signal. |
| </msg> |
| |
| <msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">xps_bram_if_cntlr_1_port_BRAM_Addr<31></arg> has no load. PAR will not attempt to route this signal. |
| </msg> |
| |
| <msg type="warning" file="Par" num="288" delta="old" >The signal <arg fmt="%s" index="1">PCIe_Bridge/PCIe_Bridge/sig_MB_RxFull</arg> has no load. PAR will not attempt to route this signal. |
| </msg> |
| |
| <msg type="info" file="Route" num="501" delta="old" >One or more directed routing (DIRT) constraints generated for a specific device have been found. Note that DIRT strings are guaranteed to work only on the same device they were created for. If the DIRT constraints fail, verify that the same connectivity is available in the target device for this implementation. |
| </msg> |
| |
| <msg type="info" file="Timing" num="2761" delta="old" >N/A entries in the Constraints list may indicate that the constraint does not cover any paths or that it has no requested value.</msg> |
| |
| <msg type="info" file="Timing" num="2761" delta="old" >N/A entries in the Constraints list may indicate that the constraint does not cover any paths or that it has no requested value.</msg> |
| |
| <msg type="warning" file="ParHelpers" num="361" delta="old" >There are <arg fmt="%d" index="1">5</arg> loadless signals in this design. This design will cause Bitgen to issue DRC warnings. |
| |
| </msg> |
| |
| <msg type="warning" file="Par" num="283" delta="old" >There are <arg fmt="%d" index="1">5</arg> loadless signals in this design. This design will cause Bitgen to issue DRC warnings. |
| |
| </msg> |
| |
| <msg type="info" file="ParHelpers" num="197" delta="old" >Number of "Exact" mode Directed Routing Constraints: <arg fmt="%d" index="1">128</arg> |
| </msg> |
| |
| <msg type="info" file="ParHelpers" num="199" delta="old" >All "EXACT" mode Directed Routing constrained nets successfully routed. The number of constraints found: <arg fmt="%d" index="1">128</arg>, number successful: <arg fmt="%d" index="2">128</arg> |
| </msg> |
| |
| </messages> |
| |
