| <?xml version="1.0" encoding="UTF-8"?> |
| <!-- IMPORTANT: This is an internal file that has been generated |
| by the Xilinx ISE software. Any direct editing or |
| changes made to this file may result in unpredictable |
| behavior or data corruption. It is strongly advised that |
| users do not edit the contents of this file. --> |
| <messages> |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3111</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3119</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3127</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3135</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3143</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3151</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3159</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3167</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3175</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3183</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3191</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3199</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3207</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3215</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3223</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3231</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3239</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3247</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3255</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3263</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3271</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3279</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3287</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3295</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3303</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3311</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3319</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3327</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3335</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3343</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3351</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3359</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3367</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3375</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3383</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3391</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3399</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3407</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3415</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3423</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3431</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3439</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3447</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3455</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3463</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3471</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3479</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3487</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3495</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3503</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3511</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
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| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3519</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
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| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3527</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
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| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3535</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
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| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3543</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
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| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3551</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
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| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3559</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
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| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3567</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
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| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3575</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3583</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3591</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3599</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3607</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3615</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3623</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3631</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3639</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3647</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3655</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3663</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3671</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3679</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3687</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3695</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3703</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3711</arg>: Instantiating black box module <<arg fmt="%s" index="3">IOBUF</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="2211" delta="new" >"<arg fmt="%s" index="1">C:/E/Dev/FreeRTOS/WorkingCopy3/Demo/PPC440_Xilinx_Virtex5_GCC/hdl/system.vhd</arg>" line <arg fmt="%d" index="2">3719</arg>: Instantiating black box module <<arg fmt="%s" index="3">IBUFGDS</arg>>. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="646" delta="old" >Signal <<arg fmt="%s" index="1">pgassign9</arg>> is assigned but never used. This unconnected signal will be trimmed during the optimization process. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="646" delta="old" >Signal <<arg fmt="%s" index="1">pgassign11<0:6></arg>> is assigned but never used. This unconnected signal will be trimmed during the optimization process. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="646" delta="old" >Signal <<arg fmt="%s" index="1">pgassign11<31></arg>> is assigned but never used. This unconnected signal will be trimmed during the optimization process. |
| </msg> |
| |
| <msg type="warning" file="Xst" num="646" delta="old" >Signal <<arg fmt="%s" index="1">pgassign10<0></arg>> is assigned but never used. This unconnected signal will be trimmed during the optimization process. |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">plb_v46_0/GEN_MPLB_RST[0].I_MPLB_RST</arg>> in Unit <<arg fmt="%s" index="2">plb_v46_0</arg>> is equivalent to the following <arg fmt="%s" index="3">13 FFs/Latches</arg> : <arg fmt="%s" index="4"><plb_v46_0/GEN_SPLB_RST[11].I_SPLB_RST> <plb_v46_0/GEN_SPLB_RST[10].I_SPLB_RST> <plb_v46_0/GEN_SPLB_RST[9].I_SPLB_RST> <plb_v46_0/GEN_SPLB_RST[8].I_SPLB_RST> <plb_v46_0/GEN_SPLB_RST[7].I_SPLB_RST> <plb_v46_0/GEN_SPLB_RST[6].I_SPLB_RST> <plb_v46_0/GEN_SPLB_RST[5].I_SPLB_RST> <plb_v46_0/GEN_SPLB_RST[4].I_SPLB_RST> <plb_v46_0/GEN_SPLB_RST[3].I_SPLB_RST> <plb_v46_0/GEN_SPLB_RST[2].I_SPLB_RST> <plb_v46_0/GEN_SPLB_RST[1].I_SPLB_RST> <plb_v46_0/GEN_SPLB_RST[0].I_SPLB_RST> <plb_v46_0/I_PLB_RST> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">xps_bram_if_cntlr_1/INCLUDE_BURST_SUPPORT.I_SLAVE_BURST_ATTACH/I_FLOP_ADDRACK</arg>> in Unit <<arg fmt="%s" index="2">xps_bram_if_cntlr_1</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><xps_bram_if_cntlr_1/INCLUDE_BURST_SUPPORT.I_SLAVE_BURST_ATTACH/I_FLOP_SET_SLBUSY> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">xps_bram_if_cntlr_1/INCLUDE_BURST_SUPPORT.I_SLAVE_BURST_ATTACH/I_FLOP_WRACK_2BUS</arg>> in Unit <<arg fmt="%s" index="2">xps_bram_if_cntlr_1</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><xps_bram_if_cntlr_1/INCLUDE_BURST_SUPPORT.I_SLAVE_BURST_ATTACH/I_FLOP_WRACK> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_BUS_ADDRESS_COUNTER/GEN_FOR_SHARED.I_BURST_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">SRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_STEER_ADDRESS_COUNTER/GEN_FOR_SHARED.I_BURST_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/sl_wrdack_i</arg>> in Unit <<arg fmt="%s" index="2">SRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/GEN_WRITE_BUFFER.GEN_WRBUF_WREN1> <SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/GEN_WRITE_BUFFER.GEN_WRBUF_WREN2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_BUS_ADDRESS_COUNTER/GEN_FOR_SHARED.I_SNGL_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">SRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_STEER_ADDRESS_COUNTER/GEN_FOR_SHARED.I_SNGL_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_BUS_ADDRESS_COUNTER/GEN_FOR_SHARED.GEN_S_H_SIZE_REG[1].I_SIZE_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">SRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_STEER_ADDRESS_COUNTER/GEN_FOR_SHARED.GEN_S_H_SIZE_REG[1].I_SIZE_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_BUS_ADDRESS_COUNTER/GEN_FOR_SHARED.GEN_S_H_SIZE_REG[2].I_SIZE_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">SRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_STEER_ADDRESS_COUNTER/GEN_FOR_SHARED.GEN_S_H_SIZE_REG[2].I_SIZE_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_BUS_ADDRESS_COUNTER/GEN_FOR_SHARED.GEN_S_H_SIZE_REG[3].I_SIZE_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">SRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_STEER_ADDRESS_COUNTER/GEN_FOR_SHARED.GEN_S_H_SIZE_REG[3].I_SIZE_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">SRAM/EMC_CTRL_I/IO_REGISTERS_I/mem_wen_reg</arg>> in Unit <<arg fmt="%s" index="2">SRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><SRAM/EMC_CTRL_I/MEM_STEER_I/SYNC_MEM_DQT.REG_DQT_GEN[0].DQT_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_BUS_ADDRESS_COUNTER/GEN_FOR_SHARED.I_CACHLN_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">SRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_STEER_ADDRESS_COUNTER/GEN_FOR_SHARED.I_CACHLN_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_STEER_ADDRESS_COUNTER/I_SNGL_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_BUS_ADDRESS_COUNTER/I_SNGL_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/I_DECODER/I_CS_SIZE_REG1</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/I_DECODER/I_CS_SIZE_REG2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_block_plus/comp_endpoint/pcie_blk/SIO/.pcie_gt_wrapper_i/flop[0].tx_power_down0</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_block_plus/comp_endpoint/pcie_blk/SIO/.pcie_gt_wrapper_i/flop[0].rx_power_down0> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[29].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[29].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[28].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[28].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_STEER_ADDRESS_COUNTER/I_BURST_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_BUS_ADDRESS_COUNTER/I_BURST_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[27].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[27].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[31].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[31].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[26].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[26].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_STEER_ADDRESS_COUNTER/I_CACHLN_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_BUS_ADDRESS_COUNTER/I_CACHLN_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[30].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[30].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[25].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[25].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[19].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[19].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[24].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[24].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[23].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[23].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[18].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[18].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.GEN_FOR_64.DPHASE_REG2</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.GEN_FOR_64.DPHASE_REG1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[22].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[22].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[17].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[17].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[21].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[21].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[16].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[16].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[20].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[20].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[15].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[15].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[14].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[14].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[13].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[13].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[12].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[12].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[11].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[11].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[10].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[10].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[9].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[9].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_block_plus/comp_endpoint/pcie_blk/SIO/.pcie_gt_wrapper_i/flop[0].tx_power_down1</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_block_plus/comp_endpoint/pcie_blk/SIO/.pcie_gt_wrapper_i/flop[0].rx_power_down1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[8].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[8].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[7].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[7].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[6].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[6].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[5].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[5].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_STEER_ADDRESS_COUNTER/GEN_S_H_SIZE_REG[3].I_SIZE_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_BUS_ADDRESS_COUNTER/GEN_S_H_SIZE_REG[3].I_SIZE_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[4].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[4].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_STEER_ADDRESS_COUNTER/GEN_S_H_SIZE_REG[2].I_SIZE_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_BUS_ADDRESS_COUNTER/GEN_S_H_SIZE_REG[2].I_SIZE_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[3].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[3].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_STEER_ADDRESS_COUNTER/GEN_S_H_SIZE_REG[1].I_SIZE_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_BUS_ADDRESS_COUNTER/GEN_S_H_SIZE_REG[1].I_SIZE_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[2].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[2].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[1].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[1].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[0].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[0].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_BURST_SUPPORT/BTERM_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_BURST_SUPPORT/BTERM_CLNUP> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.GEN_WRITE_BUFFER.GEN_WRBUF_WREN2</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.GEN_WRITE_BUFFER.GEN_WRBUF_WREN1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="new" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/plb_size_reg_3</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/plb_size_reg_3_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="new" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/plb_size_reg_2</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/plb_size_reg_2_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">U0/grf.rf/gl0.rd/grss.rsts/ram_empty_fb_i</arg>> in Unit <<arg fmt="%s" index="2">BU3</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><U0/grf.rf/gl0.rd/grss.rsts/ram_empty_i> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">U0/grf.rf/gl0.wr/gwss.wsts/ram_full_fb_i</arg>> in Unit <<arg fmt="%s" index="2">BU3</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><U0/grf.rf/gl0.wr/gwss.wsts/ram_full_i> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">U0/grf.rf/gl0.rd/grss.rsts/ram_empty_fb_i</arg>> in Unit <<arg fmt="%s" index="2">BU3</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><U0/grf.rf/gl0.rd/grss.rsts/ram_empty_i> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">U0/grf.rf/gl0.wr/gwss.wsts/ram_full_fb_i</arg>> in Unit <<arg fmt="%s" index="2">BU3</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><U0/grf.rf/gl0.wr/gwss.wsts/ram_full_i> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">U0/grf.rf/gl0.rd/gr1.rfwft/aempty_fwft_i</arg>> in Unit <<arg fmt="%s" index="2">BU2</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><U0/grf.rf/gl0.rd/gr1.rfwft/aempty_fwft_fb> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">U0/grf.rf/gl0.wr/gwas.wsts/ram_full_i</arg>> in Unit <<arg fmt="%s" index="2">BU2</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><U0/grf.rf/gl0.wr/gwas.wsts/ram_full_fb_i> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">U0/grf.rf/rstblk/wr_rst_reg_1</arg>> in Unit <<arg fmt="%s" index="2">BU2</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><U0/grf.rf/rstblk/wr_rst_reg_0> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">U0/grf.rf/gl0.rd/gr1.rfwft/empty_fwft_i</arg>> in Unit <<arg fmt="%s" index="2">BU2</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><U0/grf.rf/gl0.rd/gr1.rfwft/empty_fwft_fb> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">U0/grf.rf/rstblk/rd_rst_reg_2</arg>> in Unit <<arg fmt="%s" index="2">BU2</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><U0/grf.rf/rstblk/rd_rst_reg_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">ppc440_0_SPLB0/GEN_MPLB_RST[0].I_MPLB_RST</arg>> in Unit <<arg fmt="%s" index="2">ppc440_0_SPLB0</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><ppc440_0_SPLB0/GEN_SPLB_RST[0].I_SPLB_RST> <ppc440_0_SPLB0/I_PLB_RST> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">Ethernet_MAC/XEMAC_I/EMAC_I/TX/inst_tx_state_machine/state21a</arg>> in Unit <<arg fmt="%s" index="2">Ethernet_MAC</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><Ethernet_MAC/XEMAC_I/EMAC_I/TX/inst_tx_state_machine/state19a> <Ethernet_MAC/XEMAC_I/EMAC_I/RX/inst_rx_state/state21a> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/clk_reset/rst0_sync_r_2</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/clk_reset/rst0_sync_r_2_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/clk_reset/rst90_sync_r_2</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">6 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/clk_reset/rst90_sync_r_2_1> <DDR2_SDRAM/u_ddr2_top/clk_reset/rst90_sync_r_2_2> <DDR2_SDRAM/u_ddr2_top/clk_reset/rst90_sync_r_2_3> <DDR2_SDRAM/u_ddr2_top/clk_reset/rst90_sync_r_2_4> <DDR2_SDRAM/u_ddr2_top/clk_reset/rst90_sync_r_2_5> <DDR2_SDRAM/u_ddr2_top/clk_reset/rst90_sync_r_2_6> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/cal2_rd_data_sel_r_0</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/gen_rd_data_sel[0].u_ff_rd_data_sel> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/cal2_rd_data_sel_r_1</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/gen_rd_data_sel[1].u_ff_rd_data_sel> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/cal2_rd_data_sel_r_2</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/gen_rd_data_sel[2].u_ff_rd_data_sel> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/cal2_rd_data_sel_r_3</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/gen_rd_data_sel[3].u_ff_rd_data_sel> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_usr_top/usr_rd/gen_rden_sel_mux[0].u_ff_rden_sel_mux</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_usr_top/usr_rd/rden_sel_r_0> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/cal2_rd_data_sel_r_4</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/gen_rd_data_sel[4].u_ff_rd_data_sel> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_26</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_26_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_26_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_31</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_31_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_31_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/cal2_rd_data_sel_r_5</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/gen_rd_data_sel[5].u_ff_rd_data_sel> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/cal2_rd_data_sel_r_6</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/gen_rd_data_sel[6].u_ff_rd_data_sel> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/cal2_rd_data_sel_r_7</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/gen_rd_data_sel[7].u_ff_rd_data_sel> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_6</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_6_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_11</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_11_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_18</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_18_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_18_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_23</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_23_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_23_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_5</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_5_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_10</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_10_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_35</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_35_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_35_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_40</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_40_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_40_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_39</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_39_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_39_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_44</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_44_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_44_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_25</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_25_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_25_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_30</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_30_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_30_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_1</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_1_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_hit_r_1</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_hit_r_1_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_13</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_13_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_17</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_17_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_17_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_22</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_22_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_22_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">40 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_1> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_2> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_3> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_4> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_5> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_6> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_7> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_8> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_9> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_10> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_11> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_12> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_13> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_14> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_15> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_16> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_17> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_18> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_19> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_20> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_21> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_22> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_23> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_24> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_25> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_26> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_27> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_28> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_29> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_30> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_31> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_32> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_33> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_34> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_35> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_36> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_37> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_38> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_39> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_40> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_0</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_0_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_12</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_12_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_29</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_29_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_29_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_34</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_34_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_34_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_38</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_38_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_38_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_43</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_43_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_43_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_59</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_59_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_16</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_16_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_16_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_21</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_21_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_21_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_2</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_2_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_7</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_7_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_28</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_28_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_28_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_33</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_33_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_33_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_14</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_14_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[0].u_iob_dqs/dqs_rst_n_r</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">7 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[1].u_iob_dqs/dqs_rst_n_r> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[2].u_iob_dqs/dqs_rst_n_r> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[3].u_iob_dqs/dqs_rst_n_r> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[4].u_iob_dqs/dqs_rst_n_r> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[5].u_iob_dqs/dqs_rst_n_r> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[6].u_iob_dqs/dqs_rst_n_r> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[7].u_iob_dqs/dqs_rst_n_r> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_37</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_37_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_37_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_42</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_42_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_42_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_58</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_58_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_hit_r_2</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_hit_r_2_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_15</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_15_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_15_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_20</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_20_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_20_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_27</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_27_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_27_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_32</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_32_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_32_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_4</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_4_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_9</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_9_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_19</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_19_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_19_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_24</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_24_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_24_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dm[0].u_iob_dm/u_dm_ce</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">7 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dm[1].u_iob_dm/u_dm_ce> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dm[2].u_iob_dm/u_dm_ce> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dm[3].u_iob_dm/u_dm_ce> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dm[4].u_iob_dm/u_dm_ce> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dm[5].u_iob_dm/u_dm_ce> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dm[6].u_iob_dm/u_dm_ce> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dm[7].u_iob_dm/u_dm_ce> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_3</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_3_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_8</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_8_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_36</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_36_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_36_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_41</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_41_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_41_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">plb_v46_0/GEN_MPLB_RST[0].I_MPLB_RST</arg>> in Unit <<arg fmt="%s" index="2">plb_v46_0</arg>> is equivalent to the following <arg fmt="%s" index="3">13 FFs/Latches</arg> : <arg fmt="%s" index="4"><plb_v46_0/GEN_SPLB_RST[11].I_SPLB_RST> <plb_v46_0/GEN_SPLB_RST[10].I_SPLB_RST> <plb_v46_0/GEN_SPLB_RST[9].I_SPLB_RST> <plb_v46_0/GEN_SPLB_RST[8].I_SPLB_RST> <plb_v46_0/GEN_SPLB_RST[7].I_SPLB_RST> <plb_v46_0/GEN_SPLB_RST[6].I_SPLB_RST> <plb_v46_0/GEN_SPLB_RST[5].I_SPLB_RST> <plb_v46_0/GEN_SPLB_RST[4].I_SPLB_RST> <plb_v46_0/GEN_SPLB_RST[3].I_SPLB_RST> <plb_v46_0/GEN_SPLB_RST[2].I_SPLB_RST> <plb_v46_0/GEN_SPLB_RST[1].I_SPLB_RST> <plb_v46_0/GEN_SPLB_RST[0].I_SPLB_RST> <plb_v46_0/I_PLB_RST> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">xps_bram_if_cntlr_1/INCLUDE_BURST_SUPPORT.I_SLAVE_BURST_ATTACH/I_FLOP_ADDRACK</arg>> in Unit <<arg fmt="%s" index="2">xps_bram_if_cntlr_1</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><xps_bram_if_cntlr_1/INCLUDE_BURST_SUPPORT.I_SLAVE_BURST_ATTACH/I_FLOP_SET_SLBUSY> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">xps_bram_if_cntlr_1/INCLUDE_BURST_SUPPORT.I_SLAVE_BURST_ATTACH/I_FLOP_WRACK_2BUS</arg>> in Unit <<arg fmt="%s" index="2">xps_bram_if_cntlr_1</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><xps_bram_if_cntlr_1/INCLUDE_BURST_SUPPORT.I_SLAVE_BURST_ATTACH/I_FLOP_WRACK> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_BUS_ADDRESS_COUNTER/GEN_FOR_SHARED.I_BURST_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">SRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_STEER_ADDRESS_COUNTER/GEN_FOR_SHARED.I_BURST_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/sl_wrdack_i</arg>> in Unit <<arg fmt="%s" index="2">SRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/GEN_WRITE_BUFFER.GEN_WRBUF_WREN1> <SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/GEN_WRITE_BUFFER.GEN_WRBUF_WREN2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_BUS_ADDRESS_COUNTER/GEN_FOR_SHARED.I_SNGL_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">SRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_STEER_ADDRESS_COUNTER/GEN_FOR_SHARED.I_SNGL_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_BUS_ADDRESS_COUNTER/GEN_FOR_SHARED.GEN_S_H_SIZE_REG[1].I_SIZE_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">SRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_STEER_ADDRESS_COUNTER/GEN_FOR_SHARED.GEN_S_H_SIZE_REG[1].I_SIZE_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_BUS_ADDRESS_COUNTER/GEN_FOR_SHARED.GEN_S_H_SIZE_REG[2].I_SIZE_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">SRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_STEER_ADDRESS_COUNTER/GEN_FOR_SHARED.GEN_S_H_SIZE_REG[2].I_SIZE_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_BUS_ADDRESS_COUNTER/GEN_FOR_SHARED.GEN_S_H_SIZE_REG[3].I_SIZE_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">SRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_STEER_ADDRESS_COUNTER/GEN_FOR_SHARED.GEN_S_H_SIZE_REG[3].I_SIZE_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">SRAM/EMC_CTRL_I/IO_REGISTERS_I/mem_wen_reg</arg>> in Unit <<arg fmt="%s" index="2">SRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><SRAM/EMC_CTRL_I/MEM_STEER_I/SYNC_MEM_DQT.REG_DQT_GEN[0].DQT_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_BUS_ADDRESS_COUNTER/GEN_FOR_SHARED.I_CACHLN_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">SRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><SRAM/MCH_PLB_IPIF_I/NO_CHNL_IF_GEN.PLBV46_SLAVE_BURST_I/I_SLAVE_ATTACHMENT/I_STEER_ADDRESS_COUNTER/GEN_FOR_SHARED.I_CACHLN_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_STEER_ADDRESS_COUNTER/I_SNGL_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_BUS_ADDRESS_COUNTER/I_SNGL_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/I_DECODER/I_CS_SIZE_REG1</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/I_DECODER/I_CS_SIZE_REG2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_block_plus/comp_endpoint/pcie_blk/SIO/.pcie_gt_wrapper_i/flop[0].tx_power_down0</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_block_plus/comp_endpoint/pcie_blk/SIO/.pcie_gt_wrapper_i/flop[0].rx_power_down0> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[29].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[29].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[28].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[28].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_STEER_ADDRESS_COUNTER/I_BURST_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_BUS_ADDRESS_COUNTER/I_BURST_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[27].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[27].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[31].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[31].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[26].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[26].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_STEER_ADDRESS_COUNTER/I_CACHLN_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_BUS_ADDRESS_COUNTER/I_CACHLN_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[30].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[30].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[25].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[25].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[19].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[19].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[24].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[24].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[23].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[23].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[18].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[18].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.GEN_FOR_64.DPHASE_REG2</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.GEN_FOR_64.DPHASE_REG1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[22].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[22].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[17].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[17].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[21].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[21].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[16].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[16].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[20].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[20].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[15].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[15].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[14].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[14].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[13].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[13].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[12].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[12].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[11].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[11].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[10].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[10].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[9].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[9].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_block_plus/comp_endpoint/pcie_blk/SIO/.pcie_gt_wrapper_i/flop[0].tx_power_down1</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_block_plus/comp_endpoint/pcie_blk/SIO/.pcie_gt_wrapper_i/flop[0].rx_power_down1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[8].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[8].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[7].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[7].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[6].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[6].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[5].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[5].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_STEER_ADDRESS_COUNTER/GEN_S_H_SIZE_REG[3].I_SIZE_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_BUS_ADDRESS_COUNTER/GEN_S_H_SIZE_REG[3].I_SIZE_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[4].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[4].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_STEER_ADDRESS_COUNTER/GEN_S_H_SIZE_REG[2].I_SIZE_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_BUS_ADDRESS_COUNTER/GEN_S_H_SIZE_REG[2].I_SIZE_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[3].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[3].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_STEER_ADDRESS_COUNTER/GEN_S_H_SIZE_REG[1].I_SIZE_S_H_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_BUS_ADDRESS_COUNTER/GEN_S_H_SIZE_REG[1].I_SIZE_S_H_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[2].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[2].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[1].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[1].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR2_INPUT[0].I_ADDR_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_EQL_TO_32_ADDR.REG_ADDR1_INPUT[0].I_ADDR_REG> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_BURST_SUPPORT/BTERM_REG</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.I_BURST_SUPPORT/BTERM_CLNUP> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.GEN_WRITE_BUFFER.GEN_WRBUF_WREN2</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/GEN_FAST_MODE_BURSTXFER.GEN_WRITE_BUFFER.GEN_WRBUF_WREN1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="new" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/plb_size_reg_3</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/plb_size_reg_3_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="new" >The FF/Latch <<arg fmt="%s" index="1">PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/plb_size_reg_2</arg>> in Unit <<arg fmt="%s" index="2">PCIe_Bridge</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><PCIe_Bridge/comp_plbv46_slave/I_SLAVE_ATTACHMENT/plb_size_reg_2_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">U0/grf.rf/gl0.rd/grss.rsts/ram_empty_fb_i</arg>> in Unit <<arg fmt="%s" index="2">BU3</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><U0/grf.rf/gl0.rd/grss.rsts/ram_empty_i> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">U0/grf.rf/gl0.wr/gwss.wsts/ram_full_fb_i</arg>> in Unit <<arg fmt="%s" index="2">BU3</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><U0/grf.rf/gl0.wr/gwss.wsts/ram_full_i> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">U0/grf.rf/gl0.rd/grss.rsts/ram_empty_fb_i</arg>> in Unit <<arg fmt="%s" index="2">BU3</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><U0/grf.rf/gl0.rd/grss.rsts/ram_empty_i> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">U0/grf.rf/gl0.wr/gwss.wsts/ram_full_fb_i</arg>> in Unit <<arg fmt="%s" index="2">BU3</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><U0/grf.rf/gl0.wr/gwss.wsts/ram_full_i> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">U0/grf.rf/gl0.rd/gr1.rfwft/aempty_fwft_i</arg>> in Unit <<arg fmt="%s" index="2">BU2</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><U0/grf.rf/gl0.rd/gr1.rfwft/aempty_fwft_fb> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">U0/grf.rf/gl0.wr/gwas.wsts/ram_full_i</arg>> in Unit <<arg fmt="%s" index="2">BU2</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><U0/grf.rf/gl0.wr/gwas.wsts/ram_full_fb_i> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">U0/grf.rf/rstblk/wr_rst_reg_1</arg>> in Unit <<arg fmt="%s" index="2">BU2</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><U0/grf.rf/rstblk/wr_rst_reg_0> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">U0/grf.rf/gl0.rd/gr1.rfwft/empty_fwft_i</arg>> in Unit <<arg fmt="%s" index="2">BU2</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><U0/grf.rf/gl0.rd/gr1.rfwft/empty_fwft_fb> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">U0/grf.rf/rstblk/rd_rst_reg_2</arg>> in Unit <<arg fmt="%s" index="2">BU2</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><U0/grf.rf/rstblk/rd_rst_reg_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">ppc440_0_SPLB0/GEN_MPLB_RST[0].I_MPLB_RST</arg>> in Unit <<arg fmt="%s" index="2">ppc440_0_SPLB0</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><ppc440_0_SPLB0/GEN_SPLB_RST[0].I_SPLB_RST> <ppc440_0_SPLB0/I_PLB_RST> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">Ethernet_MAC/XEMAC_I/EMAC_I/TX/inst_tx_state_machine/state21a</arg>> in Unit <<arg fmt="%s" index="2">Ethernet_MAC</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><Ethernet_MAC/XEMAC_I/EMAC_I/TX/inst_tx_state_machine/state19a> <Ethernet_MAC/XEMAC_I/EMAC_I/RX/inst_rx_state/state21a> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/clk_reset/rst0_sync_r_2</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/clk_reset/rst0_sync_r_2_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/clk_reset/rst90_sync_r_2</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">6 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/clk_reset/rst90_sync_r_2_1> <DDR2_SDRAM/u_ddr2_top/clk_reset/rst90_sync_r_2_2> <DDR2_SDRAM/u_ddr2_top/clk_reset/rst90_sync_r_2_3> <DDR2_SDRAM/u_ddr2_top/clk_reset/rst90_sync_r_2_4> <DDR2_SDRAM/u_ddr2_top/clk_reset/rst90_sync_r_2_5> <DDR2_SDRAM/u_ddr2_top/clk_reset/rst90_sync_r_2_6> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/cal2_rd_data_sel_r_0</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/gen_rd_data_sel[0].u_ff_rd_data_sel> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/cal2_rd_data_sel_r_1</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/gen_rd_data_sel[1].u_ff_rd_data_sel> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/cal2_rd_data_sel_r_2</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/gen_rd_data_sel[2].u_ff_rd_data_sel> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/cal2_rd_data_sel_r_3</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/gen_rd_data_sel[3].u_ff_rd_data_sel> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_usr_top/usr_rd/gen_rden_sel_mux[0].u_ff_rden_sel_mux</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_usr_top/usr_rd/rden_sel_r_0> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/cal2_rd_data_sel_r_4</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/gen_rd_data_sel[4].u_ff_rd_data_sel> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_26</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_26_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_26_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_31</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_31_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_31_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/cal2_rd_data_sel_r_5</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/gen_rd_data_sel[5].u_ff_rd_data_sel> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/cal2_rd_data_sel_r_6</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/gen_rd_data_sel[6].u_ff_rd_data_sel> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/cal2_rd_data_sel_r_7</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/u_phy_calib/gen_rd_data_sel[7].u_ff_rd_data_sel> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_11</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_11_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_6</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_6_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_23</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_23_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_23_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_18</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_18_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_18_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_10</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_10_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_5</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_5_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_40</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_40_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_40_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_35</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_35_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_35_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_44</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_44_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_44_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_39</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_39_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_39_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_30</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_30_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_30_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_25</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_25_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_25_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_1</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_1_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_hit_r_1</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_hit_r_1_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_13</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_13_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_22</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_22_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_22_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_17</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_17_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_17_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">40 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_1> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_2> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_3> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_4> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_5> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_6> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_7> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_8> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_9> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_10> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_11> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_12> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_13> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_14> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_15> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_16> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_17> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_18> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_19> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_20> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_21> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_22> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_23> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_24> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_25> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_26> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_27> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_28> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_29> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_30> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_31> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_32> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_33> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_34> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_35> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_36> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_37> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_38> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_39> <DDR2_SDRAM/u_ddr2_top/clk_reset/rstdiv0_sync_r_0_40> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_0</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_0_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_12</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_12_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_34</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_34_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_34_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_29</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_29_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_29_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_43</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_43_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_43_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_38</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_38_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_38_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_59</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_59_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_21</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_21_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_21_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_16</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_16_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_16_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_7</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_7_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_2</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_2_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_33</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_33_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_33_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_28</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_28_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_28_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_14</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_14_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[0].u_iob_dqs/dqs_rst_n_r</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">7 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[1].u_iob_dqs/dqs_rst_n_r> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[2].u_iob_dqs/dqs_rst_n_r> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[3].u_iob_dqs/dqs_rst_n_r> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[4].u_iob_dqs/dqs_rst_n_r> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[5].u_iob_dqs/dqs_rst_n_r> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[6].u_iob_dqs/dqs_rst_n_r> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dqs[7].u_iob_dqs/dqs_rst_n_r> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_42</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_42_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_42_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_37</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_37_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_37_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_58</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_58_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_hit_r_2</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_hit_r_2_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_15</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_15_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_15_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_20</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_20_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_20_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_32</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_32_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_32_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_27</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_27_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_27_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_9</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_9_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_4</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_4_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_24</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_24_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_24_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_19</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_19_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_19_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dm[0].u_iob_dm/u_dm_ce</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">7 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dm[1].u_iob_dm/u_dm_ce> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dm[2].u_iob_dm/u_dm_ce> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dm[3].u_iob_dm/u_dm_ce> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dm[4].u_iob_dm/u_dm_ce> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dm[5].u_iob_dm/u_dm_ce> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dm[6].u_iob_dm/u_dm_ce> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_phy_top/u_phy_io/gen_dm[7].u_iob_dm/u_dm_ce> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_8</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_8_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_3</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_3_1> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_41</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_41_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_41_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2260" delta="old" >The FF/Latch <<arg fmt="%s" index="1">DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_36</arg>> in Unit <<arg fmt="%s" index="2">DDR2_SDRAM</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg> : <arg fmt="%s" index="4"><DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_36_1> <DDR2_SDRAM/u_ddr2_top/u_mem_if_top/u_u_ctrl/bank_cmp_addr_r_36_2> </arg> |
| </msg> |
| |
| <msg type="info" file="Xst" num="2169" delta="old" >HDL ADVISOR - Some clock signals were not automatically buffered by XST with BUFG/BUFR resources. Please use the buffer_type constraint in order to insert these buffers to the clock signals to help prevent skew problems. |
| </msg> |
| |
| </messages> |
| |
