| /***********************************************************************/ | |
| /* */ | |
| /* FILE :hwinit.c */ | |
| /* DATE :Wed, Aug 25, 2010 */ | |
| /* DESCRIPTION :Hardware Setup file */ | |
| /* CPU TYPE :Other */ | |
| /* */ | |
| /* This file is generated by KPIT GNU Project Generator. */ | |
| /* */ | |
| /***********************************************************************/ | |
| #include "iodefine.h" | |
| #ifdef __cplusplus | |
| extern "C" { | |
| #endif | |
| extern void hw_initialise(void); | |
| #ifdef __cplusplus | |
| } | |
| #endif | |
| void hw_initialise(void) | |
| { | |
| /* | |
| SCI.SMR.BYTE = 0; | |
| SCI.SMR.BIT.CA = 1; | |
| SCI.SMR.BIT.CHR = 1; | |
| SCI.SMR.BIT.OE = 1; | |
| SCI.SMR.BIT.STOP = 1; | |
| SCI.SMR.BIT.MP = 1; | |
| SCI.SMR.BIT.CKS = 3; | |
| SCI.BRR = 0; | |
| SCI.SCR.BYTE = 0; | |
| SCI.SCR.BIT.TIE = 1; | |
| SCI.SCR.BIT.RIE = 1; | |
| SCI.SCR.BIT.TE = 1; | |
| SCI.SCR.BIT.RE = 1; | |
| SCI.SCR.BIT.MPIE = 1; | |
| SCI.SCR.BIT.TEIE = 1; | |
| SCI.SCR.BIT.CKE = 3; | |
| SCI.TDR = 0; | |
| SCI.SSR.BYTE = 0; | |
| SCI.SSR.BIT.TDRE = 1; | |
| SCI.SSR.BIT.RDRF = 1; | |
| SCI.SSR.BIT.ORER = 1; | |
| SCI.SSR.BIT.FER = 1; | |
| SCI.SSR.BIT.PER = 1; | |
| SCI.SSR.BIT.TEND = 1; | |
| SCI.SSR.BIT.MPB = 1; | |
| SCI.SSR.BIT.MPBT = 1; | |
| SCI.RDR = 0; | |
| */ | |
| } |