| /* |
| * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. |
| * |
| * Licensed under the Apache License, Version 2.0 (the "License"); |
| * you may not use this file except in compliance with the License. |
| * You may obtain a copy of the License at |
| * |
| * http://www.apache.org/licenses/LICENSE-2.0 |
| * |
| * Unless required by applicable law or agreed to in writing, software |
| * distributed under the License is distributed on an "AS IS" BASIS, |
| * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| * See the License for the specific language governing permissions and |
| * limitations under the License. |
| */ |
| |
| /****************************************************************************** |
| * @file isr.c |
| * @brief source file for the interrupt server route |
| * @version V1.0 |
| * @date 02. June 2017 |
| ******************************************************************************/ |
| #include <drv_common.h> |
| #include <config.h> |
| #include "soc.h" |
| #ifndef CONFIG_KERNEL_NONE |
| #include <csi_kernel.h> |
| #endif |
| |
| #ifndef CONFIG_USI |
| extern void dw_spi_irqhandler(int32_t idx); |
| extern void dw_usart_irqhandler(int32_t idx); |
| extern void dw_iic_irqhandler(int32_t idx); |
| #else |
| extern void ck_usi_irqhandler(int idx); |
| #endif |
| extern void ck_spu_irqhandler(int32_t idx); |
| extern void dw_timer_irqhandler(int32_t idx); |
| extern void dw_gpio_irqhandler(int32_t idx); |
| extern void ck_rtc_irqhandler(int32_t idx); |
| extern void dw_wdt_irqhandler(int32_t idx); |
| extern void ck_dma_irqhandler(int32_t idx); |
| extern void ck_aes_irqhandler(int32_t idx); |
| extern void ck_sha_irqhandler(int32_t idx); |
| #ifdef CONFIG_KERNEL_FREERTOS |
| extern void CoretimeIsr(void); |
| extern void CKPendSVIsr(void); |
| #endif |
| extern void systick_handler(void); |
| extern void xPortSysTickHandler(void); |
| extern void OSTimeTick(void); |
| |
| #define readl(addr) \ |
| ({ unsigned int __v = (*(volatile unsigned int *) (addr)); __v; }) |
| |
| #ifndef CONFIG_KERNEL_NONE |
| #define CSI_INTRPT_ENTER() csi_kernel_intrpt_enter() |
| #define CSI_INTRPT_EXIT() csi_kernel_intrpt_exit() |
| #else |
| #define CSI_INTRPT_ENTER() |
| #define CSI_INTRPT_EXIT() |
| #endif |
| |
| ATTRIBUTE_ISR void CORET_IRQHandler(void) |
| { |
| #ifndef CONFIG_KERNEL_FREERTOS |
| CSI_INTRPT_ENTER(); |
| #endif |
| |
| readl(0xE000E010); |
| |
| #if defined(CONFIG_KERNEL_RHINO) |
| systick_handler(); |
| #elif defined(CONFIG_KERNEL_FREERTOS) |
| xPortSysTickHandler(); |
| #elif defined(CONFIG_KERNEL_UCOS) |
| OSTimeTick(); |
| #endif |
| |
| #ifndef CONFIG_KERNEL_FREERTOS |
| CSI_INTRPT_EXIT(); |
| #endif |
| } |
| |
| #ifdef CONFIG_SPU |
| ATTRIBUTE_ISR void SPU_IRQHandler(void) |
| { |
| ck_spu_irqhandler(0); |
| } |
| #endif |
| |
| #ifndef CONFIG_USI |
| ATTRIBUTE_ISR void SPI0_IRQHandler(void) |
| { |
| CSI_INTRPT_ENTER(); |
| dw_spi_irqhandler(0); |
| CSI_INTRPT_EXIT(); |
| } |
| |
| ATTRIBUTE_ISR void SPI1_IRQHandler(void) |
| { |
| CSI_INTRPT_ENTER(); |
| dw_spi_irqhandler(1); |
| CSI_INTRPT_EXIT(); |
| } |
| |
| ATTRIBUTE_ISR void I2C0_IRQHandler(void) |
| { |
| CSI_INTRPT_ENTER(); |
| dw_iic_irqhandler(0); |
| CSI_INTRPT_EXIT(); |
| } |
| |
| ATTRIBUTE_ISR void I2C1_IRQHandler(void) |
| { |
| CSI_INTRPT_ENTER(); |
| dw_iic_irqhandler(1); |
| CSI_INTRPT_EXIT(); |
| } |
| |
| ATTRIBUTE_ISR void USART0_IRQHandler(void) |
| { |
| CSI_INTRPT_ENTER(); |
| dw_usart_irqhandler(0); |
| CSI_INTRPT_EXIT(); |
| } |
| |
| ATTRIBUTE_ISR void USART1_IRQHandler(void) |
| { |
| CSI_INTRPT_ENTER(); |
| dw_usart_irqhandler(1); |
| CSI_INTRPT_EXIT(); |
| } |
| |
| ATTRIBUTE_ISR void USART2_IRQHandler(void) |
| { |
| CSI_INTRPT_ENTER(); |
| dw_usart_irqhandler(2); |
| CSI_INTRPT_EXIT(); |
| } |
| |
| ATTRIBUTE_ISR void USART3_IRQHandler(void) |
| { |
| CSI_INTRPT_ENTER(); |
| dw_usart_irqhandler(3); |
| CSI_INTRPT_EXIT(); |
| } |
| #else |
| ATTRIBUTE_ISR void USI0_IRQHandler(void) |
| { |
| CSI_INTRPT_ENTER(); |
| ck_usi_irqhandler(0); |
| CSI_INTRPT_EXIT(); |
| } |
| |
| ATTRIBUTE_ISR void USI1_IRQHandler(void) |
| { |
| CSI_INTRPT_ENTER(); |
| ck_usi_irqhandler(1); |
| CSI_INTRPT_EXIT(); |
| } |
| #endif |
| ATTRIBUTE_ISR void TIMA0_IRQHandler(void) |
| { |
| CSI_INTRPT_ENTER(); |
| dw_timer_irqhandler(0); |
| CSI_INTRPT_EXIT(); |
| } |
| |
| ATTRIBUTE_ISR void TIMA1_IRQHandler(void) |
| { |
| CSI_INTRPT_ENTER(); |
| dw_timer_irqhandler(1); |
| CSI_INTRPT_EXIT(); |
| } |
| ATTRIBUTE_ISR void TIMB0_IRQHandler(void) |
| { |
| CSI_INTRPT_ENTER(); |
| dw_timer_irqhandler(2); |
| CSI_INTRPT_EXIT(); |
| } |
| |
| ATTRIBUTE_ISR void TIMB1_IRQHandler(void) |
| { |
| CSI_INTRPT_ENTER(); |
| dw_timer_irqhandler(3); |
| CSI_INTRPT_EXIT(); |
| } |
| |
| ATTRIBUTE_ISR void TIM34567_IRQHandler(void) |
| { |
| CSI_INTRPT_ENTER(); |
| dw_timer_irqhandler(4); |
| CSI_INTRPT_EXIT(); |
| } |
| |
| ATTRIBUTE_ISR void GPIOA_IRQHandler(void) |
| { |
| CSI_INTRPT_ENTER(); |
| dw_gpio_irqhandler(0); |
| CSI_INTRPT_EXIT(); |
| } |
| |
| ATTRIBUTE_ISR void GPIOB_IRQHandler(void) |
| { |
| CSI_INTRPT_ENTER(); |
| dw_gpio_irqhandler(1); |
| CSI_INTRPT_EXIT(); |
| } |
| |
| ATTRIBUTE_ISR void RTC_IRQHandler(void) |
| { |
| CSI_INTRPT_ENTER(); |
| ck_rtc_irqhandler(0); |
| CSI_INTRPT_EXIT(); |
| } |
| |
| ATTRIBUTE_ISR void AES_IRQHandler(void) |
| { |
| CSI_INTRPT_ENTER(); |
| ck_aes_irqhandler(0); |
| CSI_INTRPT_EXIT(); |
| } |
| |
| ATTRIBUTE_ISR void SHA_IRQHandler(void) |
| { |
| CSI_INTRPT_ENTER(); |
| ck_sha_irqhandler(0); |
| CSI_INTRPT_EXIT(); |
| } |
| |
| ATTRIBUTE_ISR void WDT_IRQHandler(void) |
| { |
| CSI_INTRPT_ENTER(); |
| dw_wdt_irqhandler(0); |
| CSI_INTRPT_EXIT(); |
| } |
| |
| ATTRIBUTE_ISR void DMAC_IRQHandler(void) |
| { |
| CSI_INTRPT_ENTER(); |
| ck_dma_irqhandler(0); |
| CSI_INTRPT_EXIT(); |
| } |