Cortex-M23: Do not use PSPLIM_NS (#791) According to Armv8-M technical reference manual, if the main extension is not implemented then PSPLIM_NS is RES0. Update the cortex-M23 port to not use the reserved PSPLIM_NS.
diff --git a/portable/GCC/ARM_CM23/non_secure/port.c b/portable/GCC/ARM_CM23/non_secure/port.c index 0ba29f9..0c5b764 100644 --- a/portable/GCC/ARM_CM23/non_secure/port.c +++ b/portable/GCC/ARM_CM23/non_secure/port.c
@@ -67,6 +67,16 @@ #if ( ( configRUN_FREERTOS_SECURE_ONLY == 1 ) && ( configENABLE_TRUSTZONE == 1 ) ) #error TrustZone needs to be disabled in order to run FreeRTOS on the Secure Side. #endif + +/** + * Cortex-M23 does not have non-secure PSPLIM. We should use PSPLIM on Cortex-M23 + * only when FreeRTOS runs on secure side. + */ +#if ( ( portHAS_ARMV8M_MAIN_EXTENSION == 0 ) && ( configRUN_FREERTOS_SECURE_ONLY == 0 ) ) + #define portUSE_PSPLIM_REGISTER 0 +#else + #define portUSE_PSPLIM_REGISTER 1 +#endif /*-----------------------------------------------------------*/ /** @@ -1185,11 +1195,19 @@ /* Store the value of the LR and PSPLIM registers before the SVC was raised. We need to * restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1316,11 +1334,19 @@ /* Store the value of the LR and PSPLIM registers before the SVC was raised. * We need to restore it when we exit from the system call. */ pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry = pulTaskStack[ portOFFSET_TO_LR ]; - __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "mrs %0, psplim" : "=r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* Use the pulSystemCallStack in thread mode. */ __asm volatile ( "msr psp, %0" : : "r" ( pulSystemCallStack ) ); - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.pulSystemCallStackLimit ) ); + } + #endif /* Remember the location where we should copy the stack frame when we exit from * the system call. */ @@ -1415,7 +1441,11 @@ /* Restore the LR and PSPLIM to what they were at the time of * system call entry. */ pulTaskStack[ portOFFSET_TO_LR ] = pxMpuSettings->xSystemCallStackInfo.ulLinkRegisterAtSystemCallEntry; - __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + #if ( portUSE_PSPLIM_REGISTER == 1 ) + { + __asm volatile ( "msr psplim, %0" : : "r" ( pxMpuSettings->xSystemCallStackInfo.ulStackLimitRegisterAtSystemCallEntry ) ); + } + #endif /* If the hardware used padding to force the stack pointer * to be double word aligned, set the stacked xPSR bit[9],
diff --git a/portable/GCC/ARM_CM23/non_secure/portasm.c b/portable/GCC/ARM_CM23/non_secure/portasm.c index d452c33..1b41d58 100644 --- a/portable/GCC/ARM_CM23/non_secure/portasm.c +++ b/portable/GCC/ARM_CM23/non_secure/portasm.c
@@ -109,7 +109,6 @@ " ldmia r2!, {r0, r3-r6} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */ " subs r2, #20 \n" " msr psp, r3 \n" - " msr psplim, r4 \n" " msr control, r5 \n" " mov lr, r6 \n" " ldr r4, xSecureContextConst2 \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ @@ -160,7 +159,6 @@ " ldm r0!, {r1-r3} \n" /* Read from stack - r1 = xSecureContext, r2 = PSPLIM and r3 = EXC_RETURN. */ " ldr r4, xSecureContextConst2 \n" " str r1, [r4] \n" /* Set xSecureContext to this task's value for the same. */ - " msr psplim, r2 \n" /* Set this task's PSPLIM value. */ " movs r1, #2 \n" /* r1 = 2. */ " msr CONTROL, r1 \n" /* Switch to use PSP in the thread mode. */ " adds r0, #32 \n" /* Discard everything up to r0. */ @@ -324,7 +322,7 @@ " \n" " save_special_regs: \n" " mrs r3, psp \n" /* r3 = PSP. */ - " mrs r4, psplim \n" /* r4 = PSPLIM. */ + " movs r4, #0 \n" /* r4 = 0. 0 is stored in the PSPLIM slot. */ " mrs r5, control \n" /* r5 = CONTROL. */ " mov r6, lr \n" /* r6 = LR. */ " stmia r2!, {r0, r3-r6} \n" /* Store xSecureContext, original PSP (after hardware has saved context), PSPLIM, CONTROL and LR. */ @@ -392,7 +390,6 @@ " ldmia r2!, {r0, r3-r6} \n" /* r0 = xSecureContext, r3 = original PSP, r4 = PSPLIM, r5 = CONTROL, r6 = LR. */ " subs r2, #20 \n" " msr psp, r3 \n" - " msr psplim, r4 \n" " msr control, r5 \n" " mov lr, r6 \n" " ldr r4, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ @@ -467,7 +464,7 @@ " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ " subs r2, r2, #12 \n" /* Make space for xSecureContext, PSPLIM and LR on the stack. */ " str r2, [r1] \n" /* Save the new top of stack in TCB. */ - " mrs r1, psplim \n" /* r1 = PSPLIM. */ + " movs r1, #0 \n" /* r1 = 0. 0 is stored in the PSPLIM slot. */ " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ " stmia r2!, {r0, r1, r3} \n" /* Store xSecureContext, PSPLIM and LR on the stack. */ " b select_next_task \n" @@ -477,7 +474,7 @@ " ldr r1, [r3] \n" /* Read pxCurrentTCB. */ " subs r2, r2, #44 \n" /* Make space for xSecureContext, PSPLIM, LR and the remaining registers on the stack. */ " str r2, [r1] \n" /* Save the new top of stack in TCB. */ - " mrs r1, psplim \n" /* r1 = PSPLIM. */ + " movs r1, #0 \n" /* r1 = 0. 0 is stored in the PSPLIM slot. */ " mov r3, lr \n" /* r3 = LR/EXC_RETURN. */ " stmia r2!, {r0, r1, r3-r7} \n" /* Store xSecureContext, PSPLIM, LR and the low registers that are not saved automatically. */ " mov r4, r8 \n" /* r4 = r8. */ @@ -496,7 +493,6 @@ " ldr r2, [r1] \n" /* The first item in pxCurrentTCB is the task top of stack. r2 now points to the top of stack. */ " \n" " ldmia r2!, {r0, r1, r4} \n" /* Read from stack - r0 = xSecureContext, r1 = PSPLIM and r4 = LR. */ - " msr psplim, r1 \n" /* Restore the PSPLIM register value for the task. */ " mov lr, r4 \n" /* LR = r4. */ " ldr r3, xSecureContextConst \n" /* Read the location of xSecureContext i.e. &( xSecureContext ). */ " str r0, [r3] \n" /* Restore the task's xSecureContext. */