Work around SysTick bug for QEMU ARMv8-M (#724)
* Set SysTick CLKSOURCE bit before enabling SysTick
* Use portNVIC_SYSTICK_CLK_BIT_CONFIG
The workaround now uses portNVIC_SYSTICK_CLK_BIT_CONFIG instead of
portNVIC_SYSTICK_CLK_BIT, which saves us from having to explain in the
comments why it's OK to temporarily set the CLKSOURCE bit even if the
user's FreeRTOS configuration clears the CLKSOURCE bit.
Using portNVIC_SYSTICK_CLK_BIT_CONFIG here still correctly prevents the
firmware from triggering the QEMU bug.
diff --git a/portable/ARMv8M/non_secure/port.c b/portable/ARMv8M/non_secure/port.c
index 0490101..e027b21 100644
--- a/portable/ARMv8M/non_secure/port.c
+++ b/portable/ARMv8M/non_secure/port.c
@@ -754,8 +754,15 @@
}
#endif /* configUSE_TICKLESS_IDLE */
- /* Stop and reset the SysTick. */
- portNVIC_SYSTICK_CTRL_REG = 0UL;
+ /* Stop and reset SysTick.
+ *
+ * QEMU versions older than 7.0.0 contain a bug which causes an error if we
+ * enable SysTick without first selecting a valid clock source. We trigger
+ * the bug if we change clock sources from a clock with a zero clock period
+ * to one with a nonzero clock period and enable Systick at the same time.
+ * So we configure the CLKSOURCE bit here, prior to setting the ENABLE bit.
+ * This workaround avoids the bug in QEMU versions older than 7.0.0. */
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
diff --git a/portable/GCC/ARM_CM23/non_secure/port.c b/portable/GCC/ARM_CM23/non_secure/port.c
index 0490101..e027b21 100644
--- a/portable/GCC/ARM_CM23/non_secure/port.c
+++ b/portable/GCC/ARM_CM23/non_secure/port.c
@@ -754,8 +754,15 @@
}
#endif /* configUSE_TICKLESS_IDLE */
- /* Stop and reset the SysTick. */
- portNVIC_SYSTICK_CTRL_REG = 0UL;
+ /* Stop and reset SysTick.
+ *
+ * QEMU versions older than 7.0.0 contain a bug which causes an error if we
+ * enable SysTick without first selecting a valid clock source. We trigger
+ * the bug if we change clock sources from a clock with a zero clock period
+ * to one with a nonzero clock period and enable Systick at the same time.
+ * So we configure the CLKSOURCE bit here, prior to setting the ENABLE bit.
+ * This workaround avoids the bug in QEMU versions older than 7.0.0. */
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
diff --git a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c
index 0490101..e027b21 100644
--- a/portable/GCC/ARM_CM23_NTZ/non_secure/port.c
+++ b/portable/GCC/ARM_CM23_NTZ/non_secure/port.c
@@ -754,8 +754,15 @@
}
#endif /* configUSE_TICKLESS_IDLE */
- /* Stop and reset the SysTick. */
- portNVIC_SYSTICK_CTRL_REG = 0UL;
+ /* Stop and reset SysTick.
+ *
+ * QEMU versions older than 7.0.0 contain a bug which causes an error if we
+ * enable SysTick without first selecting a valid clock source. We trigger
+ * the bug if we change clock sources from a clock with a zero clock period
+ * to one with a nonzero clock period and enable Systick at the same time.
+ * So we configure the CLKSOURCE bit here, prior to setting the ENABLE bit.
+ * This workaround avoids the bug in QEMU versions older than 7.0.0. */
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
diff --git a/portable/GCC/ARM_CM33/non_secure/port.c b/portable/GCC/ARM_CM33/non_secure/port.c
index 0490101..e027b21 100644
--- a/portable/GCC/ARM_CM33/non_secure/port.c
+++ b/portable/GCC/ARM_CM33/non_secure/port.c
@@ -754,8 +754,15 @@
}
#endif /* configUSE_TICKLESS_IDLE */
- /* Stop and reset the SysTick. */
- portNVIC_SYSTICK_CTRL_REG = 0UL;
+ /* Stop and reset SysTick.
+ *
+ * QEMU versions older than 7.0.0 contain a bug which causes an error if we
+ * enable SysTick without first selecting a valid clock source. We trigger
+ * the bug if we change clock sources from a clock with a zero clock period
+ * to one with a nonzero clock period and enable Systick at the same time.
+ * So we configure the CLKSOURCE bit here, prior to setting the ENABLE bit.
+ * This workaround avoids the bug in QEMU versions older than 7.0.0. */
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
diff --git a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c
index 0490101..e027b21 100644
--- a/portable/GCC/ARM_CM33_NTZ/non_secure/port.c
+++ b/portable/GCC/ARM_CM33_NTZ/non_secure/port.c
@@ -754,8 +754,15 @@
}
#endif /* configUSE_TICKLESS_IDLE */
- /* Stop and reset the SysTick. */
- portNVIC_SYSTICK_CTRL_REG = 0UL;
+ /* Stop and reset SysTick.
+ *
+ * QEMU versions older than 7.0.0 contain a bug which causes an error if we
+ * enable SysTick without first selecting a valid clock source. We trigger
+ * the bug if we change clock sources from a clock with a zero clock period
+ * to one with a nonzero clock period and enable Systick at the same time.
+ * So we configure the CLKSOURCE bit here, prior to setting the ENABLE bit.
+ * This workaround avoids the bug in QEMU versions older than 7.0.0. */
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
diff --git a/portable/GCC/ARM_CM35P/non_secure/port.c b/portable/GCC/ARM_CM35P/non_secure/port.c
index 0490101..e027b21 100644
--- a/portable/GCC/ARM_CM35P/non_secure/port.c
+++ b/portable/GCC/ARM_CM35P/non_secure/port.c
@@ -754,8 +754,15 @@
}
#endif /* configUSE_TICKLESS_IDLE */
- /* Stop and reset the SysTick. */
- portNVIC_SYSTICK_CTRL_REG = 0UL;
+ /* Stop and reset SysTick.
+ *
+ * QEMU versions older than 7.0.0 contain a bug which causes an error if we
+ * enable SysTick without first selecting a valid clock source. We trigger
+ * the bug if we change clock sources from a clock with a zero clock period
+ * to one with a nonzero clock period and enable Systick at the same time.
+ * So we configure the CLKSOURCE bit here, prior to setting the ENABLE bit.
+ * This workaround avoids the bug in QEMU versions older than 7.0.0. */
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
diff --git a/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c b/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c
index 0490101..e027b21 100644
--- a/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c
+++ b/portable/GCC/ARM_CM35P_NTZ/non_secure/port.c
@@ -754,8 +754,15 @@
}
#endif /* configUSE_TICKLESS_IDLE */
- /* Stop and reset the SysTick. */
- portNVIC_SYSTICK_CTRL_REG = 0UL;
+ /* Stop and reset SysTick.
+ *
+ * QEMU versions older than 7.0.0 contain a bug which causes an error if we
+ * enable SysTick without first selecting a valid clock source. We trigger
+ * the bug if we change clock sources from a clock with a zero clock period
+ * to one with a nonzero clock period and enable Systick at the same time.
+ * So we configure the CLKSOURCE bit here, prior to setting the ENABLE bit.
+ * This workaround avoids the bug in QEMU versions older than 7.0.0. */
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
diff --git a/portable/GCC/ARM_CM55/non_secure/port.c b/portable/GCC/ARM_CM55/non_secure/port.c
index 0490101..e027b21 100644
--- a/portable/GCC/ARM_CM55/non_secure/port.c
+++ b/portable/GCC/ARM_CM55/non_secure/port.c
@@ -754,8 +754,15 @@
}
#endif /* configUSE_TICKLESS_IDLE */
- /* Stop and reset the SysTick. */
- portNVIC_SYSTICK_CTRL_REG = 0UL;
+ /* Stop and reset SysTick.
+ *
+ * QEMU versions older than 7.0.0 contain a bug which causes an error if we
+ * enable SysTick without first selecting a valid clock source. We trigger
+ * the bug if we change clock sources from a clock with a zero clock period
+ * to one with a nonzero clock period and enable Systick at the same time.
+ * So we configure the CLKSOURCE bit here, prior to setting the ENABLE bit.
+ * This workaround avoids the bug in QEMU versions older than 7.0.0. */
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
diff --git a/portable/GCC/ARM_CM55_NTZ/non_secure/port.c b/portable/GCC/ARM_CM55_NTZ/non_secure/port.c
index 0490101..e027b21 100644
--- a/portable/GCC/ARM_CM55_NTZ/non_secure/port.c
+++ b/portable/GCC/ARM_CM55_NTZ/non_secure/port.c
@@ -754,8 +754,15 @@
}
#endif /* configUSE_TICKLESS_IDLE */
- /* Stop and reset the SysTick. */
- portNVIC_SYSTICK_CTRL_REG = 0UL;
+ /* Stop and reset SysTick.
+ *
+ * QEMU versions older than 7.0.0 contain a bug which causes an error if we
+ * enable SysTick without first selecting a valid clock source. We trigger
+ * the bug if we change clock sources from a clock with a zero clock period
+ * to one with a nonzero clock period and enable Systick at the same time.
+ * So we configure the CLKSOURCE bit here, prior to setting the ENABLE bit.
+ * This workaround avoids the bug in QEMU versions older than 7.0.0. */
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
diff --git a/portable/GCC/ARM_CM85/non_secure/port.c b/portable/GCC/ARM_CM85/non_secure/port.c
index 0490101..e027b21 100644
--- a/portable/GCC/ARM_CM85/non_secure/port.c
+++ b/portable/GCC/ARM_CM85/non_secure/port.c
@@ -754,8 +754,15 @@
}
#endif /* configUSE_TICKLESS_IDLE */
- /* Stop and reset the SysTick. */
- portNVIC_SYSTICK_CTRL_REG = 0UL;
+ /* Stop and reset SysTick.
+ *
+ * QEMU versions older than 7.0.0 contain a bug which causes an error if we
+ * enable SysTick without first selecting a valid clock source. We trigger
+ * the bug if we change clock sources from a clock with a zero clock period
+ * to one with a nonzero clock period and enable Systick at the same time.
+ * So we configure the CLKSOURCE bit here, prior to setting the ENABLE bit.
+ * This workaround avoids the bug in QEMU versions older than 7.0.0. */
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
diff --git a/portable/GCC/ARM_CM85_NTZ/non_secure/port.c b/portable/GCC/ARM_CM85_NTZ/non_secure/port.c
index 0490101..e027b21 100644
--- a/portable/GCC/ARM_CM85_NTZ/non_secure/port.c
+++ b/portable/GCC/ARM_CM85_NTZ/non_secure/port.c
@@ -754,8 +754,15 @@
}
#endif /* configUSE_TICKLESS_IDLE */
- /* Stop and reset the SysTick. */
- portNVIC_SYSTICK_CTRL_REG = 0UL;
+ /* Stop and reset SysTick.
+ *
+ * QEMU versions older than 7.0.0 contain a bug which causes an error if we
+ * enable SysTick without first selecting a valid clock source. We trigger
+ * the bug if we change clock sources from a clock with a zero clock period
+ * to one with a nonzero clock period and enable Systick at the same time.
+ * So we configure the CLKSOURCE bit here, prior to setting the ENABLE bit.
+ * This workaround avoids the bug in QEMU versions older than 7.0.0. */
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
diff --git a/portable/IAR/ARM_CM23/non_secure/port.c b/portable/IAR/ARM_CM23/non_secure/port.c
index 0490101..e027b21 100644
--- a/portable/IAR/ARM_CM23/non_secure/port.c
+++ b/portable/IAR/ARM_CM23/non_secure/port.c
@@ -754,8 +754,15 @@
}
#endif /* configUSE_TICKLESS_IDLE */
- /* Stop and reset the SysTick. */
- portNVIC_SYSTICK_CTRL_REG = 0UL;
+ /* Stop and reset SysTick.
+ *
+ * QEMU versions older than 7.0.0 contain a bug which causes an error if we
+ * enable SysTick without first selecting a valid clock source. We trigger
+ * the bug if we change clock sources from a clock with a zero clock period
+ * to one with a nonzero clock period and enable Systick at the same time.
+ * So we configure the CLKSOURCE bit here, prior to setting the ENABLE bit.
+ * This workaround avoids the bug in QEMU versions older than 7.0.0. */
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
diff --git a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c
index 0490101..e027b21 100644
--- a/portable/IAR/ARM_CM23_NTZ/non_secure/port.c
+++ b/portable/IAR/ARM_CM23_NTZ/non_secure/port.c
@@ -754,8 +754,15 @@
}
#endif /* configUSE_TICKLESS_IDLE */
- /* Stop and reset the SysTick. */
- portNVIC_SYSTICK_CTRL_REG = 0UL;
+ /* Stop and reset SysTick.
+ *
+ * QEMU versions older than 7.0.0 contain a bug which causes an error if we
+ * enable SysTick without first selecting a valid clock source. We trigger
+ * the bug if we change clock sources from a clock with a zero clock period
+ * to one with a nonzero clock period and enable Systick at the same time.
+ * So we configure the CLKSOURCE bit here, prior to setting the ENABLE bit.
+ * This workaround avoids the bug in QEMU versions older than 7.0.0. */
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
diff --git a/portable/IAR/ARM_CM33/non_secure/port.c b/portable/IAR/ARM_CM33/non_secure/port.c
index 0490101..e027b21 100644
--- a/portable/IAR/ARM_CM33/non_secure/port.c
+++ b/portable/IAR/ARM_CM33/non_secure/port.c
@@ -754,8 +754,15 @@
}
#endif /* configUSE_TICKLESS_IDLE */
- /* Stop and reset the SysTick. */
- portNVIC_SYSTICK_CTRL_REG = 0UL;
+ /* Stop and reset SysTick.
+ *
+ * QEMU versions older than 7.0.0 contain a bug which causes an error if we
+ * enable SysTick without first selecting a valid clock source. We trigger
+ * the bug if we change clock sources from a clock with a zero clock period
+ * to one with a nonzero clock period and enable Systick at the same time.
+ * So we configure the CLKSOURCE bit here, prior to setting the ENABLE bit.
+ * This workaround avoids the bug in QEMU versions older than 7.0.0. */
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
diff --git a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c
index 0490101..e027b21 100644
--- a/portable/IAR/ARM_CM33_NTZ/non_secure/port.c
+++ b/portable/IAR/ARM_CM33_NTZ/non_secure/port.c
@@ -754,8 +754,15 @@
}
#endif /* configUSE_TICKLESS_IDLE */
- /* Stop and reset the SysTick. */
- portNVIC_SYSTICK_CTRL_REG = 0UL;
+ /* Stop and reset SysTick.
+ *
+ * QEMU versions older than 7.0.0 contain a bug which causes an error if we
+ * enable SysTick without first selecting a valid clock source. We trigger
+ * the bug if we change clock sources from a clock with a zero clock period
+ * to one with a nonzero clock period and enable Systick at the same time.
+ * So we configure the CLKSOURCE bit here, prior to setting the ENABLE bit.
+ * This workaround avoids the bug in QEMU versions older than 7.0.0. */
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
diff --git a/portable/IAR/ARM_CM35P/non_secure/port.c b/portable/IAR/ARM_CM35P/non_secure/port.c
index 0490101..e027b21 100644
--- a/portable/IAR/ARM_CM35P/non_secure/port.c
+++ b/portable/IAR/ARM_CM35P/non_secure/port.c
@@ -754,8 +754,15 @@
}
#endif /* configUSE_TICKLESS_IDLE */
- /* Stop and reset the SysTick. */
- portNVIC_SYSTICK_CTRL_REG = 0UL;
+ /* Stop and reset SysTick.
+ *
+ * QEMU versions older than 7.0.0 contain a bug which causes an error if we
+ * enable SysTick without first selecting a valid clock source. We trigger
+ * the bug if we change clock sources from a clock with a zero clock period
+ * to one with a nonzero clock period and enable Systick at the same time.
+ * So we configure the CLKSOURCE bit here, prior to setting the ENABLE bit.
+ * This workaround avoids the bug in QEMU versions older than 7.0.0. */
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
diff --git a/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c b/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c
index 0490101..e027b21 100644
--- a/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c
+++ b/portable/IAR/ARM_CM35P_NTZ/non_secure/port.c
@@ -754,8 +754,15 @@
}
#endif /* configUSE_TICKLESS_IDLE */
- /* Stop and reset the SysTick. */
- portNVIC_SYSTICK_CTRL_REG = 0UL;
+ /* Stop and reset SysTick.
+ *
+ * QEMU versions older than 7.0.0 contain a bug which causes an error if we
+ * enable SysTick without first selecting a valid clock source. We trigger
+ * the bug if we change clock sources from a clock with a zero clock period
+ * to one with a nonzero clock period and enable Systick at the same time.
+ * So we configure the CLKSOURCE bit here, prior to setting the ENABLE bit.
+ * This workaround avoids the bug in QEMU versions older than 7.0.0. */
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
diff --git a/portable/IAR/ARM_CM55/non_secure/port.c b/portable/IAR/ARM_CM55/non_secure/port.c
index 0490101..e027b21 100644
--- a/portable/IAR/ARM_CM55/non_secure/port.c
+++ b/portable/IAR/ARM_CM55/non_secure/port.c
@@ -754,8 +754,15 @@
}
#endif /* configUSE_TICKLESS_IDLE */
- /* Stop and reset the SysTick. */
- portNVIC_SYSTICK_CTRL_REG = 0UL;
+ /* Stop and reset SysTick.
+ *
+ * QEMU versions older than 7.0.0 contain a bug which causes an error if we
+ * enable SysTick without first selecting a valid clock source. We trigger
+ * the bug if we change clock sources from a clock with a zero clock period
+ * to one with a nonzero clock period and enable Systick at the same time.
+ * So we configure the CLKSOURCE bit here, prior to setting the ENABLE bit.
+ * This workaround avoids the bug in QEMU versions older than 7.0.0. */
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
diff --git a/portable/IAR/ARM_CM55_NTZ/non_secure/port.c b/portable/IAR/ARM_CM55_NTZ/non_secure/port.c
index 0490101..e027b21 100644
--- a/portable/IAR/ARM_CM55_NTZ/non_secure/port.c
+++ b/portable/IAR/ARM_CM55_NTZ/non_secure/port.c
@@ -754,8 +754,15 @@
}
#endif /* configUSE_TICKLESS_IDLE */
- /* Stop and reset the SysTick. */
- portNVIC_SYSTICK_CTRL_REG = 0UL;
+ /* Stop and reset SysTick.
+ *
+ * QEMU versions older than 7.0.0 contain a bug which causes an error if we
+ * enable SysTick without first selecting a valid clock source. We trigger
+ * the bug if we change clock sources from a clock with a zero clock period
+ * to one with a nonzero clock period and enable Systick at the same time.
+ * So we configure the CLKSOURCE bit here, prior to setting the ENABLE bit.
+ * This workaround avoids the bug in QEMU versions older than 7.0.0. */
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
diff --git a/portable/IAR/ARM_CM85/non_secure/port.c b/portable/IAR/ARM_CM85/non_secure/port.c
index 0490101..e027b21 100644
--- a/portable/IAR/ARM_CM85/non_secure/port.c
+++ b/portable/IAR/ARM_CM85/non_secure/port.c
@@ -754,8 +754,15 @@
}
#endif /* configUSE_TICKLESS_IDLE */
- /* Stop and reset the SysTick. */
- portNVIC_SYSTICK_CTRL_REG = 0UL;
+ /* Stop and reset SysTick.
+ *
+ * QEMU versions older than 7.0.0 contain a bug which causes an error if we
+ * enable SysTick without first selecting a valid clock source. We trigger
+ * the bug if we change clock sources from a clock with a zero clock period
+ * to one with a nonzero clock period and enable Systick at the same time.
+ * So we configure the CLKSOURCE bit here, prior to setting the ENABLE bit.
+ * This workaround avoids the bug in QEMU versions older than 7.0.0. */
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
diff --git a/portable/IAR/ARM_CM85_NTZ/non_secure/port.c b/portable/IAR/ARM_CM85_NTZ/non_secure/port.c
index 0490101..e027b21 100644
--- a/portable/IAR/ARM_CM85_NTZ/non_secure/port.c
+++ b/portable/IAR/ARM_CM85_NTZ/non_secure/port.c
@@ -754,8 +754,15 @@
}
#endif /* configUSE_TICKLESS_IDLE */
- /* Stop and reset the SysTick. */
- portNVIC_SYSTICK_CTRL_REG = 0UL;
+ /* Stop and reset SysTick.
+ *
+ * QEMU versions older than 7.0.0 contain a bug which causes an error if we
+ * enable SysTick without first selecting a valid clock source. We trigger
+ * the bug if we change clock sources from a clock with a zero clock period
+ * to one with a nonzero clock period and enable Systick at the same time.
+ * So we configure the CLKSOURCE bit here, prior to setting the ENABLE bit.
+ * This workaround avoids the bug in QEMU versions older than 7.0.0. */
+ portNVIC_SYSTICK_CTRL_REG = portNVIC_SYSTICK_CLK_BIT_CONFIG;
portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL;
/* Configure SysTick to interrupt at the requested rate. */
