Suppress MISRA C rule 11.3 in MISRA.md (#857)
Suppress MISRA C rule 11.3 in MISRA.md
diff --git a/MISRA.md b/MISRA.md
index e7ebf77..b6a5ee1 100644
--- a/MISRA.md
+++ b/MISRA.md
@@ -31,6 +31,25 @@
a declaration in header file is not useful as the assembly code will
still need to declare it separately.
+
+#### Rule 11.3
+
+_Ref 11.3.1_
+
+- MISRA C:2012 Rule 11.3: A cast shall not be performed between a pointer to
+ object type and a pointer to a different object type.
+ This rule prohibits casting a pointer to object into a pointer to a
+ different object because it may result in an incorrectly aligned pointer,
+ leading to undefined behavior. Even if the casting produces a correctly
+ aligned pointer, the behavior may be still undefined if the pointer is
+ used to access an object. FreeRTOS deliberately creates external aliases
+ for all the kernel object types (StaticEventGroup_t, StaticQueue_t,
+ StaticStreamBuffer_t, StaticTimer_t and StaticTask_t) for data hiding
+ purposes. The internal object types and the corresponding external
+ aliases are guaranteed to have the same size and alignment which is
+ checked using configASSERT.
+
+
### MISRA configuration
Copy below content to `misra.conf` to run Coverity on FreeRTOS-Kernel.
@@ -69,4 +88,4 @@
}
]
}
-```
\ No newline at end of file
+```
diff --git a/event_groups.c b/event_groups.c
index 556637b..e6fc7e6 100644
--- a/event_groups.c
+++ b/event_groups.c
@@ -98,7 +98,10 @@
#endif /* configASSERT_DEFINED */
/* The user has provided a statically allocated event group - use it. */
- pxEventBits = ( EventGroup_t * ) pxEventGroupBuffer; /*lint !e740 !e9087 EventGroup_t and StaticEventGroup_t are deliberately aliased for data hiding purposes and guaranteed to have the same size and alignment requirement - checked by configASSERT(). */
+ /* MISRA Ref 11.3.1 [Misaligned access] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+ /* coverity[misra_c_2012_rule_11_3_violation] */
+ pxEventBits = ( EventGroup_t * ) pxEventGroupBuffer;
if( pxEventBits != NULL )
{
@@ -710,6 +713,9 @@
/* Check if the event group was statically allocated. */
if( pxEventBits->ucStaticallyAllocated == ( uint8_t ) pdTRUE )
{
+ /* MISRA Ref 11.3.1 [Misaligned access] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+ /* coverity[misra_c_2012_rule_11_3_violation] */
*ppxEventGroupBuffer = ( StaticEventGroup_t * ) pxEventBits;
xReturn = pdTRUE;
}
@@ -721,6 +727,9 @@
#else /* configSUPPORT_DYNAMIC_ALLOCATION */
{
/* Event group must have been statically allocated. */
+ /* MISRA Ref 11.3.1 [Misaligned access] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+ /* coverity[misra_c_2012_rule_11_3_violation] */
*ppxEventGroupBuffer = ( StaticEventGroup_t * ) pxEventBits;
xReturn = pdTRUE;
}
diff --git a/queue.c b/queue.c
index 6429307..00eed73 100644
--- a/queue.c
+++ b/queue.c
@@ -408,7 +408,10 @@
/* The address of a statically allocated queue was passed in, use it.
* The address of a statically allocated storage area was also passed in
* but is already set. */
- pxNewQueue = ( Queue_t * ) pxStaticQueue; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
+ /* MISRA Ref 11.3.1 [Misaligned access] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+ /* coverity[misra_c_2012_rule_11_3_violation] */
+ pxNewQueue = ( Queue_t * ) pxStaticQueue;
#if ( configSUPPORT_DYNAMIC_ALLOCATION == 1 )
{
@@ -459,6 +462,9 @@
*ppucQueueStorage = ( uint8_t * ) pxQueue->pcHead;
}
+ /* MISRA Ref 11.3.1 [Misaligned access] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+ /* coverity[misra_c_2012_rule_11_3_violation] */
*ppxStaticQueue = ( StaticQueue_t * ) pxQueue;
xReturn = pdTRUE;
}
diff --git a/stream_buffer.c b/stream_buffer.c
index 10123b9..47e8251 100644
--- a/stream_buffer.c
+++ b/stream_buffer.c
@@ -406,7 +406,10 @@
StreamBufferCallbackFunction_t pxSendCompletedCallback,
StreamBufferCallbackFunction_t pxReceiveCompletedCallback )
{
- StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) pxStaticStreamBuffer; /*lint !e740 !e9087 Safe cast as StaticStreamBuffer_t is opaque Streambuffer_t. */
+ /* MISRA Ref 11.3.1 [Misaligned access] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+ /* coverity[misra_c_2012_rule_11_3_violation] */
+ StreamBuffer_t * const pxStreamBuffer = ( StreamBuffer_t * ) pxStaticStreamBuffer;
StreamBufferHandle_t xReturn;
uint8_t ucFlags;
@@ -466,7 +469,10 @@
traceSTREAM_BUFFER_CREATE( pxStreamBuffer, xIsMessageBuffer );
- xReturn = ( StreamBufferHandle_t ) pxStaticStreamBuffer; /*lint !e9087 Data hiding requires cast to opaque type. */
+ /* MISRA Ref 11.3.1 [Misaligned access] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+ /* coverity[misra_c_2012_rule_11_3_violation] */
+ xReturn = ( StreamBufferHandle_t ) pxStaticStreamBuffer;
}
else
{
@@ -498,6 +504,9 @@
if( ( pxStreamBuffer->ucFlags & sbFLAGS_IS_STATICALLY_ALLOCATED ) != ( uint8_t ) 0 )
{
*ppucStreamBufferStorageArea = pxStreamBuffer->pucBuffer;
+ /* MISRA Ref 11.3.1 [Misaligned access] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+ /* coverity[misra_c_2012_rule_11_3_violation] */
*ppxStaticStreamBuffer = ( StaticStreamBuffer_t * ) pxStreamBuffer;
xReturn = pdTRUE;
}
diff --git a/tasks.c b/tasks.c
index c83912d..4a6c78a 100644
--- a/tasks.c
+++ b/tasks.c
@@ -1271,7 +1271,10 @@
{
/* The memory used for the task's TCB and stack are passed into this
* function - use them. */
- pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */
+ /* MISRA Ref 11.3.1 [Misaligned access] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+ /* coverity[misra_c_2012_rule_11_3_violation] */
+ pxNewTCB = ( TCB_t * ) pxTaskBuffer;
( void ) memset( ( void * ) pxNewTCB, 0x00, sizeof( TCB_t ) );
pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer;
@@ -4354,6 +4357,9 @@
if( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB )
{
*ppuxStackBuffer = pxTCB->pxStack;
+ /* MISRA Ref 11.3.1 [Misaligned access] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+ /* coverity[misra_c_2012_rule_11_3_violation] */
*ppxTaskBuffer = ( StaticTask_t * ) pxTCB;
xReturn = pdTRUE;
}
diff --git a/timers.c b/timers.c
index 878e7db..b5a8d38 100644
--- a/timers.c
+++ b/timers.c
@@ -394,7 +394,10 @@
/* A pointer to a StaticTimer_t structure MUST be provided, use it. */
configASSERT( pxTimerBuffer );
- pxNewTimer = ( Timer_t * ) pxTimerBuffer; /*lint !e740 !e9087 StaticTimer_t is a pointer to a Timer_t, so guaranteed to be aligned and sized correctly (checked by an assert()), so this is safe. */
+ /* MISRA Ref 11.3.1 [Misaligned access] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+ /* coverity[misra_c_2012_rule_11_3_violation] */
+ pxNewTimer = ( Timer_t * ) pxTimerBuffer;
if( pxNewTimer != NULL )
{
@@ -664,6 +667,9 @@
if( ( pxTimer->ucStatus & tmrSTATUS_IS_STATICALLY_ALLOCATED ) != 0U )
{
+ /* MISRA Ref 11.3.1 [Misaligned access] */
+ /* More details at: https://github.com/FreeRTOS/FreeRTOS-Kernel/blob/main/MISRA.md#rule-113 */
+ /* coverity[misra_c_2012_rule_11_3_violation] */
*ppxTimerBuffer = ( StaticTimer_t * ) pxTimer;
xReturn = pdTRUE;
}
