| # Licensed under the Apache-2.0 license |
| # SPDX-License-Identifier: Apache-2.0 |
| |
| load("@pigweed//pw_kernel/tooling:rust_app.bzl", "rust_app") |
| load("@pigweed//pw_kernel/tooling:system_image.bzl", "system_image") |
| load("@pigweed//pw_kernel/tooling:target_codegen.bzl", "target_codegen") |
| load("@pigweed//pw_kernel/tooling:target_linker_script.bzl", "target_linker_script") |
| load("@rules_rust//rust:defs.bzl", "rust_binary") |
| load("//target/earlgrey:defs.bzl", "TARGET_COMPATIBLE_WITH") |
| load("//target/earlgrey/signing/keys:defs.bzl", "FPGA_ECDSA_KEY", "SILICON_ECDSA_KEY") |
| load("//target/earlgrey/tooling:opentitan_runner.bzl", "opentitan_runner") |
| |
| rust_app( |
| name = "syscall_latency", |
| srcs = [ |
| "main.rs", |
| ], |
| codegen_crate_name = "syscall_latency_codegen", |
| crate_features = select({ |
| "//target/earlgrey:fpga": ["fpga"], |
| "//target/earlgrey:silicon": ["silicon"], |
| "//target/earlgrey:verilator": ["verilator"], |
| "//conditions:default": [], |
| }), |
| crate_name = "syscall_latency", |
| edition = "2024", |
| system_config = "@pigweed//pw_kernel/target:system_config_file", |
| target_compatible_with = TARGET_COMPATIBLE_WITH, |
| deps = [ |
| "//target/earlgrey:config", |
| "//target/earlgrey/registers", |
| "@pigweed//pw_base64/rust:pw_base64", |
| "@pigweed//pw_kernel/syscall:syscall_user", |
| "@pigweed//pw_kernel/userspace", |
| "@pigweed//pw_log/rust:pw_log", |
| "@pigweed//pw_status/rust:pw_status", |
| ], |
| ) |
| |
| system_image( |
| name = "measure_syscall_latency", |
| apps = [ |
| ":syscall_latency", |
| ], |
| kernel = ":target", |
| platform = "//target/earlgrey", |
| system_config = ":system_config", |
| tags = ["kernel"], |
| ) |
| |
| target_linker_script( |
| name = "linker_script", |
| system_config = ":system_config", |
| tags = ["kernel"], |
| template = "//target/earlgrey:linker_script_template", |
| ) |
| |
| filegroup( |
| name = "system_config", |
| srcs = ["system.json5"], |
| ) |
| |
| target_codegen( |
| name = "codegen", |
| arch = "@pigweed//pw_kernel/arch/riscv:arch_riscv", |
| system_config = ":system_config", |
| ) |
| |
| rust_binary( |
| name = "target", |
| srcs = [ |
| "target.rs", |
| ], |
| edition = "2024", |
| tags = ["kernel"], |
| target_compatible_with = TARGET_COMPATIBLE_WITH, |
| deps = [ |
| ":codegen", |
| ":linker_script", |
| "//target/earlgrey:entry", |
| "@pigweed//pw_kernel/arch/riscv:arch_riscv", |
| "@pigweed//pw_kernel/kernel", |
| "@pigweed//pw_kernel/lib/memory_config", |
| "@pigweed//pw_kernel/subsys/console:console_backend", |
| "@pigweed//pw_kernel/target:target_common", |
| "@pigweed//pw_kernel/userspace", |
| "@pigweed//pw_log/rust:pw_log", |
| ], |
| ) |
| |
| opentitan_runner( |
| name = "measure_syscall_latency_verilator", |
| interface = "verilator", |
| target = ":measure_syscall_latency", |
| ) |
| |
| opentitan_runner( |
| name = "measure_syscall_latency_hyper310", |
| ecdsa_key = FPGA_ECDSA_KEY, |
| interface = "hyper310", |
| target = ":measure_syscall_latency", |
| ) |
| |
| opentitan_runner( |
| name = "measure_syscall_latency_hyper340", |
| ecdsa_key = FPGA_ECDSA_KEY, |
| interface = "hyper340", |
| target = ":measure_syscall_latency", |
| ) |
| |
| opentitan_runner( |
| name = "measure_syscall_latency_silicon", |
| ecdsa_key = SILICON_ECDSA_KEY, |
| interface = "teacup", |
| tags = ["manual"], |
| target = ":measure_syscall_latency", |
| ) |