fixed format issue

target/ast10x0/peripherals/smc/controller.rs

diff --git a/target/ast10x0/peripherals/smc/controller.rs b/target/ast10x0/peripherals/smc/controller.rs
index f588ba0..2f4618b 100644
--- a/target/ast10x0/peripherals/smc/controller.rs
+++ b/target/ast10x0/peripherals/smc/controller.rs
@@ -9,9 +9,8 @@
 use crate::smc::helpers::{
     encode_fmc_segment, encode_spi_segment, flash_capacity_bytes, get_mid_point_of_longest_one,
     spi_calibration_enable, spi_freq_div, total_capacity_bytes, validate_dma_read,
-    validate_mapped_range,
-    SPI_CTRL_FREQ_MASK, SPI_DMA_CALC_CKSUM, SPI_DMA_CALIB_MODE, SPI_DMA_ENABLE,
-    SPI_DMA_RAM_MAP_BASE,
+    validate_mapped_range, SPI_CTRL_FREQ_MASK, SPI_DMA_CALC_CKSUM, SPI_DMA_CALIB_MODE,
+    SPI_DMA_ENABLE, SPI_DMA_RAM_MAP_BASE,
 };
 use crate::smc::interrupts::{SmcInterrupt, SmcInterruptDecoder};
 use crate::smc::registers::SmcRegisters;

target/ast10x0/peripherals/smc/helpers.rs

diff --git a/target/ast10x0/peripherals/smc/helpers.rs b/target/ast10x0/peripherals/smc/helpers.rs
index 27c9d0d..6e21996 100644
--- a/target/ast10x0/peripherals/smc/helpers.rs
+++ b/target/ast10x0/peripherals/smc/helpers.rs
@@ -174,8 +174,7 @@
 
     let start = start as u32;
     let inclusive_end = (end - 1) as u32;
-    Ok(((((start >> 19) << 19) >> 16) & 0x0ff8)
-        | (((inclusive_end >> 19) << 19) & 0x0ff8_0000))
+    Ok(((((start >> 19) << 19) >> 16) & 0x0ff8) | (((inclusive_end >> 19) << 19) & 0x0ff8_0000))
 }
 
 /// Encode an SPI1/SPI2 memory segment into hardware register format.
@@ -188,8 +187,7 @@
 
     let start = start as u32;
     let inclusive_end = (end - 1) as u32;
-    Ok(((((start >> 20) << 20) >> 16) & 0xffff)
-        | (((inclusive_end >> 20) << 20) & 0xffff_0000))
+    Ok(((((start >> 20) << 20) >> 16) & 0xffff) | (((inclusive_end >> 20) << 20) & 0xffff_0000))
 }
 
 /// Calculate AST-compatible SPI clock divider field for CS control registers.