add bazel build for spi2

target/ast10x0/peripherals/scu/routing.rs

diff --git a/target/ast10x0/peripherals/scu/routing.rs b/target/ast10x0/peripherals/scu/routing.rs
index 41a2868..784c206 100644
--- a/target/ast10x0/peripherals/scu/routing.rs
+++ b/target/ast10x0/peripherals/scu/routing.rs
@@ -211,9 +211,7 @@
             op_idx as u32,
             clk_gpio_ori_val[op_idx] as u32
         );
-        Some(SpimGpioOriVal {
-            clk_gpio_ori_val,
-        })
+        Some(SpimGpioOriVal { clk_gpio_ori_val })
     }
 
     /// Restore AST1060 SPIM proprietary pin state after a transaction.

target/ast10x0/tests/smc/read/BUILD.bazel

diff --git a/target/ast10x0/tests/smc/read/BUILD.bazel b/target/ast10x0/tests/smc/read/BUILD.bazel
index d740faf..f10f3a0 100644
--- a/target/ast10x0/tests/smc/read/BUILD.bazel
+++ b/target/ast10x0/tests/smc/read/BUILD.bazel
@@ -51,6 +51,28 @@
 )
 
 rust_binary(
+    name = "target_spi2",
+    srcs = [
+        "target_spi2.rs",
+        "//target/ast10x0/tests/smc:target_debug.rs",
+    ],
+    edition = "2024",
+    tags = ["kernel"],
+    target_compatible_with = TARGET_COMPATIBLE_WITH,
+    deps = [
+        ":codegen",
+        ":linker_script",
+        "//target/ast10x0:entry",
+        "//target/ast10x0/peripherals",
+        "@pigweed//pw_kernel/arch/arm_cortex_m:arch_arm_cortex_m",
+        "@pigweed//pw_kernel/kernel",
+        "@pigweed//pw_kernel/subsys/console:console_backend",
+        "@pigweed//pw_kernel/target:target_common",
+        "@pigweed//pw_log/rust:pw_log",
+    ],
+)
+
+rust_binary(
     name = "target",
     srcs = [
         "target.rs",
@@ -95,6 +117,28 @@
     visibility = ["//visibility:public"],
 )
 
+system_image(
+    name = "smc_spi2_read_test",
+    kernel = ":target_spi2",
+    platform = "//target/ast10x0",
+    system_config = ":system_config",
+    tags = ["kernel"],
+    target_compatible_with = TARGET_COMPATIBLE_WITH,
+    userspace = False,
+    visibility = ["//visibility:public"],
+)
+
+system_image_test(
+    name = "smc_spi2_read_evb_test",
+    image = ":smc_spi2_read_test",
+    tags = ["hardware"],
+    target_compatible_with = select({
+        "//target/ast10x0:qemu_enabled": ["@platforms//:incompatible"],
+        "//conditions:default": [],
+    }),
+    visibility = ["//visibility:public"],
+)
+
 rust_binary_no_panics_test(
     name = "spi1_no_panics_test",
     binary = ":smc_spi1_read_test",

target/ast10x0/tests/smc/read/target_spi2.rs

diff --git a/target/ast10x0/tests/smc/read/target_spi2.rs b/target/ast10x0/tests/smc/read/target_spi2.rs
index 9b9f56e..1b67bb3 100644
--- a/target/ast10x0/tests/smc/read/target_spi2.rs
+++ b/target/ast10x0/tests/smc/read/target_spi2.rs
@@ -11,7 +11,7 @@
         PINCTRL_GPIOL2, PINCTRL_GPIOL3, PINCTRL_SPI2_QUAD, PINCTRL_SPIM3_DEFAULT,
         PINCTRL_SPIM4_DEFAULT,
     },
-    ScuRegisters, SpiMonitorInstance, SpiMonitorPassthrough, SpiMonitorSource, ScuExtMuxSelect,
+    ScuExtMuxSelect, ScuRegisters, SpiMonitorInstance, SpiMonitorPassthrough, SpiMonitorSource,
 };
 use ast10x0_peripherals::smc::{
     ChipSelect, FlashConfig, SmcConfig, SmcController, SmcError, SmcTopology, SpiTransaction,
@@ -81,10 +81,7 @@
         // the same 1 MHz / 128-pin settings as the Zephyr board configuration.
         write_volatile(SCU41C, read_volatile(SCU41C) | SGPIOM_PIN_MASK);
         let config = read_volatile(SGPIOM_CONFIG) & !SGPIOM_CONFIG_MASK;
-        write_volatile(
-            SGPIOM_CONFIG,
-            config | SGPIOM_CONFIG_1MHZ_128_PINS,
-        );
+        write_volatile(SGPIOM_CONFIG, config | SGPIOM_CONFIG_1MHZ_128_PINS);
 
         let mut gpio_data = read_volatile(GPIO_E_H_DATA);
         let mut sgpio_data = read_volatile(SGPIOM_WRITE_LATCH_A_D);
@@ -123,9 +120,7 @@
     scu.set_spim_passthrough(SpiMonitorInstance::Spim2, SpiMonitorPassthrough::Enabled);
     scu.set_spim_ext_mux(SpiMonitorInstance::Spim2, ScuExtMuxSelect::Mux1);
     pw_log::info!("SCU pinmux and SPIM routing configured for SPI2 monitoring");
-    unsafe {
-        write_volatile(0x7E6E_20F0 as *mut u32, 0xfff0);
-    }
+
     for _ in 0..1_000_000 {
         core::hint::spin_loop();
     }