ci: build the veer fpga target image on every CI run

Adds a build-only (no lab hardware needed) CI job that builds
//target/veer/unittest_runner:fpga_test under target_type=fpga, so a
regression like the console rust_library silently losing its fpga
cfg feature (caught by the final review of the fpga-target plan) gets
flagged automatically instead of only being visible under
bazel aquery. Actually running the test still requires a VCK190 board
and is left manual/opt-in.

workflows.json

diff --git a/workflows.json b/workflows.json
index be73c19..08c439f 100644
--- a/workflows.json
+++ b/workflows.json
@@ -118,6 +118,26 @@
       ]
     },
     {
+      "name": "caliptra_fpga_build",
+      "build_config": {
+        "name": "caliptra_fpga_build_config",
+        "description": "Build (do not run) the Caliptra MCU fpga target image. Catches fpga cfg/build-wiring regressions without requiring lab hardware; actually running it needs a VCK190 board (see //target/veer/unittest_runner:fpga_test, tagged manual).",
+        "build_type": "bazel",
+        "args": [
+          "--keep_going",
+          "--config=k_veer",
+          "--//target/veer:target_type=fpga"
+        ],
+        "driver_options": {
+          "@type": "pw.build.proto.BazelDriverOptions",
+          "no_test": true
+        }
+      },
+      "targets": [
+        "//target/veer/unittest_runner:fpga_test"
+      ]
+    },
+    {
       "name": "earlgrey_qemu_tests",
       "build_config": {
         "name": "earlgrey_qemu_tests_config",
@@ -204,7 +224,8 @@
         "ci_tests",
         "ast10x0_qemu_tests",
         "earlgrey_qemu_tests",
-        "caliptra_emulator_tests"
+        "caliptra_emulator_tests",
+        "caliptra_fpga_build"
       ]
     },
     {