Fix build errors by removing aspeed-ddk dependency

target/ast10x0/BUILD.bazel

diff --git a/target/ast10x0/BUILD.bazel b/target/ast10x0/BUILD.bazel
index f13f9be..76aa365 100644
--- a/target/ast10x0/BUILD.bazel
+++ b/target/ast10x0/BUILD.bazel
@@ -37,8 +37,7 @@
     flags = flags_from_dict(
         KERNEL_DEVICE_COMMON_FLAGS | {
             "@pigweed//pw_kernel/config:kernel_config": ":config",
-            # TODO(console): replace with a real UART backend for silicon.
-            "@pigweed//pw_kernel/subsys/console:console_backend": "@pigweed//pw_kernel/subsys/console:console_backend_semihosting",
+            "@pigweed//pw_kernel/subsys/console:console_backend": ":console",
         },
     ),
     visibility = [":__subpackages__"],
@@ -54,13 +53,29 @@
 )
 
 rust_library(
+    name = "console",
+    srcs = ["console_backend.rs"],
+    crate_name = "console_backend",
+    edition = "2024",
+    tags = ["kernel"],
+    target_compatible_with = TARGET_COMPATIBLE_WITH,
+    deps = [
+        "//target/ast10x0/peripherals",
+        "@ast1060_pac",
+        "@pigweed//pw_kernel/arch/arm_cortex_m:arch_arm_cortex_m",
+        "@pigweed//pw_kernel/kernel",
+        "@pigweed//pw_status/rust:pw_status",
+        "@rust_crates//:embedded-io",
+    ],
+)
+
+rust_library(
     name = "entry",
     srcs = ["entry.rs"],
     edition = "2024",
     tags = ["kernel"],
     target_compatible_with = TARGET_COMPATIBLE_WITH,
     deps = [
-        "@aspeed_ddk//:aspeed_ddk",
         "@pigweed//pw_kernel/arch/arm_cortex_m:arch_arm_cortex_m",
         "@pigweed//pw_kernel/kernel",
         "@pigweed//pw_status/rust:pw_status",

target/ast10x0/console_backend.rs

diff --git a/target/ast10x0/console_backend.rs b/target/ast10x0/console_backend.rs
index d5c267d..5abf4db 100644
--- a/target/ast10x0/console_backend.rs
+++ b/target/ast10x0/console_backend.rs
@@ -1,90 +1,28 @@
 // Licensed under the Apache-2.0 license
+// SPDX-License-Identifier: Apache-2.0
 
 //! AST1060-EVB UART console backend.
 //!
-//! Implements console output using the AST1060 UART peripheral via aspeed-ddk.
+//! Implements console output using the AST10x0 peripheral USART driver.
 
 #![no_std]
 
-use core::mem::MaybeUninit;
-use core::sync::atomic::{AtomicBool, Ordering};
-
-use pw_status::{Error, Result};
-use ast1060_pac::Peripherals;
+use ast10x0_peripherals::uart::Usart;
+use ast1060_pac as device;
 use embedded_io::Write;
 use kernel::sync::spinlock::SpinLock;
+use pw_status::{Error, Result};
 
-use aspeed_ddk::uart::{Config, Parity, StopBits, UartController};
+/// MMIO base address of UART5 on the AST10x0 SoC (AST1060 TRM §28, Table 28-1).
+const UART5_BASE: *const device::uart::RegisterBlock = 0x7e78_4000 as *const _;
 
-// Global UART controller instance wrapped in a spinlock
-static mut UART_CONTROLLER: MaybeUninit<UartController<'static>> = MaybeUninit::uninit();
-static UART_INITIALIZED: AtomicBool = AtomicBool::new(false);
-static UART_LOCK: SpinLock<arch_arm_cortex_m::Arch, ()> = SpinLock::new(());
-
-struct DummyDelay;
-
-impl embedded_hal::delay::DelayNs for DummyDelay {
-    fn delay_ns(&mut self, _ns: u32) {
-        // Simple spin loop since we don't have a reliable timer yet
-        core::hint::spin_loop();
-    }
-}
-
-static mut DELAY: DummyDelay = DummyDelay;
-
-/// Initializes the UART console backend.
-///
-/// # Safety
-///
-/// This function must be called only once during kernel initialization.
-/// It initializes the global UART controller.
-#[unsafe(no_mangle)]
-pub unsafe fn console_backend_init() {
-    if UART_INITIALIZED.load(Ordering::Acquire) {
-        return;
-    }
-
-    // Use steal() as recommended for aspeed-rust to avoid singleton check issues
-    let peripherals = unsafe { Peripherals::steal() };
-
-    let config = Config {
-        baud_rate: 115200,
-        word_length: 3, // 3 means 8 bits (00=5, 01=6, 10=7, 11=8)
-        parity: Parity::None,
-        stop_bits: StopBits::One,
-        clock: 24_000_000, // Assuming 24MHz clock
-    };
-
-    #[allow(static_mut_refs)]
-    let delay = unsafe { &mut DELAY };
-    let controller = UartController::new(peripherals.uart, delay);
-    unsafe {
-        controller.init(&config);
-    }
-
-    unsafe {
-        let p = core::ptr::addr_of_mut!(UART_CONTROLLER);
-        core::ptr::write(p as *mut UartController<'static>, controller);
-    }
-    UART_INITIALIZED.store(true, Ordering::Release);
-}
+// SAFETY: UART5_BASE is the UART5 MMIO base on AST10x0. This static is the
+// sole owner of the peripheral; the SpinLock ensures exclusive access.
+static UART: SpinLock<arch_arm_cortex_m::Arch, Usart> =
+    SpinLock::new(unsafe { Usart::new(UART5_BASE) });
 
 #[unsafe(no_mangle)]
 pub fn console_backend_write_all(buf: &[u8]) -> Result<()> {
-    if !UART_INITIALIZED.load(Ordering::Acquire) {
-        return Err(Error::Unavailable);
-    }
-
-    // Acquire spinlock to ensure exclusive UART access
-    let _guard = UART_LOCK.lock(arch_arm_cortex_m::Arch);
-
-    // Safety: exclusive access is guaranteed by the spinlock guard above.
-    let controller = unsafe {
-        &mut *(core::ptr::addr_of_mut!(UART_CONTROLLER) as *mut UartController<'static>)
-    };
-
-    match controller.write(buf) {
-        Ok(_) => Ok(()),
-        Err(_) => Err(Error::DataLoss),
-    }
+    let mut uart = UART.lock(arch_arm_cortex_m::Arch);
+    uart.write_all(buf).map_err(|_| Error::DataLoss)
 }

target/ast10x0/entry.rs

diff --git a/target/ast10x0/entry.rs b/target/ast10x0/entry.rs
index cc9fdaf..dff6438 100644
--- a/target/ast10x0/entry.rs
+++ b/target/ast10x0/entry.rs
@@ -80,41 +80,19 @@
 
 mod console_backend {
     unsafe extern "Rust" {
-        pub fn console_backend_init();
         pub fn console_backend_write_all(buf: &[u8]) -> pw_status::Result<()>;
     }
 }
 
-/// Initialize I2C subsystem
-///
-/// This must be called once before any I2C controller is used.
-/// Sets up global I2C registers and pin muxing for I2C1 and I2C2.
-fn i2c_init() {
-    // 1. Initialize I2C global registers (reset, clock dividers)
-    //    - Asserts/de-asserts I2C reset via SCU050/SCU054
-    //    - Configures I2CG0C global control register
-    //    - Sets I2CG10 base clock dividers for all speed modes
-    aspeed_ddk::i2c_core::init_i2c_global();
-
-    // 2. Configure I2C pin muxing
-    aspeed_ddk::pinctrl::Pinctrl::apply_pinctrl_group(aspeed_ddk::pinctrl::PINCTRL_I2C1);
-    aspeed_ddk::pinctrl::Pinctrl::apply_pinctrl_group(aspeed_ddk::pinctrl::PINCTRL_I2C2);
-}
-
 #[cortex_m_rt::entry]
 fn main() -> ! {
     kernel::static_init_state!(static mut INIT_STATE: InitKernelState<Arch>);
     #[allow(static_mut_refs)]
     unsafe {
         // Initialize UART console
-        console_backend::console_backend_init();
         let _ = console_backend::console_backend_write_all(b"\r\nHello World!\r\n");
         let _ = console_backend::console_backend_write_all(b"ast1060 pigweed fw is running!\r\n");
 
-        // Initialize I2C1 for master mode operations
-        i2c_init();
-        let _ = console_backend::console_backend_write_all(b"I2C1 initialized\r\n");
-
         kernel::main(Arch, &mut INIT_STATE)
     };
 }