Root mean square (RMS) CMSIS-DSP: Root mean square (RMS)
CMSIS-DSP  Version 1.4.7
CMSIS DSP Software Library

Functions

void arm_rms_f32 (float32_t *pSrc, uint32_t blockSize, float32_t *pResult)
Root Mean Square of the elements of a floating-point vector.

void arm_rms_q15 (q15_t *pSrc, uint32_t blockSize, q15_t *pResult)
Root Mean Square of the elements of a Q15 vector.

void arm_rms_q31 (q31_t *pSrc, uint32_t blockSize, q31_t *pResult)
Root Mean Square of the elements of a Q31 vector.

Description

Calculates the Root Mean Sqaure of the elements in the input vector. The underlying algorithm is used:

Result = sqrt(((pSrc[0] * pSrc[0] + pSrc[1] * pSrc[1] + ... + pSrc[blockSize-1] * pSrc[blockSize-1]) / blockSize));

There are separate functions for floating point, Q31, and Q15 data types.

Function Documentation

void arm_rms_f32 ( float32_t pSrc,
uint32_t  blockSize,
float32_t pResult
)
Parameters
[in]*pSrcpoints to the input vector
[in]blockSizelength of the input vector
[out]*pResultrms value returned here
Returns
none.

References arm_sqrt_f32(), and blockSize.

void arm_rms_q15 ( q15_t pSrc,
uint32_t  blockSize,
q15_t pResult
)
Parameters
[in]*pSrcpoints to the input vector
[in]blockSizelength of the input vector
[out]*pResultrms value returned here
Returns
none.

Scaling and Overflow Behavior:

The function is implemented using a 64-bit internal accumulator. The input is represented in 1.15 format. Intermediate multiplication yields a 2.30 format, and this result is added without saturation to a 64-bit accumulator in 34.30 format. With 33 guard bits in the accumulator, there is no risk of overflow, and the full precision of the intermediate multiplication is preserved. Finally, the 34.30 result is truncated to 34.15 format by discarding the lower 15 bits, and then saturated to yield a result in 1.15 format.

References __SIMD32, arm_sqrt_q15(), and blockSize.

void arm_rms_q31 ( q31_t pSrc,
uint32_t  blockSize,
q31_t pResult
)
Parameters
[in]*pSrcpoints to the input vector
[in]blockSizelength of the input vector
[out]*pResultrms value returned here
Returns
none.

Scaling and Overflow Behavior:

The function is implemented using an internal 64-bit accumulator. The input is represented in 1.31 format, and intermediate multiplication yields a 2.62 format. The accumulator maintains full precision of the intermediate multiplication results, but provides only a single guard bit. There is no saturation on intermediate additions. If the accumulator overflows, it wraps around and distorts the result. In order to avoid overflows completely, the input signal must be scaled down by log2(blockSize) bits, as a total of blockSize additions are performed internally. Finally, the 2.62 accumulator is right shifted by 31 bits to yield a 1.31 format value.

References arm_sqrt_q31(), blockSize, and clip_q63_to_q31().