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| <div id="projectname">CMSIS-Core (Cortex-A) |
|  <span id="projectnumber">Version 1.1.4</span> |
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| <div id="projectbrief">CMSIS-Core support for Cortex-A processor-based devices</div> |
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| <div class="title">Overview </div> </div> |
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| <div class="textblock"><p>CMSIS-Core (Cortex-A) implements the basic run-time system for a Cortex-A device and gives the user access to the processor core and the device peripherals. In detail it defines:</p> |
| <ul> |
| <li><b>Hardware Abstraction Layer (HAL)</b> for Cortex-A processor registers with standardized definitions for the GIC, FPU, MMU, Cache, and core access functions.</li> |
| <li><b>System exception names</b> to interface to system exceptions without having compatibility issues.</li> |
| <li><b>Methods to organize header files</b> that makes it easy to learn new Cortex-A microcontroller products and improve software portability. This includes naming conventions for device-specific interrupts.</li> |
| <li><b>Methods for system initialization</b> to be used by each MCU vendor. For example, the standardized <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2" title="Function to Initialize the system. ">SystemInit()</a> function is essential for configuring the clock system of the device.</li> |
| <li><b>Intrinsic functions</b> used to generate CPU instructions that are not supported by standard C functions.</li> |
| <li>A variable to determine the <b>system clock frequency</b> which simplifies the setup of the system timers.</li> |
| </ul> |
| <p>The following sections provide details about the CMSIS-Core (Cortex-A):</p> |
| <ul> |
| <li><a class="el" href="using_pg.html">Using CMSIS in Embedded Applications</a> describes the project setup and shows a simple program example.</li> |
| <li><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a> describes the files of the CMSIS-Core (Cortex-A) in detail and explains how to adapt template files provided by Arm to silicon vendor devices.</li> |
| <li><a class="el" href="coreMISRA_Exceptions_pg.html">MISRA-C Deviations</a> describes the violations to the MISRA standard.</li> |
| <li><a href="Modules.html"><b>Reference</b> </a> describe the features and functions of the <a class="el" href="device_h_pg.html">Device Header File <device.h></a> in detail.</li> |
| <li><a href="Annotated.html"><b>Data</b> <b>Structures</b> </a> describe the data structures of the <a class="el" href="device_h_pg.html">Device Header File <device.h></a> in detail.</li> |
| </ul> |
| <hr/> |
| <h2>CMSIS-Core (Cortex-A) in ARM::CMSIS Pack </h2> |
| <p>Files relevant to CMSIS-Core (Cortex-A) are present in the following <b>ARM::CMSIS</b> directories: </p> |
| <table class="doxtable"> |
| <tr> |
| <th>File/Folder </th><th>Content </th></tr> |
| <tr> |
| <td><b>CMSIS\Documentation\Core_A</b> </td><td>This documentation </td></tr> |
| <tr> |
| <td><b>CMSIS\Core_A\Include</b> </td><td>CMSIS-Core (Cortex-A) header files (for example <a class="el" href="core__ca_8h.html" title="CMSIS Cortex-A Core Peripheral Access Layer Header File. ">core_ca.h</a>, etc.) </td></tr> |
| <tr> |
| <td><b>Device</b> </td><td><a class="el" href="using_ARM_pg.html">Arm reference implementations</a> of Cortex-A devices </td></tr> |
| <tr> |
| <td><b>Device\_Template_Vendor</b> </td><td><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a> for extension by silicon vendors </td></tr> |
| </table> |
| <hr/> |
| <h1><a class="anchor" id="ref_v7A"></a> |
| Processor Support</h1> |
| <p>CMSIS supports a selected subset of <a href="http://www.arm.com/products/processors/cortex-a/index.php" target="_blank"><b>Cortex-A processors</b></a>.</p> |
| <h2><a class="anchor" id="ref_man_ca_sec"></a> |
| Cortex-A Technical Reference Manuals</h2> |
| <p>The following Technical Reference Manuals describe the various Arm Cortex-A processors:</p> |
| <ul> |
| <li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0433c/DDI0433C_cortex_a5_trm.pdf" target="_blank"><b>Cortex-A5</b></a> (Armv7-A architecture)</li> |
| <li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.ddi0464f/DDI0464F_cortex_a7_mpcore_r0p5_trm.pdf" target="_blank"><b>Cortex-A7</b></a> (Armv7-A architecture)</li> |
| <li><a href="http://infocenter.arm.com/help/topic/com.arm.doc.100511_0401_10_en/arm_cortexa9_trm_100511_0401_10_en.pdf" target="_blank"><b>Cortex-A9</b></a> (Armv7-A architecture)</li> |
| </ul> |
| <hr/> |
| <h1><a class="anchor" id="tested_tools_sec"></a> |
| Tested and Verified Toolchains</h1> |
| <p>The <a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a> supplied by Arm have been tested and verified with the following toolchains:</p> |
| <ul> |
| <li>Arm: Arm Compiler 5.06 update 6</li> |
| <li>Arm: Arm Compiler 6.12</li> |
| <li>Arm: Arm Compiler 6.6.2</li> |
| <li>GNU: GNU Tools for Arm Embedded 8.2.1 2018q4</li> |
| <li>IAR: IAR ANSI C/C++ Compiler for Arm 8.20.1.14183</li> |
| </ul> |
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