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| <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="nested-classes"></a> |
| Data Structures</h2></td></tr> |
| <tr class="memitem:structARM__I2C__STATUS"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2c__interface__gr.html#structARM__I2C__STATUS">ARM_I2C_STATUS</a></td></tr> |
| <tr class="memdesc:structARM__I2C__STATUS"><td class="mdescLeft"> </td><td class="mdescRight">I2C Status. <a href="group__i2c__interface__gr.html#structARM__I2C__STATUS">More...</a><br/></td></tr> |
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| <tr class="memitem:structARM__I2C__CAPABILITIES"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2c__interface__gr.html#structARM__I2C__CAPABILITIES">ARM_I2C_CAPABILITIES</a></td></tr> |
| <tr class="memdesc:structARM__I2C__CAPABILITIES"><td class="mdescLeft"> </td><td class="mdescRight">I2C Driver Capabilities. <a href="group__i2c__interface__gr.html#structARM__I2C__CAPABILITIES">More...</a><br/></td></tr> |
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| <tr class="memitem:structARM__DRIVER__I2C"><td class="memItemLeft" align="right" valign="top">struct  </td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2c__interface__gr.html#structARM__DRIVER__I2C">ARM_DRIVER_I2C</a></td></tr> |
| <tr class="memdesc:structARM__DRIVER__I2C"><td class="mdescLeft"> </td><td class="mdescRight">Access structure of the I2C Driver. <a href="group__i2c__interface__gr.html#structARM__DRIVER__I2C">More...</a><br/></td></tr> |
| <tr class="separator:structARM__DRIVER__I2C"><td class="memSeparator" colspan="2"> </td></tr> |
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| <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a> |
| Macros</h2></td></tr> |
| <tr class="memitem:a1d02c71e603ea569af1755251b1d179f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="Driver__I2C_8h.html#a1d02c71e603ea569af1755251b1d179f">ARM_I2C_API_VERSION</a>   <a class="el" href="Driver__Common_8h.html#a43c7ca1eb0786d818624246c09932a74">ARM_DRIVER_VERSION_MAJOR_MINOR</a>(2,3) /* API version */</td></tr> |
| <tr class="separator:a1d02c71e603ea569af1755251b1d179f"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga69d130b9f8aa34d6df5334ab67c74307"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2c__control__codes.html#ga69d130b9f8aa34d6df5334ab67c74307">ARM_I2C_OWN_ADDRESS</a>   (0x01)</td></tr> |
| <tr class="memdesc:ga69d130b9f8aa34d6df5334ab67c74307"><td class="mdescLeft"> </td><td class="mdescRight">Set Own Slave Address; arg = address. <a href="group__i2c__control__codes.html#ga69d130b9f8aa34d6df5334ab67c74307">More...</a><br/></td></tr> |
| <tr class="separator:ga69d130b9f8aa34d6df5334ab67c74307"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga35733133237d65146abd9449f5353a7f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2c__control__codes.html#ga35733133237d65146abd9449f5353a7f">ARM_I2C_BUS_SPEED</a>   (0x02)</td></tr> |
| <tr class="memdesc:ga35733133237d65146abd9449f5353a7f"><td class="mdescLeft"> </td><td class="mdescRight">Set Bus Speed; arg = speed. <a href="group__i2c__control__codes.html#ga35733133237d65146abd9449f5353a7f">More...</a><br/></td></tr> |
| <tr class="separator:ga35733133237d65146abd9449f5353a7f"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gadacf04578770faca4b3eaae34b2c5f03"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2c__control__codes.html#gadacf04578770faca4b3eaae34b2c5f03">ARM_I2C_BUS_CLEAR</a>   (0x03)</td></tr> |
| <tr class="memdesc:gadacf04578770faca4b3eaae34b2c5f03"><td class="mdescLeft"> </td><td class="mdescRight">Execute Bus clear: send nine clock pulses. <a href="group__i2c__control__codes.html#gadacf04578770faca4b3eaae34b2c5f03">More...</a><br/></td></tr> |
| <tr class="separator:gadacf04578770faca4b3eaae34b2c5f03"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga661e91aaa642d10ba80e3cc72f263040"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2c__control__codes.html#ga661e91aaa642d10ba80e3cc72f263040">ARM_I2C_ABORT_TRANSFER</a>   (0x04)</td></tr> |
| <tr class="memdesc:ga661e91aaa642d10ba80e3cc72f263040"><td class="mdescLeft"> </td><td class="mdescRight">Abort Master/Slave Transmit/Receive. <a href="group__i2c__control__codes.html#ga661e91aaa642d10ba80e3cc72f263040">More...</a><br/></td></tr> |
| <tr class="separator:ga661e91aaa642d10ba80e3cc72f263040"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga0aaa6398280fdd7ad651d7d6d44c863f"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2c__bus__speed__ctrls.html#ga0aaa6398280fdd7ad651d7d6d44c863f">ARM_I2C_BUS_SPEED_STANDARD</a>   (0x01)</td></tr> |
| <tr class="memdesc:ga0aaa6398280fdd7ad651d7d6d44c863f"><td class="mdescLeft"> </td><td class="mdescRight">Standard Speed (100kHz) <a href="group__i2c__bus__speed__ctrls.html#ga0aaa6398280fdd7ad651d7d6d44c863f">More...</a><br/></td></tr> |
| <tr class="separator:ga0aaa6398280fdd7ad651d7d6d44c863f"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga39f49ef4cd1100a8d9dc9003329e5ecd"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2c__bus__speed__ctrls.html#ga39f49ef4cd1100a8d9dc9003329e5ecd">ARM_I2C_BUS_SPEED_FAST</a>   (0x02)</td></tr> |
| <tr class="memdesc:ga39f49ef4cd1100a8d9dc9003329e5ecd"><td class="mdescLeft"> </td><td class="mdescRight">Fast Speed (400kHz) <a href="group__i2c__bus__speed__ctrls.html#ga39f49ef4cd1100a8d9dc9003329e5ecd">More...</a><br/></td></tr> |
| <tr class="separator:ga39f49ef4cd1100a8d9dc9003329e5ecd"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga2615262062e0327ab478ec85675ca649"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2c__bus__speed__ctrls.html#ga2615262062e0327ab478ec85675ca649">ARM_I2C_BUS_SPEED_FAST_PLUS</a>   (0x03)</td></tr> |
| <tr class="memdesc:ga2615262062e0327ab478ec85675ca649"><td class="mdescLeft"> </td><td class="mdescRight">Fast+ Speed ( 1MHz) <a href="group__i2c__bus__speed__ctrls.html#ga2615262062e0327ab478ec85675ca649">More...</a><br/></td></tr> |
| <tr class="separator:ga2615262062e0327ab478ec85675ca649"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga10aae5a8c7fcc90e514c5fb7393056ec"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2c__bus__speed__ctrls.html#ga10aae5a8c7fcc90e514c5fb7393056ec">ARM_I2C_BUS_SPEED_HIGH</a>   (0x04)</td></tr> |
| <tr class="memdesc:ga10aae5a8c7fcc90e514c5fb7393056ec"><td class="mdescLeft"> </td><td class="mdescRight">High Speed (3.4MHz) <a href="group__i2c__bus__speed__ctrls.html#ga10aae5a8c7fcc90e514c5fb7393056ec">More...</a><br/></td></tr> |
| <tr class="separator:ga10aae5a8c7fcc90e514c5fb7393056ec"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga16be1861b90774bf062feab2dbb829a4"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2c__address__flags.html#ga16be1861b90774bf062feab2dbb829a4">ARM_I2C_ADDRESS_10BIT</a>   (0x0400)</td></tr> |
| <tr class="memdesc:ga16be1861b90774bf062feab2dbb829a4"><td class="mdescLeft"> </td><td class="mdescRight">10-bit address flag <a href="group__i2c__address__flags.html#ga16be1861b90774bf062feab2dbb829a4">More...</a><br/></td></tr> |
| <tr class="separator:ga16be1861b90774bf062feab2dbb829a4"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga337f4f1aa082e9b593b2dcd43c50134e"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2c__address__flags.html#ga337f4f1aa082e9b593b2dcd43c50134e">ARM_I2C_ADDRESS_GC</a>   (0x8000)</td></tr> |
| <tr class="memdesc:ga337f4f1aa082e9b593b2dcd43c50134e"><td class="mdescLeft"> </td><td class="mdescRight">General Call flag. <a href="group__i2c__address__flags.html#ga337f4f1aa082e9b593b2dcd43c50134e">More...</a><br/></td></tr> |
| <tr class="separator:ga337f4f1aa082e9b593b2dcd43c50134e"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga5992dc0f6e839c4d066cfa83d535f30d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__I2C__events.html#ga5992dc0f6e839c4d066cfa83d535f30d">ARM_I2C_EVENT_TRANSFER_DONE</a>   (1UL << 0)</td></tr> |
| <tr class="memdesc:ga5992dc0f6e839c4d066cfa83d535f30d"><td class="mdescLeft"> </td><td class="mdescRight">Master/Slave Transmit/Receive finished. <a href="group__I2C__events.html#ga5992dc0f6e839c4d066cfa83d535f30d">More...</a><br/></td></tr> |
| <tr class="separator:ga5992dc0f6e839c4d066cfa83d535f30d"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gafac3989c7b57727e1bed4ee9f2496ac9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__I2C__events.html#gafac3989c7b57727e1bed4ee9f2496ac9">ARM_I2C_EVENT_TRANSFER_INCOMPLETE</a>   (1UL << 1)</td></tr> |
| <tr class="memdesc:gafac3989c7b57727e1bed4ee9f2496ac9"><td class="mdescLeft"> </td><td class="mdescRight">Master/Slave Transmit/Receive incomplete transfer. <a href="group__I2C__events.html#gafac3989c7b57727e1bed4ee9f2496ac9">More...</a><br/></td></tr> |
| <tr class="separator:gafac3989c7b57727e1bed4ee9f2496ac9"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gacfbbec9af083d35e8ea87ad16e9c6ec2"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__I2C__events.html#gacfbbec9af083d35e8ea87ad16e9c6ec2">ARM_I2C_EVENT_SLAVE_TRANSMIT</a>   (1UL << 2)</td></tr> |
| <tr class="memdesc:gacfbbec9af083d35e8ea87ad16e9c6ec2"><td class="mdescLeft"> </td><td class="mdescRight">Addressed as Slave Transmitter but transmit operation is not set. <a href="group__I2C__events.html#gacfbbec9af083d35e8ea87ad16e9c6ec2">More...</a><br/></td></tr> |
| <tr class="separator:gacfbbec9af083d35e8ea87ad16e9c6ec2"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gabd875b57ce39dadd849c53b885ad6661"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__I2C__events.html#gabd875b57ce39dadd849c53b885ad6661">ARM_I2C_EVENT_SLAVE_RECEIVE</a>   (1UL << 3)</td></tr> |
| <tr class="memdesc:gabd875b57ce39dadd849c53b885ad6661"><td class="mdescLeft"> </td><td class="mdescRight">Addressed as Slave Receiver but receive operation is not set. <a href="group__I2C__events.html#gabd875b57ce39dadd849c53b885ad6661">More...</a><br/></td></tr> |
| <tr class="separator:gabd875b57ce39dadd849c53b885ad6661"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga98b815769634d9578526b43589caa017"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__I2C__events.html#ga98b815769634d9578526b43589caa017">ARM_I2C_EVENT_ADDRESS_NACK</a>   (1UL << 4)</td></tr> |
| <tr class="memdesc:ga98b815769634d9578526b43589caa017"><td class="mdescLeft"> </td><td class="mdescRight">Address not acknowledged from Slave. <a href="group__I2C__events.html#ga98b815769634d9578526b43589caa017">More...</a><br/></td></tr> |
| <tr class="separator:ga98b815769634d9578526b43589caa017"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga3ab54410b6410ed3a58762ff0c0d68b9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__I2C__events.html#ga3ab54410b6410ed3a58762ff0c0d68b9">ARM_I2C_EVENT_GENERAL_CALL</a>   (1UL << 5)</td></tr> |
| <tr class="memdesc:ga3ab54410b6410ed3a58762ff0c0d68b9"><td class="mdescLeft"> </td><td class="mdescRight">Slave addressed with general call address. <a href="group__I2C__events.html#ga3ab54410b6410ed3a58762ff0c0d68b9">More...</a><br/></td></tr> |
| <tr class="separator:ga3ab54410b6410ed3a58762ff0c0d68b9"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gac9000f44a578e2117d64dbc2093cec6d"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__I2C__events.html#gac9000f44a578e2117d64dbc2093cec6d">ARM_I2C_EVENT_ARBITRATION_LOST</a>   (1UL << 6)</td></tr> |
| <tr class="memdesc:gac9000f44a578e2117d64dbc2093cec6d"><td class="mdescLeft"> </td><td class="mdescRight">Master lost arbitration. <a href="group__I2C__events.html#gac9000f44a578e2117d64dbc2093cec6d">More...</a><br/></td></tr> |
| <tr class="separator:gac9000f44a578e2117d64dbc2093cec6d"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:gaeef542840355131c18b53fd9ed1904a8"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__I2C__events.html#gaeef542840355131c18b53fd9ed1904a8">ARM_I2C_EVENT_BUS_ERROR</a>   (1UL << 7)</td></tr> |
| <tr class="memdesc:gaeef542840355131c18b53fd9ed1904a8"><td class="mdescLeft"> </td><td class="mdescRight">Bus error detected (START/STOP at illegal position) <a href="group__I2C__events.html#gaeef542840355131c18b53fd9ed1904a8">More...</a><br/></td></tr> |
| <tr class="separator:gaeef542840355131c18b53fd9ed1904a8"><td class="memSeparator" colspan="2"> </td></tr> |
| <tr class="memitem:ga81ca21fad73dac1ffaff58921f848ea9"><td class="memItemLeft" align="right" valign="top">#define </td><td class="memItemRight" valign="bottom"><a class="el" href="group__I2C__events.html#ga81ca21fad73dac1ffaff58921f848ea9">ARM_I2C_EVENT_BUS_CLEAR</a>   (1UL << 8)</td></tr> |
| <tr class="memdesc:ga81ca21fad73dac1ffaff58921f848ea9"><td class="mdescLeft"> </td><td class="mdescRight">Bus clear finished. <a href="group__I2C__events.html#ga81ca21fad73dac1ffaff58921f848ea9">More...</a><br/></td></tr> |
| <tr class="separator:ga81ca21fad73dac1ffaff58921f848ea9"><td class="memSeparator" colspan="2"> </td></tr> |
| </table><table class="memberdecls"> |
| <tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="typedef-members"></a> |
| Typedefs</h2></td></tr> |
| <tr class="memitem:ga24277c48248a09b0dd7f12bbe22ce13c"><td class="memItemLeft" align="right" valign="top">typedef void(* </td><td class="memItemRight" valign="bottom"><a class="el" href="group__i2c__interface__gr.html#ga24277c48248a09b0dd7f12bbe22ce13c">ARM_I2C_SignalEvent_t</a> )(uint32_t event)</td></tr> |
| <tr class="memdesc:ga24277c48248a09b0dd7f12bbe22ce13c"><td class="mdescLeft"> </td><td class="mdescRight">Pointer to <a class="el" href="group__i2c__interface__gr.html#gad4f93d2895794b416dc8d8e9de91c05e">ARM_I2C_SignalEvent</a> : Signal I2C Event. <a href="group__i2c__interface__gr.html#ga24277c48248a09b0dd7f12bbe22ce13c">More...</a><br/></td></tr> |
| <tr class="separator:ga24277c48248a09b0dd7f12bbe22ce13c"><td class="memSeparator" colspan="2"> </td></tr> |
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| <h2 class="groupheader">Macro Definition Documentation</h2> |
| <a class="anchor" id="a1d02c71e603ea569af1755251b1d179f"></a> |
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| <td class="memname">#define ARM_I2C_API_VERSION   <a class="el" href="Driver__Common_8h.html#a43c7ca1eb0786d818624246c09932a74">ARM_DRIVER_VERSION_MAJOR_MINOR</a>(2,3) /* API version */</td> |
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| <li class="navelem"><a class="el" href="dir_7151b3cc910409bb744bd274374c738d.html">Driver</a></li><li class="navelem"><a class="el" href="dir_9c39448ea46a8e15f1aabc7dec307fcf.html">Include</a></li><li class="navelem"><a class="el" href="Driver__I2C_8h.html">Driver_I2C.h</a></li> |
| <li class="footer">Generated on Wed Jul 10 2019 15:20:30 for CMSIS-Driver Version 2.7.1 by Arm Ltd. All rights reserved. |
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