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pigweed/third_party/github/STMicroelectronics/cmsis_core/refs/heads/master^!/.
commit
b7487de1303e2eb77c402432e368691e9dcfb5f0
[log] [tgz]
author
Ali Labbene <ali.labbene@st.com>
Fri Nov 28 11:52:58 2025 +0100
committer
Ali Labbene <ali.labbene@st.com>
Fri Nov 28 14:43:31 2025 +0100
tree
51d396791e816436d6a9be70328da3cfb58d03a0
parent
10c319e2ed1a53a382f43a99eaa2b7b03d5b3489 [diff]
Official ARM version: v5.9.0 (ST modified 2025-05-20)

diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
index 70cfb21..f0d0cbb 100644
--- a/CONTRIBUTING.md
+++ b/CONTRIBUTING.md

@@ -1,4 +1,46 @@
-## Contributing guide
+# Contributing guide
 
-* This repository is not intended to accept contributions as its content is cloned from [CMSIS](https://github.com/ARM-software/CMSIS_5) Arm(TM) owned repository.
-* Any issue or pull-request shall be  be addressed to Arm(TM) and reported [here](https://github.com/ARM-software/CMSIS_5/issues).
+This guide mainly focuses on the steps to follow to submit an issue or a pull request.
+
+## 1. Issues
+
+### 1.1 Before opening an issue
+
+Before posting an issue, please ensure:
+* You are using the latest commit.
+* Your issue is **not** a vulnerability. Otherwise, please refer to section [3](CONTRIBUTING.md#3-vulnerabilities) below.
+* Your issue is **related to** the software provided in this repository. Otherwise, please refer to section [4](CONTRIBUTING.md#4-support-requests-and-miscellaneous) below.
+* Your issue is not already reported, fixed or discussed in a previous one. Remember to browse the **closed** issues.
+
+### 1.2 Posting the issue
+
+When you have checked the previous points, create a new report from the **Issues** tab of this repository. A couple of templates are available [here](../../issues/new/choose).
+
+## 2. Pull Requests
+
+### 2.1 Before opening a pull request
+
+STMicrolectronics is happy to receive contributions from the community, based on an initial Contributor License Agreement (CLA) procedure.
+
+* If you are an individual writing original source code and you are sure **you own the intellectual property**, then you need to sign an **Individual** [CLA](https://cla.st.com).
+* If you work for a company that wants also to allow you to contribute with your work, your company needs to provide a **Corporate** [CLA](https://cla.st.com) mentioning your GitHub account name.
+* If you are not sure that a CLA (Individual or Corporate) has been signed for your GitHub account you can check the [CLA](https://cla.st.com) dedicated page.
+
+> [!IMPORTANT]
+> Please note that:
+> * The Corporate CLA will always take precedence over the Individual CLA.
+> * One CLA submission is sufficient, for any project proposed by STMicroelectronics.
+
+### 2.2 How to proceed
+
+* We recommend to engage first a communication thru an issue, in order to present your proposal, just to confirm that it corresponds to STMicroelectronics' domain or scope.
+* Then fork the project to your GitHub account to further develop your contribution. Please use the latest commit version.
+* Please, submit one pull request per new feature or proposal. This will ease the analysis and the final merge if accepted.
+
+## 3. Vulnerabilities
+
+To report a **vulnerability**, please refer to the [SECURITY.md](./SECURITY.md) file for instructions.
+
+## 4. Support requests and miscellaneous
+
+For support requests or any other topics not related to the content of this repository, you can submit a post to the **ST Community** on the appropriate topic [page](https://community.st.com/s/topiccatalog).

diff --git a/Core/Include/cachel1_armv7.h b/Core/Include/cachel1_armv7.h
index abebc95..efb29d8 100644
--- a/Core/Include/cachel1_armv7.h
+++ b/Core/Include/cachel1_armv7.h

@@ -1,8 +1,8 @@
 /******************************************************************************
  * @file     cachel1_armv7.h
  * @brief    CMSIS Level 1 Cache API for Armv7-M and later
- * @version  V1.0.1
- * @date     19. April 2021
+ * @version  V1.0.3
+ * @date     17. March 2023
  ******************************************************************************/
 /*
  * Copyright (c) 2020-2021 Arm Limited. All rights reserved.
@@ -181,9 +181,15 @@
 __STATIC_FORCEINLINE void SCB_DisableDCache (void)
 {
   #if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
+    struct {
     uint32_t ccsidr;
     uint32_t sets;
     uint32_t ways;
+    } locals
+    #if ((defined(__GNUC__) || defined(__clang__)) && !defined(__OPTIMIZE__))
+       __ALIGNED(__SCB_DCACHE_LINE_SIZE)
+    #endif
+    ;
 
     SCB->CSSELR = 0U;                       /* select Level 1 data cache */
     __DSB();
@@ -191,20 +197,44 @@
     SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk;  /* disable D-Cache */
     __DSB();
 
-    ccsidr = SCB->CCSIDR;
+    #if !defined(__OPTIMIZE__)
+      /*
+       * For the endless loop issue with no optimization builds.
+       * More details, see https://github.com/ARM-software/CMSIS_5/issues/620
+       *
+       * The issue only happens when local variables are in stack. If
+       * local variables are saved in general purpose register, then the function
+       * is OK.
+       *
+       * When local variables are in stack, after disabling the cache, flush the
+       * local variables cache line for data consistency.
+       */
+      /* Clean and invalidate the local variable cache. */
+    #if defined(__ICCARM__)
+    /* As we can't align the stack to the cache line size, invalidate each of the variables */
+      SCB->DCCIMVAC = (uint32_t)&locals.sets;
+      SCB->DCCIMVAC = (uint32_t)&locals.ways;
+      SCB->DCCIMVAC = (uint32_t)&locals.ccsidr;
+    #else
+      SCB->DCCIMVAC = (uint32_t)&locals;
+    #endif
+      __DSB();
+      __ISB();
+    #endif
 
+    locals.ccsidr = SCB->CCSIDR;
                                             /* clean & invalidate D-Cache */
-    sets = (uint32_t)(CCSIDR_SETS(ccsidr));
+    locals.sets = (uint32_t)(CCSIDR_SETS(locals.ccsidr));
     do {
-      ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
+      locals.ways = (uint32_t)(CCSIDR_WAYS(locals.ccsidr));
       do {
-        SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
-                       ((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk)  );
+        SCB->DCCISW = (((locals.sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
+                       ((locals.ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk)  );
         #if defined ( __CC_ARM )
           __schedule_barrier();
         #endif
-      } while (ways-- != 0U);
-    } while(sets-- != 0U);
+      } while (locals.ways-- != 0U);
+    } while(locals.sets-- != 0U);
 
     __DSB();
     __ISB();

diff --git a/DSP/Include/arm_common_tables_f16.h b/DSP/Include/arm_common_tables_f16.h
index f40c1a4..f9a63fe 100644
--- a/DSP/Include/arm_common_tables_f16.h
+++ b/DSP/Include/arm_common_tables_f16.h

@@ -3,8 +3,8 @@
  * Title:        arm_common_tables_f16.h
  * Description:  Extern declaration for common tables
  *
- * @version  V1.9.0
- * @date     23 April 2021
+ * @version  V1.10.0
+ * @date     08 July 2021
  *
  * Target Processor: Cortex-M and Cortex-A cores
  * -------------------------------------------------------------------- */

diff --git a/DSP/Include/dsp/bayes_functions_f16.h b/DSP/Include/dsp/bayes_functions_f16.h
index f2c9ad8..5c4ae42 100644
--- a/DSP/Include/dsp/bayes_functions_f16.h
+++ b/DSP/Include/dsp/bayes_functions_f16.h

@@ -1,8 +1,8 @@
 /******************************************************************************
  * @file     bayes_functions_f16.h
  * @brief    Public header file for CMSIS DSP Library
- * @version  V1.9.0
- * @date     23 April 2021
+ * @version  V1.10.0
+ * @date     08 July 2021
  * Target Processor: Cortex-M and Cortex-A cores
  ******************************************************************************/
 /*

diff --git a/DSP/Include/dsp/complex_math_functions_f16.h b/DSP/Include/dsp/complex_math_functions_f16.h
index da78559..b17f931 100644
--- a/DSP/Include/dsp/complex_math_functions_f16.h
+++ b/DSP/Include/dsp/complex_math_functions_f16.h

@@ -1,8 +1,8 @@
 /******************************************************************************
  * @file     complex_math_functions_f16.h
  * @brief    Public header file for CMSIS DSP Library
- * @version  V1.9.0
- * @date     23 April 2021
+ * @version  V1.10.0
+ * @date     08 July 2021
  * Target Processor: Cortex-M and Cortex-A cores
  ******************************************************************************/
 /*

diff --git a/DSP/Include/dsp/controller_functions_f16.h b/DSP/Include/dsp/controller_functions_f16.h
index b0bdd78..8fae483 100644
--- a/DSP/Include/dsp/controller_functions_f16.h
+++ b/DSP/Include/dsp/controller_functions_f16.h

@@ -1,8 +1,8 @@
 /******************************************************************************
  * @file     controller_functions_f16.h
  * @brief    Public header file for CMSIS DSP Library
- * @version  V1.9.0
- * @date     23 April 2021
+ * @version  V1.10.0
+ * @date     08 July 2021
  * Target Processor: Cortex-M and Cortex-A cores
  ******************************************************************************/
 /*

diff --git a/DSP/Include/dsp/matrix_functions_f16.h b/DSP/Include/dsp/matrix_functions_f16.h
index 62876a7..3693ec4 100644
--- a/DSP/Include/dsp/matrix_functions_f16.h
+++ b/DSP/Include/dsp/matrix_functions_f16.h

@@ -1,8 +1,8 @@
 /******************************************************************************
  * @file     matrix_functions_f16.h
  * @brief    Public header file for CMSIS DSP Library
- * @version  V1.9.0
- * @date     23 April 2021
+ * @version  V1.10.0
+ * @date     08 July 2021
  * Target Processor: Cortex-M and Cortex-A cores
  ******************************************************************************/
 /*

diff --git a/DSP/Include/dsp/statistics_functions_f16.h b/DSP/Include/dsp/statistics_functions_f16.h
index 8ed3a84..124c0a0 100644
--- a/DSP/Include/dsp/statistics_functions_f16.h
+++ b/DSP/Include/dsp/statistics_functions_f16.h

@@ -1,8 +1,8 @@
 /******************************************************************************
  * @file     statistics_functions_f16.h
  * @brief    Public header file for CMSIS DSP Library
- * @version  V1.9.0
- * @date     23 April 2021
+ * @version  V1.10.0
+ * @date     08 July 2021
  * Target Processor: Cortex-M and Cortex-A cores
  ******************************************************************************/
 /*
@@ -150,6 +150,29 @@
         float16_t * pResult,
         uint32_t * pIndex);
 
+    /**
+   * @brief  Minimum value of absolute values of a floating-point vector.
+   * @param[in]  pSrc       is input pointer
+   * @param[in]  blockSize  is the number of samples to process
+   * @param[out] pResult    is output pointer
+   */
+  void arm_absmin_no_idx_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult);
+
+/**
+ * @brief Maximum value of a floating-point vector.
+ * @param[in]  pSrc       points to the input buffer
+ * @param[in]  blockSize  length of the input vector
+ * @param[out] pResult    maximum value returned here
+ */
+  void arm_absmax_no_idx_f16(
+  const float16_t * pSrc,
+        uint32_t blockSize,
+        float16_t * pResult);
+
+
 /**
  * @brief Entropy
  *
@@ -208,7 +231,32 @@
       uint32_t   blockSize,
       float16_t *pResult);
 
+/**
+    @brief         Minimum value of a floating-point vector.
+    @param[in]     pSrc       points to the input vector
+    @param[in]     blockSize  number of samples in input vector
+    @param[out]    pResult    minimum value returned here
+    @return        none
+   */
+  void arm_min_no_idx_f16(
+      const float16_t *pSrc,
+      uint32_t   blockSize,
+      float16_t *pResult);
 
+/**
+  @brief         Mean square error between two half precision float vectors.
+  @param[in]     pSrcA       points to the first input vector
+  @param[in]     pSrcB       points to the second input vector
+  @param[in]     blockSize  number of samples in input vector
+  @param[out]    pResult    mean square error
+  @return        none 
+*/
+  
+void arm_mse_f16(
+  const float16_t * pSrcA,
+  const float16_t * pSrcB,
+        uint32_t blockSize,
+        float16_t * pResult);
 
 #endif /*defined(ARM_FLOAT16_SUPPORTED)*/
 #ifdef   __cplusplus

diff --git a/DSP/Include/dsp/support_functions_f16.h b/DSP/Include/dsp/support_functions_f16.h
index 47b6535..bc3f266 100644
--- a/DSP/Include/dsp/support_functions_f16.h
+++ b/DSP/Include/dsp/support_functions_f16.h

@@ -1,8 +1,8 @@
 /******************************************************************************
  * @file     support_functions_f16.h
  * @brief    Public header file for CMSIS DSP Library
- * @version  V1.9.0
- * @date     23 April 2021
+ * @version  V1.10.0
+ * @date     08 July 2021
  * Target Processor: Cortex-M and Cortex-A cores
  ******************************************************************************/
 /*
@@ -121,6 +121,64 @@
   , uint32_t nbVectors
   , uint32_t vecDim);
 
+
+/**
+  @ingroup groupSupport
+ */
+
+/**
+ * @defgroup typecast Typecasting
+ */
+
+/**
+  @addtogroup typecast
+  @{
+ */
+
+/**
+   * @brief  Interpret a f16 as an s16 value
+   * @param[in] x  input value.
+   * @return  return value.
+   * 
+   * @par    Description
+   *            It is a typecast. No conversion of the float to int is done.
+   *            The memcpy will be optimized out by the compiler.
+   *            memcpy is used to prevent type punning issues.
+   *            With gcc, -fno-builtins MUST not be used or the
+   *            memcpy will not be optimized out.
+   */
+__STATIC_INLINE int16_t arm_typecast_s16_f16(float16_t x)
+{
+   int16_t res;
+   res=*(int16_t*)memcpy((char*)&res,(char*)&x,sizeof(float16_t));
+   return(res);
+}
+
+/**
+   * @brief  Interpret an s16 as an f16 value
+   * @param[in] x  input value.
+   * @return  return value.
+   * 
+   * @par    Description
+   *            It is a typecast. No conversion of the int to float is done.
+   *            The memcpy will be optimized out by the compiler.
+   *            memcpy is used to prevent type punning issues.
+   *            With gcc, -fno-builtins MUST not be used or the
+   *            memcpy will not be optimized out.
+   */
+__STATIC_INLINE float16_t arm_typecast_f16_s16(int16_t x)
+{
+   float16_t res;
+   res=*(float16_t*)memcpy((char*)&res,(char*)&x,sizeof(int16_t));
+   return(res);
+}
+
+
+/**
+  @} end of typecast group
+ */
+
+
 #endif /*defined(ARM_FLOAT16_SUPPORTED)*/
 #ifdef   __cplusplus
 }

diff --git a/DSP/Include/dsp/svm_functions_f16.h b/DSP/Include/dsp/svm_functions_f16.h
index b80ed7c..7c9fbab 100644
--- a/DSP/Include/dsp/svm_functions_f16.h
+++ b/DSP/Include/dsp/svm_functions_f16.h

@@ -1,8 +1,8 @@
 /******************************************************************************
  * @file     svm_functions_f16.h
  * @brief    Public header file for CMSIS DSP Library
- * @version  V1.9.0
- * @date     23 April 2021
+ * @version  V1.10.0
+ * @date     08 July 2021
  * Target Processor: Cortex-M and Cortex-A cores
  ******************************************************************************/
 /*
@@ -34,6 +34,7 @@
 #include "dsp/utils.h"
 #include "dsp/svm_defines.h"
 
+
 #ifdef   __cplusplus
 extern "C"
 {
@@ -57,24 +58,6 @@
  * 
  */
 
-/**
- * @brief Integer exponentiation
- * @param[in]    x           value
- * @param[in]    nb          integer exponent >= 1
- * @return x^nb
- *
- */
-__STATIC_INLINE float16_t arm_exponent_f16(float16_t x, int32_t nb)
-{
-    float16_t r = x;
-    nb --;
-    while(nb > 0)
-    {
-        r = r * x;
-        nb--;
-    }
-    return(r);
-}
 
 
 /**

diff --git a/DSP/Include/dsp/transform_functions_f16.h b/DSP/Include/dsp/transform_functions_f16.h
index 67f1adc..4d8cc22 100644
--- a/DSP/Include/dsp/transform_functions_f16.h
+++ b/DSP/Include/dsp/transform_functions_f16.h

@@ -1,8 +1,8 @@
 /******************************************************************************
  * @file     transform_functions_f16.h
  * @brief    Public header file for CMSIS DSP Library
- * @version  V1.9.0
- * @date     23 April 2021
+ * @version  V1.10.0
+ * @date     08 July 2021
  * Target Processor: Cortex-M and Cortex-A cores
  ******************************************************************************/
 /*
@@ -147,6 +147,57 @@
   void arm_cfft_radix2_f16(
   const arm_cfft_radix2_instance_f16 * S,
         float16_t * pSrc);
+
+  /**
+   * @brief Instance structure for the Floating-point MFCC function.
+   */
+typedef struct
+  {
+     const float16_t *dctCoefs; /**< Internal DCT coefficients */
+     const float16_t *filterCoefs; /**< Internal Mel filter coefficients */ 
+     const float16_t *windowCoefs; /**< Windowing coefficients */ 
+     const uint32_t *filterPos; /**< Internal Mel filter positions in spectrum */ 
+     const uint32_t *filterLengths; /**< Internal Mel filter  lengths */ 
+     uint32_t fftLen; /**< FFT length */
+     uint32_t nbMelFilters; /**< Number of Mel filters */
+     uint32_t nbDctOutputs; /**< Number of DCT outputs */
+#if defined(ARM_MFCC_CFFT_BASED)
+     /* Implementation of the MFCC is using a CFFT */
+     arm_cfft_instance_f16 cfft; /**< Internal CFFT instance */
+#else
+     /* Implementation of the MFCC is using a RFFT (default) */
+     arm_rfft_fast_instance_f16 rfft;
+#endif
+  } arm_mfcc_instance_f16 ;
+
+arm_status arm_mfcc_init_f16(
+  arm_mfcc_instance_f16 * S,
+  uint32_t fftLen,
+  uint32_t nbMelFilters,
+  uint32_t nbDctOutputs,
+  const float16_t *dctCoefs,
+  const uint32_t *filterPos,
+  const uint32_t *filterLengths,
+  const float16_t *filterCoefs,
+  const float16_t *windowCoefs
+  );
+
+
+/**
+  @brief         MFCC F16
+  @param[in]    S       points to the mfcc instance structure
+  @param[in]     pSrc points to the input samples
+  @param[out]     pDst  points to the output MFCC values
+  @param[inout]     pTmp  points to a temporary buffer of complex
+  @return        none
+ */
+  void arm_mfcc_f16(
+  const arm_mfcc_instance_f16 * S,
+  float16_t *pSrc,
+  float16_t *pDst,
+  float16_t *pTmp
+  );
+
   
 #endif /* defined(ARM_FLOAT16_SUPPORTED)*/
 

diff --git a/DSP/Source/BayesFunctions/arm_gaussian_naive_bayes_predict_f16.c b/DSP/Source/BayesFunctions/arm_gaussian_naive_bayes_predict_f16.c
index b918f70..e3b2ef6 100644
--- a/DSP/Source/BayesFunctions/arm_gaussian_naive_bayes_predict_f16.c
+++ b/DSP/Source/BayesFunctions/arm_gaussian_naive_bayes_predict_f16.c

@@ -33,7 +33,6 @@
 #include <limits.h>
 #include <math.h>
 
-#define PI_F 3.1415926535897932384626433832795f16
 
 /**
  * @addtogroup groupBayes
@@ -132,7 +131,7 @@
         tmp = -0.5f16 * (_Float16)vecAddAcrossF16Mve(vacc1);
         tmp -= 0.5f16 * (_Float16)vecAddAcrossF16Mve(vacc2);
 
-        *buffer = tmp + *pLogPrior++;
+        *buffer = (_Float16)tmp + (_Float16)*pLogPrior++;
         buffer++;
     }
 
@@ -176,20 +175,20 @@
         acc2 = 0.0f16;
         for(nbDim = 0; nbDim < S->vectorDimension; nbDim++)
         {
-           sigma = *pSigma + S->epsilon;
-           acc1 += logf(2.0f16 * (_Float16)PI_F * sigma);
-           acc2 += (*pIn - *pTheta) * (*pIn - *pTheta) / sigma;
+           sigma = (_Float16)*pSigma + (_Float16)S->epsilon;
+           acc1 += (_Float16)logf(2.0f * PI * (float32_t)sigma);
+           acc2 += ((_Float16)*pIn - (_Float16)*pTheta) * ((_Float16)*pIn - (_Float16)*pTheta) / (_Float16)sigma;
 
            pIn++;
            pTheta++;
            pSigma++;
         }
 
-        tmp = -0.5f16 * acc1;
-        tmp -= 0.5f16 * acc2;
+        tmp = -0.5f16 * (_Float16)acc1;
+        tmp -= 0.5f16 * (_Float16)acc2;
 
 
-        *buffer = tmp + logf(*pPrior++);
+        *buffer = (_Float16)tmp + (_Float16)logf((float32_t)*pPrior++);
         buffer++;
     }
 

diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f16.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f16.c
index 05d7b97..6cf871e 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f16.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_f16.c

@@ -112,7 +112,7 @@
   
       /* Calculate Complex Conjugate and store result in destination buffer. */
       *pDst++ =  *pSrc++;
-      *pDst++ = -*pSrc++;
+      *pDst++ = -(_Float16)*pSrc++;
   
       /* Decrement loop counter */
       blkCnt--;
@@ -139,16 +139,16 @@
 
     /* Calculate Complex Conjugate and store result in destination buffer. */
     *pDst++ =  *pSrc++;
-    *pDst++ = -*pSrc++;
+    *pDst++ = -(_Float16)*pSrc++;
 
     *pDst++ =  *pSrc++;
-    *pDst++ = -*pSrc++;
+    *pDst++ = -(_Float16)*pSrc++;
 
     *pDst++ =  *pSrc++;
-    *pDst++ = -*pSrc++;
+    *pDst++ = -(_Float16)*pSrc++;
 
     *pDst++ =  *pSrc++;
-    *pDst++ = -*pSrc++;
+    *pDst++ = -(_Float16)*pSrc++;
 
     /* Decrement loop counter */
     blkCnt--;
@@ -170,7 +170,7 @@
 
     /* Calculate Complex Conjugate and store result in destination buffer. */
     *pDst++ =  *pSrc++;
-    *pDst++ = -*pSrc++;
+    *pDst++ = -(_Float16)*pSrc++;
 
     /* Decrement loop counter */
     blkCnt--;
@@ -182,4 +182,4 @@
 /**
   @} end of cmplx_conj group
  */
-#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
\ No newline at end of file
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */

diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
index c076eff..fb350a0 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_conj_q15.c

@@ -122,11 +122,11 @@
 
     /* Calculate Complex Conjugate and store result in destination buffer. */
 
-    #if defined (ARM_MATH_DSP)
-    in1 = read_q15x2_ia ((q15_t **) &pSrc);
-    in2 = read_q15x2_ia ((q15_t **) &pSrc);
-    in3 = read_q15x2_ia ((q15_t **) &pSrc);
-    in4 = read_q15x2_ia ((q15_t **) &pSrc);
+#if defined (ARM_MATH_DSP)
+    in1 = read_q15x2_ia (&pSrc);
+    in2 = read_q15x2_ia (&pSrc);
+    in3 = read_q15x2_ia (&pSrc);
+    in4 = read_q15x2_ia (&pSrc);
 
 #ifndef ARM_MATH_BIG_ENDIAN
     in1 = __QASX(0, in1);

diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f16.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f16.c
index f75d04e..ff45a9f 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f16.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_dot_prod_f16.c

@@ -285,4 +285,4 @@
   @} end of cmplx_dot_prod group
  */
 
-#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
\ No newline at end of file
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */

diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f16.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f16.c
index c2f3198..1f93598 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f16.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_f16.c

@@ -238,4 +238,4 @@
   @} end of cmplx_mag group
  */
 
-#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
\ No newline at end of file
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */

diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
index e29a3d5..10ce335 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_q15.c

@@ -47,6 +47,11 @@
   @par           Scaling and Overflow Behavior
                    The function implements 1.15 by 1.15 multiplications and finally output is converted into 2.14 format.
  */
+
+/* Sqrt q31 is used otherwise accuracy is not good enough
+           for small values and for some applications it is
+           an issue.
+        */
 #if defined(ARM_MATH_MVEI) && !defined(ARM_MATH_AUTOVECTORIZE)
 
 #include "arm_helium_utils.h"
@@ -60,23 +65,52 @@
     int32_t blockSize = numSamples;  /* loop counters */
     uint32_t  blkCnt;           /* loop counters */
     q15x8x2_t vecSrc;
-    q15x8_t sum;
+    q31x4_t prod0;
+    q31x4_t prod1;
+
     q31_t in;
     q31_t acc0;
+    q31x4_t acc0V;
+    q31x4_t acc1V;
+
+    q31_t res;
+    q15x8_t resV;
 
     blkCnt = blockSize >> 3;
     while (blkCnt > 0U)
     {
         vecSrc = vld2q(pSrc);  
         pSrc += 16;
-        sum = vqaddq(vmulhq(vecSrc.val[0], vecSrc.val[0]),
-                     vmulhq(vecSrc.val[1], vecSrc.val[1]));
 
-        sum = vshrq(sum, 1);
+        acc0V = vdupq_n_s32(0);
+        acc1V = vdupq_n_s32(0);
 
-        sum = FAST_VSQRT_Q15(sum);
+        prod0 = vmullbq_int_s16(vecSrc.val[0], vecSrc.val[0]);
+        acc0V = vqaddq_s32(acc0V,prod0);
 
-        vst1q(pDst, sum); 
+        prod0 = vmullbq_int_s16(vecSrc.val[1], vecSrc.val[1]);
+        acc0V = vqaddq_s32(acc0V,prod0);
+
+
+        prod1 = vmulltq_int_s16(vecSrc.val[0], vecSrc.val[0]);
+        acc1V = vqaddq_s32(acc1V,prod1);
+
+        prod1 = vmulltq_int_s16(vecSrc.val[1], vecSrc.val[1]);
+        acc1V = vqaddq_s32(acc1V,prod1);
+
+       
+
+        acc0V = vshrq(acc0V, 1);
+        acc1V = vshrq(acc1V, 1);
+
+        acc0V = FAST_VSQRT_Q31(acc0V);
+        acc1V = FAST_VSQRT_Q31(acc1V);
+
+        resV = vdupq_n_s16(0);
+        resV = vqshrnbq_n_s32(resV,acc0V,16);
+        resV = vqshrntq_n_s32(resV,acc1V,16);
+
+        vst1q(pDst, resV); 
         pDst += 8;
         /*
          * Decrement the blockSize loop counter
@@ -97,7 +131,8 @@
       acc0 = __SMUAD(in, in);
   
       /* store result in 2.14 format in destination buffer. */
-      arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+      arm_sqrt_q31(acc0  >> 1 , &res);
+      *pDst++ = res >> 16;
   
   
       /* Decrement loop counter */
@@ -111,6 +146,7 @@
         q15_t * pDst,
         uint32_t numSamples)
 {
+        q31_t res; /* temporary result */
         uint32_t blkCnt;                               /* Loop counter */
 
 #if defined (ARM_MATH_DSP)
@@ -131,22 +167,26 @@
     /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
 
 #if defined (ARM_MATH_DSP)
-    in = read_q15x2_ia ((q15_t **) &pSrc);
+    in = read_q15x2_ia (&pSrc);
     acc0 = __SMUAD(in, in);
     /* store result in 2.14 format in destination buffer. */
-    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+    arm_sqrt_q31(acc0  >> 1 , &res);
+    *pDst++ = res >> 16;
 
-    in = read_q15x2_ia ((q15_t **) &pSrc);
+    in = read_q15x2_ia (&pSrc);
     acc0 = __SMUAD(in, in);
-    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+    arm_sqrt_q31(acc0  >> 1 , &res);
+    *pDst++ = res >> 16;
 
-    in = read_q15x2_ia ((q15_t **) &pSrc);
+    in = read_q15x2_ia (&pSrc);
     acc0 = __SMUAD(in, in);
-    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+    arm_sqrt_q31(acc0  >> 1 , &res);
+    *pDst++ = res >> 16;
 
-    in = read_q15x2_ia ((q15_t **) &pSrc);
+    in = read_q15x2_ia (&pSrc);
     acc0 = __SMUAD(in, in);
-    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+    arm_sqrt_q31(acc0  >> 1 , &res);
+    *pDst++ = res >> 16;
 #else
     real = *pSrc++;
     imag = *pSrc++;
@@ -154,25 +194,29 @@
     acc1 = ((q31_t) imag * imag);
 
     /* store result in 2.14 format in destination buffer. */
-    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+    arm_sqrt_q31((acc0 + acc1) >> 1 , &res);
+    *pDst++ = res >> 16;
 
     real = *pSrc++;
     imag = *pSrc++;
     acc0 = ((q31_t) real * real);
     acc1 = ((q31_t) imag * imag);
-    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+    arm_sqrt_q31((acc0 + acc1) >> 1 , &res);
+    *pDst++ = res >> 16;
 
     real = *pSrc++;
     imag = *pSrc++;
     acc0 = ((q31_t) real * real);
     acc1 = ((q31_t) imag * imag);
-    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+    arm_sqrt_q31((acc0 + acc1) >> 1 , &res);
+    *pDst++ = res >> 16;
 
     real = *pSrc++;
     imag = *pSrc++;
     acc0 = ((q31_t) real * real);
     acc1 = ((q31_t) imag * imag);
-    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+    arm_sqrt_q31((acc0 + acc1) >> 1 , &res);
+    *pDst++ = res >> 16;
 #endif /* #if defined (ARM_MATH_DSP) */
 
     /* Decrement loop counter */
@@ -194,11 +238,12 @@
     /* C[0] = sqrt(A[0] * A[0] + A[1] * A[1]) */
 
 #if defined (ARM_MATH_DSP)
-    in = read_q15x2_ia ((q15_t **) &pSrc);
+    in = read_q15x2_ia (&pSrc);
     acc0 = __SMUAD(in, in);
 
     /* store result in 2.14 format in destination buffer. */
-    arm_sqrt_q15((q15_t) (acc0 >> 17), pDst++);
+    arm_sqrt_q31(acc0  >> 1 , &res);
+    *pDst++ = res >> 16;
 #else
     real = *pSrc++;
     imag = *pSrc++;
@@ -206,7 +251,9 @@
     acc1 = ((q31_t) imag * imag);
 
     /* store result in 2.14 format in destination buffer. */
-    arm_sqrt_q15((q15_t) (((q63_t) acc0 + acc1) >> 17), pDst++);
+    arm_sqrt_q31((acc0 + acc1) >> 1 , &res);
+    *pDst++ = res >> 16;
+ 
 #endif
 
     /* Decrement loop counter */

diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f16.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f16.c
index 5d5a3a2..df3cbec 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f16.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_f16.c

@@ -171,4 +171,4 @@
   @} end of cmplx_mag_squared group
  */
 
-#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
\ No newline at end of file
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */

diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
index 42fc442..727699e 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_mag_squared_q15.c

@@ -131,20 +131,20 @@
     /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
 
 #if defined (ARM_MATH_DSP)
-    in = read_q15x2_ia ((q15_t **) &pSrc);
+    in = read_q15x2_ia (&pSrc);
     acc0 = __SMUAD(in, in);
     /* store result in 3.13 format in destination buffer. */
     *pDst++ = (q15_t) (acc0 >> 17);
 
-    in = read_q15x2_ia ((q15_t **) &pSrc);
+    in = read_q15x2_ia (&pSrc);
     acc0 = __SMUAD(in, in);
     *pDst++ = (q15_t) (acc0 >> 17);
 
-    in = read_q15x2_ia ((q15_t **) &pSrc);
+    in = read_q15x2_ia (&pSrc);
     acc0 = __SMUAD(in, in);
     *pDst++ = (q15_t) (acc0 >> 17);
 
-    in = read_q15x2_ia ((q15_t **) &pSrc);
+    in = read_q15x2_ia (&pSrc);
     acc0 = __SMUAD(in, in);
     *pDst++ = (q15_t) (acc0 >> 17);
 #else
@@ -193,7 +193,7 @@
     /* C[0] = (A[0] * A[0] + A[1] * A[1]) */
 
 #if defined (ARM_MATH_DSP)
-    in = read_q15x2_ia ((q15_t **) &pSrc);
+    in = read_q15x2_ia (&pSrc);
     acc0 = __SMUAD(in, in);
 
     /* store result in 3.13 format in destination buffer. */

diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f16.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f16.c
index 3409450..68e1d1b 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f16.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_cmplx_f16.c

@@ -268,4 +268,4 @@
   @} end of CmplxByCmplxMult group
  */
 
-#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
\ No newline at end of file
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */

diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f16.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f16.c
index 248858b..f5909fc 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f16.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_f16.c

@@ -141,20 +141,20 @@
 
     in = *pSrcReal++;
     /* store result in destination buffer. */
-    *pCmplxDst++ = *pSrcCmplx++ * in;
-    *pCmplxDst++ = *pSrcCmplx++ * in;
+    *pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
+    *pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
 
     in = *pSrcReal++;
-    *pCmplxDst++ = *pSrcCmplx++ * in;
-    *pCmplxDst++ = *pSrcCmplx++ * in;
+    *pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
+    *pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
 
     in = *pSrcReal++;
-    *pCmplxDst++ = *pSrcCmplx++ * in;
-    *pCmplxDst++ = *pSrcCmplx++ * in;
+    *pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
+    *pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
 
     in = *pSrcReal++;
-    *pCmplxDst++ = *pSrcCmplx++* in;
-    *pCmplxDst++ = *pSrcCmplx++ * in;
+    *pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
+    *pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
 
     /* Decrement loop counter */
     blkCnt--;
@@ -177,8 +177,8 @@
 
     in = *pSrcReal++;
     /* store result in destination buffer. */
-    *pCmplxDst++ = *pSrcCmplx++ * in;
-    *pCmplxDst++ = *pSrcCmplx++ * in;
+    *pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
+    *pCmplxDst++ = (_Float16)*pSrcCmplx++ * (_Float16)in;
 
     /* Decrement loop counter */
     blkCnt--;
@@ -191,4 +191,4 @@
   @} end of CmplxByRealMult group
  */
 
-#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */
\ No newline at end of file
+#endif /* #if defined(ARM_FLOAT16_SUPPORTED) */

diff --git a/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c b/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
index a43383b..84e5ae3 100644
--- a/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c
+++ b/DSP/Source/ComplexMathFunctions/arm_cmplx_mult_real_q15.c

@@ -133,10 +133,10 @@
 
 #if defined (ARM_MATH_DSP)
     /* read 2 complex numbers both real and imaginary from complex input buffer */
-    inA1 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
-    inA2 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
+    inA1 = read_q15x2_ia (&pSrcCmplx);
+    inA2 = read_q15x2_ia (&pSrcCmplx);
     /* read 2 real values at a time from real input buffer */
-    inB1 = read_q15x2_ia ((q15_t **) &pSrcReal);
+    inB1 = read_q15x2_ia (&pSrcReal);
 
     /* multiply complex number with real numbers */
 #ifndef ARM_MATH_BIG_ENDIAN
@@ -161,9 +161,9 @@
     write_q15x2_ia (&pCmplxDst, __PKHBT(out1, out2, 16));
     write_q15x2_ia (&pCmplxDst, __PKHBT(out3, out4, 16));
 
-    inA1 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
-    inA2 = read_q15x2_ia ((q15_t **) &pSrcCmplx);
-    inB1 = read_q15x2_ia ((q15_t **) &pSrcReal);
+    inA1 = read_q15x2_ia (&pSrcCmplx);
+    inA2 = read_q15x2_ia (&pSrcCmplx);
+    inB1 = read_q15x2_ia (&pSrcReal);
 
 #ifndef ARM_MATH_BIG_ENDIAN
     mul1 = (q31_t) ((q15_t) (inA1)       * (q15_t) (inB1));

diff --git a/DSP/Source/ControllerFunctions/ControllerFunctions.c b/DSP/Source/ControllerFunctions/ControllerFunctions.c
index e406ac2..9abd328 100644
--- a/DSP/Source/ControllerFunctions/ControllerFunctions.c
+++ b/DSP/Source/ControllerFunctions/ControllerFunctions.c

@@ -43,4 +43,4 @@
 #include "arm_sin_cos_q31.c"
 #endif
 
-#endif
\ No newline at end of file
+#endif

diff --git a/DSP/Source/SVMFunctions/arm_svm_linear_predict_f16.c b/DSP/Source/SVMFunctions/arm_svm_linear_predict_f16.c
index 494ef9a..fe907e5 100644
--- a/DSP/Source/SVMFunctions/arm_svm_linear_predict_f16.c
+++ b/DSP/Source/SVMFunctions/arm_svm_linear_predict_f16.c

@@ -298,9 +298,9 @@
         dot=0;
         for(j=0; j < S->vectorDimension; j++)
         {
-            dot = dot + in[j]* *pSupport++;
+            dot = (_Float16)dot + (_Float16)in[j]* (_Float16)*pSupport++;
         }
-        sum += S->dualCoefficients[i] * dot;
+        sum += (_Float16)S->dualCoefficients[i] * (_Float16)dot;
     }
     *pResult=S->classes[STEP(sum)];
 }

diff --git a/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f16.c b/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f16.c
index e3e2d6a..724f286 100644
--- a/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f16.c
+++ b/DSP/Source/SVMFunctions/arm_svm_polynomial_predict_f16.c

@@ -33,6 +33,28 @@
 #include <limits.h>
 #include <math.h>
 
+#if !defined(ARM_MATH_MVE_FLOAT16) || defined(ARM_MATH_AUTOVECTORIZE)
+
+/*
+
+_Float16 is not supported in g++ so we avoid putting _Float16 definitions
+in the public headers.
+
+This function should at some point be moved in FastMath.
+
+*/
+__STATIC_INLINE float16_t arm_exponent_f16(float16_t x, int32_t nb)
+{
+    float16_t r = x;
+    nb --;
+    while(nb > 0)
+    {
+        r = (_Float16)r * (_Float16)x;
+        nb--;
+    }
+    return(r);
+}
+#endif
 
 /**
  * @addtogroup polysvm
@@ -40,6 +62,13 @@
  */
 
 
+
+
+#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
+
+#include "arm_helium_utils.h"
+#include "arm_vec_math_f16.h"
+
 /**
  * @brief SVM polynomial prediction
  * @param[in]    S          Pointer to an instance of the polynomial SVM structure.
@@ -48,12 +77,6 @@
  * @return none.
  *
  */
-
-#if defined(ARM_MATH_MVE_FLOAT16) && !defined(ARM_MATH_AUTOVECTORIZE)
-
-#include "arm_helium_utils.h"
-#include "arm_vec_math_f16.h"
-
 void arm_svm_polynomial_predict_f16(
     const arm_svm_polynomial_instance_f16 *S,
     const float16_t * in,
@@ -303,6 +326,16 @@
 }
 
 #else
+
+
+/**
+ * @brief SVM polynomial prediction
+ * @param[in]    S          Pointer to an instance of the polynomial SVM structure.
+ * @param[in]    in         Pointer to input vector
+ * @param[out]   pResult    Decision value
+ * @return none.
+ *
+ */
 void arm_svm_polynomial_predict_f16(
     const arm_svm_polynomial_instance_f16 *S,
     const float16_t * in,
@@ -318,9 +351,9 @@
         dot=0;
         for(j=0; j < S->vectorDimension; j++)
         {
-            dot = dot + (_Float16)in[j]* (_Float16)*pSupport++;
+            dot = (_Float16)dot + (_Float16)in[j]* (_Float16)*pSupport++;
         }
-        sum += S->dualCoefficients[i] * (_Float16)arm_exponent_f16(S->gamma * dot + S->coef0, S->degree);
+        sum += (_Float16)S->dualCoefficients[i] * (_Float16)arm_exponent_f16((_Float16)S->gamma * (_Float16)dot + (_Float16)S->coef0, S->degree);
     }
 
     *pResult=S->classes[STEP(sum)];

diff --git a/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f16.c b/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f16.c
index 7724fda..91afcc1 100644
--- a/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f16.c
+++ b/DSP/Source/SVMFunctions/arm_svm_rbf_predict_f16.c

@@ -70,7 +70,7 @@
     uint32_t         blkCnt;     /* loop counters */
     const float16_t *pDualCoef = S->dualCoefficients;
     _Float16       sum = S->intercept;
-    f16x8_t         vSum = vdupq_n_f16(0);
+    f16x8_t         vSum = vdupq_n_f16(0.0f16);
 
     row = numRows;
 
@@ -97,10 +97,10 @@
         /*
          * reset accumulators
          */
-        acc0 = vdupq_n_f16(0.0f);
-        acc1 = vdupq_n_f16(0.0f);
-        acc2 = vdupq_n_f16(0.0f);
-        acc3 = vdupq_n_f16(0.0f);
+        acc0 = vdupq_n_f16(0.0f16);
+        acc1 = vdupq_n_f16(0.0f16);
+        acc2 = vdupq_n_f16(0.0f16);
+        acc3 = vdupq_n_f16(0.0f16);
 
         pSrcA0Vec = pInA0;
         pSrcA1Vec = pInA1;
@@ -170,7 +170,7 @@
 
         vSum =
             vfmaq_m_f16(vSum, vld1q(pDualCoef),
-                      vexpq_f16(vmulq_n_f16(vtmp, -S->gamma)),vctp16q(4));
+                      vexpq_f16(vmulq_n_f16(vtmp, -(_Float16)S->gamma)),vctp16q(4));
         pDualCoef += 4;
         pSrcA += numCols * 4;
         /*
@@ -199,8 +199,8 @@
         /*
          * reset accumulators
          */
-        acc0 = vdupq_n_f16(0.0f);
-        acc1 = vdupq_n_f16(0.0f);
+        acc0 = vdupq_n_f16(0.0f16);
+        acc1 = vdupq_n_f16(0.0f16);
         pSrcA0Vec = pInA0;
         pSrcA1Vec = pInA1;
 
@@ -248,7 +248,7 @@
 
         vSum =
             vfmaq_m_f16(vSum, vld1q(pDualCoef),
-                        vexpq_f16(vmulq_n_f16(vtmp, -S->gamma)), vctp16q(2));
+                        vexpq_f16(vmulq_n_f16(vtmp, -(_Float16)S->gamma)), vctp16q(2));
         pDualCoef += 2;
 
         pSrcA += numCols * 2;
@@ -309,12 +309,12 @@
 
         vSum =
             vfmaq_m_f16(vSum, vld1q(pDualCoef),
-                        vexpq_f16(vmulq_n_f16(vtmp, -S->gamma)), vctp16q(1));
+                        vexpq_f16(vmulq_n_f16(vtmp, -(_Float16)S->gamma)), vctp16q(1));
 
     }
 
 
-    sum += vecAddAcrossF16Mve(vSum);
+    sum += (_Float16)vecAddAcrossF16Mve(vSum);
     *pResult = S->classes[STEP(sum)];
 }
 
@@ -337,7 +337,7 @@
             dot = dot + SQ((_Float16)in[j] - (_Float16) *pSupport);
             pSupport++;
         }
-        sum += (_Float16)S->dualCoefficients[i] * (_Float16)expf(-(_Float16)S->gamma * dot);
+        sum += (_Float16)S->dualCoefficients[i] * (_Float16)expf((float32_t)(-(_Float16)S->gamma * (_Float16)dot));
     }
     *pResult=S->classes[STEP(sum)];
 }

diff --git a/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f16.c b/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f16.c
index 670806b..e2d541f 100644
--- a/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f16.c
+++ b/DSP/Source/SVMFunctions/arm_svm_sigmoid_predict_f16.c

@@ -295,7 +295,7 @@
                         vtanhq_f16(vaddq_n_f16(vmulq_n_f16(vtmp, S->gamma), S->coef0)),
                         vctp16q(1));
     }
-    sum += vecAddAcrossF16Mve(vSum);
+    sum += (_Float16)vecAddAcrossF16Mve(vSum);
 
     *pResult = S->classes[STEP(sum)];
 }
@@ -316,9 +316,9 @@
         dot=0.0f16;
         for(j=0; j < S->vectorDimension; j++)
         {
-            dot = dot + (_Float16)in[j] * (_Float16)*pSupport++;
+            dot = (_Float16)dot + (_Float16)in[j] * (_Float16)*pSupport++;
         }
-        sum += (_Float16)S->dualCoefficients[i] * (_Float16)tanhf((_Float16)S->gamma * dot + (_Float16)S->coef0);
+        sum += (_Float16)S->dualCoefficients[i] * (_Float16)tanhf((float32_t)((_Float16)S->gamma * (_Float16)dot + (_Float16)S->coef0));
     }
     *pResult=S->classes[STEP(sum)];
 }

diff --git a/DSP/Source/StatisticsFunctions/CMakeLists.txt b/DSP/Source/StatisticsFunctions/CMakeLists.txt
index 48f039e..480985f 100644
--- a/DSP/Source/StatisticsFunctions/CMakeLists.txt
+++ b/DSP/Source/StatisticsFunctions/CMakeLists.txt

@@ -16,19 +16,32 @@
 target_sources(CMSISDSPStatistics PRIVATE arm_logsumexp_dot_prod_f32.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_logsumexp_f32.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_max_f32.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_max_f64.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_max_no_idx_f32.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_max_no_idx_f64.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_min_no_idx_f32.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_min_no_idx_f64.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_max_q15.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_max_q31.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_max_q7.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_max_no_idx_q31.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_max_no_idx_q15.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_max_no_idx_q7.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_mean_f32.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_mean_f64.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_mean_q15.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_mean_q31.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_mean_q7.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_min_f32.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_min_f64.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_min_q15.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_min_q31.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_min_q7.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_min_no_idx_q31.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_min_no_idx_q15.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_min_no_idx_q7.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_power_f32.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_power_f64.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_power_q15.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_power_q31.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_power_q7.c)
@@ -36,22 +49,44 @@
 target_sources(CMSISDSPStatistics PRIVATE arm_rms_q15.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_rms_q31.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_std_f32.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_std_f64.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_std_q15.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_std_q31.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_var_f32.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_var_f64.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_var_q15.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_var_q31.c)
 
 target_sources(CMSISDSPStatistics PRIVATE arm_absmax_f32.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_absmax_f64.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_absmax_q15.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_absmax_q31.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_absmax_q7.c)
 
 target_sources(CMSISDSPStatistics PRIVATE arm_absmin_f32.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_absmin_f64.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_absmin_q15.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_absmin_q31.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_absmin_q7.c)
 
+target_sources(CMSISDSPStatistics PRIVATE arm_absmax_no_idx_f32.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_absmax_no_idx_f64.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_absmax_no_idx_q15.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_absmax_no_idx_q31.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_absmax_no_idx_q7.c)
+
+target_sources(CMSISDSPStatistics PRIVATE arm_absmin_no_idx_f32.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_absmin_no_idx_f64.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_absmin_no_idx_q15.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_absmin_no_idx_q31.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_absmin_no_idx_q7.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_mse_q7.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_mse_q15.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_mse_q31.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_mse_f16.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_mse_f32.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_mse_f64.c)
+
 configLib(CMSISDSPStatistics ${ROOT})
 configDsp(CMSISDSPStatistics ${ROOT})
 
@@ -73,8 +108,10 @@
 target_sources(CMSISDSPStatistics PRIVATE arm_logsumexp_dot_prod_f16.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_logsumexp_f16.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_max_no_idx_f16.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_min_no_idx_f16.c)
 
 target_sources(CMSISDSPStatistics PRIVATE arm_absmax_f16.c)
 target_sources(CMSISDSPStatistics PRIVATE arm_absmin_f16.c)
-
+target_sources(CMSISDSPStatistics PRIVATE arm_absmax_no_idx_f16.c)
+target_sources(CMSISDSPStatistics PRIVATE arm_absmin_no_idx_f16.c)
 endif()
\ No newline at end of file

diff --git a/DSP/Source/StatisticsFunctions/StatisticsFunctions.c b/DSP/Source/StatisticsFunctions/StatisticsFunctions.c
index 74109ce..5446992 100644
--- a/DSP/Source/StatisticsFunctions/StatisticsFunctions.c
+++ b/DSP/Source/StatisticsFunctions/StatisticsFunctions.c

@@ -33,19 +33,32 @@
 #include "arm_logsumexp_dot_prod_f32.c"
 #include "arm_logsumexp_f32.c"
 #include "arm_max_f32.c"
+#include "arm_max_f64.c"
 #include "arm_max_q15.c"
 #include "arm_max_q31.c"
 #include "arm_max_q7.c"
 #include "arm_max_no_idx_f32.c"
+#include "arm_max_no_idx_f64.c"
+#include "arm_max_no_idx_q31.c"
+#include "arm_max_no_idx_q15.c"
+#include "arm_max_no_idx_q7.c"
 #include "arm_mean_f32.c"
+#include "arm_mean_f64.c"
 #include "arm_mean_q15.c"
 #include "arm_mean_q31.c"
 #include "arm_mean_q7.c"
 #include "arm_min_f32.c"
+#include "arm_min_f64.c"
 #include "arm_min_q15.c"
 #include "arm_min_q31.c"
 #include "arm_min_q7.c"
+#include "arm_min_no_idx_f32.c"
+#include "arm_min_no_idx_f64.c"
+#include "arm_min_no_idx_q31.c"
+#include "arm_min_no_idx_q15.c"
+#include "arm_min_no_idx_q7.c"
 #include "arm_power_f32.c"
+#include "arm_power_f64.c"
 #include "arm_power_q15.c"
 #include "arm_power_q31.c"
 #include "arm_power_q7.c"
@@ -53,16 +66,35 @@
 #include "arm_rms_q15.c"
 #include "arm_rms_q31.c"
 #include "arm_std_f32.c"
+#include "arm_std_f64.c"
 #include "arm_std_q15.c"
 #include "arm_std_q31.c"
 #include "arm_var_f32.c"
+#include "arm_var_f64.c"
 #include "arm_var_q15.c"
 #include "arm_var_q31.c"
 #include "arm_absmax_f32.c"
+#include "arm_absmax_f64.c"
 #include "arm_absmax_q15.c"
 #include "arm_absmax_q31.c"
 #include "arm_absmax_q7.c"
 #include "arm_absmin_f32.c"
+#include "arm_absmin_f64.c"
 #include "arm_absmin_q15.c"
 #include "arm_absmin_q31.c"
-#include "arm_absmin_q7.c"
\ No newline at end of file
+#include "arm_absmin_q7.c"
+#include "arm_absmax_no_idx_f32.c"
+#include "arm_absmax_no_idx_f64.c"
+#include "arm_absmax_no_idx_q15.c"
+#include "arm_absmax_no_idx_q31.c"
+#include "arm_absmax_no_idx_q7.c"
+#include "arm_absmin_no_idx_f32.c"
+#include "arm_absmin_no_idx_f64.c"
+#include "arm_absmin_no_idx_q15.c"
+#include "arm_absmin_no_idx_q31.c"
+#include "arm_absmin_no_idx_q7.c"
+#include "arm_mse_q7.c"
+#include "arm_mse_q15.c"
+#include "arm_mse_q31.c"
+#include "arm_mse_f32.c"
+#include "arm_mse_f64.c"

diff --git a/DSP/Source/StatisticsFunctions/StatisticsFunctionsF16.c b/DSP/Source/StatisticsFunctions/StatisticsFunctionsF16.c
index f5fab8d..510746e 100644
--- a/DSP/Source/StatisticsFunctions/StatisticsFunctionsF16.c
+++ b/DSP/Source/StatisticsFunctions/StatisticsFunctionsF16.c

@@ -38,5 +38,9 @@
 #include "arm_logsumexp_dot_prod_f16.c"
 #include "arm_logsumexp_f16.c"
 #include "arm_max_no_idx_f16.c"
+#include "arm_min_no_idx_f16.c"
 #include "arm_absmax_f16.c"
-#include "arm_absmin_f16.c"
\ No newline at end of file
+#include "arm_absmin_f16.c"
+#include "arm_absmax_no_idx_f16.c"
+#include "arm_absmin_no_idx_f16.c"
+#include "arm_mse_f16.c"

diff --git a/DSP/Source/StatisticsFunctions/arm_absmax_f16.c b/DSP/Source/StatisticsFunctions/arm_absmax_f16.c
index 473397f..4241eb5 100644
--- a/DSP/Source/StatisticsFunctions/arm_absmax_f16.c
+++ b/DSP/Source/StatisticsFunctions/arm_absmax_f16.c

@@ -152,7 +152,7 @@
   outIndex = 0U;                                                                                            \
   /* Load first input value that act as reference value for comparision */                                  \
   out = *pSrc++;                                                                                            \
-  out = (out > 0.0f16) ? out : -out;                                                                             \
+  out = ((_Float16)out > 0.0f16) ? out : -(_Float16)out;                                                                             \
   /* Initialize index of extrema value. */                                                                  \
   index = 0U;                                                                                               \
                                                                                                             \
@@ -163,9 +163,9 @@
   {                                                                                                         \
     /* Initialize cur_absmax to next consecutive values one by one */                                         \
     cur_absmax = *pSrc++;                                                                                     \
-    cur_absmax = (cur_absmax > 0.0f16) ? cur_absmax : -cur_absmax;                                                                 \
+    cur_absmax = ((_Float16)cur_absmax > 0.0f16) ? cur_absmax : -(_Float16)cur_absmax;                                                                 \
     /* compare for the extrema value */                                                                     \
-    if (cur_absmax > out)                                                                         \
+    if ((_Float16)cur_absmax > (_Float16)out)                                                                         \
     {                                                                                                       \
       /* Update the extrema value and it's index */                                                         \
       out = cur_absmax;                                                                                       \
@@ -173,24 +173,24 @@
     }                                                                                                       \
                                                                                                             \
     cur_absmax = *pSrc++;                                                                                     \
-    cur_absmax = (cur_absmax > 0.0f16) ? cur_absmax : -cur_absmax;                                                                 \
-    if (cur_absmax > out)                                                                         \
+    cur_absmax = ((_Float16)cur_absmax > 0.0f16) ? cur_absmax : -(_Float16)cur_absmax;                                                                 \
+    if ((_Float16)cur_absmax > (_Float16)out)                                                                         \
     {                                                                                                       \
       out = cur_absmax;                                                                                       \
       outIndex = index + 2U;                                                                                \
     }                                                                                                       \
                                                                                                             \
     cur_absmax = *pSrc++;                                                                                     \
-    cur_absmax = (cur_absmax > 0.0f16) ? cur_absmax : -cur_absmax;                                                                 \
-    if (cur_absmax > out)                                                                          \
+    cur_absmax = ((_Float16)cur_absmax > 0.0f16) ? cur_absmax : -(_Float16)cur_absmax;                                                                 \
+    if ((_Float16)cur_absmax > (_Float16)out)                                                                          \
     {                                                                                                       \
       out = cur_absmax;                                                                                       \
       outIndex = index + 3U;                                                                                \
     }                                                                                                       \
                                                                                                             \
     cur_absmax = *pSrc++;                                                                                     \
-    cur_absmax = (cur_absmax > 0.0f16) ? cur_absmax : -cur_absmax;                                                                 \
-    if (cur_absmax > out)                                                                          \
+    cur_absmax = ((_Float16)cur_absmax > 0.0f16) ? cur_absmax : -(_Float16)cur_absmax;                                                                 \
+    if ((_Float16)cur_absmax > (_Float16)out)                                                                          \
     {                                                                                                       \
       out = cur_absmax;                                                                                       \
       outIndex = index + 4U;                                                                                \
@@ -209,8 +209,8 @@
   while (blkCnt > 0U)                                                                                       \
   {                                                                                                         \
     cur_absmax = *pSrc++;                                                                                     \
-    cur_absmax = (cur_absmax > 0.0f16) ? cur_absmax : -cur_absmax;                                                                 \
-    if (cur_absmax > out)                                                                         \
+    cur_absmax = ((_Float16)cur_absmax > 0.0f16) ? cur_absmax : -(_Float16)cur_absmax;                                                                 \
+    if ((_Float16)cur_absmax > (_Float16)out)                                                                         \
     {                                                                                                       \
       out = cur_absmax;                                                                                       \
       outIndex = blockSize - blkCnt;                                                                        \
@@ -238,7 +238,7 @@
   outIndex = 0U;
 
   /* Load first input value that act as reference value for comparision */
-  out = fabsf(*pSrc++);
+  out = (_Float16)fabsf((float32_t)*pSrc++);
 
   /* Initialize blkCnt with number of samples */
   blkCnt = (blockSize - 1U);
@@ -246,10 +246,10 @@
   while (blkCnt > 0U)
   {
     /* Initialize maxVal to the next consecutive values one by one */
-    maxVal = fabsf(*pSrc++);
+    maxVal = (_Float16)fabsf((float32_t)*pSrc++);
 
     /* compare for the maximum value */
-    if (out < maxVal)
+    if ((_Float16)out < (_Float16)maxVal)
     {
       /* Update the maximum value and it's index */
       out = maxVal;

diff --git a/DSP/Source/StatisticsFunctions/arm_absmax_q15.c b/DSP/Source/StatisticsFunctions/arm_absmax_q15.c
index a898d1f..7a7816d 100644
--- a/DSP/Source/StatisticsFunctions/arm_absmax_q15.c
+++ b/DSP/Source/StatisticsFunctions/arm_absmax_q15.c

@@ -70,7 +70,7 @@
         mve_pred16_t    p = vctp16q(blkCnt);
         q15x8_t         extremIdxVal = vld1q_z_s16(pSrc, p);
 
-        extremIdxVal = vabsq(extremIdxVal);
+        extremIdxVal = vqabsq(extremIdxVal);
         /*
          * Get current max per lane and current index per lane
          * when a max is selected

diff --git a/DSP/Source/StatisticsFunctions/arm_absmax_q31.c b/DSP/Source/StatisticsFunctions/arm_absmax_q31.c
index a4e1e83..99b38f3 100644
--- a/DSP/Source/StatisticsFunctions/arm_absmax_q31.c
+++ b/DSP/Source/StatisticsFunctions/arm_absmax_q31.c

@@ -70,7 +70,7 @@
         mve_pred16_t    p = vctp32q(blkCnt);
         q31x4_t         extremIdxVal = vld1q_z_s32(pSrc, p);
 
-        extremIdxVal = vabsq(extremIdxVal);
+        extremIdxVal = vqabsq(extremIdxVal);
         /*
          * Get current max per lane and current index per lane
          * when a max is selected

diff --git a/DSP/Source/StatisticsFunctions/arm_absmax_q7.c b/DSP/Source/StatisticsFunctions/arm_absmax_q7.c
index f21b57a..1259667 100644
--- a/DSP/Source/StatisticsFunctions/arm_absmax_q7.c
+++ b/DSP/Source/StatisticsFunctions/arm_absmax_q7.c

@@ -74,7 +74,7 @@
         mve_pred16_t    p = vctp8q(blkCnt);
         q7x16_t         extremIdxVal = vld1q_z_s8(pSrc, p);
 
-        extremIdxVal = vabsq(extremIdxVal);
+        extremIdxVal = vqabsq(extremIdxVal);
         /*
          * Get current max per lane and current index per lane
          * when a max is selected

diff --git a/DSP/Source/StatisticsFunctions/arm_absmin_f16.c b/DSP/Source/StatisticsFunctions/arm_absmin_f16.c
index 45aec49..6d2ff50 100644
--- a/DSP/Source/StatisticsFunctions/arm_absmin_f16.c
+++ b/DSP/Source/StatisticsFunctions/arm_absmin_f16.c

@@ -154,7 +154,7 @@
   outIndex = 0U;                                                                                            \
   /* Load first input value that act as reference value for comparision */                                  \
   out = *pSrc++;                                                                                            \
-  out = (out > 0.0f16) ? out : -out;                                                                             \
+  out = ((_Float16)out > 0.0f16) ? out : -(_Float16)out;                                                                             \
   /* Initialize index of extrema value. */                                                                  \
   index = 0U;                                                                                               \
                                                                                                             \
@@ -165,9 +165,9 @@
   {                                                                                                         \
     /* Initialize cur_absmin to next consecutive values one by one */                                         \
     cur_absmin = *pSrc++;                                                                                     \
-    cur_absmin = (cur_absmin > 0.0f16) ? cur_absmin : -cur_absmin;                                                                 \
+    cur_absmin = ((_Float16)cur_absmin > 0.0f16) ? cur_absmin : -(_Float16)cur_absmin;                                                                 \
     /* compare for the extrema value */                                                                     \
-    if (cur_absmin < out)                                                                         \
+    if ((_Float16)cur_absmin < (_Float16)out)                                                                         \
     {                                                                                                       \
       /* Update the extrema value and it's index */                                                         \
       out = cur_absmin;                                                                                       \
@@ -175,24 +175,24 @@
     }                                                                                                       \
                                                                                                             \
     cur_absmin = *pSrc++;                                                                                     \
-    cur_absmin = (cur_absmin > 0.0f16) ? cur_absmin : -cur_absmin;                                                                 \
-    if (cur_absmin < out)                                                                         \
+    cur_absmin = ((_Float16)cur_absmin > 0.0f16) ? cur_absmin : -(_Float16)cur_absmin;                                                                 \
+    if ((_Float16)cur_absmin < (_Float16)out)                                                                         \
     {                                                                                                       \
       out = cur_absmin;                                                                                       \
       outIndex = index + 2U;                                                                                \
     }                                                                                                       \
                                                                                                             \
     cur_absmin = *pSrc++;                                                                                     \
-    cur_absmin = (cur_absmin > 0.0f16) ? cur_absmin : -cur_absmin;                                                                 \
-    if (cur_absmin < out)                                                                          \
+    cur_absmin = ((_Float16)cur_absmin > 0.0f16) ? cur_absmin : -(_Float16)cur_absmin;                                                                 \
+    if ((_Float16)cur_absmin < (_Float16)out)                                                                          \
     {                                                                                                       \
       out = cur_absmin;                                                                                       \
       outIndex = index + 3U;                                                                                \
     }                                                                                                       \
                                                                                                             \
     cur_absmin = *pSrc++;                                                                                     \
-    cur_absmin = (cur_absmin > 0.0f16) ? cur_absmin : -cur_absmin;                                                                 \
-    if (cur_absmin < out)                                                                          \
+    cur_absmin = ((_Float16)cur_absmin > 0.0f16) ? cur_absmin : -(_Float16)cur_absmin;                                                                 \
+    if ((_Float16)cur_absmin < (_Float16)out)                                                                          \
     {                                                                                                       \
       out = cur_absmin;                                                                                       \
       outIndex = index + 4U;                                                                                \
@@ -211,8 +211,8 @@
   while (blkCnt > 0U)                                                                                       \
   {                                                                                                         \
     cur_absmin = *pSrc++;                                                                                     \
-    cur_absmin = (cur_absmin > 0.0f16) ? cur_absmin : -cur_absmin;                                                                 \
-    if (cur_absmin < out)                                                                         \
+    cur_absmin = ((_Float16)cur_absmin > 0.0f16) ? cur_absmin : -(_Float16)cur_absmin;                                                                 \
+    if ((_Float16)cur_absmin < (_Float16)out)                                                                         \
     {                                                                                                       \
       out = cur_absmin;                                                                                       \
       outIndex = blockSize - blkCnt;                                                                        \
@@ -240,7 +240,7 @@
   outIndex = 0U;
 
   /* Load first input value that act as reference value for comparision */
-  out = fabsf(*pSrc++);
+  out = (_Float16)fabsf((float32_t)*pSrc++);
 
   /* Initialize blkCnt with number of samples */
   blkCnt = (blockSize - 1U);
@@ -248,10 +248,10 @@
   while (blkCnt > 0U)
   {
     /* Initialize minVal to the next consecutive values one by one */
-    minVal = fabsf(*pSrc++);
+    minVal = (_Float16)fabsf((float32_t)*pSrc++);
 
     /* compare for the minimum value */
-    if (out > minVal)
+    if ((_Float16)out > (_Float16)minVal)
     {
       /* Update the minimum value and it's index */
       out = minVal;

diff --git a/DSP/Source/StatisticsFunctions/arm_entropy_f16.c b/DSP/Source/StatisticsFunctions/arm_entropy_f16.c
index ffe08f4..9611fd7 100644
--- a/DSP/Source/StatisticsFunctions/arm_entropy_f16.c
+++ b/DSP/Source/StatisticsFunctions/arm_entropy_f16.c

@@ -97,7 +97,7 @@
     while(blkCnt > 0)
     {
        p = *pSrcA++;
-       accum += p * logf(p);
+       accum += p * (_Float16)logf((float32_t)p);
        
        blkCnt--;
     
@@ -122,7 +122,7 @@
     while(blkCnt > 0)
     {
        p = *pIn++;
-       accum += p * logf(p);
+       accum += p * (_Float16)logf((float32_t)p);
        
        blkCnt--;
     

diff --git a/DSP/Source/StatisticsFunctions/arm_entropy_f64.c b/DSP/Source/StatisticsFunctions/arm_entropy_f64.c
index c208ff4..d671791 100644
--- a/DSP/Source/StatisticsFunctions/arm_entropy_f64.c
+++ b/DSP/Source/StatisticsFunctions/arm_entropy_f64.c

@@ -53,7 +53,7 @@
     pIn = pSrcA;
     blkCnt = blockSize;
 
-    accum = 0.0f;
+    accum = 0.0;
 
     while(blkCnt > 0)
     {

diff --git a/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f16.c b/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f16.c
index a7da249..98ac097 100644
--- a/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f16.c
+++ b/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f16.c

@@ -81,7 +81,7 @@
 
     accum = 0.0f16;
 
-    f16x8_t         vSum = vdupq_n_f16(0.0f);
+    f16x8_t         vSum = vdupq_n_f16(0.0f16);
     blkCnt = blockSize >> 3;
     while(blkCnt > 0)
     {
@@ -108,7 +108,7 @@
     {
        pA = *pSrcA++;
        pB = *pSrcB++;
-       accum += pA * logf(pB / pA);
+       accum += pA * (_Float16)logf((float32_t)pB / (float32_t)pA);
        
        blkCnt--;
     
@@ -134,7 +134,7 @@
     {
        pA = *pInA++;
        pB = *pInB++;
-       accum += pA * logf(pB / pA);
+       accum += pA * (_Float16)logf((float32_t)pB / (float32_t)pA);
        
        blkCnt--;
     

diff --git a/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c b/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c
index b22d047..b43b218 100644
--- a/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c
+++ b/DSP/Source/StatisticsFunctions/arm_kullback_leibler_f64.c

@@ -55,7 +55,7 @@
     pInB = pSrcB;
     blkCnt = blockSize;
 
-    accum = 0.0f;
+    accum = 0.0;
 
     while(blkCnt > 0)
     {

diff --git a/DSP/Source/StatisticsFunctions/arm_logsumexp_f16.c b/DSP/Source/StatisticsFunctions/arm_logsumexp_f16.c
index 81272d5..84d4843 100644
--- a/DSP/Source/StatisticsFunctions/arm_logsumexp_f16.c
+++ b/DSP/Source/StatisticsFunctions/arm_logsumexp_f16.c

@@ -111,12 +111,12 @@
     while(blkCnt > 0)
     {
        tmp = *pIn++;
-       accum += expf(tmp - maxVal);
+       accum += (_Float16)expf((float32_t)((_Float16)tmp - (_Float16)maxVal));
        blkCnt--;
     
     }
 
-    accum = maxVal + logf(accum);
+    accum = (_Float16)maxVal + (_Float16)logf((float32_t)accum);
 
     return (accum);
 }
@@ -154,11 +154,11 @@
     while(blkCnt > 0)
     {
        tmp = *pIn++;
-       accum += expf(tmp - maxVal);
+       accum += (_Float16)expf((float32_t)((_Float16)tmp - (_Float16)maxVal));
        blkCnt--;
     
     }
-    accum = maxVal + logf(accum);
+    accum = (_Float16)maxVal + (_Float16)logf((float32_t)accum);
 
     return(accum);
 }

diff --git a/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c b/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c
index 25daaf0..72a5d3a 100644
--- a/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c
+++ b/DSP/Source/StatisticsFunctions/arm_logsumexp_f32.c

@@ -113,7 +113,7 @@
     
     }
 
-    accum = maxVal + log(accum);
+    accum = maxVal + logf(accum);
 
     return (accum);
 }

diff --git a/DSP/Source/StatisticsFunctions/arm_max_f16.c b/DSP/Source/StatisticsFunctions/arm_max_f16.c
index b9b64f0..b5017f1 100644
--- a/DSP/Source/StatisticsFunctions/arm_max_f16.c
+++ b/DSP/Source/StatisticsFunctions/arm_max_f16.c

@@ -120,7 +120,7 @@
       tmp = *pSrc++;
 
       /* compare for the maximum value */
-      if (maxValue < tmp)
+      if ((_Float16)maxValue < (_Float16)tmp)
       {
         /* Update the maximum value and it's index */
         maxValue = tmp;
@@ -171,7 +171,7 @@
     maxVal = *pSrc++;
 
     /* compare for the maximum value */
-    if (out < maxVal)
+    if ((_Float16)out < (_Float16)maxVal)
     {
       /* Update the maximum value and it's index */
       out = maxVal;
@@ -179,21 +179,21 @@
     }
 
     maxVal = *pSrc++;
-    if (out < maxVal)
+    if ((_Float16)out < (_Float16)maxVal)
     {
       out = maxVal;
       outIndex = index + 2U;
     }
 
     maxVal = *pSrc++;
-    if (out < maxVal)
+    if ((_Float16)out < (_Float16)maxVal)
     {
       out = maxVal;
       outIndex = index + 3U;
     }
 
     maxVal = *pSrc++;
-    if (out < maxVal)
+    if ((_Float16)out < (_Float16)maxVal)
     {
       out = maxVal;
       outIndex = index + 4U;
@@ -221,7 +221,7 @@
     maxVal = *pSrc++;
 
     /* compare for the maximum value */
-    if (out < maxVal)
+    if ((_Float16)out < (_Float16)maxVal)
     {
       /* Update the maximum value and it's index */
       out = maxVal;

diff --git a/DSP/Source/StatisticsFunctions/arm_max_no_idx_f16.c b/DSP/Source/StatisticsFunctions/arm_max_no_idx_f16.c
index 3a95b4b..f989f60 100644
--- a/DSP/Source/StatisticsFunctions/arm_max_no_idx_f16.c
+++ b/DSP/Source/StatisticsFunctions/arm_max_no_idx_f16.c

@@ -95,7 +95,7 @@
         newVal = *pSrc++;
 
         /* compare for the maximum value */
-        if (maxValue < newVal)
+        if ((_Float16)maxValue < (_Float16)newVal)
         {
             /* Update the maximum value and it's index */
             maxValue = newVal;
@@ -122,7 +122,7 @@
        newVal = *pSrc++;
    
        /* compare for the maximum value */
-       if (maxValue < newVal)
+       if ((_Float16)maxValue < (_Float16)newVal)
        {
            /* Update the maximum value and it's index */
            maxValue = newVal;

diff --git a/DSP/Source/StatisticsFunctions/arm_mean_f16.c b/DSP/Source/StatisticsFunctions/arm_mean_f16.c
index 02f495d..d296482 100644
--- a/DSP/Source/StatisticsFunctions/arm_mean_f16.c
+++ b/DSP/Source/StatisticsFunctions/arm_mean_f16.c

@@ -85,7 +85,7 @@
     }
     while (blkCnt > 0);
 
-    *pResult = vecAddAcrossF16Mve(sumVec) / (float16_t) blockSize;
+    *pResult = (_Float16)vecAddAcrossF16Mve(sumVec) / (_Float16) blockSize;
 }
 
 
@@ -107,13 +107,13 @@
   while (blkCnt > 0U)
   {
     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    sum += *pSrc++;
+    sum += (_Float16)*pSrc++;
 
-    sum += *pSrc++;
+    sum += (_Float16)*pSrc++;
 
-    sum += *pSrc++;
+    sum += (_Float16)*pSrc++;
 
-    sum += *pSrc++;
+    sum += (_Float16)*pSrc++;
 
     /* Decrement the loop counter */
     blkCnt--;
@@ -132,7 +132,7 @@
   while (blkCnt > 0U)
   {
     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    sum += *pSrc++;
+    sum += (_Float16)*pSrc++;
 
     /* Decrement loop counter */
     blkCnt--;
@@ -140,7 +140,7 @@
 
   /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) / blockSize  */
   /* Store result to destination */
-  *pResult = (sum / (float16_t)blockSize);
+  *pResult = ((_Float16)sum / (_Float16)blockSize);
 }
 #endif /* defined(ARM_MATH_MVEF) && !defined(ARM_MATH_AUTOVECTORIZE) */
 

diff --git a/DSP/Source/StatisticsFunctions/arm_mean_q15.c b/DSP/Source/StatisticsFunctions/arm_mean_q15.c
index f8af0ed..54949a1 100644
--- a/DSP/Source/StatisticsFunctions/arm_mean_q15.c
+++ b/DSP/Source/StatisticsFunctions/arm_mean_q15.c

@@ -114,11 +114,11 @@
   while (blkCnt > 0U)
   {
     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    in = read_q15x2_ia ((q15_t **) &pSrc);
+    in = read_q15x2_ia (&pSrc);
     sum += ((in << 16U) >> 16U);
     sum +=  (in >> 16U);
 
-    in = read_q15x2_ia ((q15_t **) &pSrc);
+    in = read_q15x2_ia (&pSrc);
     sum += ((in << 16U) >> 16U);
     sum +=  (in >> 16U);
 

diff --git a/DSP/Source/StatisticsFunctions/arm_mean_q7.c b/DSP/Source/StatisticsFunctions/arm_mean_q7.c
index 8cb68b2..f0701eb 100644
--- a/DSP/Source/StatisticsFunctions/arm_mean_q7.c
+++ b/DSP/Source/StatisticsFunctions/arm_mean_q7.c

@@ -113,7 +113,7 @@
   while (blkCnt > 0U)
   {
     /* C = (A[0] + A[1] + A[2] + ... + A[blockSize-1]) */
-    in = read_q7x4_ia ((q7_t **) &pSrc);
+    in = read_q7x4_ia (&pSrc);
     sum += ((in << 24U) >> 24U);
     sum += ((in << 16U) >> 24U);
     sum += ((in <<  8U) >> 24U);

diff --git a/DSP/Source/StatisticsFunctions/arm_min_f16.c b/DSP/Source/StatisticsFunctions/arm_min_f16.c
index 0d123f5..3ff9db4 100644
--- a/DSP/Source/StatisticsFunctions/arm_min_f16.c
+++ b/DSP/Source/StatisticsFunctions/arm_min_f16.c

@@ -165,7 +165,7 @@
     minVal = *pSrc++;
 
     /* compare for the minimum value */
-    if (out > minVal)
+    if ((_Float16)out > (_Float16)minVal)
     {
       /* Update the minimum value and it's index */
       out = minVal;
@@ -173,21 +173,21 @@
     }
 
     minVal = *pSrc++;
-    if (out > minVal)
+    if ((_Float16)out > (_Float16)minVal)
     {
       out = minVal;
       outIndex = index + 2U;
     }
 
     minVal = *pSrc++;
-    if (out > minVal)
+    if ((_Float16)out > (_Float16)minVal)
     {
       out = minVal;
       outIndex = index + 3U;
     }
 
     minVal = *pSrc++;
-    if (out > minVal)
+    if ((_Float16)out > (_Float16)minVal)
     {
       out = minVal;
       outIndex = index + 4U;
@@ -215,7 +215,7 @@
     minVal = *pSrc++;
 
     /* compare for the minimum value */
-    if (out > minVal)
+    if ((_Float16)out > (_Float16)minVal)
     {
       /* Update the minimum value and it's index */
       out = minVal;

diff --git a/DSP/Source/StatisticsFunctions/arm_power_q15.c b/DSP/Source/StatisticsFunctions/arm_power_q15.c
index 37a02c0..2c47f0b 100644
--- a/DSP/Source/StatisticsFunctions/arm_power_q15.c
+++ b/DSP/Source/StatisticsFunctions/arm_power_q15.c

@@ -122,10 +122,10 @@
 
     /* Compute Power and store result in a temporary variable, sum. */
 #if defined (ARM_MATH_DSP)
-    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    in32 = read_q15x2_ia (&pSrc);
     sum = __SMLALD(in32, in32, sum);
 
-    in32 = read_q15x2_ia ((q15_t **) &pSrc);
+    in32 = read_q15x2_ia (&pSrc);
     sum = __SMLALD(in32, in32, sum);
 #else
     in = *pSrc++;

diff --git a/Documentation/Build/html/CMSIS-Toolbox.png b/Documentation/Build/html/CMSIS-Toolbox.png
deleted file mode 100644
index 3380da2..0000000
--- a/Documentation/Build/html/CMSIS-Toolbox.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/CMSIS_Logo_Final.png b/Documentation/Build/html/CMSIS_Logo_Final.png
deleted file mode 100644
index ec557ff..0000000
--- a/Documentation/Build/html/CMSIS_Logo_Final.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/CmdLineBuild.html b/Documentation/Build/html/CmdLineBuild.html
deleted file mode 100644
index 98ec31f..0000000
--- a/Documentation/Build/html/CmdLineBuild.html
+++ /dev/null

@@ -1,14 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<title>Redirect to the corresponding Open-CMSIS-Pack page after 0 seconds</title>
-<meta http-equiv="refresh" content="0; URL=https://open-cmsis-pack.github.io/devtools/buildmgr/latest/CmdLineBuild.html">
-<meta name="keywords" content="automatic redirection">
-</head>
-
-<body>
-
-If the automatic redirection is failing, click <a href="https://open-cmsis-pack.github.io/devtools/buildmgr/latest/CmdLineBuild.html">here</a> or try to find corresponding topic described in <a href="https://www.open-cmsis-pack.org">Open-CMSIS-Pack resources</a>.
-
-</body>
-</html>
\ No newline at end of file

diff --git a/Documentation/Build/html/bc_s.png b/Documentation/Build/html/bc_s.png
deleted file mode 100644
index 224b29a..0000000
--- a/Documentation/Build/html/bc_s.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/bdwn.png b/Documentation/Build/html/bdwn.png
deleted file mode 100644
index 940a0b9..0000000
--- a/Documentation/Build/html/bdwn.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/build_revisionHistory.html b/Documentation/Build/html/build_revisionHistory.html
deleted file mode 100644
index aa305fb..0000000
--- a/Documentation/Build/html/build_revisionHistory.html
+++ /dev/null

@@ -1,14 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<title>Redirect to the corresponding Open-CMSIS-Pack page after 0 seconds</title>
-<meta http-equiv="refresh" content="0; URL=https://open-cmsis-pack.github.io/devtools/buildmgr/latest/build_revisionHistory.html">
-<meta name="keywords" content="automatic redirection">
-</head>
-
-<body>
-
-If the automatic redirection is failing, click <a href="https://open-cmsis-pack.github.io/devtools/buildmgr/latest/build_revisionHistory.html">here</a> or try to find corresponding topic described in <a href="https://www.open-cmsis-pack.org">Open-CMSIS-Pack resources</a>.
-
-</body>
-</html>
\ No newline at end of file

diff --git a/Documentation/Build/html/cbuild.html b/Documentation/Build/html/cbuild.html
deleted file mode 100644
index 0745e85..0000000
--- a/Documentation/Build/html/cbuild.html
+++ /dev/null

@@ -1,14 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<title>Redirect to the corresponding Open-CMSIS-Pack page after 0 seconds</title>
-<meta http-equiv="refresh" content="0; URL=https://open-cmsis-pack.github.io/devtools/buildmgr/latest/cbuild.html">
-<meta name="keywords" content="automatic redirection">
-</head>
-
-<body>
-
-If the automatic redirection is failing, click <a href="https://open-cmsis-pack.github.io/devtools/buildmgr/latest/cbuild.html">here</a> or try to find corresponding topic described in <a href="https://www.open-cmsis-pack.org">Open-CMSIS-Pack resources</a>.
-
-</body>
-</html>
\ No newline at end of file

diff --git a/Documentation/Build/html/cbuild_install.html b/Documentation/Build/html/cbuild_install.html
deleted file mode 100644
index 9c477cc..0000000
--- a/Documentation/Build/html/cbuild_install.html
+++ /dev/null

@@ -1,14 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<title>Redirect to the corresponding Open-CMSIS-Pack page after 0 seconds</title>
-<meta http-equiv="refresh" content="0; URL=https://open-cmsis-pack.github.io/devtools/buildmgr/latest/cbuild_install.html">
-<meta name="keywords" content="automatic redirection">
-</head>
-
-<body>
-
-If the automatic redirection is failing, click <a href="https://open-cmsis-pack.github.io/devtools/buildmgr/latest/cbuild_install.html">here</a> or try to find corresponding topic described in <a href="https://www.open-cmsis-pack.org">Open-CMSIS-Pack resources</a>.
-
-</body>
-</html>
\ No newline at end of file

diff --git a/Documentation/Build/html/cbuild_uv.html b/Documentation/Build/html/cbuild_uv.html
deleted file mode 100644
index e3a4a3c..0000000
--- a/Documentation/Build/html/cbuild_uv.html
+++ /dev/null

@@ -1,14 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<title>Redirect to the corresponding Open-CMSIS-Pack page after 0 seconds</title>
-<meta http-equiv="refresh" content="0; URL=index.html">
-<meta name="keywords" content="automatic redirection">
-</head>
-
-<body>
-
-If the automatic redirection is failing, click <a href="index.html">here</a> or try to find corresponding topic described in <a href="https://www.open-cmsis-pack.org">Open-CMSIS-Pack resources</a>.
-
-</body>
-</html>
\ No newline at end of file

diff --git a/Documentation/Build/html/cbuildgen.html b/Documentation/Build/html/cbuildgen.html
deleted file mode 100644
index 1f9e133..0000000
--- a/Documentation/Build/html/cbuildgen.html
+++ /dev/null

@@ -1,14 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<title>Redirect to the corresponding Open-CMSIS-Pack page after 0 seconds</title>
-<meta http-equiv="refresh" content="0; URL=https://open-cmsis-pack.github.io/devtools/buildmgr/latest/cbuildgen.html">
-<meta name="keywords" content="automatic redirection">
-</head>
-
-<body>
-
-If the automatic redirection is failing, click <a href="https://open-cmsis-pack.github.io/devtools/buildmgr/latest/cbuildgen.html">here</a> or try to find corresponding topic described in <a href="https://www.open-cmsis-pack.org">Open-CMSIS-Pack resources</a>.
-
-</body>
-</html>
\ No newline at end of file

diff --git a/Documentation/Build/html/ccmerge.html b/Documentation/Build/html/ccmerge.html
deleted file mode 100644
index e3a4a3c..0000000
--- a/Documentation/Build/html/ccmerge.html
+++ /dev/null

@@ -1,14 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<title>Redirect to the corresponding Open-CMSIS-Pack page after 0 seconds</title>
-<meta http-equiv="refresh" content="0; URL=index.html">
-<meta name="keywords" content="automatic redirection">
-</head>
-
-<body>
-
-If the automatic redirection is failing, click <a href="index.html">here</a> or try to find corresponding topic described in <a href="https://www.open-cmsis-pack.org">Open-CMSIS-Pack resources</a>.
-
-</body>
-</html>
\ No newline at end of file

diff --git a/Documentation/Build/html/closed.png b/Documentation/Build/html/closed.png
deleted file mode 100644
index 98cc2c9..0000000
--- a/Documentation/Build/html/closed.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/cmake.html b/Documentation/Build/html/cmake.html
deleted file mode 100644
index c494a8a..0000000
--- a/Documentation/Build/html/cmake.html
+++ /dev/null

@@ -1,14 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<title>Redirect to the corresponding Open-CMSIS-Pack page after 0 seconds</title>
-<meta http-equiv="refresh" content="0; URL=https://open-cmsis-pack.github.io/devtools/buildmgr/latest/cmake.html">
-<meta name="keywords" content="automatic redirection">
-</head>
-
-<body>
-
-If the automatic redirection is failing, click <a href="https://open-cmsis-pack.github.io/devtools/buildmgr/latest/cmake.html">here</a> or try to find corresponding topic described in <a href="https://www.open-cmsis-pack.org">Open-CMSIS-Pack resources</a>.
-
-</body>
-</html>
\ No newline at end of file

diff --git a/Documentation/Build/html/cmsis.css b/Documentation/Build/html/cmsis.css
deleted file mode 100644
index 586d4d2..0000000
--- a/Documentation/Build/html/cmsis.css
+++ /dev/null

@@ -1,1282 +0,0 @@
-/* The standard CSS for doxygen */
-
-body, table, div, p, dl {
-	font-family: Lucida Grande, Verdana, Geneva, Arial, sans-serif;
-	font-size: 13px;
-	line-height: 1.3;
-}
-
-/* CMSIS styles */
-
-.style1 {
-		text-align: center;
-}
-.style2 {
-		color: #0000FF;
-		font-weight: normal;
-}
-.style3 {
-		text-align: left;
-}
-.style4 {
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diff --git a/Documentation/Build/html/cmsis_footer.js b/Documentation/Build/html/cmsis_footer.js
deleted file mode 100644
index e659820..0000000
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+++ /dev/null

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diff --git a/Documentation/Build/html/cp_init.html b/Documentation/Build/html/cp_init.html
deleted file mode 100644
index e3a4a3c..0000000
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+++ /dev/null

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\ No newline at end of file

diff --git a/Documentation/Build/html/cp_install.html b/Documentation/Build/html/cp_install.html
deleted file mode 100644
index 13e87dc..0000000
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+++ /dev/null

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\ No newline at end of file

diff --git a/Documentation/Build/html/cprjFormat_pg.html b/Documentation/Build/html/cprjFormat_pg.html
deleted file mode 100644
index 1e5903a..0000000
--- a/Documentation/Build/html/cprjFormat_pg.html
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\ No newline at end of file

diff --git a/Documentation/Build/html/cprj_types.html b/Documentation/Build/html/cprj_types.html
deleted file mode 100644
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\ No newline at end of file

diff --git a/Documentation/Build/html/doxygen.css b/Documentation/Build/html/doxygen.css
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-}
-#powerTip.w:before {
-	border-right-color: #808080;
-	border-width: 11px;
-	top: 50%;
-	margin-top: -11px;
-}
-
-@media print
-{
-  #top { display: none; }
-  #side-nav { display: none; }
-  #nav-path { display: none; }
-  body { overflow:visible; }
-  h1, h2, h3, h4, h5, h6 { page-break-after: avoid; }
-  .summary { display: none; }
-  .memitem { page-break-inside: avoid; }
-  #doc-content
-  {
-    margin-left:0 !important;
-    height:auto !important;
-    width:auto !important;
-    overflow:inherit;
-    display:inline;
-  }
-}
-

diff --git a/Documentation/Build/html/doxygen.png b/Documentation/Build/html/doxygen.png
deleted file mode 100644
index 3ff17d8..0000000
--- a/Documentation/Build/html/doxygen.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/dynsections.js b/Documentation/Build/html/dynsections.js
deleted file mode 100644
index ed092c7..0000000
--- a/Documentation/Build/html/dynsections.js
+++ /dev/null

@@ -1,97 +0,0 @@
-function toggleVisibility(linkObj)
-{
- var base = $(linkObj).attr('id');
- var summary = $('#'+base+'-summary');
- var content = $('#'+base+'-content');
- var trigger = $('#'+base+'-trigger');
- var src=$(trigger).attr('src');
- if (content.is(':visible')===true) {
-   content.hide();
-   summary.show();
-   $(linkObj).addClass('closed').removeClass('opened');
-   $(trigger).attr('src',src.substring(0,src.length-8)+'closed.png');
- } else {
-   content.show();
-   summary.hide();
-   $(linkObj).removeClass('closed').addClass('opened');
-   $(trigger).attr('src',src.substring(0,src.length-10)+'open.png');
- } 
- return false;
-}
-
-function updateStripes()
-{
-  $('table.directory tr').
-       removeClass('even').filter(':visible:even').addClass('even');
-}
-function toggleLevel(level)
-{
-  $('table.directory tr').each(function(){ 
-    var l = this.id.split('_').length-1;
-    var i = $('#img'+this.id.substring(3));
-    var a = $('#arr'+this.id.substring(3));
-    if (l<level+1) {
-      i.attr('src','ftv2folderopen.png');
-      a.attr('src','ftv2mnode.png');
-      $(this).show();
-    } else if (l==level+1) {
-      i.attr('src','ftv2folderclosed.png');
-      a.attr('src','ftv2pnode.png');
-      $(this).show();
-    } else {
-      $(this).hide();
-    }
-  });
-  updateStripes();
-}
-
-function toggleFolder(id)
-{
-  //The clicked row
-  var currentRow = $('#row_'+id);
-  var currentRowImages = currentRow.find("img");
-
-  //All rows after the clicked row
-  var rows = currentRow.nextAll("tr");
-
-  //Only match elements AFTER this one (can't hide elements before)
-  var childRows = rows.filter(function() {
-    var re = new RegExp('^row_'+id+'\\d+_$', "i"); //only one sub
-    return this.id.match(re);
-  });
-
-  //First row is visible we are HIDING
-  if (childRows.filter(':first').is(':visible')===true) {
-    currentRowImages.filter("[id^=arr]").attr('src', 'ftv2pnode.png');
-    currentRowImages.filter("[id^=img]").attr('src', 'ftv2folderclosed.png');
-    rows.filter("[id^=row_"+id+"]").hide();
-  } else { //We are SHOWING
-    //All sub images
-    var childImages = childRows.find("img");
-    var childImg = childImages.filter("[id^=img]");
-    var childArr = childImages.filter("[id^=arr]");
-
-    currentRow.find("[id^=arr]").attr('src', 'ftv2mnode.png'); //open row
-    currentRow.find("[id^=img]").attr('src', 'ftv2folderopen.png'); //open row
-    childImg.attr('src','ftv2folderclosed.png'); //children closed
-    childArr.attr('src','ftv2pnode.png'); //children closed
-    childRows.show(); //show all children
-  }
-  updateStripes();
-}
-
-
-function toggleInherit(id)
-{
-  var rows = $('tr.inherit.'+id);
-  var img = $('tr.inherit_header.'+id+' img');
-  var src = $(img).attr('src');
-  if (rows.filter(':first').is(':visible')===true) {
-    rows.css('display','none');
-    $(img).attr('src',src.substring(0,src.length-8)+'closed.png');
-  } else {
-    rows.css('display','table-row'); // using show() causes jump in firefox
-    $(img).attr('src',src.substring(0,src.length-10)+'open.png');
-  }
-}
-

diff --git a/Documentation/Build/html/element_compilers.html b/Documentation/Build/html/element_compilers.html
deleted file mode 100644
index 44bcf23..0000000
--- a/Documentation/Build/html/element_compilers.html
+++ /dev/null

@@ -1,14 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<title>Redirect to the corresponding Open-CMSIS-Pack page after 0 seconds</title>
-<meta http-equiv="refresh" content="0; URL=https://open-cmsis-pack.github.io/devtools/buildmgr/latest/element_compilers.html">
-<meta name="keywords" content="automatic redirection">
-</head>
-
-<body>
-
-If the automatic redirection is failing, click <a href="https://open-cmsis-pack.github.io/devtools/buildmgr/latest/element_compilers.html">here</a> or try to find corresponding topic described in <a href="https://www.open-cmsis-pack.org">Open-CMSIS-Pack resources</a>.
-
-</body>
-</html>
\ No newline at end of file

diff --git a/Documentation/Build/html/element_components.html b/Documentation/Build/html/element_components.html
deleted file mode 100644
index 0e8a166..0000000
--- a/Documentation/Build/html/element_components.html
+++ /dev/null

@@ -1,14 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<title>Redirect to the corresponding Open-CMSIS-Pack page after 0 seconds</title>
-<meta http-equiv="refresh" content="0; URL=https://open-cmsis-pack.github.io/devtools/buildmgr/latest/element_components.html">
-<meta name="keywords" content="automatic redirection">
-</head>
-
-<body>
-
-If the automatic redirection is failing, click <a href="https://open-cmsis-pack.github.io/devtools/buildmgr/latest/element_components.html">here</a> or try to find corresponding topic described in <a href="https://www.open-cmsis-pack.org">Open-CMSIS-Pack resources</a>.
-
-</body>
-</html>
\ No newline at end of file

diff --git a/Documentation/Build/html/element_cprj.html b/Documentation/Build/html/element_cprj.html
deleted file mode 100644
index 4aea0f1..0000000
--- a/Documentation/Build/html/element_cprj.html
+++ /dev/null

@@ -1,14 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<title>Redirect to the corresponding Open-CMSIS-Pack page after 0 seconds</title>
-<meta http-equiv="refresh" content="0; URL=https://open-cmsis-pack.github.io/devtools/buildmgr/latest/element_cprj.html">
-<meta name="keywords" content="automatic redirection">
-</head>
-
-<body>
-
-If the automatic redirection is failing, click <a href="https://open-cmsis-pack.github.io/devtools/buildmgr/latest/element_cprj.html">here</a> or try to find corresponding topic described in <a href="https://www.open-cmsis-pack.org">Open-CMSIS-Pack resources</a>.
-
-</body>
-</html>
\ No newline at end of file

diff --git a/Documentation/Build/html/element_created.html b/Documentation/Build/html/element_created.html
deleted file mode 100644
index aac4773..0000000
--- a/Documentation/Build/html/element_created.html
+++ /dev/null

@@ -1,14 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<title>Redirect to the corresponding Open-CMSIS-Pack page after 0 seconds</title>
-<meta http-equiv="refresh" content="0; URL=https://open-cmsis-pack.github.io/devtools/buildmgr/latest/element_created.html">
-<meta name="keywords" content="automatic redirection">
-</head>
-
-<body>
-
-If the automatic redirection is failing, click <a href="https://open-cmsis-pack.github.io/devtools/buildmgr/latest/element_created.html">here</a> or try to find corresponding topic described in <a href="https://www.open-cmsis-pack.org">Open-CMSIS-Pack resources</a>.
-
-</body>
-</html>
\ No newline at end of file

diff --git a/Documentation/Build/html/element_files.html b/Documentation/Build/html/element_files.html
deleted file mode 100644
index a20596e..0000000
--- a/Documentation/Build/html/element_files.html
+++ /dev/null

@@ -1,14 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<title>Redirect to the corresponding Open-CMSIS-Pack page after 0 seconds</title>
-<meta http-equiv="refresh" content="0; URL=https://open-cmsis-pack.github.io/devtools/buildmgr/latest/element_files.html">
-<meta name="keywords" content="automatic redirection">
-</head>
-
-<body>
-
-If the automatic redirection is failing, click <a href="https://open-cmsis-pack.github.io/devtools/buildmgr/latest/element_files.html">here</a> or try to find corresponding topic described in <a href="https://www.open-cmsis-pack.org">Open-CMSIS-Pack resources</a>.
-
-</body>
-</html>
\ No newline at end of file

diff --git a/Documentation/Build/html/element_info.html b/Documentation/Build/html/element_info.html
deleted file mode 100644
index dc02f2f..0000000
--- a/Documentation/Build/html/element_info.html
+++ /dev/null

@@ -1,14 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<title>Redirect to the corresponding Open-CMSIS-Pack page after 0 seconds</title>
-<meta http-equiv="refresh" content="0; URL=https://open-cmsis-pack.github.io/devtools/buildmgr/latest/element_info.html">
-<meta name="keywords" content="automatic redirection">
-</head>
-
-<body>
-
-If the automatic redirection is failing, click <a href="https://open-cmsis-pack.github.io/devtools/buildmgr/latest/element_info.html">here</a> or try to find corresponding topic described in <a href="https://www.open-cmsis-pack.org">Open-CMSIS-Pack resources</a>.
-
-</body>
-</html>
\ No newline at end of file

diff --git a/Documentation/Build/html/element_layers.html b/Documentation/Build/html/element_layers.html
deleted file mode 100644
index 4e93592..0000000
--- a/Documentation/Build/html/element_layers.html
+++ /dev/null

@@ -1,14 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<title>Redirect to the corresponding Open-CMSIS-Pack page after 0 seconds</title>
-<meta http-equiv="refresh" content="0; URL=https://open-cmsis-pack.github.io/devtools/buildmgr/latest/element_layers.html">
-<meta name="keywords" content="automatic redirection">
-</head>
-
-<body>
-
-If the automatic redirection is failing, click <a href="https://open-cmsis-pack.github.io/devtools/buildmgr/latest/element_layers.html">here</a> or try to find corresponding topic described in <a href="https://www.open-cmsis-pack.org">Open-CMSIS-Pack resources</a>.
-
-</body>
-</html>
\ No newline at end of file

diff --git a/Documentation/Build/html/element_packages.html b/Documentation/Build/html/element_packages.html
deleted file mode 100644
index 7fb8e67..0000000
--- a/Documentation/Build/html/element_packages.html
+++ /dev/null

@@ -1,14 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<title>Redirect to the corresponding Open-CMSIS-Pack page after 0 seconds</title>
-<meta http-equiv="refresh" content="0; URL=https://open-cmsis-pack.github.io/devtools/buildmgr/latest/element_packages.html">
-<meta name="keywords" content="automatic redirection">
-</head>
-
-<body>
-
-If the automatic redirection is failing, click <a href="https://open-cmsis-pack.github.io/devtools/buildmgr/latest/element_packages.html">here</a> or try to find corresponding topic described in <a href="https://www.open-cmsis-pack.org">Open-CMSIS-Pack resources</a>.
-
-</body>
-</html>
\ No newline at end of file

diff --git a/Documentation/Build/html/element_target.html b/Documentation/Build/html/element_target.html
deleted file mode 100644
index b36ea6f..0000000
--- a/Documentation/Build/html/element_target.html
+++ /dev/null

@@ -1,14 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<title>Redirect to the corresponding Open-CMSIS-Pack page after 0 seconds</title>
-<meta http-equiv="refresh" content="0; URL=https://open-cmsis-pack.github.io/devtools/buildmgr/latest/element_target.html">
-<meta name="keywords" content="automatic redirection">
-</head>
-
-<body>
-
-If the automatic redirection is failing, click <a href="https://open-cmsis-pack.github.io/devtools/buildmgr/latest/element_target.html">here</a> or try to find corresponding topic described in <a href="https://www.open-cmsis-pack.org">Open-CMSIS-Pack resources</a>.
-
-</body>
-</html>
\ No newline at end of file

diff --git a/Documentation/Build/html/ftv2blank.png b/Documentation/Build/html/ftv2blank.png
deleted file mode 100644
index 63c605b..0000000
--- a/Documentation/Build/html/ftv2blank.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/ftv2cl.png b/Documentation/Build/html/ftv2cl.png
deleted file mode 100644
index 132f657..0000000
--- a/Documentation/Build/html/ftv2cl.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/ftv2doc.png b/Documentation/Build/html/ftv2doc.png
deleted file mode 100644
index 17edabf..0000000
--- a/Documentation/Build/html/ftv2doc.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/ftv2folderclosed.png b/Documentation/Build/html/ftv2folderclosed.png
deleted file mode 100644
index bb8ab35..0000000
--- a/Documentation/Build/html/ftv2folderclosed.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/ftv2folderopen.png b/Documentation/Build/html/ftv2folderopen.png
deleted file mode 100644
index d6c7f67..0000000
--- a/Documentation/Build/html/ftv2folderopen.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/ftv2lastnode.png b/Documentation/Build/html/ftv2lastnode.png
deleted file mode 100644
index 63c605b..0000000
--- a/Documentation/Build/html/ftv2lastnode.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/ftv2link.png b/Documentation/Build/html/ftv2link.png
deleted file mode 100644
index 17edabf..0000000
--- a/Documentation/Build/html/ftv2link.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/ftv2mlastnode.png b/Documentation/Build/html/ftv2mlastnode.png
deleted file mode 100644
index 0b63f6d..0000000
--- a/Documentation/Build/html/ftv2mlastnode.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/ftv2mnode.png b/Documentation/Build/html/ftv2mnode.png
deleted file mode 100644
index 0b63f6d..0000000
--- a/Documentation/Build/html/ftv2mnode.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/ftv2mo.png b/Documentation/Build/html/ftv2mo.png
deleted file mode 100644
index 4bfb80f..0000000
--- a/Documentation/Build/html/ftv2mo.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/ftv2node.png b/Documentation/Build/html/ftv2node.png
deleted file mode 100644
index 63c605b..0000000
--- a/Documentation/Build/html/ftv2node.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/ftv2ns.png b/Documentation/Build/html/ftv2ns.png
deleted file mode 100644
index 72e3d71..0000000
--- a/Documentation/Build/html/ftv2ns.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/ftv2plastnode.png b/Documentation/Build/html/ftv2plastnode.png
deleted file mode 100644
index c6ee22f..0000000
--- a/Documentation/Build/html/ftv2plastnode.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/ftv2pnode.png b/Documentation/Build/html/ftv2pnode.png
deleted file mode 100644
index c6ee22f..0000000
--- a/Documentation/Build/html/ftv2pnode.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/ftv2splitbar.png b/Documentation/Build/html/ftv2splitbar.png
deleted file mode 100644
index fe895f2..0000000
--- a/Documentation/Build/html/ftv2splitbar.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/ftv2vertline.png b/Documentation/Build/html/ftv2vertline.png
deleted file mode 100644
index 63c605b..0000000
--- a/Documentation/Build/html/ftv2vertline.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/index.html b/Documentation/Build/html/index.html
deleted file mode 100644
index 66cdbf3..0000000
--- a/Documentation/Build/html/index.html
+++ /dev/null

@@ -1,173 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
-<meta http-equiv="X-UA-Compatible" content="IE=9"/>
-<title>Overview</title>
-<title>CMSIS-Build: Overview</title>
-<link href="tabs.css" rel="stylesheet" type="text/css"/>
-<link href="cmsis.css" rel="stylesheet" type="text/css" />
-<script type="text/javascript" src="jquery.js"></script>
-<script type="text/javascript" src="dynsections.js"></script>
-<script type="text/javascript" src="printComponentTabs.js"></script>
-<script type="text/javascript" src="cmsis_footer.js"></script>
-<link href="navtree.css" rel="stylesheet" type="text/css"/>
-<script type="text/javascript" src="resize.js"></script>
-<script type="text/javascript" src="navtree.js"></script>
-<script type="text/javascript">
-  $(document).ready(initResizable);
-  $(window).load(resizeHeight);
-</script>
-<link href="search/search.css" rel="stylesheet" type="text/css"/>
-<script type="text/javascript" src="search/search.js"></script>
-<script type="text/javascript">
-  $(document).ready(function() { searchBox.OnSelectItem(0); });
-</script>
-</head>
-<body>
-<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
-<div id="titlearea">
-<table cellspacing="0" cellpadding="0">
- <tbody>
- <tr style="height: 46px;">
-  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
-  <td style="padding-left: 0.5em;">
-   <div id="projectname">CMSIS-Build
-   &#160;<span id="projectnumber">Version 0.10.0 (beta)</span>
-   </div>
-   <div id="projectbrief">Tools, software frameworks, and work flows for productivity with CMSIS based projects</div>
-  </td>
- </tr>
- </tbody>
-</table>
-</div>
-<!-- end header part -->
-<div id="CMSISnav" class="tabs1">
-    <ul class="tablist">
-      <script type="text/javascript">
-		<!--
-		writeComponentTabs.call(this);
-		//-->
-      </script>
-	  </ul>
-</div>
-<!-- Generated by Doxygen 1.8.6 -->
-<script type="text/javascript">
-var searchBox = new SearchBox("searchBox", "search",false,'Search');
-</script>
-  <div id="navrow1" class="tabs">
-    <ul class="tablist">
-      <li class="current"><a href="index.html"><span>Main&#160;Page</span></a></li>
-      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
-      <li>
-        <div id="MSearchBox" class="MSearchBoxInactive">
-        <span class="left">
-          <img id="MSearchSelect" src="search/mag_sel.png"
-               onmouseover="return searchBox.OnSearchSelectShow()"
-               onmouseout="return searchBox.OnSearchSelectHide()"
-               alt=""/>
-          <input type="text" id="MSearchField" value="Search" accesskey="S"
-               onfocus="searchBox.OnSearchFieldFocus(true)" 
-               onblur="searchBox.OnSearchFieldFocus(false)" 
-               onkeyup="searchBox.OnSearchFieldChange(event)"/>
-          </span><span class="right">
-            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
-          </span>
-        </div>
-      </li>
-    </ul>
-  </div>
-</div><!-- top -->
-<div id="side-nav" class="ui-resizable side-nav-resizable">
-  <div id="nav-tree">
-    <div id="nav-tree-contents">
-      <div id="nav-sync" class="sync"></div>
-    </div>
-  </div>
-  <div id="splitbar" style="-moz-user-select:none;" 
-       class="ui-resizable-handle">
-  </div>
-</div>
-<script type="text/javascript">
-$(document).ready(function(){initNavTree('index.html','');});
-</script>
-<div id="doc-content">
-<!-- window showing the filter options -->
-<div id="MSearchSelectWindow"
-     onmouseover="return searchBox.OnSearchSelectShow()"
-     onmouseout="return searchBox.OnSearchSelectHide()"
-     onkeydown="return searchBox.OnSearchSelectKey(event)">
-<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Pages</a></div>
-
-<!-- iframe showing the search results (closed by default) -->
-<div id="MSearchResultsWindow">
-<iframe src="javascript:void(0)" frameborder="0" 
-        name="MSearchResults" id="MSearchResults">
-</iframe>
-</div>
-
-<div class="header">
-  <div class="headertitle">
-<div class="title">Overview </div>  </div>
-</div><!--header-->
-<div class="contents">
-<div class="textblock"><p>CMSIS-Build is now replaced with the <a href="https://github.com/Open-CMSIS-Pack/devtools/tree/main/tools" target="_blank"><b>CMSIS-Toolbox</b></a> that is a set of tools for creating and building projects that are based on software packs.</p>
-
-Content of this documentation is now <a href="https://open-cmsis-pack.github.io/devtools/buildmgr/latest/index.html" target="_blank"><b>provided here</b></a> and individual pages are redirected to the corresponding pages in CMSIS-Toolbox documents.
-
-<h1><a class="anchor" id="Components_of_CMSIS_Toolbox"></a>
-Components of CMSIS-Toolbox</h1>
-<p>The <a href="https://github.com/Open-CMSIS-Pack/devtools/tree/main/tools" target="_blank"><b>CMSIS-Toolbox</b></a> is developed under the <a href="https://www.open-cmsis-pack.org" target="_blank">Linaro Open-CMSIS-Pack</a> project and contains these tools:</p>
-<ul>
-<li><b>cpackget</b> download, add and remove software packs.</li>
-<li><b>csolution</b> to create and manage complex applications with user source files and content from software packs</li>
-<li><b>cbuild</b> controls the build process that translates a project to a executable binary image.</li>
-<li><b>packgen</b> to create a software pack from a CMake based software repository.</li>
-<li><b>packchk</b> to validate a software pack</li>
-</ul>
-<p>The <a href="https://github.com/Open-CMSIS-Pack/devtools/tree/main/tools" target="_blank"><b>CMSIS-Toolbox</b></a> can be used as stand-alone tools with command line interface (CLI) but will be integrated into several other Arm tool solutions such as:</p>
-<ul>
-<li><a href="https://www.arm.com/virtual-hardware" target="_blank"><b>Arm Virtual Hardware</b></a> to manage the build process in CI workflows.</li>
-<li><a href="https://www.keil.arm.com" target="_blank"><b>Keil Studio</b></a> as integral part of the project management.</li>
-<li><a href="https://www.keil.com/mdk5/" target="_blank"><b>Keil MDK</b></a> to provide CLI tools for project generation.</li>
-</ul>
-<h1><a class="anchor" id="Development_Workflow"></a>
-Development Workflow</h1>
-<p>The following diagram shows the development workflow using the CMSIS-Toolbox.</p>
-<div class="image">
-<img src="CMSIS-Toolbox.png" alt="CMSIS-Toolbox.png"/>
-<div class="caption">
-Diagram: CMSIS-Toolbox Development Workflow</div></div>
-<p> A solution that manages several related projects and projects can be composed using an intuitive <code>*.yml</code> format. This solution and project files are then translated using <b>csolution</b> CLI tool to the <code>*.CPRJ</code> project file format.</p>
-<p>The individual <code>*.CPRJ</code> project files can be imported to an IDE or by using <b>cbuild</b> translated into executable binary images.</p>
-<p>The <a class="el" href="cprjFormat_pg.html" target="_blank">*.CPRJ Project Format</a> describes the input file format that is used by <b>cbuild</b>.</p>
-<h1><a class="anchor" id="Revision_History"></a>
-Revision History</h1>
-<table class="doxtable">
-<tr>
-<th align="left">Version </th><th align="left">Description  </th></tr>
-<tr>
-<td align="left">replaced by </td><td align="left"><a href="https://github.com/Open-CMSIS-Pack/devtools/tree/main/tools" target="_blank"><b>CMSIS-Toolbox</b></a> now contains the <b>cbuild</b> (aka CMSIS-Build) CLI tool. </td></tr>
-<tr>
-<td align="left">0.10.0 (beta) </td><td align="left">CMake back-end and support for more Cortex-M processors including ArmV8.1M architecture. </td></tr>
-<tr>
-<td align="left">0.9.0 (beta) </td><td align="left">Support for multiple compilers and commands for layer management </td></tr>
-<tr>
-<td align="left">0.1.0 (alpha) </td><td align="left">Release for alpha review </td></tr>
-</table>
-</div></div><!-- contents -->
-</div><!-- doc-content -->
-<!-- start footer part -->
-<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
-  <ul>
-    <li class="footer">
-      <script type="text/javascript">
-        <!--
-        writeFooter.call(this);
-        //-->
-      </script>    
-    </li>
-  </ul>
-</div>
-</body>
-</html>

diff --git a/Documentation/Build/html/jquery.js b/Documentation/Build/html/jquery.js
deleted file mode 100644
index 3db33e6..0000000
--- a/Documentation/Build/html/jquery.js
+++ /dev/null

@@ -1,72 +0,0 @@
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- * jQuery JavaScript Library v1.7.1
- * http://jquery.com/
- *
- * Copyright 2011, John Resig
- * Dual licensed under the MIT or GPL Version 2 licenses.
- * http://jquery.org/license
- *
- * Includes Sizzle.js
- * http://sizzlejs.com/
- * Copyright 2011, The Dojo Foundation
- * Released under the MIT, BSD, and GPL Licenses.
- *
- * Date: Mon Nov 21 21:11:03 2011 -0500
- */
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-/*!
- * jQuery UI 1.8.18
- *
- * Copyright 2011, AUTHORS.txt (http://jqueryui.com/about)
- * Dual licensed under the MIT or GPL Version 2 licenses.
- * http://jquery.org/license
- *
- * http://docs.jquery.com/UI
- */
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- * jQuery UI Widget 1.8.18
- *
- * Copyright 2011, AUTHORS.txt (http://jqueryui.com/about)
- * Dual licensed under the MIT or GPL Version 2 licenses.
- * http://jquery.org/license
- *
- * http://docs.jquery.com/UI/Widget
- */
-(function(b,d){if(b.cleanData){var c=b.cleanData;b.cleanData=function(f){for(var g=0,h;(h=f[g])!=null;g++){try{b(h).triggerHandler("remove")}catch(j){}}c(f)}}else{var a=b.fn.remove;b.fn.remove=function(e,f){return this.each(function(){if(!f){if(!e||b.filter(e,[this]).length){b("*",this).add([this]).each(function(){try{b(this).triggerHandler("remove")}catch(g){}})}}return a.call(b(this),e,f)})}}b.widget=function(f,h,e){var g=f.split(".")[0],j;f=f.split(".")[1];j=g+"-"+f;if(!e){e=h;h=b.Widget}b.expr[":"][j]=function(k){return !!b.data(k,f)};b[g]=b[g]||{};b[g][f]=function(k,l){if(arguments.length){this._createWidget(k,l)}};var i=new h();i.options=b.extend(true,{},i.options);b[g][f].prototype=b.extend(true,i,{namespace:g,widgetName:f,widgetEventPrefix:b[g][f].prototype.widgetEventPrefix||f,widgetBaseClass:j},e);b.widget.bridge(f,b[g][f])};b.widget.bridge=function(f,e){b.fn[f]=function(i){var g=typeof i==="string",h=Array.prototype.slice.call(arguments,1),j=this;i=!g&&h.length?b.extend.apply(null,[true,i].concat(h)):i;if(g&&i.charAt(0)==="_"){return j}if(g){this.each(function(){var k=b.data(this,f),l=k&&b.isFunction(k[i])?k[i].apply(k,h):k;if(l!==k&&l!==d){j=l;return false}})}else{this.each(function(){var k=b.data(this,f);if(k){k.option(i||{})._init()}else{b.data(this,f,new e(i,this))}})}return j}};b.Widget=function(e,f){if(arguments.length){this._createWidget(e,f)}};b.Widget.prototype={widgetName:"widget",widgetEventPrefix:"",options:{disabled:false},_createWidget:function(f,g){b.data(g,this.widgetName,this);this.element=b(g);this.options=b.extend(true,{},this.options,this._getCreateOptions(),f);var e=this;this.element.bind("remove."+this.widgetName,function(){e.destroy()});this._create();this._trigger("create");this._init()},_getCreateOptions:function(){return b.metadata&&b.metadata.get(this.element[0])[this.widgetName]},_create:function(){},_init:function(){},destroy:function(){this.element.unbind("."+this.widgetName).removeData(this.widgetName);this.widget().unbind("."+this.widgetName).removeAttr("aria-disabled").removeClass(this.widgetBaseClass+"-disabled ui-state-disabled")},widget:function(){return this.element},option:function(f,g){var e=f;if(arguments.length===0){return b.extend({},this.options)}if(typeof f==="string"){if(g===d){return this.options[f]}e={};e[f]=g}this._setOptions(e);return this},_setOptions:function(f){var e=this;b.each(f,function(g,h){e._setOption(g,h)});return this},_setOption:function(e,f){this.options[e]=f;if(e==="disabled"){this.widget()[f?"addClass":"removeClass"](this.widgetBaseClass+"-disabled ui-state-disabled").attr("aria-disabled",f)}return this},enable:function(){return this._setOption("disabled",false)},disable:function(){return this._setOption("disabled",true)},_trigger:function(e,f,g){var j,i,h=this.options[e];g=g||{};f=b.Event(f);f.type=(e===this.widgetEventPrefix?e:this.widgetEventPrefix+e).toLowerCase();f.target=this.element[0];i=f.originalEvent;if(i){for(j in i){if(!(j in f)){f[j]=i[j]}}}this.element.trigger(f,g);return !(b.isFunction(h)&&h.call(this.element[0],f,g)===false||f.isDefaultPrevented())}}})(jQuery);/*!
- * jQuery UI Mouse 1.8.18
- *
- * Copyright 2011, AUTHORS.txt (http://jqueryui.com/about)
- * Dual licensed under the MIT or GPL Version 2 licenses.
- * http://jquery.org/license
- *
- * http://docs.jquery.com/UI/Mouse
- *
- * Depends:
- *	jquery.ui.widget.js
- */
-(function(b,c){var a=false;b(document).mouseup(function(d){a=false});b.widget("ui.mouse",{options:{cancel:":input,option",distance:1,delay:0},_mouseInit:function(){var d=this;this.element.bind("mousedown."+this.widgetName,function(e){return d._mouseDown(e)}).bind("click."+this.widgetName,function(e){if(true===b.data(e.target,d.widgetName+".preventClickEvent")){b.removeData(e.target,d.widgetName+".preventClickEvent");e.stopImmediatePropagation();return false}});this.started=false},_mouseDestroy:function(){this.element.unbind("."+this.widgetName)},_mouseDown:function(f){if(a){return}(this._mouseStarted&&this._mouseUp(f));this._mouseDownEvent=f;var e=this,g=(f.which==1),d=(typeof this.options.cancel=="string"&&f.target.nodeName?b(f.target).closest(this.options.cancel).length:false);if(!g||d||!this._mouseCapture(f)){return true}this.mouseDelayMet=!this.options.delay;if(!this.mouseDelayMet){this._mouseDelayTimer=setTimeout(function(){e.mouseDelayMet=true},this.options.delay)}if(this._mouseDistanceMet(f)&&this._mouseDelayMet(f)){this._mouseStarted=(this._mouseStart(f)!==false);if(!this._mouseStarted){f.preventDefault();return true}}if(true===b.data(f.target,this.widgetName+".preventClickEvent")){b.removeData(f.target,this.widgetName+".preventClickEvent")}this._mouseMoveDelegate=function(h){return e._mouseMove(h)};this._mouseUpDelegate=function(h){return e._mouseUp(h)};b(document).bind("mousemove."+this.widgetName,this._mouseMoveDelegate).bind("mouseup."+this.widgetName,this._mouseUpDelegate);f.preventDefault();a=true;return true},_mouseMove:function(d){if(b.browser.msie&&!(document.documentMode>=9)&&!d.button){return this._mouseUp(d)}if(this._mouseStarted){this._mouseDrag(d);return d.preventDefault()}if(this._mouseDistanceMet(d)&&this._mouseDelayMet(d)){this._mouseStarted=(this._mouseStart(this._mouseDownEvent,d)!==false);(this._mouseStarted?this._mouseDrag(d):this._mouseUp(d))}return !this._mouseStarted},_mouseUp:function(d){b(document).unbind("mousemove."+this.widgetName,this._mouseMoveDelegate).unbind("mouseup."+this.widgetName,this._mouseUpDelegate);if(this._mouseStarted){this._mouseStarted=false;if(d.target==this._mouseDownEvent.target){b.data(d.target,this.widgetName+".preventClickEvent",true)}this._mouseStop(d)}return false},_mouseDistanceMet:function(d){return(Math.max(Math.abs(this._mouseDownEvent.pageX-d.pageX),Math.abs(this._mouseDownEvent.pageY-d.pageY))>=this.options.distance)},_mouseDelayMet:function(d){return this.mouseDelayMet},_mouseStart:function(d){},_mouseDrag:function(d){},_mouseStop:function(d){},_mouseCapture:function(d){return true}})})(jQuery);(function(c,d){c.widget("ui.resizable",c.ui.mouse,{widgetEventPrefix:"resize",options:{alsoResize:false,animate:false,animateDuration:"slow",animateEasing:"swing",aspectRatio:false,autoHide:false,containment:false,ghost:false,grid:false,handles:"e,s,se",helper:false,maxHeight:null,maxWidth:null,minHeight:10,minWidth:10,zIndex:1000},_create:function(){var f=this,k=this.options;this.element.addClass("ui-resizable");c.extend(this,{_aspectRatio:!!(k.aspectRatio),aspectRatio:k.aspectRatio,originalElement:this.element,_proportionallyResizeElements:[],_helper:k.helper||k.ghost||k.animate?k.helper||"ui-resizable-helper":null});if(this.element[0].nodeName.match(/canvas|textarea|input|select|button|img/i)){this.element.wrap(c('<div class="ui-wrapper" style="overflow: hidden;"></div>').css({position:this.element.css("position"),width:this.element.outerWidth(),height:this.element.outerHeight(),top:this.element.css("top"),left:this.element.css("left")}));this.element=this.element.parent().data("resizable",this.element.data("resizable"));this.elementIsWrapper=true;this.element.css({marginLeft:this.originalElement.css("marginLeft"),marginTop:this.originalElement.css("marginTop"),marginRight:this.originalElement.css("marginRight"),marginBottom:this.originalElement.css("marginBottom")});this.originalElement.css({marginLeft:0,marginTop:0,marginRight:0,marginBottom:0});this.originalResizeStyle=this.originalElement.css("resize");this.originalElement.css("resize","none");this._proportionallyResizeElements.push(this.originalElement.css({position:"static",zoom:1,display:"block"}));this.originalElement.css({margin:this.originalElement.css("margin")});this._proportionallyResize()}this.handles=k.handles||(!c(".ui-resizable-handle",this.element).length?"e,s,se":{n:".ui-resizable-n",e:".ui-resizable-e",s:".ui-resizable-s",w:".ui-resizable-w",se:".ui-resizable-se",sw:".ui-resizable-sw",ne:".ui-resizable-ne",nw:".ui-resizable-nw"});if(this.handles.constructor==String){if(this.handles=="all"){this.handles="n,e,s,w,se,sw,ne,nw"}var l=this.handles.split(",");this.handles={};for(var g=0;g<l.length;g++){var j=c.trim(l[g]),e="ui-resizable-"+j;var h=c('<div class="ui-resizable-handle '+e+'"></div>');if(/sw|se|ne|nw/.test(j)){h.css({zIndex:++k.zIndex})}if("se"==j){h.addClass("ui-icon ui-icon-gripsmall-diagonal-se")}this.handles[j]=".ui-resizable-"+j;this.element.append(h)}}this._renderAxis=function(q){q=q||this.element;for(var n in this.handles){if(this.handles[n].constructor==String){this.handles[n]=c(this.handles[n],this.element).show()}if(this.elementIsWrapper&&this.originalElement[0].nodeName.match(/textarea|input|select|button/i)){var o=c(this.handles[n],this.element),p=0;p=/sw|ne|nw|se|n|s/.test(n)?o.outerHeight():o.outerWidth();var m=["padding",/ne|nw|n/.test(n)?"Top":/se|sw|s/.test(n)?"Bottom":/^e$/.test(n)?"Right":"Left"].join("");q.css(m,p);this._proportionallyResize()}if(!c(this.handles[n]).length){continue}}};this._renderAxis(this.element);this._handles=c(".ui-resizable-handle",this.element).disableSelection();this._handles.mouseover(function(){if(!f.resizing){if(this.className){var i=this.className.match(/ui-resizable-(se|sw|ne|nw|n|e|s|w)/i)}f.axis=i&&i[1]?i[1]:"se"}});if(k.autoHide){this._handles.hide();c(this.element).addClass("ui-resizable-autohide").hover(function(){if(k.disabled){return}c(this).removeClass("ui-resizable-autohide");f._handles.show()},function(){if(k.disabled){return}if(!f.resizing){c(this).addClass("ui-resizable-autohide");f._handles.hide()}})}this._mouseInit()},destroy:function(){this._mouseDestroy();var e=function(g){c(g).removeClass("ui-resizable ui-resizable-disabled ui-resizable-resizing").removeData("resizable").unbind(".resizable").find(".ui-resizable-handle").remove()};if(this.elementIsWrapper){e(this.element);var f=this.element;f.after(this.originalElement.css({position:f.css("position"),width:f.outerWidth(),height:f.outerHeight(),top:f.css("top"),left:f.css("left")})).remove()}this.originalElement.css("resize",this.originalResizeStyle);e(this.originalElement);return this},_mouseCapture:function(f){var g=false;for(var e in this.handles){if(c(this.handles[e])[0]==f.target){g=true}}return !this.options.disabled&&g},_mouseStart:function(g){var j=this.options,f=this.element.position(),e=this.element;this.resizing=true;this.documentScroll={top:c(document).scrollTop(),left:c(document).scrollLeft()};if(e.is(".ui-draggable")||(/absolute/).test(e.css("position"))){e.css({position:"absolute",top:f.top,left:f.left})}this._renderProxy();var k=b(this.helper.css("left")),h=b(this.helper.css("top"));if(j.containment){k+=c(j.containment).scrollLeft()||0;h+=c(j.containment).scrollTop()||0}this.offset=this.helper.offset();this.position={left:k,top:h};this.size=this._helper?{width:e.outerWidth(),height:e.outerHeight()}:{width:e.width(),height:e.height()};this.originalSize=this._helper?{width:e.outerWidth(),height:e.outerHeight()}:{width:e.width(),height:e.height()};this.originalPosition={left:k,top:h};this.sizeDiff={width:e.outerWidth()-e.width(),height:e.outerHeight()-e.height()};this.originalMousePosition={left:g.pageX,top:g.pageY};this.aspectRatio=(typeof j.aspectRatio=="number")?j.aspectRatio:((this.originalSize.width/this.originalSize.height)||1);var i=c(".ui-resizable-"+this.axis).css("cursor");c("body").css("cursor",i=="auto"?this.axis+"-resize":i);e.addClass("ui-resizable-resizing");this._propagate("start",g);return true},_mouseDrag:function(e){var h=this.helper,g=this.options,m={},q=this,j=this.originalMousePosition,n=this.axis;var r=(e.pageX-j.left)||0,p=(e.pageY-j.top)||0;var i=this._change[n];if(!i){return false}var l=i.apply(this,[e,r,p]),k=c.browser.msie&&c.browser.version<7,f=this.sizeDiff;this._updateVirtualBoundaries(e.shiftKey);if(this._aspectRatio||e.shiftKey){l=this._updateRatio(l,e)}l=this._respectSize(l,e);this._propagate("resize",e);h.css({top:this.position.top+"px",left:this.position.left+"px",width:this.size.width+"px",height:this.size.height+"px"});if(!this._helper&&this._proportionallyResizeElements.length){this._proportionallyResize()}this._updateCache(l);this._trigger("resize",e,this.ui());return false},_mouseStop:function(h){this.resizing=false;var i=this.options,m=this;if(this._helper){var g=this._proportionallyResizeElements,e=g.length&&(/textarea/i).test(g[0].nodeName),f=e&&c.ui.hasScroll(g[0],"left")?0:m.sizeDiff.height,k=e?0:m.sizeDiff.width;var n={width:(m.helper.width()-k),height:(m.helper.height()-f)},j=(parseInt(m.element.css("left"),10)+(m.position.left-m.originalPosition.left))||null,l=(parseInt(m.element.css("top"),10)+(m.position.top-m.originalPosition.top))||null;if(!i.animate){this.element.css(c.extend(n,{top:l,left:j}))}m.helper.height(m.size.height);m.helper.width(m.size.width);if(this._helper&&!i.animate){this._proportionallyResize()}}c("body").css("cursor","auto");this.element.removeClass("ui-resizable-resizing");this._propagate("stop",h);if(this._helper){this.helper.remove()}return false},_updateVirtualBoundaries:function(g){var j=this.options,i,h,f,k,e;e={minWidth:a(j.minWidth)?j.minWidth:0,maxWidth:a(j.maxWidth)?j.maxWidth:Infinity,minHeight:a(j.minHeight)?j.minHeight:0,maxHeight:a(j.maxHeight)?j.maxHeight:Infinity};if(this._aspectRatio||g){i=e.minHeight*this.aspectRatio;f=e.minWidth/this.aspectRatio;h=e.maxHeight*this.aspectRatio;k=e.maxWidth/this.aspectRatio;if(i>e.minWidth){e.minWidth=i}if(f>e.minHeight){e.minHeight=f}if(h<e.maxWidth){e.maxWidth=h}if(k<e.maxHeight){e.maxHeight=k}}this._vBoundaries=e},_updateCache:function(e){var f=this.options;this.offset=this.helper.offset();if(a(e.left)){this.position.left=e.left}if(a(e.top)){this.position.top=e.top}if(a(e.height)){this.size.height=e.height}if(a(e.width)){this.size.width=e.width}},_updateRatio:function(h,g){var i=this.options,j=this.position,f=this.size,e=this.axis;if(a(h.height)){h.width=(h.height*this.aspectRatio)}else{if(a(h.width)){h.height=(h.width/this.aspectRatio)}}if(e=="sw"){h.left=j.left+(f.width-h.width);h.top=null}if(e=="nw"){h.top=j.top+(f.height-h.height);h.left=j.left+(f.width-h.width)}return h},_respectSize:function(l,g){var j=this.helper,i=this._vBoundaries,r=this._aspectRatio||g.shiftKey,q=this.axis,t=a(l.width)&&i.maxWidth&&(i.maxWidth<l.width),m=a(l.height)&&i.maxHeight&&(i.maxHeight<l.height),h=a(l.width)&&i.minWidth&&(i.minWidth>l.width),s=a(l.height)&&i.minHeight&&(i.minHeight>l.height);if(h){l.width=i.minWidth}if(s){l.height=i.minHeight}if(t){l.width=i.maxWidth}if(m){l.height=i.maxHeight}var f=this.originalPosition.left+this.originalSize.width,p=this.position.top+this.size.height;var k=/sw|nw|w/.test(q),e=/nw|ne|n/.test(q);if(h&&k){l.left=f-i.minWidth}if(t&&k){l.left=f-i.maxWidth}if(s&&e){l.top=p-i.minHeight}if(m&&e){l.top=p-i.maxHeight}var n=!l.width&&!l.height;if(n&&!l.left&&l.top){l.top=null}else{if(n&&!l.top&&l.left){l.left=null}}return l},_proportionallyResize:function(){var k=this.options;if(!this._proportionallyResizeElements.length){return}var g=this.helper||this.element;for(var f=0;f<this._proportionallyResizeElements.length;f++){var h=this._proportionallyResizeElements[f];if(!this.borderDif){var e=[h.css("borderTopWidth"),h.css("borderRightWidth"),h.css("borderBottomWidth"),h.css("borderLeftWidth")],j=[h.css("paddingTop"),h.css("paddingRight"),h.css("paddingBottom"),h.css("paddingLeft")];this.borderDif=c.map(e,function(l,n){var m=parseInt(l,10)||0,o=parseInt(j[n],10)||0;return m+o})}if(c.browser.msie&&!(!(c(g).is(":hidden")||c(g).parents(":hidden").length))){continue}h.css({height:(g.height()-this.borderDif[0]-this.borderDif[2])||0,width:(g.width()-this.borderDif[1]-this.borderDif[3])||0})}},_renderProxy:function(){var f=this.element,i=this.options;this.elementOffset=f.offset();if(this._helper){this.helper=this.helper||c('<div style="overflow:hidden;"></div>');var e=c.browser.msie&&c.browser.version<7,g=(e?1:0),h=(e?2:-1);this.helper.addClass(this._helper).css({width:this.element.outerWidth()+h,height:this.element.outerHeight()+h,position:"absolute",left:this.elementOffset.left-g+"px",top:this.elementOffset.top-g+"px",zIndex:++i.zIndex});this.helper.appendTo("body").disableSelection()}else{this.helper=this.element}},_change:{e:function(g,f,e){return{width:this.originalSize.width+f}},w:function(h,f,e){var j=this.options,g=this.originalSize,i=this.originalPosition;return{left:i.left+f,width:g.width-f}},n:function(h,f,e){var j=this.options,g=this.originalSize,i=this.originalPosition;return{top:i.top+e,height:g.height-e}},s:function(g,f,e){return{height:this.originalSize.height+e}},se:function(g,f,e){return c.extend(this._change.s.apply(this,arguments),this._change.e.apply(this,[g,f,e]))},sw:function(g,f,e){return c.extend(this._change.s.apply(this,arguments),this._change.w.apply(this,[g,f,e]))},ne:function(g,f,e){return c.extend(this._change.n.apply(this,arguments),this._change.e.apply(this,[g,f,e]))},nw:function(g,f,e){return c.extend(this._change.n.apply(this,arguments),this._change.w.apply(this,[g,f,e]))}},_propagate:function(f,e){c.ui.plugin.call(this,f,[e,this.ui()]);(f!="resize"&&this._trigger(f,e,this.ui()))},plugins:{},ui:function(){return{originalElement:this.originalElement,element:this.element,helper:this.helper,position:this.position,size:this.size,originalSize:this.originalSize,originalPosition:this.originalPosition}}});c.extend(c.ui.resizable,{version:"1.8.18"});c.ui.plugin.add("resizable","alsoResize",{start:function(f,g){var e=c(this).data("resizable"),i=e.options;var h=function(j){c(j).each(function(){var k=c(this);k.data("resizable-alsoresize",{width:parseInt(k.width(),10),height:parseInt(k.height(),10),left:parseInt(k.css("left"),10),top:parseInt(k.css("top"),10)})})};if(typeof(i.alsoResize)=="object"&&!i.alsoResize.parentNode){if(i.alsoResize.length){i.alsoResize=i.alsoResize[0];h(i.alsoResize)}else{c.each(i.alsoResize,function(j){h(j)})}}else{h(i.alsoResize)}},resize:function(g,i){var f=c(this).data("resizable"),j=f.options,h=f.originalSize,l=f.originalPosition;var k={height:(f.size.height-h.height)||0,width:(f.size.width-h.width)||0,top:(f.position.top-l.top)||0,left:(f.position.left-l.left)||0},e=function(m,n){c(m).each(function(){var q=c(this),r=c(this).data("resizable-alsoresize"),p={},o=n&&n.length?n:q.parents(i.originalElement[0]).length?["width","height"]:["width","height","top","left"];c.each(o,function(s,u){var t=(r[u]||0)+(k[u]||0);if(t&&t>=0){p[u]=t||null}});q.css(p)})};if(typeof(j.alsoResize)=="object"&&!j.alsoResize.nodeType){c.each(j.alsoResize,function(m,n){e(m,n)})}else{e(j.alsoResize)}},stop:function(e,f){c(this).removeData("resizable-alsoresize")}});c.ui.plugin.add("resizable","animate",{stop:function(i,n){var p=c(this).data("resizable"),j=p.options;var h=p._proportionallyResizeElements,e=h.length&&(/textarea/i).test(h[0].nodeName),f=e&&c.ui.hasScroll(h[0],"left")?0:p.sizeDiff.height,l=e?0:p.sizeDiff.width;var g={width:(p.size.width-l),height:(p.size.height-f)},k=(parseInt(p.element.css("left"),10)+(p.position.left-p.originalPosition.left))||null,m=(parseInt(p.element.css("top"),10)+(p.position.top-p.originalPosition.top))||null;
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diff --git a/Documentation/Build/html/make.html b/Documentation/Build/html/make.html
deleted file mode 100644
index e3a4a3c..0000000
--- a/Documentation/Build/html/make.html
+++ /dev/null

@@ -1,14 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<title>Redirect to the corresponding Open-CMSIS-Pack page after 0 seconds</title>
-<meta http-equiv="refresh" content="0; URL=index.html">
-<meta name="keywords" content="automatic redirection">
-</head>
-
-<body>
-
-If the automatic redirection is failing, click <a href="index.html">here</a> or try to find corresponding topic described in <a href="https://www.open-cmsis-pack.org">Open-CMSIS-Pack resources</a>.
-
-</body>
-</html>
\ No newline at end of file

diff --git a/Documentation/Build/html/nav_f.png b/Documentation/Build/html/nav_f.png
deleted file mode 100644
index 72a58a5..0000000
--- a/Documentation/Build/html/nav_f.png
+++ /dev/null
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diff --git a/Documentation/Build/html/nav_g.png b/Documentation/Build/html/nav_g.png
deleted file mode 100644
index 2093a23..0000000
--- a/Documentation/Build/html/nav_g.png
+++ /dev/null
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diff --git a/Documentation/Build/html/nav_h.png b/Documentation/Build/html/nav_h.png
deleted file mode 100644
index 33389b1..0000000
--- a/Documentation/Build/html/nav_h.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/navtree.css b/Documentation/Build/html/navtree.css
deleted file mode 100644
index 41a9cb9..0000000
--- a/Documentation/Build/html/navtree.css
+++ /dev/null

@@ -1,143 +0,0 @@
-#nav-tree .children_ul {
-  margin:0;
-  padding:4px;
-}
-
-#nav-tree ul {
-  list-style:none outside none;
-  margin:0px;
-  padding:0px;
-}
-
-#nav-tree li {
-  white-space:nowrap;
-  margin:0px;
-  padding:0px;
-}
-
-#nav-tree .plus {
-  margin:0px;
-}
-
-#nav-tree .selected {
-  background-image: url('tab_a.png');
-  background-repeat:repeat-x;
-  color: #fff;
-  text-shadow: 0px 1px 1px rgba(0, 0, 0, 1.0);
-}
-
-#nav-tree img {
-  margin:0px;
-  padding:0px;
-  border:0px;
-  vertical-align: middle;
-}
-
-#nav-tree a {
-  text-decoration:none;
-  padding:0px;
-  margin:0px;
-  outline:none;
-}
-
-#nav-tree .label {
-  margin:0px;
-  padding:0px;
-  font: 12px 'Lucida Grande',Geneva,Helvetica,Arial,sans-serif;
-}
-
-#nav-tree .label a {
-  padding:2px;
-}
-
-#nav-tree .selected a {
-  text-decoration:none;
-  color:#fff;
-}
-
-#nav-tree .children_ul {
-  margin:0px;
-  padding:0px;
-}
-
-#nav-tree .item {
-  margin:0px;
-  padding:0px;
-}
-
-#nav-tree {
-  padding: 0px 0px;
-  background-color: #FAFAFF; 
-  font-size:14px;
-  overflow:auto;
-}
-
-#doc-content {
-  overflow:auto;
-  display:block;
-  padding:0px;
-  margin:0px;
-  -webkit-overflow-scrolling : touch; /* iOS 5+ */
-}
-
-#side-nav {
-  padding:0 6px 0 0;
-  margin: 0px;
-  display:block;
-  position: absolute;
-  left: 0px;
-  width: 250px;
-}
-
-.ui-resizable .ui-resizable-handle {
-  display:block;
-}
-
-.ui-resizable-e {
-  background:url("ftv2splitbar.png") repeat scroll right center transparent;
-  cursor:e-resize;
-  height:100%;
-  right:0;
-  top:0;
-  width:6px;
-}
-
-.ui-resizable-handle {
-  display:none;
-  font-size:0.1px;
-  position:absolute;
-  z-index:1;
-}
-
-#nav-tree-contents {
-  margin: 6px 0px 0px 0px;
-}
-
-#nav-tree {
-  background-image:url('nav_h.png');
-  background-repeat:repeat-x;
-  background-color: #F9FAFC;
-  -webkit-overflow-scrolling : touch; /* iOS 5+ */
-}
-
-#nav-sync {
-  position:absolute;
-  top:5px;
-  right:24px;
-  z-index:0;
-}
-
-#nav-sync img {
-  opacity:0.3;
-}
-
-#nav-sync img:hover {
-  opacity:0.9;
-}
-
-@media print
-{
-  #nav-tree { display: none; }
-  div.ui-resizable-handle { display: none; position: relative; }
-}
-

diff --git a/Documentation/Build/html/navtree.js b/Documentation/Build/html/navtree.js
deleted file mode 100644
index 99ecacd..0000000
--- a/Documentation/Build/html/navtree.js
+++ /dev/null

@@ -1,527 +0,0 @@
-var NAVTREE =
-[
-  [ "CMSIS-Build", "index.html"]
-];
-
-var NAVTREEINDEX =
-[
-"CmdLineBuild.html"
-];
-
-var SYNCONMSG = 'click to disable panel synchronisation';
-var SYNCOFFMSG = 'click to enable panel synchronisation';
-var SYNCONMSG = 'click to disable panel synchronisation';
-var SYNCOFFMSG = 'click to enable panel synchronisation';
-var navTreeSubIndices = new Array();
-
-function getData(varName)
-{
-  var i = varName.lastIndexOf('/');
-  var n = i>=0 ? varName.substring(i+1) : varName;
-  return eval(n.replace(/\-/g,'_'));
-}
-
-function stripPath(uri)
-{
-  return uri.substring(uri.lastIndexOf('/')+1);
-}
-
-function stripPath2(uri)
-{
-  var i = uri.lastIndexOf('/');
-  var s = uri.substring(i+1);
-  var m = uri.substring(0,i+1).match(/\/d\w\/d\w\w\/$/);
-  return m ? uri.substring(i-6) : s;
-}
-
-function localStorageSupported()
-{
-  try {
-    return 'localStorage' in window && window['localStorage'] !== null && window.localStorage.getItem;
-  }
-  catch(e) {
-    return false;
-  }
-}
-
-
-function storeLink(link)
-{
-  if (!$("#nav-sync").hasClass('sync') && localStorageSupported()) {
-      window.localStorage.setItem('navpath',link);
-  }
-}
-
-function deleteLink()
-{
-  if (localStorageSupported()) {
-    window.localStorage.setItem('navpath','');
-  } 
-}
-
-function cachedLink()
-{
-  if (localStorageSupported()) {
-    return window.localStorage.getItem('navpath');
-  } else {
-    return '';
-  }
-}
-
-function getScript(scriptName,func,show)
-{
-  var head = document.getElementsByTagName("head")[0]; 
-  var script = document.createElement('script');
-  script.id = scriptName;
-  script.type = 'text/javascript';
-  script.onload = func; 
-  script.src = scriptName+'.js'; 
-  if ($.browser.msie && $.browser.version<=8) { 
-    // script.onload does not work with older versions of IE
-    script.onreadystatechange = function() {
-      if (script.readyState=='complete' || script.readyState=='loaded') { 
-        func(); if (show) showRoot(); 
-      }
-    }
-  }
-  head.appendChild(script); 
-}
-
-function createIndent(o,domNode,node,level)
-{
-  var level=-1;
-  var n = node;
-  while (n.parentNode) { level++; n=n.parentNode; }
-  if (node.childrenData) {
-    var imgNode = document.createElement("img");
-    imgNode.style.paddingLeft=(16*level).toString()+'px';
-    imgNode.width  = 16;
-    imgNode.height = 22;
-    imgNode.border = 0;
-    node.plus_img = imgNode;
-    node.expandToggle = document.createElement("a");
-    node.expandToggle.href = "javascript:void(0)";
-    node.expandToggle.onclick = function() {
-      if (node.expanded) {
-        $(node.getChildrenUL()).slideUp("fast");
-        node.plus_img.src = node.relpath+"ftv2pnode.png";
-        node.expanded = false;
-      } else {
-        expandNode(o, node, false, false);
-      }
-    }
-    node.expandToggle.appendChild(imgNode);
-    domNode.appendChild(node.expandToggle);
-    imgNode.src = node.relpath+"ftv2pnode.png";
-  } else {
-    var span = document.createElement("span");
-    span.style.display = 'inline-block';
-    span.style.width   = 16*(level+1)+'px';
-    span.style.height  = '22px';
-    span.innerHTML = '&#160;';
-    domNode.appendChild(span);
-  } 
-}
-
-var animationInProgress = false;
-
-function gotoAnchor(anchor,aname,updateLocation)
-{
-  var pos, docContent = $('#doc-content');
-  if (anchor.parent().attr('class')=='memItemLeft' ||
-      anchor.parent().attr('class')=='fieldtype' ||
-      anchor.parent().is(':header')) 
-  {
-    pos = anchor.parent().position().top;
-  } else if (anchor.position()) {
-    pos = anchor.position().top;
-  }
-  if (pos) {
-    var dist = Math.abs(Math.min(
-               pos-docContent.offset().top,
-               docContent[0].scrollHeight-
-               docContent.height()-docContent.scrollTop()));
-    animationInProgress=true;
-    docContent.animate({
-      scrollTop: pos + docContent.scrollTop() - docContent.offset().top
-    },Math.max(50,Math.min(500,dist)),function(){
-      if (updateLocation) window.location.href=aname;
-      animationInProgress=false;
-    });
-  }
-}
-
-function newNode(o, po, text, link, childrenData, lastNode)
-{
-  var node = new Object();
-  node.children = Array();
-  node.childrenData = childrenData;
-  node.depth = po.depth + 1;
-  node.relpath = po.relpath;
-  node.isLast = lastNode;
-
-  node.li = document.createElement("li");
-  po.getChildrenUL().appendChild(node.li);
-  node.parentNode = po;
-
-  node.itemDiv = document.createElement("div");
-  node.itemDiv.className = "item";
-
-  node.labelSpan = document.createElement("span");
-  node.labelSpan.className = "label";
-
-  createIndent(o,node.itemDiv,node,0);
-  node.itemDiv.appendChild(node.labelSpan);
-  node.li.appendChild(node.itemDiv);
-
-  var a = document.createElement("a");
-  node.labelSpan.appendChild(a);
-  node.label = document.createTextNode(text);
-  node.expanded = false;
-  a.appendChild(node.label);
-  if (link) {
-    var url;
-    if (link.substring(0,1)=='^') {
-      url = link.substring(1);
-      link = url;
-    } else {
-      url = node.relpath+link;
-    }
-    a.className = stripPath(link.replace('#',':'));
-    if (link.indexOf('#')!=-1) {
-      var aname = '#'+link.split('#')[1];
-      var srcPage = stripPath($(location).attr('pathname'));
-      var targetPage = stripPath(link.split('#')[0]);
-      a.href = srcPage!=targetPage ? url : "javascript:void(0)"; 
-      a.onclick = function(){
-        storeLink(link);
-        if (!$(a).parent().parent().hasClass('selected'))
-        {
-          $('.item').removeClass('selected');
-          $('.item').removeAttr('id');
-          $(a).parent().parent().addClass('selected');
-          $(a).parent().parent().attr('id','selected');
-        }
-        var anchor = $(aname);
-        gotoAnchor(anchor,aname,true);
-      };
-    } else {
-      a.href = url;
-      a.onclick = function() { storeLink(link); }
-    }
-  } else {
-    if (childrenData != null) 
-    {
-      a.className = "nolink";
-      a.href = "javascript:void(0)";
-      a.onclick = node.expandToggle.onclick;
-    }
-  }
-
-  node.childrenUL = null;
-  node.getChildrenUL = function() {
-    if (!node.childrenUL) {
-      node.childrenUL = document.createElement("ul");
-      node.childrenUL.className = "children_ul";
-      node.childrenUL.style.display = "none";
-      node.li.appendChild(node.childrenUL);
-    }
-    return node.childrenUL;
-  };
-
-  return node;
-}
-
-function showRoot()
-{
-  var headerHeight = $("#top").height();
-  var footerHeight = $("#nav-path").height();
-  var windowHeight = $(window).height() - headerHeight - footerHeight;
-  (function (){ // retry until we can scroll to the selected item
-    try {
-      var navtree=$('#nav-tree');
-      navtree.scrollTo('#selected',0,{offset:-windowHeight/2});
-    } catch (err) {
-      setTimeout(arguments.callee, 0);
-    }
-  })();
-}
-
-function expandNode(o, node, imm, showRoot)
-{
-  if (node.childrenData && !node.expanded) {
-    if (typeof(node.childrenData)==='string') {
-      var varName    = node.childrenData;
-      getScript(node.relpath+varName,function(){
-        node.childrenData = getData(varName);
-        expandNode(o, node, imm, showRoot);
-      }, showRoot);
-    } else {
-      if (!node.childrenVisited) {
-        getNode(o, node);
-      } if (imm || ($.browser.msie && $.browser.version>8)) { 
-        // somehow slideDown jumps to the start of tree for IE9 :-(
-        $(node.getChildrenUL()).show();
-      } else {
-        $(node.getChildrenUL()).slideDown("fast");
-      }
-      if (node.isLast) {
-        node.plus_img.src = node.relpath+"ftv2mlastnode.png";
-      } else {
-        node.plus_img.src = node.relpath+"ftv2mnode.png";
-      }
-      node.expanded = true;
-    }
-  }
-}
-
-function glowEffect(n,duration)
-{
-  n.addClass('glow').delay(duration).queue(function(next){
-    $(this).removeClass('glow');next();
-  });
-}
-
-function highlightAnchor()
-{
-  var aname = $(location).attr('hash');
-  var anchor = $(aname);
-  if (anchor.parent().attr('class')=='memItemLeft'){
-    var rows = $('.memberdecls tr[class$="'+
-               window.location.hash.substring(1)+'"]');
-    glowEffect(rows.children(),300); // member without details
-  } else if (anchor.parents().slice(2).prop('tagName')=='TR') {
-    glowEffect(anchor.parents('div.memitem'),1000); // enum value
-  } else if (anchor.parent().attr('class')=='fieldtype'){
-    glowEffect(anchor.parent().parent(),1000); // struct field
-  } else if (anchor.parent().is(":header")) {
-    glowEffect(anchor.parent(),1000); // section header
-  } else {
-    glowEffect(anchor.next(),1000); // normal member
-  }
-  gotoAnchor(anchor,aname,false);
-}
-
-function selectAndHighlight(hash,n)
-{
-  var a;
-  if (hash) {
-    var link=stripPath($(location).attr('pathname'))+':'+hash.substring(1);
-    a=$('.item a[class$="'+link+'"]');
-  }
-  if (a && a.length) {
-    a.parent().parent().addClass('selected');
-    a.parent().parent().attr('id','selected');
-    highlightAnchor();
-  } else if (n) {
-    $(n.itemDiv).addClass('selected');
-    $(n.itemDiv).attr('id','selected');
-  }
-  if ($('#nav-tree-contents .item:first').hasClass('selected')) {
-    $('#nav-sync').css('top','30px');
-  } else {
-    $('#nav-sync').css('top','5px');
-  }
-  showRoot();
-}
-
-function showNode(o, node, index, hash)
-{
-  if (node && node.childrenData) {
-    if (typeof(node.childrenData)==='string') {
-      var varName    = node.childrenData;
-      getScript(node.relpath+varName,function(){
-        node.childrenData = getData(varName);
-        showNode(o,node,index,hash);
-      },true);
-    } else {
-      if (!node.childrenVisited) {
-        getNode(o, node);
-      }
-      $(node.getChildrenUL()).css({'display':'block'});
-      if (node.isLast) {
-        node.plus_img.src = node.relpath+"ftv2mlastnode.png";
-      } else {
-        node.plus_img.src = node.relpath+"ftv2mnode.png";
-      }
-      node.expanded = true;
-      var n = node.children[o.breadcrumbs[index]];
-      if (index+1<o.breadcrumbs.length) {
-        showNode(o,n,index+1,hash);
-      } else {
-        if (typeof(n.childrenData)==='string') {
-          var varName = n.childrenData;
-          getScript(n.relpath+varName,function(){
-            n.childrenData = getData(varName);
-            node.expanded=false;
-            showNode(o,node,index,hash); // retry with child node expanded
-          },true);
-        } else {
-          var rootBase = stripPath(o.toroot.replace(/\..+$/, ''));
-          if (rootBase=="index" || rootBase=="pages" || rootBase=="search") {
-            expandNode(o, n, true, true);
-          }
-          selectAndHighlight(hash,n);
-        }
-      }
-    }
-  } else {
-    selectAndHighlight(hash);
-  }
-}
-
-function removeToInsertLater(element) {
-  var parentNode = element.parentNode;
-  var nextSibling = element.nextSibling;
-  parentNode.removeChild(element);
-  return function() {
-    if (nextSibling) {
-      parentNode.insertBefore(element, nextSibling);
-    } else {
-      parentNode.appendChild(element);
-    }
-  };
-}
-
-function getNode(o, po)
-{
-  var insertFunction = removeToInsertLater(po.li);
-  po.childrenVisited = true;
-  var l = po.childrenData.length-1;
-  for (var i in po.childrenData) {
-    var nodeData = po.childrenData[i];
-    po.children[i] = newNode(o, po, nodeData[0], nodeData[1], nodeData[2],
-      i==l);
-  }
-  insertFunction();
-}
-
-function gotoNode(o,subIndex,root,hash,relpath)
-{
-  var nti = navTreeSubIndices[subIndex][root+hash];
-  o.breadcrumbs = $.extend(true, [], nti ? nti : navTreeSubIndices[subIndex][root]);
-  if (!o.breadcrumbs && root!=NAVTREE[0][1]) { // fallback: show index
-    navTo(o,NAVTREE[0][1],"",relpath);
-    $('.item').removeClass('selected');
-    $('.item').removeAttr('id');
-  }
-  if (o.breadcrumbs) {
-    o.breadcrumbs.unshift(0); // add 0 for root node
-    showNode(o, o.node, 0, hash);
-  }
-}
-
-function navTo(o,root,hash,relpath)
-{
-  var link = cachedLink();
-  if (link) {
-    var parts = link.split('#');
-    root = parts[0];
-    if (parts.length>1) hash = '#'+parts[1];
-    else hash='';
-  }
-  if (hash.match(/^#l\d+$/)) {
-    var anchor=$('a[name='+hash.substring(1)+']');
-    glowEffect(anchor.parent(),1000); // line number
-    hash=''; // strip line number anchors
-    //root=root.replace(/_source\./,'.'); // source link to doc link
-  }
-  var url=root+hash;
-  var i=-1;
-  while (NAVTREEINDEX[i+1]<=url) i++;
-  if (i==-1) { i=0; root=NAVTREE[0][1]; } // fallback: show index
-  if (navTreeSubIndices[i]) {
-    gotoNode(o,i,root,hash,relpath)
-  } else {
-    getScript(relpath+'navtreeindex'+i,function(){
-      navTreeSubIndices[i] = eval('NAVTREEINDEX'+i);
-      if (navTreeSubIndices[i]) {
-        gotoNode(o,i,root,hash,relpath);
-      }
-    },true);
-  }
-}
-
-function showSyncOff(n,relpath)
-{
-    n.html('<img src="'+relpath+'sync_off.png" title="'+SYNCOFFMSG+'"/>');
-}
-
-function showSyncOn(n,relpath)
-{
-    n.html('<img src="'+relpath+'sync_on.png" title="'+SYNCONMSG+'"/>');
-}
-
-function toggleSyncButton(relpath)
-{
-  var navSync = $('#nav-sync');
-  if (navSync.hasClass('sync')) {
-    navSync.removeClass('sync');
-    showSyncOff(navSync,relpath);
-    storeLink(stripPath2($(location).attr('pathname'))+$(location).attr('hash'));
-  } else {
-    navSync.addClass('sync');
-    showSyncOn(navSync,relpath);
-    deleteLink();
-  }
-}
-
-function initNavTree(toroot,relpath)
-{
-  var o = new Object();
-  o.toroot = toroot;
-  o.node = new Object();
-  o.node.li = document.getElementById("nav-tree-contents");
-  o.node.childrenData = NAVTREE;
-  o.node.children = new Array();
-  o.node.childrenUL = document.createElement("ul");
-  o.node.getChildrenUL = function() { return o.node.childrenUL; };
-  o.node.li.appendChild(o.node.childrenUL);
-  o.node.depth = 0;
-  o.node.relpath = relpath;
-  o.node.expanded = false;
-  o.node.isLast = true;
-  o.node.plus_img = document.createElement("img");
-  o.node.plus_img.src = relpath+"ftv2pnode.png";
-  o.node.plus_img.width = 16;
-  o.node.plus_img.height = 22;
-
-  if (localStorageSupported()) {
-    var navSync = $('#nav-sync');
-    if (cachedLink()) {
-      showSyncOff(navSync,relpath);
-      navSync.removeClass('sync');
-    } else {
-      showSyncOn(navSync,relpath);
-    }
-    navSync.click(function(){ toggleSyncButton(relpath); });
-  }
-
-  $(window).load(function(){
-    navTo(o,toroot,window.location.hash,relpath);
-    showRoot();
-  });
-
-  $(window).bind('hashchange', function(){
-     if (window.location.hash && window.location.hash.length>1){
-       var a;
-       if ($(location).attr('hash')){
-         var clslink=stripPath($(location).attr('pathname'))+':'+
-                               $(location).attr('hash').substring(1);
-         a=$('.item a[class$="'+clslink+'"]');
-       }
-       if (a==null || !$(a).parent().parent().hasClass('selected')){
-         $('.item').removeClass('selected');
-         $('.item').removeAttr('id');
-       }
-       var link=stripPath2($(location).attr('pathname'));
-       navTo(o,link,$(location).attr('hash'),relpath);
-     } else if (!animationInProgress) {
-       $('#doc-content').scrollTop(0);
-       $('.item').removeClass('selected');
-       $('.item').removeAttr('id');
-       navTo(o,toroot,window.location.hash,relpath);
-     }
-  })
-}
-

diff --git a/Documentation/Build/html/navtreeindex0.js b/Documentation/Build/html/navtreeindex0.js
deleted file mode 100644
index d120745..0000000
--- a/Documentation/Build/html/navtreeindex0.js
+++ /dev/null

@@ -1,4 +0,0 @@
-var NAVTREEINDEX0 =
-{
-
-};

diff --git a/Documentation/Build/html/open.png b/Documentation/Build/html/open.png
deleted file mode 100644
index 30f75c7..0000000
--- a/Documentation/Build/html/open.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/pages.html b/Documentation/Build/html/pages.html
deleted file mode 100644
index 2d09151..0000000
--- a/Documentation/Build/html/pages.html
+++ /dev/null

@@ -1,14 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<title>Redirect to the corresponding Open-CMSIS-Pack page after 0 seconds</title>
-<meta http-equiv="refresh" content="0; URL=https://open-cmsis-pack.github.io/devtools/buildmgr/latest/pages.html">
-<meta name="keywords" content="automatic redirection">
-</head>
-
-<body>
-
-If the automatic redirection is failing, click <a href="https://open-cmsis-pack.github.io/devtools/buildmgr/latest/pages.html">here</a> or try to find corresponding topic described in <a href="https://www.open-cmsis-pack.org">Open-CMSIS-Pack resources</a>.
-
-</body>
-</html>
\ No newline at end of file

diff --git a/Documentation/Build/html/printComponentTabs.js b/Documentation/Build/html/printComponentTabs.js
deleted file mode 100644
index 1858286..0000000
--- a/Documentation/Build/html/printComponentTabs.js
+++ /dev/null

@@ -1,40 +0,0 @@
-var strgURL =   location.pathname;                      // path of current component
-
-// constuctor for the array of objects
-function tabElement(id, folderName, tabTxt )  {
-	this.id = id;                                       // elementID as needed in html; 
-	this.folderName = folderName;                       // folder name of the component 
-    this.tabTxt = tabTxt;                               // Text displayed as menu on the web
-	this.currentListItem = '<li id="' + this.id + '" class="current"> <a href="../..' + this.folderName + 'index.html"><span>' + this.tabTxt + '</span></a></li>';
-	this.listItem = '<li id="' + this.id + '"> <a href="../..' + this.folderName + 'index.html"><span>' + this.tabTxt + '</span></a></li>';
-};
-
-// array of objects
-var arr = [];
-
-// fill array
- arr.push( new tabElement( "GEN",     "/General/html/",     "General")   );
- arr.push( new tabElement( "CORE_A",  "/Core_A/html/",      "Core(A)")   );
- arr.push( new tabElement( "CORE_M",  "/Core/html/",        "Core(M)")   );
- arr.push( new tabElement( "DRV",     "/Driver/html/",      "Driver")    );
- arr.push( new tabElement( "DSP&ML",  "/DSP/html/",         "DSP")       );
- arr.push( new tabElement( "NN",      "/NN/html/",          "NN")        );
- arr.push( new tabElement( "RTOSv1",  "/RTOS/html/",        "RTOS v1")   );
- arr.push( new tabElement( "RTOSv2",  "/RTOS2/html/",       "RTOS v2")   );
- arr.push( new tabElement( "PACK",    "/Pack/html/",        "Pack")      );
- arr.push( new tabElement( "Build",   "/Build/html/",       "Build")     );
- arr.push( new tabElement( "SVD",     "/SVD/html/",         "SVD")       );
- arr.push( new tabElement( "DAP",     "/DAP/html/",         "DAP")       );
- arr.push( new tabElement( "ZONE",    "/Zone/html/",        "Zone")      );
- 
-// write tabs
-// called from the header file.
-function writeComponentTabs()  {
-  for ( var i=0; i < arr.length; i++ ) {
-    if (strgURL.search(arr[i].folderName) > 0) {                    // if this is the current folder
-      document.write(arr[i].currentListItem);                       // then print and hightlight the tab
-    } else {                                                      
-      document.write(arr[i].listItem);                              // else, print the tab
-    }                                                             
-  }
-};

diff --git a/Documentation/Build/html/projectDescriptionSchema.html b/Documentation/Build/html/projectDescriptionSchema.html
deleted file mode 100644
index eba156f..0000000
--- a/Documentation/Build/html/projectDescriptionSchema.html
+++ /dev/null

@@ -1,14 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<title>Redirect to the corresponding Open-CMSIS-Pack page after 0 seconds</title>
-<meta http-equiv="refresh" content="0; URL=https://open-cmsis-pack.github.io/devtools/buildmgr/latest/projectDescriptionSchema.html">
-<meta name="keywords" content="automatic redirection">
-</head>
-
-<body>
-
-If the automatic redirection is failing, click <a href="https://open-cmsis-pack.github.io/devtools/buildmgr/latest/projectDescriptionSchema.html">here</a> or try to find corresponding topic described in <a href="https://www.open-cmsis-pack.org">Open-CMSIS-Pack resources</a>.
-
-</body>
-</html>
\ No newline at end of file

diff --git a/Documentation/Build/html/resize.js b/Documentation/Build/html/resize.js
deleted file mode 100644
index 304fcb6..0000000
--- a/Documentation/Build/html/resize.js
+++ /dev/null

@@ -1,97 +0,0 @@
-var cookie_namespace = 'doxygen'; 
-var sidenav,navtree,content,header;
-
-function readCookie(cookie) 
-{
-  var myCookie = cookie_namespace+"_"+cookie+"=";
-  if (document.cookie) 
-  {
-    var index = document.cookie.indexOf(myCookie);
-    if (index != -1) 
-    {
-      var valStart = index + myCookie.length;
-      var valEnd = document.cookie.indexOf(";", valStart);
-      if (valEnd == -1) 
-      {
-        valEnd = document.cookie.length;
-      }
-      var val = document.cookie.substring(valStart, valEnd);
-      return val;
-    }
-  }
-  return 0;
-}
-
-function writeCookie(cookie, val, expiration) 
-{
-  if (val==undefined) return;
-  if (expiration == null) 
-  {
-    var date = new Date();
-    date.setTime(date.getTime()+(10*365*24*60*60*1000)); // default expiration is one week
-    expiration = date.toGMTString();
-  }
-  document.cookie = cookie_namespace + "_" + cookie + "=" + val + "; expires=" + expiration+"; path=/";
-}
- 
-function resizeWidth() 
-{
-  var windowWidth = $(window).width() + "px";
-  var sidenavWidth = $(sidenav).outerWidth();
-  content.css({marginLeft:parseInt(sidenavWidth)+"px"}); 
-  writeCookie('width',sidenavWidth, null);
-}
-
-function restoreWidth(navWidth)
-{
-  var windowWidth = $(window).width() + "px";
-  content.css({marginLeft:parseInt(navWidth)+6+"px"});
-  sidenav.css({width:navWidth + "px"});
-}
-
-function resizeHeight() 
-{
-  var headerHeight = header.outerHeight();
-  var footerHeight = footer.outerHeight();
-  var windowHeight = $(window).height() - headerHeight - footerHeight;
-  content.css({height:windowHeight + "px"});
-  navtree.css({height:windowHeight + "px"});
-  sidenav.css({height:windowHeight + "px",top: headerHeight+"px"});
-}
-
-function initResizable()
-{
-  header  = $("#top");
-  sidenav = $("#side-nav");
-  content = $("#doc-content");
-  navtree = $("#nav-tree");
-  footer  = $("#nav-path");
-  $(".side-nav-resizable").resizable({resize: function(e, ui) { resizeWidth(); } });
-  $(window).resize(function() { resizeHeight(); });
-  var width = readCookie('width');
-  if (width) { restoreWidth(width); } else { resizeWidth(); }
-  resizeHeight();
-  var url = location.href;
-  var i=url.indexOf("#");
-  if (i>=0) window.location.hash=url.substr(i);
-  var _preventDefault = function(evt) { evt.preventDefault(); };
-  $("#splitbar").bind("dragstart", _preventDefault).bind("selectstart", _preventDefault);
-  $(document).bind('touchmove',function(e){
-    var device = navigator.userAgent.toLowerCase();
-    var ios = device.match(/(iphone|ipod|ipad)/);
-    if (ios) {
-      try {
-        var target = e.target;
-        while (target) {
-          if ($(target).css('-webkit-overflow-scrolling')=='touch') return;
-          target = target.parentNode;
-        }
-        e.preventDefault();
-      } catch(err) {
-        e.preventDefault();
-      }
-    }
-  });
-}
-
-

diff --git a/Documentation/Build/html/search/close.png b/Documentation/Build/html/search/close.png
deleted file mode 100644
index 9342d3d..0000000
--- a/Documentation/Build/html/search/close.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/search/mag_sel.png b/Documentation/Build/html/search/mag_sel.png
deleted file mode 100644
index 81f6040..0000000
--- a/Documentation/Build/html/search/mag_sel.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Build/html/search/nomatches.html b/Documentation/Build/html/search/nomatches.html
deleted file mode 100644
index b1ded27..0000000
--- a/Documentation/Build/html/search/nomatches.html
+++ /dev/null

@@ -1,12 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html><head><title></title>
-<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
-<link rel="stylesheet" type="text/css" href="search.css"/>
-<script type="text/javascript" src="search.js"></script>
-</head>
-<body class="SRPage">
-<div id="SRIndex">
-<div class="SRStatus" id="NoMatches">No Matches</div>
-</div>
-</body>
-</html>

diff --git a/Documentation/Build/html/search/search.css b/Documentation/Build/html/search/search.css
deleted file mode 100644
index 1746d13..0000000
--- a/Documentation/Build/html/search/search.css
+++ /dev/null

@@ -1,240 +0,0 @@
-/*---------------- Search Box */
-
-#FSearchBox {
-    float: left;
-}
-
-#searchli {
-    float: right;
-    display: block;
-    width: 170px;
-    height: 24px;
-}
-
-#MSearchBox {
-    white-space : nowrap;
-    position: absolute;
-    float: none;
-    display: inline;
-    margin-top: 3px;
-    right: 0px;
-    width: 170px;
-    z-index: 102;
-}
-
-#MSearchBox .left
-{
-    display:block;
-    position:absolute;
-    left:10px;
-    width:20px;
-    height:19px;
-    background:url('search_l.png') no-repeat;
-    background-position:right;
-}
-
-#MSearchSelect {
-    display:block;
-    position:absolute;
-    width:20px;
-    height:19px;
-}
-
-.left #MSearchSelect {
-    left:4px;
-}
-
-.right #MSearchSelect {
-    right:5px;
-}
-
-#MSearchField {
-    display:block;
-    position:absolute;
-    height:19px;
-    background:url('search_m.png') repeat-x;
-    border:none;
-    width:116px;
-    margin-left:20px;
-    padding-left:4px;
-    color: #909090;
-    outline: none;
-    font: 9pt Arial, Verdana, sans-serif;
-}
-
-#FSearchBox #MSearchField {
-    margin-left:15px;
-}
-
-#MSearchBox .right {
-    display:block;
-    position:absolute;
-    right:10px;
-    top:0px;
-    width:20px;
-    height:19px;
-    background:url('search_r.png') no-repeat;
-    background-position:left;
-}
-
-#MSearchClose {
-    display: none;
-    position: absolute;
-    top: 4px;
-    background : none;
-    border: none;
-    margin: 0px 4px 0px 0px;
-    padding: 0px 0px;
-    outline: none;
-}
-
-.left #MSearchClose {
-    left: 6px;
-}
-
-.right #MSearchClose {
-    right: 2px;
-}
-
-.MSearchBoxActive #MSearchField {
-    color: #000000;
-}
-
-/*---------------- Search filter selection */
-
-#MSearchSelectWindow {
-    display: none;
-    position: absolute;
-    left: 0; top: 0;
-    border: 1px solid #90A5CE;
-    background-color: #F9FAFC;
-    z-index: 1;
-    padding-top: 4px;
-    padding-bottom: 4px;
-    -moz-border-radius: 4px;
-    -webkit-border-top-left-radius: 4px;
-    -webkit-border-top-right-radius: 4px;
-    -webkit-border-bottom-left-radius: 4px;
-    -webkit-border-bottom-right-radius: 4px;
-    -webkit-box-shadow: 5px 5px 5px rgba(0, 0, 0, 0.15);
-}
-
-.SelectItem {
-    font: 8pt Arial, Verdana, sans-serif;
-    padding-left:  2px;
-    padding-right: 12px;
-    border: 0px;
-}
-
-span.SelectionMark {
-    margin-right: 4px;
-    font-family: monospace;
-    outline-style: none;
-    text-decoration: none;
-}
-
-a.SelectItem {
-    display: block;
-    outline-style: none;
-    color: #000000; 
-    text-decoration: none;
-    padding-left:   6px;
-    padding-right: 12px;
-}
-
-a.SelectItem:focus,
-a.SelectItem:active {
-    color: #000000; 
-    outline-style: none;
-    text-decoration: none;
-}
-
-a.SelectItem:hover {
-    color: #FFFFFF;
-    background-color: #3D578C;
-    outline-style: none;
-    text-decoration: none;
-    cursor: pointer;
-    display: block;
-}
-
-/*---------------- Search results window */
-
-iframe#MSearchResults {
-    width: 60ex;
-    height: 15em;
-}
-
-#MSearchResultsWindow {
-    display: none;
-    position: absolute;
-    left: 0; top: 0;
-    border: 1px solid #000;
-    background-color: #EEF1F7;
-}
-
-/* ----------------------------------- */
-
-
-#SRIndex {
-    clear:both; 
-    padding-bottom: 15px;
-}
-
-.SREntry {
-    font-size: 10pt;
-    padding-left: 1ex;
-}
-
-.SRPage .SREntry {
-    font-size: 8pt;
-    padding: 1px 5px;
-}
-
-body.SRPage {
-    margin: 5px 2px;
-}
-
-.SRChildren {
-    padding-left: 3ex; padding-bottom: .5em 
-}
-
-.SRPage .SRChildren {
-    display: none;
-}
-
-.SRSymbol {
-    font-weight: bold; 
-    color: #425E97;
-    font-family: Arial, Verdana, sans-serif;
-    text-decoration: none;
-    outline: none;
-}
-
-a.SRScope {
-    display: block;
-    color: #425E97; 
-    font-family: Arial, Verdana, sans-serif;
-    text-decoration: none;
-    outline: none;
-}
-
-a.SRSymbol:focus, a.SRSymbol:active,
-a.SRScope:focus, a.SRScope:active {
-    text-decoration: underline;
-}
-
-.SRPage .SRStatus {
-    padding: 2px 5px;
-    font-size: 8pt;
-    font-style: italic;
-}
-
-.SRResult {
-    display: none;
-}
-
-DIV.searchresults {
-    margin-left: 10px;
-    margin-right: 10px;
-}

diff --git a/Documentation/Build/html/search/search.js b/Documentation/Build/html/search/search.js
deleted file mode 100644
index 0f535c2..0000000
--- a/Documentation/Build/html/search/search.js
+++ /dev/null

@@ -1,795 +0,0 @@
-// Search script generated by doxygen
-// Copyright (C) 2009 by Dimitri van Heesch.
-
-// The code in this file is loosly based on main.js, part of Natural Docs,
-// which is Copyright (C) 2003-2008 Greg Valure
-// Natural Docs is licensed under the GPL.
-
-var indexSectionsWithContent =
-{
-  0: "cmoprs",
-  1: "cmoprs"
-};
-
-var indexSectionNames =
-{
-  0: "all",
-  1: "pages"
-};
-
-function convertToId(search)
-{
-  var result = '';
-  for (i=0;i<search.length;i++)
-  {
-    var c = search.charAt(i);
-    var cn = c.charCodeAt(0);
-    if (c.match(/[a-z0-9\u0080-\uFFFF]/))
-    {
-      result+=c;
-    }
-    else if (cn<16) 
-    {
-      result+="_0"+cn.toString(16);
-    }
-    else 
-    {
-      result+="_"+cn.toString(16);
-    }
-  }
-  return result;
-}
-
-function getXPos(item)
-{
-  var x = 0;
-  if (item.offsetWidth)
-  {
-    while (item && item!=document.body)
-    {
-      x   += item.offsetLeft;
-      item = item.offsetParent;
-    }
-  }
-  return x;
-}
-
-function getYPos(item)
-{
-  var y = 0;
-  if (item.offsetWidth)
-  {
-     while (item && item!=document.body)
-     {
-       y   += item.offsetTop;
-       item = item.offsetParent;
-     }
-  }
-  return y;
-}
-
-/* A class handling everything associated with the search panel.
-
-   Parameters:
-   name - The name of the global variable that will be 
-          storing this instance.  Is needed to be able to set timeouts.
-   resultPath - path to use for external files
-*/
-function SearchBox(name, resultsPath, inFrame, label)
-{
-  if (!name || !resultsPath) {  alert("Missing parameters to SearchBox."); }
-   
-  // ---------- Instance variables
-  this.name                  = name;
-  this.resultsPath           = resultsPath;
-  this.keyTimeout            = 0;
-  this.keyTimeoutLength      = 500;
-  this.closeSelectionTimeout = 300;
-  this.lastSearchValue       = "";
-  this.lastResultsPage       = "";
-  this.hideTimeout           = 0;
-  this.searchIndex           = 0;
-  this.searchActive          = false;
-  this.insideFrame           = inFrame;
-  this.searchLabel           = label;
-
-  // ----------- DOM Elements
-
-  this.DOMSearchField = function()
-  {  return document.getElementById("MSearchField");  }
-
-  this.DOMSearchSelect = function()
-  {  return document.getElementById("MSearchSelect");  }
-
-  this.DOMSearchSelectWindow = function()
-  {  return document.getElementById("MSearchSelectWindow");  }
-
-  this.DOMPopupSearchResults = function()
-  {  return document.getElementById("MSearchResults");  }
-
-  this.DOMPopupSearchResultsWindow = function()
-  {  return document.getElementById("MSearchResultsWindow");  }
-
-  this.DOMSearchClose = function()
-  {  return document.getElementById("MSearchClose"); }
-
-  this.DOMSearchBox = function()
-  {  return document.getElementById("MSearchBox");  }
-
-  // ------------ Event Handlers
-
-  // Called when focus is added or removed from the search field.
-  this.OnSearchFieldFocus = function(isActive)
-  {
-    this.Activate(isActive);
-  }
-
-  this.OnSearchSelectShow = function()
-  {
-    var searchSelectWindow = this.DOMSearchSelectWindow();
-    var searchField        = this.DOMSearchSelect();
-
-    if (this.insideFrame)
-    {
-      var left = getXPos(searchField);
-      var top  = getYPos(searchField);
-      left += searchField.offsetWidth + 6;
-      top += searchField.offsetHeight;
-
-      // show search selection popup
-      searchSelectWindow.style.display='block';
-      left -= searchSelectWindow.offsetWidth;
-      searchSelectWindow.style.left =  left + 'px';
-      searchSelectWindow.style.top  =  top  + 'px';
-    }
-    else
-    {
-      var left = getXPos(searchField);
-      var top  = getYPos(searchField);
-      top += searchField.offsetHeight;
-
-      // show search selection popup
-      searchSelectWindow.style.display='block';
-      searchSelectWindow.style.left =  left + 'px';
-      searchSelectWindow.style.top  =  top  + 'px';
-    }
-
-    // stop selection hide timer
-    if (this.hideTimeout) 
-    {
-      clearTimeout(this.hideTimeout);
-      this.hideTimeout=0;
-    }
-    return false; // to avoid "image drag" default event
-  }
-
-  this.OnSearchSelectHide = function()
-  {
-    this.hideTimeout = setTimeout(this.name +".CloseSelectionWindow()",
-                                  this.closeSelectionTimeout);
-  }
-
-  // Called when the content of the search field is changed.
-  this.OnSearchFieldChange = function(evt)
-  {
-    if (this.keyTimeout) // kill running timer
-    {
-      clearTimeout(this.keyTimeout);
-      this.keyTimeout = 0;
-    }
-
-    var e  = (evt) ? evt : window.event; // for IE
-    if (e.keyCode==40 || e.keyCode==13)
-    {
-      if (e.shiftKey==1)
-      {
-        this.OnSearchSelectShow();
-        var win=this.DOMSearchSelectWindow(); 
-        for (i=0;i<win.childNodes.length;i++)
-        {
-          var child = win.childNodes[i]; // get span within a
-          if (child.className=='SelectItem')
-          {
-            child.focus();
-            return;
-          }
-        }
-        return;
-      }
-      else if (window.frames.MSearchResults.searchResults)
-      {
-        var elem = window.frames.MSearchResults.searchResults.NavNext(0);
-        if (elem) elem.focus();
-      }
-    }
-    else if (e.keyCode==27) // Escape out of the search field
-    {
-      this.DOMSearchField().blur();
-      this.DOMPopupSearchResultsWindow().style.display = 'none';
-      this.DOMSearchClose().style.display = 'none';
-      this.lastSearchValue = '';
-      this.Activate(false);
-      return;
-    }
-
-    // strip whitespaces
-    var searchValue = this.DOMSearchField().value.replace(/ +/g, "");
-
-    if (searchValue != this.lastSearchValue) // search value has changed
-    {
-      if (searchValue != "") // non-empty search
-      {
-        // set timer for search update
-        this.keyTimeout = setTimeout(this.name + '.Search()',
-                                     this.keyTimeoutLength);
-      }
-      else // empty search field
-      {
-        this.DOMPopupSearchResultsWindow().style.display = 'none';
-        this.DOMSearchClose().style.display = 'none';
-        this.lastSearchValue = '';
-      }
-    }
-  }
-
-  this.SelectItemCount = function(id)
-  {
-    var count=0;
-    var win=this.DOMSearchSelectWindow(); 
-    for (i=0;i<win.childNodes.length;i++)
-    {
-      var child = win.childNodes[i]; // get span within a
-      if (child.className=='SelectItem')
-      {
-        count++;
-      }
-    }
-    return count;
-  }
-
-  this.SelectItemSet = function(id)
-  {
-    var i,j=0;
-    var win=this.DOMSearchSelectWindow(); 
-    for (i=0;i<win.childNodes.length;i++)
-    {
-      var child = win.childNodes[i]; // get span within a
-      if (child.className=='SelectItem')
-      {
-        var node = child.firstChild;
-        if (j==id)
-        {
-          node.innerHTML='&#8226;';
-        }
-        else
-        {
-          node.innerHTML='&#160;';
-        }
-        j++;
-      }
-    }
-  }
-
-  // Called when an search filter selection is made.
-  // set item with index id as the active item
-  this.OnSelectItem = function(id)
-  {
-    this.searchIndex = id;
-    this.SelectItemSet(id);
-    var searchValue = this.DOMSearchField().value.replace(/ +/g, "");
-    if (searchValue!="" && this.searchActive) // something was found -> do a search
-    {
-      this.Search();
-    }
-  }
-
-  this.OnSearchSelectKey = function(evt)
-  {
-    var e = (evt) ? evt : window.event; // for IE
-    if (e.keyCode==40 && this.searchIndex<this.SelectItemCount()) // Down
-    {
-      this.searchIndex++;
-      this.OnSelectItem(this.searchIndex);
-    }
-    else if (e.keyCode==38 && this.searchIndex>0) // Up
-    {
-      this.searchIndex--;
-      this.OnSelectItem(this.searchIndex);
-    }
-    else if (e.keyCode==13 || e.keyCode==27)
-    {
-      this.OnSelectItem(this.searchIndex);
-      this.CloseSelectionWindow();
-      this.DOMSearchField().focus();
-    }
-    return false;
-  }
-
-  // --------- Actions
-
-  // Closes the results window.
-  this.CloseResultsWindow = function()
-  {
-    this.DOMPopupSearchResultsWindow().style.display = 'none';
-    this.DOMSearchClose().style.display = 'none';
-    this.Activate(false);
-  }
-
-  this.CloseSelectionWindow = function()
-  {
-    this.DOMSearchSelectWindow().style.display = 'none';
-  }
-
-  // Performs a search.
-  this.Search = function()
-  {
-    this.keyTimeout = 0;
-
-    // strip leading whitespace
-    var searchValue = this.DOMSearchField().value.replace(/^ +/, "");
-
-    var code = searchValue.toLowerCase().charCodeAt(0);
-    var idxChar = searchValue.substr(0, 1).toLowerCase();
-    if ( 0xD800 <= code && code <= 0xDBFF && searchValue > 1) // surrogate pair
-    {
-      idxChar = searchValue.substr(0, 2);
-    }
-
-    var resultsPage;
-    var resultsPageWithSearch;
-    var hasResultsPage;
-
-    var idx = indexSectionsWithContent[this.searchIndex].indexOf(idxChar);
-    if (idx!=-1)
-    {
-       var hexCode=idx.toString(16);
-       resultsPage = this.resultsPath + '/' + indexSectionNames[this.searchIndex] + '_' + hexCode + '.html';
-       resultsPageWithSearch = resultsPage+'?'+escape(searchValue);
-       hasResultsPage = true;
-    }
-    else // nothing available for this search term
-    {
-       resultsPage = this.resultsPath + '/nomatches.html';
-       resultsPageWithSearch = resultsPage;
-       hasResultsPage = false;
-    }
-
-    window.frames.MSearchResults.location = resultsPageWithSearch;  
-    var domPopupSearchResultsWindow = this.DOMPopupSearchResultsWindow();
-
-    if (domPopupSearchResultsWindow.style.display!='block')
-    {
-       var domSearchBox = this.DOMSearchBox();
-       this.DOMSearchClose().style.display = 'inline';
-       if (this.insideFrame)
-       {
-         var domPopupSearchResults = this.DOMPopupSearchResults();
-         domPopupSearchResultsWindow.style.position = 'relative';
-         domPopupSearchResultsWindow.style.display  = 'block';
-         var width = document.body.clientWidth - 8; // the -8 is for IE :-(
-         domPopupSearchResultsWindow.style.width    = width + 'px';
-         domPopupSearchResults.style.width          = width + 'px';
-       }
-       else
-       {
-         var domPopupSearchResults = this.DOMPopupSearchResults();
-         var left = getXPos(domSearchBox) + 150; // domSearchBox.offsetWidth;
-         var top  = getYPos(domSearchBox) + 20;  // domSearchBox.offsetHeight + 1;
-         domPopupSearchResultsWindow.style.display = 'block';
-         left -= domPopupSearchResults.offsetWidth;
-         domPopupSearchResultsWindow.style.top     = top  + 'px';
-         domPopupSearchResultsWindow.style.left    = left + 'px';
-       }
-    }
-
-    this.lastSearchValue = searchValue;
-    this.lastResultsPage = resultsPage;
-  }
-
-  // -------- Activation Functions
-
-  // Activates or deactivates the search panel, resetting things to 
-  // their default values if necessary. 
-  this.Activate = function(isActive)
-  {
-    if (isActive || // open it
-        this.DOMPopupSearchResultsWindow().style.display == 'block' 
-       )
-    {
-      this.DOMSearchBox().className = 'MSearchBoxActive';
-
-      var searchField = this.DOMSearchField();
-
-      if (searchField.value == this.searchLabel) // clear "Search" term upon entry
-      {  
-        searchField.value = '';  
-        this.searchActive = true;
-      }
-    }
-    else if (!isActive) // directly remove the panel
-    {
-      this.DOMSearchBox().className = 'MSearchBoxInactive';
-      this.DOMSearchField().value   = this.searchLabel;
-      this.searchActive             = false;
-      this.lastSearchValue          = ''
-      this.lastResultsPage          = '';
-    }
-  }
-}
-
-// -----------------------------------------------------------------------
-
-// The class that handles everything on the search results page.
-function SearchResults(name)
-{
-    // The number of matches from the last run of <Search()>.
-    this.lastMatchCount = 0;
-    this.lastKey = 0;
-    this.repeatOn = false;
-
-    // Toggles the visibility of the passed element ID.
-    this.FindChildElement = function(id)
-    {
-      var parentElement = document.getElementById(id);
-      var element = parentElement.firstChild;
-
-      while (element && element!=parentElement)
-      {
-        if (element.nodeName == 'DIV' && element.className == 'SRChildren')
-        {
-          return element;
-        }
-
-        if (element.nodeName == 'DIV' && element.hasChildNodes())
-        {  
-           element = element.firstChild;  
-        }
-        else if (element.nextSibling)
-        {  
-           element = element.nextSibling;  
-        }
-        else
-        {
-          do
-          {
-            element = element.parentNode;
-          }
-          while (element && element!=parentElement && !element.nextSibling);
-
-          if (element && element!=parentElement)
-          {  
-            element = element.nextSibling;  
-          }
-        }
-      }
-    }
-
-    this.Toggle = function(id)
-    {
-      var element = this.FindChildElement(id);
-      if (element)
-      {
-        if (element.style.display == 'block')
-        {
-          element.style.display = 'none';
-        }
-        else
-        {
-          element.style.display = 'block';
-        }
-      }
-    }
-
-    // Searches for the passed string.  If there is no parameter,
-    // it takes it from the URL query.
-    //
-    // Always returns true, since other documents may try to call it
-    // and that may or may not be possible.
-    this.Search = function(search)
-    {
-      if (!search) // get search word from URL
-      {
-        search = window.location.search;
-        search = search.substring(1);  // Remove the leading '?'
-        search = unescape(search);
-      }
-
-      search = search.replace(/^ +/, ""); // strip leading spaces
-      search = search.replace(/ +$/, ""); // strip trailing spaces
-      search = search.toLowerCase();
-      search = convertToId(search);
-
-      var resultRows = document.getElementsByTagName("div");
-      var matches = 0;
-
-      var i = 0;
-      while (i < resultRows.length)
-      {
-        var row = resultRows.item(i);
-        if (row.className == "SRResult")
-        {
-          var rowMatchName = row.id.toLowerCase();
-          rowMatchName = rowMatchName.replace(/^sr\d*_/, ''); // strip 'sr123_'
-
-          if (search.length<=rowMatchName.length && 
-             rowMatchName.substr(0, search.length)==search)
-          {
-            row.style.display = 'block';
-            matches++;
-          }
-          else
-          {
-            row.style.display = 'none';
-          }
-        }
-        i++;
-      }
-      document.getElementById("Searching").style.display='none';
-      if (matches == 0) // no results
-      {
-        document.getElementById("NoMatches").style.display='block';
-      }
-      else // at least one result
-      {
-        document.getElementById("NoMatches").style.display='none';
-      }
-      this.lastMatchCount = matches;
-      return true;
-    }
-
-    // return the first item with index index or higher that is visible
-    this.NavNext = function(index)
-    {
-      var focusItem;
-      while (1)
-      {
-        var focusName = 'Item'+index;
-        focusItem = document.getElementById(focusName);
-        if (focusItem && focusItem.parentNode.parentNode.style.display=='block')
-        {
-          break;
-        }
-        else if (!focusItem) // last element
-        {
-          break;
-        }
-        focusItem=null;
-        index++;
-      }
-      return focusItem;
-    }
-
-    this.NavPrev = function(index)
-    {
-      var focusItem;
-      while (1)
-      {
-        var focusName = 'Item'+index;
-        focusItem = document.getElementById(focusName);
-        if (focusItem && focusItem.parentNode.parentNode.style.display=='block')
-        {
-          break;
-        }
-        else if (!focusItem) // last element
-        {
-          break;
-        }
-        focusItem=null;
-        index--;
-      }
-      return focusItem;
-    }
-
-    this.ProcessKeys = function(e)
-    {
-      if (e.type == "keydown") 
-      {
-        this.repeatOn = false;
-        this.lastKey = e.keyCode;
-      }
-      else if (e.type == "keypress")
-      {
-        if (!this.repeatOn)
-        {
-          if (this.lastKey) this.repeatOn = true;
-          return false; // ignore first keypress after keydown
-        }
-      }
-      else if (e.type == "keyup")
-      {
-        this.lastKey = 0;
-        this.repeatOn = false;
-      }
-      return this.lastKey!=0;
-    }
-
-    this.Nav = function(evt,itemIndex) 
-    {
-      var e  = (evt) ? evt : window.event; // for IE
-      if (e.keyCode==13) return true;
-      if (!this.ProcessKeys(e)) return false;
-
-      if (this.lastKey==38) // Up
-      {
-        var newIndex = itemIndex-1;
-        var focusItem = this.NavPrev(newIndex);
-        if (focusItem)
-        {
-          var child = this.FindChildElement(focusItem.parentNode.parentNode.id);
-          if (child && child.style.display == 'block') // children visible
-          { 
-            var n=0;
-            var tmpElem;
-            while (1) // search for last child
-            {
-              tmpElem = document.getElementById('Item'+newIndex+'_c'+n);
-              if (tmpElem)
-              {
-                focusItem = tmpElem;
-              }
-              else // found it!
-              {
-                break;
-              }
-              n++;
-            }
-          }
-        }
-        if (focusItem)
-        {
-          focusItem.focus();
-        }
-        else // return focus to search field
-        {
-           parent.document.getElementById("MSearchField").focus();
-        }
-      }
-      else if (this.lastKey==40) // Down
-      {
-        var newIndex = itemIndex+1;
-        var focusItem;
-        var item = document.getElementById('Item'+itemIndex);
-        var elem = this.FindChildElement(item.parentNode.parentNode.id);
-        if (elem && elem.style.display == 'block') // children visible
-        {
-          focusItem = document.getElementById('Item'+itemIndex+'_c0');
-        }
-        if (!focusItem) focusItem = this.NavNext(newIndex);
-        if (focusItem)  focusItem.focus();
-      }
-      else if (this.lastKey==39) // Right
-      {
-        var item = document.getElementById('Item'+itemIndex);
-        var elem = this.FindChildElement(item.parentNode.parentNode.id);
-        if (elem) elem.style.display = 'block';
-      }
-      else if (this.lastKey==37) // Left
-      {
-        var item = document.getElementById('Item'+itemIndex);
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-<tr id="row_12_" class="even"><td class="entry"><img src="ftv2node.png" alt="o" width="16" height="22" /><img src="ftv2cl.png" alt="C" width="24" height="22" /><a class="el" href="structSCB__Type.html" target="_self">SCB_Type</a></td><td class="desc">Structure type to access the System Control Block (SCB) </td></tr>
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diff --git a/Documentation/Core/html/cmsis_footer.js b/Documentation/Core/html/cmsis_footer.js
deleted file mode 100644
index c868cb5..0000000
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-<tr>
-<th>Version </th><th>Description  </th></tr>
-<tr>
-<td>V5.6.0 </td><td><ul>
-<li>
-Added: Arm Cortex-M85 cpu support </li>
-<li>
-Added: Arm China Star-MC1 cpu support </li>
-<li>
-Updated: system_ARMCM55.c </li>
-</ul>
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-<td>V5.5.0 </td><td><ul>
-<li>
-Updated GCC LinkerDescription, GCC Assembler startup </li>
-<li>
-Added ARMv8-M Stack Sealing (to linker, startup) for toolchain ARM, GCC </li>
-<li>
-Changed C-Startup to default Startup.  Updated Armv8-M Assembler startup to use GAS syntax<br/>
- Note: Updating existing projects may need manual user interaction!  </li>
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-<td>V5.4.0 </td><td><ul>
-<li>
-Added: Cortex-M55 cpu support </li>
-<li>
-Enhanced: MVE support for Armv8.1-MML </li>
-<li>
-Fixed: Device config define checks </li>
-<li>
-Added: L1 Cache functions for Armv7-M and later </li>
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-<td>V5.3.0 </td><td><ul>
-<li>
-Added: Provisions for compiler-independent C startup code. </li>
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-<li>
-Fixed: Compilation issue in cmsis_armclang_ltm.h introduced in 5.2.0 </li>
-</ul>
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-<li>
-Added: Cortex-M1 support. </li>
-<li>
-Added: Armv8.1 architecture support. </li>
-<li>
-Added: <a class="el" href="group__compiler__conntrol__gr.html#ga378ac21329d33f561f90265eef89f564">__RESTRICT</a> and <a class="el" href="group__compiler__conntrol__gr.html#gab904513442afdf77d4f8c74f23cbb040">__STATIC_FORCEINLINE</a> compiler control macros. </li>
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-<li>
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-<li>
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-<li>
-Added support for Cortex-M1 (beta). </li>
-<li>
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-<li>
-Added defines for EXC_RETURN, FNC_RETURN and integrity signature values. </li>
-<li>
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-<li>
-Aligned MSPLIM and PSPLIM access functions along supported compilers. </li>
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-</td></tr>
-<tr>
-<td>V5.1.0 </td><td><ul>
-<li>
-Added MPU Functions for ARMv8-M for Cortex-M23/M33. </li>
-<li>
-Moved __SSAT and __USAT intrinsics to CMSIS-Core. </li>
-<li>
-Aligned __REV, __REV16 and __REVSH intrinsics along supported compilers. </li>
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-Added macros <a class="el" href="group__compiler__conntrol__gr.html#gabe8693a7200e573101551d49a1772fb9">__UNALIGNED_UINT16_READ</a>, <a class="el" href="group__compiler__conntrol__gr.html#gadb9cd73446f7e11e92383cd327a23407">__UNALIGNED_UINT16_WRITE</a>. </li>
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-Added macros <a class="el" href="group__compiler__conntrol__gr.html#ga254322c344d954c9f829719a50a88e87">__UNALIGNED_UINT32_READ</a>, <a class="el" href="group__compiler__conntrol__gr.html#gabb2180285c417aa9120a360c51f64b4b">__UNALIGNED_UINT32_WRITE</a>. </li>
-<li>
-Deprecated macro <a class="el" href="group__compiler__conntrol__gr.html#ga27fd2ec6767ca1ab66d36b5cc0103268">__UNALIGNED_UINT32</a>. </li>
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-Added: uVisor support. </li>
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-Replaced: macro __SAU_PRESENT with __SAU_REGION_PRESENT. </li>
-<li>
-Reworked: SAU register and functions. </li>
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-<li>
-Updated: function <a class="el" href="group__Icache__functions__m7.html#ga980ffe52af778f2535ccc52f25f9a7de">SCB_EnableICache</a>. </li>
-<li>
-Added: cmsis_compiler.h with compiler specific CMSIS macros, functions, instructions. </li>
-<li>
-Added: macro <a class="el" href="group__compiler__conntrol__gr.html#gabe8996d3d985ee1529475443cc635bf1">__PACKED</a>. </li>
-<li>
-Updated: compiler specific include files. </li>
-<li>
-Updated: core dependant include files. </li>
-<li>
-Removed: deprecated files core_cmfunc.h, core_cminstr.h, core_cmsimd.h. </li>
-</ul>
-</td></tr>
-<tr>
-<td>V5.00<br/>
-Beta 6 </td><td><ul>
-<li>
-Added: SCB_CFSR register bit definitions. </li>
-<li>
-Added: function <a class="el" href="group__NVIC__gr.html#ga72f102d31af0ee4aa7a6fb7a180840f3">NVIC_GetEnableIRQ</a>. </li>
-<li>
-Updated: core instruction macros <a class="el" href="group__intrinsic__CPU__gr.html#gac71fad9f0a91980fecafcb450ee0a63e">__NOP</a>, <a class="el" href="group__intrinsic__CPU__gr.html#gaed91dfbf3d7d7b7fba8d912fcbeaad88">__WFI</a>, <a class="el" href="group__intrinsic__CPU__gr.html#gad3efec76c3bfa2b8528ded530386c563">__WFE</a>, <a class="el" href="group__intrinsic__CPU__gr.html#ga3c34da7eb16496ae2668a5b95fa441e7">__SEV</a> for toolchain GCC. </li>
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-<td>V5.00<br/>
-Beta 5 </td><td><ul>
-<li>
-Moved: DSP libraries from CMSIS/DSP/Lib to CMSIS/Lib. </li>
-<li>
-Added: DSP libraries build projects to CMSIS pack. </li>
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-<td>V5.00<br/>
-Beta 4 </td><td><ul>
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-Updated: ARMv8M device files. </li>
-<li>
-Corrected: ARMv8MBL interrupts. </li>
-<li>
-Reworked: NVIC functions. </li>
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-Beta 2 </td><td><ul>
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-Changed: license under Apache-2.0. </li>
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-Added: check if macro is defined before use. </li>
-<li>
-Corrected: function <a class="el" href="group__Dcache__functions__m7.html#gafe64b44d1a61483a947e44a77a9d3287">SCB_DisableDCache</a>. </li>
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-Corrected: macros <a class="el" href="group__peripheral__gr.html#ga286e3b913dbd236c7f48ea70c8821f4e">_VAL2FLD</a>, <a class="el" href="group__peripheral__gr.html#ga139b6e261c981f014f386927ca4a8444">_FLD2VAL</a>. </li>
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-<td>V5.00<br/>
-Beta 1 </td><td><ul>
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-Renamed: cmsis_armcc_V6.h to cmsis_armclang.h. </li>
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-Renamed: core_*.h to lower case. </li>
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-Corrected: DoxyGen function parameter comments. </li>
-<li>
-Corrected: IAR toolchain: removed for <a class="el" href="group__NVIC__gr.html#ga1b47d17e90b6a03e7bd1ec6a0d549b46">NVIC_SystemReset</a> the attribute(noreturn). </li>
-<li>
-Corrected: GCC toolchain: suppressed irrelevant compiler warnings. </li>
-<li>
-Added: Support files for Arm Compiler v6 (cmsis_armcc_v6.h). </li>
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-<tr>
-<td>V4.20 </td><td><ul>
-<li>
-Corrected: MISRA-C:2004 violations. </li>
-<li>
-Corrected: predefined macro for TI CCS Compiler. </li>
-<li>
-Corrected: function <a class="el" href="group__intrinsic__SIMD__gr.html#ga15d8899a173effb8ad8c7268da32b60e">__SHADD16</a> in arm_math.h. </li>
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-Updated: cache functions for Cortex-M7. </li>
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-<li>
-Updated: functions <a class="el" href="group__intrinsic__SIMD__gr.html#ga87618799672e1511e33964bc71467eb3">__QASX</a>, <a class="el" href="group__intrinsic__SIMD__gr.html#gab41eb2b17512ab01d476fc9d5bd19520">__QSAX</a>, <a class="el" href="group__intrinsic__SIMD__gr.html#gae0a649035f67627464fd80e7218c89d5">__SHASX</a>, <a class="el" href="group__intrinsic__SIMD__gr.html#gafadbd89c36b5addcf1ca10dd392db3e9">__SHSAX</a>. </li>
-<li>
-Corrected: potential bug in function <a class="el" href="group__intrinsic__SIMD__gr.html#ga15d8899a173effb8ad8c7268da32b60e">__SHADD16</a>. </li>
-</ul>
-</td></tr>
-<tr>
-<td>V4.10 </td><td><ul>
-<li>
-Corrected: MISRA-C:2004 violations. </li>
-<li>
-Corrected: intrinsic functions <a class="el" href="group__intrinsic__CPU__gr.html#gacb2a8ca6eae1ba4b31161578b720c199">__DSB</a>, <a class="el" href="group__intrinsic__CPU__gr.html#gab1c9b393641dc2d397b3408fdbe72b96">__DMB</a>, <a class="el" href="group__intrinsic__CPU__gr.html#ga93c09b4709394d81977300d5f84950e5">__ISB</a>. </li>
-<li>
-Corrected: register definitions for ITCMCR register. </li>
-<li>
-Corrected: register definitions for <a class="el" href="unionCONTROL__Type.html">CONTROL_Type</a> register. </li>
-<li>
-Added: functions <a class="el" href="group__fpu__functions.html#ga6bcad99ce80a0e7e4ddc6f2379081756">SCB_GetFPUType</a>, <a class="el" href="group__Dcache__functions__m7.html#ga31c2439722ab4dbd0c67b196e3377ca7">SCB_InvalidateDCache_by_Addr</a> to core_cm7.h. </li>
-<li>
-Added: register definitions for <a class="el" href="unionAPSR__Type.html">APSR_Type</a>, <a class="el" href="unionIPSR__Type.html">IPSR_Type</a>, <a class="el" href="unionxPSR__Type.html">xPSR_Type</a> register. </li>
-<li>
-Added: <a class="el" href="group__Core__Register__gr.html#ga62fa63d39cf22df348857d5f44ab64d9">__set_BASEPRI_MAX</a> function to core_cmFunc.h. </li>
-<li>
-Added: intrinsic functions <a class="el" href="group__intrinsic__CPU__gr.html#gad6f9f297f6b91a995ee199fbc796b863">__RBIT</a>, <a class="el" href="group__intrinsic__CPU__gr.html#ga90884c591ac5d73d6069334eba9d6c02">__CLZ</a> for Cortex-M0/CortexM0+. </li>
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-<tr>
-<td>V4.00 </td><td><ul>
-<li>
-Added: Cortex-M7 support. </li>
-<li>
-Added: intrinsic functions for <a class="el" href="group__intrinsic__CPU__gr.html#gac09134f1bf9c49db07282001afcc9380">__RRX</a>, <a class="el" href="group__intrinsic__CPU__gr.html#ga9464d75db32846aa8295c3c3adfacb41">__LDRBT</a>, <a class="el" href="group__intrinsic__CPU__gr.html#gaa762b8bc5634ce38cb14d62a6b2aee32">__LDRHT</a>, <a class="el" href="group__intrinsic__CPU__gr.html#ga616504f5da979ba8a073d428d6e8d5c7">__LDRT</a>, <a class="el" href="group__intrinsic__CPU__gr.html#gad41aa59c92c0a165b7f98428d3320cd5">__STRBT</a>, <a class="el" href="group__intrinsic__CPU__gr.html#ga2b5d93b8e461755b1072a03df3f1722e">__STRHT</a>, and <a class="el" href="group__intrinsic__CPU__gr.html#ga625bc4ac0b1d50de9bcd13d9f050030e">__STRT</a> </li>
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-<td>V3.40 </td><td><ul>
-<li>
-Corrected: C++ include guard settings. </li>
-</ul>
-</td></tr>
-<tr>
-<td>V3.30 </td><td><ul>
-<li>
-Added: COSMIC tool chain support. </li>
-<li>
-Corrected: GCC __SMLALDX instruction intrinsic for Cortex-M4. </li>
-<li>
-Corrected: GCC __SMLALD instruction intrinsic for Cortex-M4. </li>
-<li>
-Corrected: GCC/CLang warnings. </li>
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-<tr>
-<td>V3.20 </td><td><ul>
-<li>
-Added: <a class="el" href="group__intrinsic__CPU__gr.html#ga92f5621626711931da71eaa8bf301af7">__BKPT</a> instruction intrinsic. </li>
-<li>
-Added: <a class="el" href="group__intrinsic__SIMD__gr.html#gaea60757232f740ec6b09980eebb614ff">__SMMLA</a> instruction intrinsic for Cortex-M4. </li>
-<li>
-Corrected: <a class="el" href="group__ITM__Debug__gr.html#gaaa7c716331f74d644bf6bf25cd3392d1">ITM_SendChar</a>. </li>
-<li>
-Corrected: <a class="el" href="group__Core__Register__gr.html#ga0f98dfbd252b89d12564472dbeba9c27">__enable_irq</a>, <a class="el" href="group__Core__Register__gr.html#gaeb8e5f7564a8ea23678fe3c987b04013">__disable_irq</a> and inline assembly for GCC Compiler. </li>
-<li>
-Corrected: <a class="el" href="group__NVIC__gr.html#gab18fb9f6c5f4c70fdd73047f0f7c8395">NVIC_GetPriority</a> and VTOR_TBLOFF for Cortex-M0/M0+, SC000. </li>
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-Corrected: rework of in-line assembly functions to remove potential compiler warnings. </li>
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-<td>V3.01 </td><td><ul>
-<li>
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-<td>V3.00 </td><td><ul>
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-Added support for GNU GCC ARM Embedded Compiler. </li>
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-Added function <a class="el" href="group__intrinsic__CPU__gr.html#gaf66beb577bb9d90424c3d1d7f684c024">__ROR</a>. </li>
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-<li>
-Added support for <a class="el" href="device_h_pg.html#core_config_sect">SC000 and SC300 processors</a>. </li>
-<li>
-Corrected <a class="el" href="group__ITM__Debug__gr.html#gaaa7c716331f74d644bf6bf25cd3392d1">ITM_SendChar</a> function. </li>
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-<tr>
-<td>V2.10 </td><td><ul>
-<li>
-Updated documentation. </li>
-<li>
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-<li>
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-<li>
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-<li>
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-</td></tr>
-<tr>
-<td>V2.00 </td><td><ul>
-<li>
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-<tr>
-<td>V1.30 </td><td><ul>
-<li>
-Reworked Startup Concept. </li>
-<li>
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-<li>
-Changed folder structure. </li>
-<li>
-Added doxygen comments. </li>
-<li>
-Added definitions for bit. </li>
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-</td></tr>
-<tr>
-<td>V1.01 </td><td><ul>
-<li>
-Added support for Cortex-M0 processor. </li>
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-<td>V1.01 </td><td><ul>
-<li>
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-</td></tr>
-<tr>
-<td>V1.00 </td><td><ul>
-<li>
-Initial Release for Cortex-M3 processor. </li>
-</ul>
-</td></tr>
-</table>
-</div></div><!-- contents -->
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-<div class="header">
-  <div class="headertitle">
-<div class="title">Device Header File &lt;device.h&gt; </div>  </div>
-</div><!--header-->
-<div class="contents">
-<div class="textblock"><p>The <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> contains the following sections that are device specific:</p>
-<ul>
-<li><a class="el" href="device_h_pg.html#interrupt_number_sec">Interrupt Number Definition</a> provides interrupt numbers (IRQn) for all exceptions and interrupts of the device.</li>
-<li><a class="el" href="device_h_pg.html#core_config_sect">Configuration of the Processor and Core Peripherals</a> reflect the features of the device.</li>
-<li><a class="el" href="device_h_pg.html#device_access">Device Peripheral Access Layer</a> provides definitions for the <a class="el" href="group__peripheral__gr.html">Peripheral Access</a> to all device peripherals. It contains all data structures and the address mapping for device-specific peripherals.</li>
-<li><b>Access Functions for Peripherals (optional)</b> provide additional helper functions for peripherals that are useful for programming of these peripherals. Access Functions may be provided as inline functions or can be extern references to a device-specific library provided by the silicon vendor.</li>
-</ul>
-<p><a href="modules.html"><b>Reference</b> </a> describes the standard features and functions of the <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> in detail.</p>
-<h1><a class="anchor" id="interrupt_number_sec"></a>
-Interrupt Number Definition</h1>
-<p><a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> contains the enumeration <a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> that defines all exceptions and interrupts of the device.</p>
-<ul>
-<li>Negative IRQn values represent processor core exceptions (internal interrupts).</li>
-<li>Positive IRQn values represent device-specific exceptions (external interrupts). The first device-specific interrupt has the IRQn value 0. The IRQn values needs extension to reflect the device-specific interrupt vector table in the <a class="el" href="startup_s_pg.html">Startup File startup_&lt;device&gt;.s (deprecated)</a>.</li>
-</ul>
-<p><b>Example:</b> </p>
-<p>The following example shows the extension of the interrupt vector table for the LPC1100 device family.</p>
-<div class="fragment"><div class="line"><span class="keyword">typedef</span> <span class="keyword">enum</span> IRQn</div>
-<div class="line">{</div>
-<div class="line"><span class="comment">/******  Cortex-M0 Processor Exceptions Numbers ***************************************************/</span></div>
-<div class="line">  <a class="code" href="group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8ade177d9c70c89e084093024b932a4e30">NonMaskableInt_IRQn</a>           = -14,      </div>
-<div class="line">  <a class="code" href="group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8ab1a222a34a32f0ef5ac65e714efc1f85">HardFault_IRQn</a>                = -13,      </div>
-<div class="line">  <a class="code" href="group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a4ce820b3cc6cf3a796b41aadc0cf1237">SVCall_IRQn</a>                   = -5,       </div>
-<div class="line">  <a class="code" href="group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a03c3cc89984928816d81793fc7bce4a2">PendSV_IRQn</a>                   = -2,       </div>
-<div class="line">  <a class="code" href="group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6dbff8f8543325f3474cbae2446776e7">SysTick_IRQn</a>                  = -1,       </div>
-<div class="line"><span class="comment">/******  LPC11xx/LPC11Cxx Specific Interrupt Numbers **********************************************/</span></div>
-<div class="line">  WAKEUP0_IRQn                  = 0,        </div>
-<div class="line">  WAKEUP1_IRQn                  = 1,        </div>
-<div class="line">  WAKEUP2_IRQn                  = 2,</div>
-<div class="line">                 :       :</div>
-<div class="line">                 :       :</div>
-<div class="line">  EINT1_IRQn                    = 30,       </div>
-<div class="line">  EINT0_IRQn                    = 31,       </div>
-<div class="line">} <a class="code" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>;</div>
-</div><!-- fragment --><h1><a class="anchor" id="core_config_sect"></a>
-Configuration of the Processor and Core Peripherals</h1>
-<p>The <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> configures the Cortex-M or SecurCore processor and the core peripherals with <em>#defines</em> that are set prior to including the file <b>core_&lt;cpu&gt;.h</b>.</p>
-<p>The following tables list the <em>#defines</em> along with the possible values for each processor core. If these <em>#defines</em> are missing default values are used. <b>core_cm0.h</b> </p>
-<table  class="cmtable">
-<tr>
-<th>#define </th><th>Value Range </th><th>Default </th><th>Description  </th></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga905517438930a3f13cbc632e52990534">__CM0_REV</a> </td><td>0x0000 </td><td>0x0000 </td><td>Core revision number ([15:8] revision number, [7:0] patch number)  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a> </td><td>2 </td><td>2 </td><td>Number of priority bits implemented in the NVIC (device specific)  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gab58771b4ec03f9bdddc84770f7c95c68">__Vendor_SysTickConfig</a> </td><td>0 .. 1 </td><td>0 </td><td>Vendor defined <b>SysTick_Config</b> function.  </td></tr>
-</table>
-<p><b>core_cm0plus.h</b> </p>
-<table  class="cmtable">
-<tr>
-<th>#define </th><th>Value Range </th><th>Default </th><th>Description  </th></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga2b7180ed347a0e902c5765deb46e650e">__CM0PLUS_REV</a> </td><td>0x0000 </td><td>0x0000 </td><td>Core revision number ([15:8] revision number, [7:0] patch number)  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gaddbae1a1b57539f398eb5546a17de8f6">__VTOR_PRESENT</a> </td><td>0 .. 1 </td><td>0 </td><td>Defines if a VTOR register is present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a> </td><td>2 </td><td>2 </td><td>Number of priority bits implemented in the NVIC (device specific)  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gab58771b4ec03f9bdddc84770f7c95c68">__Vendor_SysTickConfig</a> </td><td>0 .. 1 </td><td>0 </td><td>Vendor defined <b>SysTick_Config</b> function.  </td></tr>
-</table>
-<p><b>core_cm3.h</b> </p>
-<table  class="cmtable">
-<tr>
-<th>#define </th><th>Value Range </th><th>Default </th><th>Description  </th></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gac6a3f185c4640e06443c18b3c8d93f53">__CM3_REV</a> </td><td>0x0101 | 0x0200 </td><td>0x0200 </td><td>Core revision number ([15:8] revision number, [7:0] patch number)  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gaddbae1a1b57539f398eb5546a17de8f6">__VTOR_PRESENT</a> </td><td>0 .. 1 </td><td>1 </td><td>Defines if a VTOR register is present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a> </td><td>2 .. 8 </td><td>4 </td><td>Number of priority bits implemented in the NVIC (device specific)  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga4127d1b31aaf336fab3d7329d117f448">__MPU_PRESENT</a> </td><td>0 .. 1 </td><td>0 </td><td>Defines if a MPU is present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gab58771b4ec03f9bdddc84770f7c95c68">__Vendor_SysTickConfig</a> </td><td>0 .. 1 </td><td>0 </td><td>Vendor defined <b>SysTick_Config</b> function.  </td></tr>
-</table>
-<p><b>core_cm4.h</b> </p>
-<table  class="cmtable">
-<tr>
-<th>#define </th><th>Value Range </th><th>Default </th><th>Description  </th></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga45a97e4bb8b6ce7c334acc5f45ace3ba">__CM4_REV</a> </td><td>0x0000 </td><td>0x0000 </td><td>Core revision number ([15:8] revision number, [7:0] patch number)  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gaddbae1a1b57539f398eb5546a17de8f6">__VTOR_PRESENT</a> </td><td>0 .. 1 </td><td>1 </td><td>Defines if a VTOR register is present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a> </td><td>2 .. 8 </td><td>4 </td><td>Number of priority bits implemented in the NVIC (device specific)  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga4127d1b31aaf336fab3d7329d117f448">__MPU_PRESENT</a> </td><td>0 .. 1 </td><td>0 </td><td>Defines if a MPU is present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gac1ba8a48ca926bddc88be9bfd7d42641">__FPU_PRESENT</a> </td><td>0 .. 1 </td><td>0 </td><td>Defines if a FPU is present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gab58771b4ec03f9bdddc84770f7c95c68">__Vendor_SysTickConfig</a> </td><td>0 .. 1 </td><td>0 </td><td>Vendor defined <b>SysTick_Config</b> function.  </td></tr>
-</table>
-<p><b>core_cm7.h</b> </p>
-<table  class="cmtable">
-<tr>
-<th>#define </th><th>Value Range </th><th>Default </th><th>Description  </th></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga8eb40c0d30a09a0ae388e56b21d8f22c">__CM7_REV</a> </td><td>0x0000 </td><td>0x0000 </td><td>Core revision number ([15:8] revision number, [7:0] patch number)  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga4127d1b31aaf336fab3d7329d117f448">__MPU_PRESENT</a> </td><td>0 .. 1 </td><td>0 </td><td>Defines if a MPU is present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gaddbae1a1b57539f398eb5546a17de8f6">__VTOR_PRESENT</a> </td><td>0 .. 1 </td><td>1 </td><td>Defines if a VTOR register is present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a> </td><td>2 .. 8 </td><td>4 </td><td>Number of priority bits implemented in the NVIC (device specific)  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gab58771b4ec03f9bdddc84770f7c95c68">__Vendor_SysTickConfig</a> </td><td>0 .. 1 </td><td>0 </td><td>If this define is set to 1, then the default <b>SysTick_Config</b> function is excluded. In this case, the file <em><b>device.h</b></em> must contain a vendor specific implementation of this function.   </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gac1ba8a48ca926bddc88be9bfd7d42641">__FPU_PRESENT</a> </td><td>0 .. 1 </td><td>0 </td><td>Defines if a FPU is present or not.  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga2a528de57b6217f9fc9d4487d0db6328">__FPU_DP</a> </td><td>0 .. 1 </td><td>0 </td><td>The combination of the defines <a class="el" href="group__device__config.html#gac1ba8a48ca926bddc88be9bfd7d42641">__FPU_PRESENT</a> and <a class="el" href="group__device__config.html#ga2a528de57b6217f9fc9d4487d0db6328">__FPU_DP</a> determine whether the FPU is with single or double precision.   </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga3580fa1aeb7c2ed580904f8f70f8a919">__ICACHE_PRESENT</a> </td><td>0 .. 1 </td><td>1 </td><td>Instruction Chache present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga11d3ac679daeb58d0cec0a4e6ca59010">__DCACHE_PRESENT</a> </td><td>0 .. 1 </td><td>1 </td><td>Data Chache present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gacbb998663708df6626abb09378303019">__DTCM_PRESENT</a> </td><td>0 .. 1 </td><td>1 </td><td>Data Tightly Coupled Memory is present or not  </td></tr>
-</table>
-<p><b>core_sc000.h</b> </p>
-<table  class="cmtable">
-<tr>
-<th>#define </th><th>Value Range </th><th>Default </th><th>Description  </th></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gaf293b060f9c15592d18e6b0b977194bf">__SC000_REV</a> </td><td>0x0000 </td><td>0x0000 </td><td>Core revision number ([15:8] revision number, [7:0] patch number)  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gaddbae1a1b57539f398eb5546a17de8f6">__VTOR_PRESENT</a> </td><td>0 .. 1 </td><td>0 </td><td>Defines if a VTOR register is present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a> </td><td>2 </td><td>2 </td><td>Number of priority bits implemented in the NVIC (device specific)  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga4127d1b31aaf336fab3d7329d117f448">__MPU_PRESENT</a> </td><td>0 .. 1 </td><td>0 </td><td>Defines if a MPU is present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gab58771b4ec03f9bdddc84770f7c95c68">__Vendor_SysTickConfig</a> </td><td>0 .. 1 </td><td>0 </td><td>Vendor defined <b>SysTick_Config</b> function.  </td></tr>
-</table>
-<p><b>core_sc300.h</b> </p>
-<table  class="cmtable">
-<tr>
-<th>#define </th><th>Value Range </th><th>Default </th><th>Description  </th></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga3029728b4fc64727b43bcfd853a7180b">__SC300_REV</a> </td><td>0x0000 </td><td>0x0000 </td><td>Core revision number ([15:8] revision number, [7:0] patch number)  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gaddbae1a1b57539f398eb5546a17de8f6">__VTOR_PRESENT</a> </td><td>0 .. 1 </td><td>1 </td><td>Defines if a VTOR register is present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a> </td><td>2 .. 8 </td><td>4 </td><td>Number of priority bits implemented in the NVIC (device specific)  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga4127d1b31aaf336fab3d7329d117f448">__MPU_PRESENT</a> </td><td>0 .. 1 </td><td>0 </td><td>Defines if a MPU is present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gab58771b4ec03f9bdddc84770f7c95c68">__Vendor_SysTickConfig</a> </td><td>0 .. 1 </td><td>0 </td><td>Vendor defined <b>SysTick_Config</b> function.  </td></tr>
-</table>
-<p><b>core_CM23.h</b> or <b>core_ARMv8MBL.h</b> </p>
-<table  class="cmtable">
-<tr>
-<th>#define </th><th>Value Range </th><th>Default </th><th>Description  </th></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga645c9be694a2d5b5a5b772a0102c727a">__ARMv8MBL_REV</a> or <a class="el" href="group__device__config.html#ga0f6c2b504ee424a7895fd7a420acdd0e">__CM23_REV</a> </td><td>0x0000 </td><td>0x0000 </td><td>Core revision number ([15:8] revision number, [7:0] patch number)  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga4127d1b31aaf336fab3d7329d117f448">__MPU_PRESENT</a> </td><td>0 .. 1 </td><td>0 </td><td>Defines if a MPU is present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gadae9d54c744e525135b097c618bae3c4">__SAUREGION_PRESENT</a> </td><td>0 .. 1 </td><td>0 </td><td>Defines if SAU regions are present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gaddbae1a1b57539f398eb5546a17de8f6">__VTOR_PRESENT</a> </td><td>0 .. 1 </td><td>0 </td><td>Defines if a VTOR register is present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a> </td><td>2 </td><td>2 </td><td>Number of priority bits implemented in the NVIC (device specific)  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gab58771b4ec03f9bdddc84770f7c95c68">__Vendor_SysTickConfig</a> </td><td>0 .. 1 </td><td>0 </td><td>Vendor defined <b>SysTick_Config</b> function.  </td></tr>
-</table>
-<p><b>core_CM33.h</b> or <b>core_cm35p.h</b> or <b>core_ARMv8MML.h</b> </p>
-<table  class="cmtable">
-<tr>
-<th>#define </th><th>Value Range </th><th>Default </th><th>Description  </th></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gadb7d425f5ad0389b0eb1c6a69f8eb214">__ARMv8MML_REV</a> or <a class="el" href="group__device__config.html#ga178e7a57b608f3e20d1c0cf18a2c2ac3">__CM33_REV</a> or <a class="el" href="group__device__config.html#gadd339c07b13a763dda6e83f4c05122f6">__CM35P_REV</a> </td><td>0x0000 </td><td>0x0000 </td><td>Core revision number ([15:8] revision number, [7:0] patch number)  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga4127d1b31aaf336fab3d7329d117f448">__MPU_PRESENT</a> </td><td>0 .. 1 </td><td>0 </td><td>Defines if a MPU is present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gadae9d54c744e525135b097c618bae3c4">__SAUREGION_PRESENT</a> </td><td>0 .. 1 </td><td>0 </td><td>Defines if SAU regions are present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gac1ba8a48ca926bddc88be9bfd7d42641">__FPU_PRESENT</a> </td><td>0 .. 1 </td><td>0 </td><td>Defines if a FPU is present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gaddbae1a1b57539f398eb5546a17de8f6">__VTOR_PRESENT</a> </td><td>0 .. 1 </td><td>1 </td><td>Defines if a VTOR register is present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a> </td><td>2 .. 8 </td><td>3 </td><td>Number of priority bits implemented in the NVIC (device specific)  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gab58771b4ec03f9bdddc84770f7c95c68">__Vendor_SysTickConfig</a> </td><td>0 .. 1 </td><td>0 </td><td>Vendor defined <b>SysTick_Config</b> function.  </td></tr>
-</table>
-<p><b>core_CM55.h</b> or <b>core_ARMv81MML.h</b> </p>
-<table  class="cmtable">
-<tr>
-<th>#define </th><th>Value Range </th><th>Default </th><th>Description  </th></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga4dd7b69d473733e59cd99fc786174cd3">__ARMv81MML_REV</a> or <a class="el" href="group__device__config.html#gaea2d16e963063038cde86cee33c4ef37">__CM55_REV</a> </td><td>0x0000 </td><td>0x0000 </td><td>Core revision number ([15:8] revision number, [7:0] patch number)  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga4127d1b31aaf336fab3d7329d117f448">__MPU_PRESENT</a> </td><td>0 .. 1 </td><td>0 </td><td>Defines if a MPU is present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gadae9d54c744e525135b097c618bae3c4">__SAUREGION_PRESENT</a> </td><td>0 .. 1 </td><td>0 </td><td>Defines if SAU regions are present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gac1ba8a48ca926bddc88be9bfd7d42641">__FPU_PRESENT</a> </td><td>0 .. 1 </td><td>0 </td><td>Defines if a FPU is present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga2a528de57b6217f9fc9d4487d0db6328">__FPU_DP</a> </td><td>0 .. 1 </td><td>0 </td><td>The combination of the defines <a class="el" href="group__device__config.html#gac1ba8a48ca926bddc88be9bfd7d42641">__FPU_PRESENT</a> and <a class="el" href="group__device__config.html#ga2a528de57b6217f9fc9d4487d0db6328">__FPU_DP</a> determine whether the FPU is with single or double precision.   </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga3580fa1aeb7c2ed580904f8f70f8a919">__ICACHE_PRESENT</a> </td><td>0 .. 1 </td><td>1 </td><td>Instruction Chache present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga11d3ac679daeb58d0cec0a4e6ca59010">__DCACHE_PRESENT</a> </td><td>0 .. 1 </td><td>1 </td><td>Data Chache present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gaddbae1a1b57539f398eb5546a17de8f6">__VTOR_PRESENT</a> </td><td>0 .. 1 </td><td>1 </td><td>Defines if a VTOR register is present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a> </td><td>2 .. 8 </td><td>3 </td><td>Number of priority bits implemented in the NVIC (device specific)  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gab58771b4ec03f9bdddc84770f7c95c68">__Vendor_SysTickConfig</a> </td><td>0 .. 1 </td><td>0 </td><td>Vendor defined <b>SysTick_Config</b> function.  </td></tr>
-</table>
-<p><b>core_CM85.h</b> </p>
-<table  class="cmtable">
-<tr>
-<th>#define </th><th>Value Range </th><th>Default </th><th>Description  </th></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gab1efd620a97f291faa1092e10e693bd3">__CM85_REV</a> </td><td>0x0001 </td><td>0x0001 </td><td>Core revision number ([15:8] revision number, [7:0] patch number)  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga4127d1b31aaf336fab3d7329d117f448">__MPU_PRESENT</a> </td><td>0 .. 1 </td><td>0 </td><td>Defines if a MPU is present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gadae9d54c744e525135b097c618bae3c4">__SAUREGION_PRESENT</a> </td><td>0 .. 1 </td><td>0 </td><td>Defines if SAU regions are present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gac1ba8a48ca926bddc88be9bfd7d42641">__FPU_PRESENT</a> </td><td>0 .. 1 </td><td>0 </td><td>Defines if a FPU is present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga2a528de57b6217f9fc9d4487d0db6328">__FPU_DP</a> </td><td>0 .. 1 </td><td>0 </td><td>The combination of the defines <a class="el" href="group__device__config.html#gac1ba8a48ca926bddc88be9bfd7d42641">__FPU_PRESENT</a> and <a class="el" href="group__device__config.html#ga2a528de57b6217f9fc9d4487d0db6328">__FPU_DP</a> determine whether the FPU is with single or double precision.   </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga3580fa1aeb7c2ed580904f8f70f8a919">__ICACHE_PRESENT</a> </td><td>0 .. 1 </td><td>1 </td><td>Instruction Chache present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#ga11d3ac679daeb58d0cec0a4e6ca59010">__DCACHE_PRESENT</a> </td><td>0 .. 1 </td><td>1 </td><td>Data Chache present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gaddbae1a1b57539f398eb5546a17de8f6">__VTOR_PRESENT</a> </td><td>0 .. 1 </td><td>1 </td><td>Defines if a VTOR register is present or not  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a> </td><td>2 .. 8 </td><td>3 </td><td>Number of priority bits implemented in the NVIC (device specific)  </td></tr>
-<tr>
-<td><a class="el" href="group__device__config.html#gab58771b4ec03f9bdddc84770f7c95c68">__Vendor_SysTickConfig</a> </td><td>0 .. 1 </td><td>0 </td><td>Vendor defined <b>SysTick_Config</b> function.  </td></tr>
-</table>
-<p><b>Example</b> </p>
-<p>The following code exemplifies the configuration of the Cortex-M4 Processor and Core Peripherals.</p>
-<div class="fragment"><div class="line"><span class="preprocessor">#define __CM4_REV                 0x0001U   </span><span class="comment">/* Core revision r0p1                                 */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __MPU_PRESENT             1U        </span><span class="comment">/* MPU present or not                                 */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __VTOR_PRESENT            1U        </span><span class="comment">/* VTOR present */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __NVIC_PRIO_BITS          3U        </span><span class="comment">/* Number of Bits used for Priority Levels            */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __Vendor_SysTickConfig    0U        </span><span class="comment">/* Set to 1 if different SysTick Config is used       */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __FPU_PRESENT             1U        </span><span class="comment">/* FPU present or not                                 */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span>.</div>
-<div class="line">.</div>
-<div class="line"><span class="preprocessor">#include &lt;core_cm4.h&gt;</span>                       <span class="comment">/* Cortex-M4 processor and core peripherals           */</span></div>
-<div class="line"><span class="preprocessor">#include &quot;system_&lt;device&gt;</span>.h<span class="stringliteral">&quot;                /* Device System Header                               */</span></div>
-</div><!-- fragment --><h1><a class="anchor" id="core_version_sect"></a>
-CMSIS Version and Processor Information</h1>
-<p>Defines in the core_<em>cpu</em>.h file identify the version of the CMSIS-Core (Cortex-M) and the processor used. The following shows the defines in the various core_<em>cpu</em>.h files that may be used in the <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> to verify a minimum version or ensure that the right processor core is used.</p>
-<p><b>core_cm0.h</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#define __CM0_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                         </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM0_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                          </span><span class="comment">/* [15:0]  CMSIS HAL sub version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM0_CMSIS_VERSION       ((__CM0_CMSIS_VERSION_MAIN &lt;&lt; 16U) | \</span></div>
-<div class="line"><span class="preprocessor">                                    __CM0_CMSIS_VERSION_SUB          )              </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor">#define __CORTEX_M                (0U)                                              </span><span class="comment">/* Cortex-M Core */</span><span class="preprocessor"></span></div>
-</div><!-- fragment --><p><b>core_cm0plus.h</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#define __CM0PLUS_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                     </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM0PLUS_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                      </span><span class="comment">/* [15:0]  CMSIS HAL sub version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM0PLUS_CMSIS_VERSION       ((__CM0P_CMSIS_VERSION_MAIN &lt;&lt; 16U) | \</span></div>
-<div class="line"><span class="preprocessor">                                        __CM0P_CMSIS_VERSION_SUB          )         </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor">#define __CORTEX_M                    (0U)                                          </span><span class="comment">/* Cortex-M Core */</span><span class="preprocessor"></span></div>
-</div><!-- fragment --><p><b>core_cm1.h</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#define __CM1_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                         </span></div>
-<div class="line"><span class="preprocessor">#define __CM1_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                          </span></div>
-<div class="line"><span class="preprocessor">#define __CM1_CMSIS_VERSION       ((__CM1_CMSIS_VERSION_MAIN &lt;&lt; 16U) | \</span></div>
-<div class="line"><span class="preprocessor">                                    __CM1_CMSIS_VERSION_SUB           )             </span></div>
-<div class="line"><span class="preprocessor">#define __CORTEX_M                (1U)                                              </span></div>
-</div><!-- fragment --><p><b>core_cm3.h</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#define __CM3_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                         </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM3_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                          </span><span class="comment">/* [15:0]  CMSIS HAL sub version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM3_CMSIS_VERSION       ((__CM3_CMSIS_VERSION_MAIN &lt;&lt; 16U) | \</span></div>
-<div class="line"><span class="preprocessor">                                    __CM3_CMSIS_VERSION_SUB          )              </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor">#define __CORTEX_M                (3U)                                              </span><span class="comment">/* Cortex-M Core */</span><span class="preprocessor"></span></div>
-</div><!-- fragment --><p><b>core_cm4.h</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#define __CM4_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                         </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM4_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                          </span><span class="comment">/* [15:0]  CMSIS HAL sub version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM4_CMSIS_VERSION       ((__CM4_CMSIS_VERSION_MAIN &lt;&lt; 16U) | \</span></div>
-<div class="line"><span class="preprocessor">                                    __CM4_CMSIS_VERSION_SUB          )              </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor">#define __CORTEX_M                (4U)                                              </span><span class="comment">/* Cortex-M Core */</span><span class="preprocessor"></span></div>
-</div><!-- fragment --><p><b>core_cm7.h</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#define __CM7_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN                          </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM7_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                          </span><span class="comment">/* [15:0]  CMSIS HAL sub version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM7_CMSIS_VERSION       ((__CM7_CMSIS_VERSION_MAIN &lt;&lt; 16U) | \</span></div>
-<div class="line"><span class="preprocessor">                                    __CM7_CMSIS_VERSION_SUB          )              </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor">#define __CORTEX_M                (7U)                                              </span><span class="comment">/* Cortex-M Core */</span><span class="preprocessor"></span></div>
-</div><!-- fragment --><p><b>core_cm23.h</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#define __CM23_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                        </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM23_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                         </span><span class="comment">/* [15:0]  CMSIS HAL sub version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM23_CMSIS_VERSION       ((__CM23_CMSIS_VERSION_MAIN &lt;&lt; 16U) | \</span></div>
-<div class="line"><span class="preprocessor">                                     __CM23_CMSIS_VERSION_SUB          )            </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor">#define __CORTEX_M                (23U)                                             </span><span class="comment">/* Cortex-M Core */</span><span class="preprocessor"></span></div>
-</div><!-- fragment --><p><b>core_cm33.h</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#define __CM33_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                        </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM33_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                         </span><span class="comment">/* [15:0]  CMSIS HAL sub version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM33_CMSIS_VERSION       ((__CM33_CMSIS_VERSION_MAIN &lt;&lt; 16U) | \</span></div>
-<div class="line"><span class="preprocessor">                                     __CM33_CMSIS_VERSION_SUB          )            </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor">#define __CORTEX_M                (33U)                                             </span><span class="comment">/* Cortex-M Core */</span><span class="preprocessor"></span></div>
-</div><!-- fragment --><p><b>core_cm55.h</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#define __CM55_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                        </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM55_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                         </span><span class="comment">/* [15:0]  CMSIS HAL sub version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM55_CMSIS_VERSION       ((__CM55_CMSIS_VERSION_MAIN &lt;&lt; 16U) | \</span></div>
-<div class="line"><span class="preprocessor">                                     __CM55_CMSIS_VERSION_SUB          )            </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor">#define __CORTEX_M                (7U)                                              </span><span class="comment">/* Cortex-M Core */</span><span class="preprocessor"></span></div>
-</div><!-- fragment --><p><b>core_sc000.h</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#define __SC000_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                       </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __SC000_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                        </span><span class="comment">/* [15:0]  CMSIS HAL sub version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __SC000_CMSIS_VERSION       ((__SC000_CMSIS_VERSION_MAIN &lt;&lt; 16U) | \</span></div>
-<div class="line"><span class="preprocessor">                                      __SC000_CMSIS_VERSION_SUB          )          </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor">#define __CORTEX_SC                 (0U)                                            </span><span class="comment">/* Cortex secure core */</span><span class="preprocessor"></span></div>
-</div><!-- fragment --><p><b>core_sc300.h</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#define __SC300_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                       </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __SC300_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                        </span><span class="comment">/* [15:0]  CMSIS HAL sub version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __SC300_CMSIS_VERSION       ((__SC300_CMSIS_VERSION_MAIN &lt;&lt; 16U) | \</span></div>
-<div class="line"><span class="preprocessor">                                      __SC300_CMSIS_VERSION_SUB          )          </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor">#define __CORTEX_SC                 (300U)                                          </span><span class="comment">/* Cortex secure core */</span><span class="preprocessor"></span></div>
-</div><!-- fragment --><p><b>core_cm35p.h</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#define __CM35P_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                       </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM35P_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                        </span><span class="comment">/* [15:0]  CMSIS HAL sub version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __CM35P_CMSIS_VERSION       ((__CM35P_CMSIS_VERSION_MAIN &lt;&lt; 16U) | \</span></div>
-<div class="line"><span class="preprocessor">                                      __CM35P_CMSIS_VERSION_SUB          )          </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor">#define __CORTEX_M                (35U)                                             </span><span class="comment">/* Cortex-M Core */</span><span class="preprocessor"></span></div>
-</div><!-- fragment --><p><b>core_ARMv8MBL.h</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#define __ARMv8MBL_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                    </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __ARMv8MBL_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                     </span><span class="comment">/* [15:0]  CMSIS HAL sub version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __ARMv8MBL_CMSIS_VERSION       ((__ARMv8MBL_CMSIS_VERSION_MAIN &lt;&lt; 16U) | \</span></div>
-<div class="line"><span class="preprocessor">                                         __ARMv8MBL_CMSIS_VERSION_SUB           )   </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor">#define __CORTEX_M                     (2U)                                         </span><span class="comment">/* Cortex secure core */</span><span class="preprocessor"></span></div>
-</div><!-- fragment --><p><b>core_ARMv8MML.h</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#define __ARMv8MML_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)                    </span><span class="comment">/* [31:16] CMSIS HAL main version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __ARMv8MML_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)                     </span><span class="comment">/* [15:0]  CMSIS HAL sub version */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __ARMv8MML_CMSIS_VERSION       ((__ARMv8MML_CMSIS_VERSION_MAIN &lt;&lt; 16U) | \</span></div>
-<div class="line"><span class="preprocessor">                                         __ARMv8MML_CMSIS_VERSION_SUB           )   </span><span class="comment">/* CMSIS HAL version number */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor">#define __CORTEX_M                     (80U)                                        </span><span class="comment">/* Cortex secure core */</span><span class="preprocessor"></span></div>
-</div><!-- fragment --><h1><a class="anchor" id="device_access"></a>
-Device Peripheral Access Layer</h1>
-<p>The <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> contains for each peripheral:</p>
-<ul>
-<li>Register Layout Typedef</li>
-<li>Base Address</li>
-<li>Access Definitions</li>
-</ul>
-<p>The section <a class="el" href="group__peripheral__gr.html">Peripheral Access</a> shows examples for peripheral definitions.</p>
-<h1><a class="anchor" id="device_h_sec"></a>
-Device.h Template File</h1>
-<p>The silicon vendor needs to extend the Device.h template file with the CMSIS features described above. In addition the <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> may contain functions to access device-specific peripherals. The <a class="el" href="system_c_pg.html#system_Device_h_sec">system_Device.h Template File</a> which is provided as part of the CMSIS specification is shown below.</p>
-<pre class="fragment">/*************************************************************************//**
- * @file     &lt;Device&gt;.h
- * @brief    CMSIS-Core(M) Device Peripheral Access Layer Header File for
- *           Device &lt;Device&gt;
- * @version  V1.0.0
- * @date     20. January 2021
- *****************************************************************************/
-/*
- * Copyright (c) 2009-2021 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef &lt;Device&gt;_H      /* ToDo: Replace '&lt;Device&gt;' with your device name */
-#define &lt;Device&gt;_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-
-/* ========================================================================= */
-/* ============           Interrupt Number Definition           ============ */
-/* ========================================================================= */
-
-typedef enum IRQn
-{
-/* ================     Cortex-M Core Exception Numbers     ================ */
-
-/* ToDo: Add Cortex exception numbers according the used Cortex-Core */
-  Reset_IRQn             = -15,  /*  1 Reset Vector
-                                       invoked on Power up and warm reset */
-  NonMaskableInt_IRQn    = -14,  /*  2 Non maskable Interrupt
-                                       cannot be stopped or preempted */
-  HardFault_IRQn         = -13,  /*  3 Hard Fault
-                                       all classes of Fault */
-  MemoryManagement_IRQn  = -12,  /*  4 Memory Management
-                                       MPU mismatch, including Access Violation and No Match */
-  BusFault_IRQn          = -11,  /*  5 Bus Fault
-                                       Pre-Fetch-, Memory Access, other address/memory Fault */
-  UsageFault_IRQn        = -10,  /*  6 Usage Fault
-                                       i.e. Undef Instruction, Illegal State Transition */
-  SecureFault_IRQn       =  -9,  /*  7 Secure Fault Interrupt */
-  SVCall_IRQn            =  -5,  /* 11 System Service Call via SVC instruction */
-  DebugMonitor_IRQn      =  -4,  /* 12 Debug Monitor */
-  PendSV_IRQn            =  -2,  /* 14 Pendable request for system service */
-  SysTick_IRQn           =  -1,  /* 15 System Tick Timer */
-
-/* ================        &lt;Device&gt; Interrupt Numbers       ================ */
-/* ToDo: Add here your device specific interrupt numbers
-         according the interrupt handlers defined in startup_Device.s
-         eg.: Interrupt for Timer#1       TIM1_IRQHandler   -&gt;   TIM1_IRQn */
-  &lt;DeviceInterrupt first&gt;_IRQn = 0,    /* first Device Interrupt*/
-  ...
-  &lt;DeviceInterrupt last&gt;_IRQn  = n     /* last Device Interrupt */
-} IRQn_Type;
-
-
-/* ========================================================================= */
-/* ============      Processor and Core Peripheral Section      ============ */
-/* ========================================================================= */
-
-/* ================ Start of section using anonymous unions ================ */
-#if   defined (__CC_ARM)
-  #pragma push
-  #pragma anon_unions
-#elif defined (__ICCARM__)
-  #pragma language=extended
-#elif defined(__ARMCC_VERSION) &amp;&amp; (__ARMCC_VERSION &gt;= 6010050)
-  #pragma clang diagnostic push
-  #pragma clang diagnostic ignored "-Wc11-extensions"
-  #pragma clang diagnostic ignored "-Wreserved-id-macro"
-#elif defined (__GNUC__)
-  /* anonymous unions are enabled by default */
-#elif defined (__TMS470__)
-  /* anonymous unions are enabled by default */
-#elif defined (__TASKING__)
-  #pragma warning 586
-#elif defined (__CSMC__)
-  /* anonymous unions are enabled by default */
-#else
-  #warning Not supported compiler type
-#endif
-
-
-/* ================    Configuration of Core Peripherals    ================ */
-/* ToDo: Set the defines according your Device */
-/* ToDo: Define the correct core revision
-         valid CMSIS core revision macro names are:
-           __CM0_REV, __CM0PLUS_REV, __CM1_REV, __CM3_REV, __CM4_REV, __CM7_REV
-           __CM23_REV, __CM33_REV, __CM35P_REV, __CM55_REV
-           __SC000_REV, __SC300_REV */
-#define __CM#_REV               0x0201U  /* Core Revision r2p1 */
-/* ToDo: define the correct core features for the &lt;Device&gt; */
-#define __Vendor_SysTickConfig  0U       /* Set to 1 if different SysTick Config is used */
-#define __NVIC_PRIO_BITS        3U       /* Number of Bits used for Priority Levels */
-#define __VTOR_PRESENT          1U       /* Set to 1 if VTOR is present */
-#define __MPU_PRESENT           1U       /* Set to 1 if MPU is present */
-#define __FPU_PRESENT           0U       /* Set to 1 if FPU is present */
-#define __FPU_DP                0U       /* Set to 1 if FPU is double precision FPU (default is single precision FPU) */
-#define __DSP_PRESENT           1U       /* Set to 1 if DSP extension are present */
-#define __SAUREGION_PRESENT     1U       /* Set to 1 if SAU regions are present */
-#define __PMU_PRESENT           1U       /* Set to 1 if PMU is present */
-#define __PMU_NUM_EVENTCNT      8U       /* Set number of PMU Event Counters */
-#define __ICACHE_PRESENT        0U       /* Set to 1 if I-Cache is present */
-#define __DCACHE_PRESENT        0U       /* Set to 1 if D-Cache is present */
-#define __DTCM_PRESENT          0U       /* Set to 1 if DTCM is present */
-
-
-/* ToDo: Include the CMSIS core header file according your device.
-         valid CMSIS core header files are:
-           core_cm0.h, core_cm0plus.h, core_cm1.h, core_cm3.h, core_cm4.h, core_cm7.h
-           core_cm23.h, core_cm33.h, core_cm35p.h, core_cm55.h
-           core_sc000.h, core_sc300.h */
-#include &lt;core_cm#.h&gt;                           /* Processor and core peripherals */
-/* ToDo: Include your system_&lt;Device&gt;.h file
-         replace '&lt;Device&gt;' with your device name */
-#include "system_&lt;Device&gt;.h"                    /* System Header */
-
-
-
-/* ========================================================================= */
-/* ============       Device Specific Peripheral Section        ============ */
-/* ========================================================================= */
-
-
-/* ToDo: Add here your device specific peripheral access structure typedefs
-         including bit definitions for Pos/Msk macros
-         following is an example for a timer */
-
-/* ========================================================================= */
-/* ============                       TMR                       ============ */
-/* ========================================================================= */
-
-typedef struct
-{
-  __IOM  uint32_t  LOAD;                 /* Offset: 0x000 (R/W) Load Register */
-  __IM   uint32_t  VALUE;                /* Offset: 0x004 (R/ ) Value Register */
-  __IOM  uint32_t  CONTROL;              /* Offset: 0x008 (R/W) Control Register */
-  __OM   uint32_t  INTCLR;               /* Offset: 0x00C ( /W) Clear Interrupt Register */
-  __IM   uint32_t  RIS;                  /* Offset: 0x010 (R/ ) Raw Interrupt Status Register */
-  __IM   uint32_t  MIS;                  /* Offset: 0x014 (R/ ) Interrupt Status Register */
-  __IOM  uint32_t  BGLOAD;               /* Offset: 0x018 (R/W) Background Load Register */
-} &lt;DeviceAbbreviation&gt;_TMR_TypeDef;
-
-/* &lt;DeviceAbbreviation&gt;_TMR LOAD Register Definitions */
-#define &lt;DeviceAbbreviation&gt;_TMR_LOAD_Pos              0
-#define &lt;DeviceAbbreviation&gt;_TMR_LOAD_Msk             (0xFFFFFFFFUL /*&lt;&lt; &lt;DeviceAbbreviation&gt;_TMR_LOAD_Pos*/)
-
-/* &lt;DeviceAbbreviation&gt;_TMR VALUE Register Definitions */
-#define &lt;DeviceAbbreviation&gt;_TMR_VALUE_Pos             0
-#define &lt;DeviceAbbreviation&gt;_TMR_VALUE_Msk            (0xFFFFFFFFUL /*&lt;&lt; &lt;DeviceAbbreviation&gt;_TMR_VALUE_Pos*/)
-
-/* &lt;DeviceAbbreviation&gt;_TMR CONTROL Register Definitions */
-#define &lt;DeviceAbbreviation&gt;_TMR_CONTROL_SIZE_Pos      1
-#define &lt;DeviceAbbreviation&gt;_TMR_CONTROL_SIZE_Msk     (1UL &lt;&lt; &lt;DeviceAbbreviation&gt;_TMR_CONTROL_SIZE_Pos)
-
-#define &lt;DeviceAbbreviation&gt;_TMR_CONTROL_ONESHOT_Pos   0
-#define &lt;DeviceAbbreviation&gt;_TMR_CONTROL_ONESHOT_Msk  (1UL /*&lt;&lt; &lt;DeviceAbbreviation&gt;_TMR_CONTROL_ONESHOT_Pos*/)
-
-
-
-/* ================  End of section using anonymous unions  ================ */
-#if   defined (__CC_ARM)
-  #pragma pop
-#elif defined (__ICCARM__)
-  /* leave anonymous unions enabled */
-#elif (defined(__ARMCC_VERSION) &amp;&amp; (__ARMCC_VERSION &gt;= 6010050))
-  #pragma clang diagnostic pop
-#elif defined (__GNUC__)
-  /* anonymous unions are enabled by default */
-#elif defined (__TMS470__)
-  /* anonymous unions are enabled by default */
-#elif defined (__TASKING__)
-  #pragma warning restore
-#elif defined (__CSMC__)
-  /* anonymous unions are enabled by default */
-#else
-  #warning Not supported compiler type
-#endif
-
-
-/* ========================================================================= */
-/* ============     Device Specific Peripheral Address Map      ============ */
-/* ========================================================================= */
-
-
-/* ToDo: Add here your device peripherals base addresses
-         following is an example for timer */
-
-/* Peripheral and SRAM base address */
-#define &lt;DeviceAbbreviation&gt;_FLASH_BASE       (0x00000000UL)                              /* (FLASH     ) Base Address */
-#define &lt;DeviceAbbreviation&gt;_SRAM_BASE        (0x20000000UL)                              /* (SRAM      ) Base Address */
-#define &lt;DeviceAbbreviation&gt;_PERIPH_BASE      (0x40000000UL)                              /* (Peripheral) Base Address */
-
-/* Peripheral memory map */
-#define &lt;DeviceAbbreviation&gt;TIM0_BASE         (&lt;DeviceAbbreviation&gt;_PERIPH_BASE)          /* (Timer0    ) Base Address */
-#define &lt;DeviceAbbreviation&gt;TIM1_BASE         (&lt;DeviceAbbreviation&gt;_PERIPH_BASE + 0x0800) /* (Timer1    ) Base Address */
-#define &lt;DeviceAbbreviation&gt;TIM2_BASE         (&lt;DeviceAbbreviation&gt;_PERIPH_BASE + 0x1000) /* (Timer2    ) Base Address */
-
-
-/* ========================================================================= */
-/* ============             Peripheral declaration              ============ */
-/* ========================================================================= */
-
-
-/* ToDo: Add here your device peripherals pointer definitions
-         following is an example for timer */
-
-#define &lt;DeviceAbbreviation&gt;_TIM0        ((&lt;DeviceAbbreviation&gt;_TMR_TypeDef *) &lt;DeviceAbbreviation&gt;TIM0_BASE)
-#define &lt;DeviceAbbreviation&gt;_TIM1        ((&lt;DeviceAbbreviation&gt;_TMR_TypeDef *) &lt;DeviceAbbreviation&gt;TIM0_BASE)
-#define &lt;DeviceAbbreviation&gt;_TIM2        ((&lt;DeviceAbbreviation&gt;_TMR_TypeDef *) &lt;DeviceAbbreviation&gt;TIM0_BASE)
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif  /* &lt;Device&gt;_H */
-</pre> </div></div><!-- contents -->
-</div><!-- doc-content -->
-<!-- start footer part -->
-<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
-  <ul>
-    <li class="navelem"><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a></li>
-    <li class="footer">
-      <script type="text/javascript">
-        <!--
-        writeFooter.call(this);
-        //-->
-      </script>    
-    </li>
-  </ul>
-</div>
-</body>
-</html>

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-#powerTip.w:after, #powerTip.w:before {
-	right: 100%;
-}
-#powerTip.w:after {
-	border-right-color: #ffffff;
-	border-width: 10px;
-	top: 50%;
-	margin-top: -10px;
-}
-#powerTip.w:before {
-	border-right-color: #808080;
-	border-width: 11px;
-	top: 50%;
-	margin-top: -11px;
-}
-
-@media print
-{
-  #top { display: none; }
-  #side-nav { display: none; }
-  #nav-path { display: none; }
-  body { overflow:visible; }
-  h1, h2, h3, h4, h5, h6 { page-break-after: avoid; }
-  .summary { display: none; }
-  .memitem { page-break-inside: avoid; }
-  #doc-content
-  {
-    margin-left:0 !important;
-    height:auto !important;
-    width:auto !important;
-    overflow:inherit;
-    display:inline;
-  }
-}
-

diff --git a/Documentation/Core/html/doxygen.png b/Documentation/Core/html/doxygen.png
deleted file mode 100644
index 7765a33..0000000
--- a/Documentation/Core/html/doxygen.png
+++ /dev/null
Binary files differ

diff --git a/Documentation/Core/html/dynsections.js b/Documentation/Core/html/dynsections.js
deleted file mode 100644
index ed092c7..0000000
--- a/Documentation/Core/html/dynsections.js
+++ /dev/null

@@ -1,97 +0,0 @@
-function toggleVisibility(linkObj)
-{
- var base = $(linkObj).attr('id');
- var summary = $('#'+base+'-summary');
- var content = $('#'+base+'-content');
- var trigger = $('#'+base+'-trigger');
- var src=$(trigger).attr('src');
- if (content.is(':visible')===true) {
-   content.hide();
-   summary.show();
-   $(linkObj).addClass('closed').removeClass('opened');
-   $(trigger).attr('src',src.substring(0,src.length-8)+'closed.png');
- } else {
-   content.show();
-   summary.hide();
-   $(linkObj).removeClass('closed').addClass('opened');
-   $(trigger).attr('src',src.substring(0,src.length-10)+'open.png');
- } 
- return false;
-}
-
-function updateStripes()
-{
-  $('table.directory tr').
-       removeClass('even').filter(':visible:even').addClass('even');
-}
-function toggleLevel(level)
-{
-  $('table.directory tr').each(function(){ 
-    var l = this.id.split('_').length-1;
-    var i = $('#img'+this.id.substring(3));
-    var a = $('#arr'+this.id.substring(3));
-    if (l<level+1) {
-      i.attr('src','ftv2folderopen.png');
-      a.attr('src','ftv2mnode.png');
-      $(this).show();
-    } else if (l==level+1) {
-      i.attr('src','ftv2folderclosed.png');
-      a.attr('src','ftv2pnode.png');
-      $(this).show();
-    } else {
-      $(this).hide();
-    }
-  });
-  updateStripes();
-}
-
-function toggleFolder(id)
-{
-  //The clicked row
-  var currentRow = $('#row_'+id);
-  var currentRowImages = currentRow.find("img");
-
-  //All rows after the clicked row
-  var rows = currentRow.nextAll("tr");
-
-  //Only match elements AFTER this one (can't hide elements before)
-  var childRows = rows.filter(function() {
-    var re = new RegExp('^row_'+id+'\\d+_$', "i"); //only one sub
-    return this.id.match(re);
-  });
-
-  //First row is visible we are HIDING
-  if (childRows.filter(':first').is(':visible')===true) {
-    currentRowImages.filter("[id^=arr]").attr('src', 'ftv2pnode.png');
-    currentRowImages.filter("[id^=img]").attr('src', 'ftv2folderclosed.png');
-    rows.filter("[id^=row_"+id+"]").hide();
-  } else { //We are SHOWING
-    //All sub images
-    var childImages = childRows.find("img");
-    var childImg = childImages.filter("[id^=img]");
-    var childArr = childImages.filter("[id^=arr]");
-
-    currentRow.find("[id^=arr]").attr('src', 'ftv2mnode.png'); //open row
-    currentRow.find("[id^=img]").attr('src', 'ftv2folderopen.png'); //open row
-    childImg.attr('src','ftv2folderclosed.png'); //children closed
-    childArr.attr('src','ftv2pnode.png'); //children closed
-    childRows.show(); //show all children
-  }
-  updateStripes();
-}
-
-
-function toggleInherit(id)
-{
-  var rows = $('tr.inherit.'+id);
-  var img = $('tr.inherit_header.'+id+' img');
-  var src = $(img).attr('src');
-  if (rows.filter(':first').is(':visible')===true) {
-    rows.css('display','none');
-    $(img).attr('src',src.substring(0,src.length-8)+'closed.png');
-  } else {
-    rows.css('display','table-row'); // using show() causes jump in firefox
-    $(img).attr('src',src.substring(0,src.length-10)+'open.png');
-  }
-}
-

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deleted file mode 100644
index 63c605b..0000000
--- a/Documentation/Core/html/ftv2blank.png
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diff --git a/Documentation/Core/html/ftv2cl.png b/Documentation/Core/html/ftv2cl.png
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index edd2ddc..0000000
--- a/Documentation/Core/html/ftv2cl.png
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Binary files differ

diff --git a/Documentation/Core/html/ftv2doc.png b/Documentation/Core/html/ftv2doc.png
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--- a/Documentation/Core/html/ftv2doc.png
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diff --git a/Documentation/Core/html/ftv2folderclosed.png b/Documentation/Core/html/ftv2folderclosed.png
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index 23db980..0000000
--- a/Documentation/Core/html/ftv2folderclosed.png
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diff --git a/Documentation/Core/html/ftv2folderopen.png b/Documentation/Core/html/ftv2folderopen.png
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index e9bd9eb..0000000
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index 63c605b..0000000
--- a/Documentation/Core/html/ftv2lastnode.png
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diff --git a/Documentation/Core/html/ftv2link.png b/Documentation/Core/html/ftv2link.png
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index 57fab09..0000000
--- a/Documentation/Core/html/ftv2link.png
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diff --git a/Documentation/Core/html/ftv2mnode.png b/Documentation/Core/html/ftv2mnode.png
deleted file mode 100644
index 40be5ae..0000000
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deleted file mode 100644
index 687a9e1..0000000
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diff --git a/Documentation/Core/html/ftv2pnode.png b/Documentation/Core/html/ftv2pnode.png
deleted file mode 100644
index 687a9e1..0000000
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diff --git a/Documentation/Core/html/ftv2splitbar.png b/Documentation/Core/html/ftv2splitbar.png
deleted file mode 100644
index 5e210e7..0000000
--- a/Documentation/Core/html/ftv2splitbar.png
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diff --git a/Documentation/Core/html/ftv2vertline.png b/Documentation/Core/html/ftv2vertline.png
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diff --git a/Documentation/Core/html/functions.html b/Documentation/Core/html/functions.html
deleted file mode 100644
index 84030f0..0000000
--- a/Documentation/Core/html/functions.html
+++ /dev/null

@@ -1,764 +0,0 @@
-<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Transitional//EN" "http://www.w3.org/TR/xhtml1/DTD/xhtml1-transitional.dtd">
-<html xmlns="http://www.w3.org/1999/xhtml">
-<head>
-<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
-<meta http-equiv="X-UA-Compatible" content="IE=9"/>
-<title>Data Fields</title>
-<title>CMSIS-Core (Cortex-M): Data Fields</title>
-<link href="tabs.css" rel="stylesheet" type="text/css"/>
-<link href="cmsis.css" rel="stylesheet" type="text/css" />
-<script type="text/javascript" src="jquery.js"></script>
-<script type="text/javascript" src="dynsections.js"></script>
-<script type="text/javascript" src="printComponentTabs.js"></script>
-<script type="text/javascript" src="cmsis_footer.js"></script>
-<link href="navtree.css" rel="stylesheet" type="text/css"/>
-<script type="text/javascript" src="resize.js"></script>
-<script type="text/javascript" src="navtree.js"></script>
-<script type="text/javascript">
-  $(document).ready(initResizable);
-  $(window).load(resizeHeight);
-</script>
-<link href="search/search.css" rel="stylesheet" type="text/css"/>
-<script type="text/javascript" src="search/search.js"></script>
-<script type="text/javascript">
-  $(document).ready(function() { searchBox.OnSelectItem(0); });
-</script>
-</head>
-<body>
-<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
-<div id="titlearea">
-<table cellspacing="0" cellpadding="0">
- <tbody>
- <tr style="height: 46px;">
-  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
-  <td style="padding-left: 0.5em;">
-   <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.6.0</span>
-   </div>
-   <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
-  </td>
- </tr>
- </tbody>
-</table>
-</div>
-<!-- end header part -->
-<div id="CMSISnav" class="tabs1">
-    <ul class="tablist">
-      <script type="text/javascript">
-		<!--
-		writeComponentTabs.call(this);
-		//-->
-      </script>
-	  </ul>
-</div>
-<!-- Generated by Doxygen 1.8.6 -->
-<script type="text/javascript">
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-</script>
-  <div id="navrow1" class="tabs">
-    <ul class="tablist">
-      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
-      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
-      <li><a href="modules.html"><span>Reference</span></a></li>
-      <li>
-        <div id="MSearchBox" class="MSearchBoxInactive">
-        <span class="left">
-          <img id="MSearchSelect" src="search/mag_sel.png"
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-               onmouseout="return searchBox.OnSearchSelectHide()"
-               alt=""/>
-          <input type="text" id="MSearchField" value="Search" accesskey="S"
-               onfocus="searchBox.OnSearchFieldFocus(true)" 
-               onblur="searchBox.OnSearchFieldFocus(false)" 
-               onkeyup="searchBox.OnSearchFieldChange(event)"/>
-          </span><span class="right">
-            <a id="MSearchClose" href="javascript:searchBox.CloseResultsWindow()"><img id="MSearchCloseImg" border="0" src="search/close.png" alt=""/></a>
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-  <div id="navrow2" class="tabs2">
-    <ul class="tablist">
-      <li><a href="annotated.html"><span>Data&#160;Structures</span></a></li>
-      <li class="current"><a href="functions.html"><span>Data&#160;Fields</span></a></li>
-    </ul>
-  </div>
-  <div id="navrow3" class="tabs2">
-    <ul class="tablist">
-      <li class="current"><a href="functions.html"><span>All</span></a></li>
-      <li><a href="functions_vars.html"><span>Variables</span></a></li>
-    </ul>
-  </div>
-  <div id="navrow4" class="tabs3">
-    <ul class="tablist">
-      <li><a href="#index__"><span>_</span></a></li>
-      <li><a href="#index_a"><span>a</span></a></li>
-      <li><a href="#index_b"><span>b</span></a></li>
-      <li><a href="#index_c"><span>c</span></a></li>
-      <li><a href="#index_d"><span>d</span></a></li>
-      <li><a href="#index_e"><span>e</span></a></li>
-      <li><a href="#index_f"><span>f</span></a></li>
-      <li><a href="#index_h"><span>h</span></a></li>
-      <li><a href="#index_i"><span>i</span></a></li>
-      <li><a href="#index_l"><span>l</span></a></li>
-      <li><a href="#index_m"><span>m</span></a></li>
-      <li><a href="#index_n"><span>n</span></a></li>
-      <li><a href="#index_o"><span>o</span></a></li>
-      <li><a href="#index_p"><span>p</span></a></li>
-      <li><a href="#index_q"><span>q</span></a></li>
-      <li><a href="#index_r"><span>r</span></a></li>
-      <li><a href="#index_s"><span>s</span></a></li>
-      <li><a href="#index_t"><span>t</span></a></li>
-      <li><a href="#index_u"><span>u</span></a></li>
-      <li><a href="#index_v"><span>v</span></a></li>
-      <li><a href="#index_w"><span>w</span></a></li>
-      <li class="current"><a href="#index_z"><span>z</span></a></li>
-    </ul>
-  </div>
-</div><!-- top -->
-<div id="side-nav" class="ui-resizable side-nav-resizable">
-  <div id="nav-tree">
-    <div id="nav-tree-contents">
-      <div id="nav-sync" class="sync"></div>
-    </div>
-  </div>
-  <div id="splitbar" style="-moz-user-select:none;" 
-       class="ui-resizable-handle">
-  </div>
-</div>
-<script type="text/javascript">
-$(document).ready(function(){initNavTree('functions.html','');});
-</script>
-<div id="doc-content">
-<!-- window showing the filter options -->
-<div id="MSearchSelectWindow"
-     onmouseover="return searchBox.OnSearchSelectShow()"
-     onmouseout="return searchBox.OnSearchSelectHide()"
-     onkeydown="return searchBox.OnSearchSelectKey(event)">
-<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Pages</a></div>
-
-<!-- iframe showing the search results (closed by default) -->
-<div id="MSearchResultsWindow">
-<iframe src="javascript:void(0)" frameborder="0" 
-        name="MSearchResults" id="MSearchResults">
-</iframe>
-</div>
-
-<div class="contents">
-<div class="textblock">Here is a list of all struct and union fields with links to the structures/unions they belong to:</div>
-
-<h3><a class="anchor" id="index__"></a>- _ -</h3><ul>
-<li>_reserved0
-: <a class="el" href="unionAPSR__Type.html#afbce95646fd514c10aa85ec0a33db728">APSR_Type</a>
-, <a class="el" href="unionCONTROL__Type.html#af8c314273a1e4970a5671bd7f8184f50">CONTROL_Type</a>
-, <a class="el" href="unionIPSR__Type.html#ad2eb0a06de4f03f58874a727716aa9aa">IPSR_Type</a>
-, <a class="el" href="unionxPSR__Type.html#af438e0f407357e914a70b5bd4d6a97c5">xPSR_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_a"></a>- a -</h3><ul>
-<li>ACPR
-: <a class="el" href="structTPI__Type.html#a9e5e4421ef9c3d5b7ff8b24abd4e99b3">TPI_Type</a>
-</li>
-<li>ACTLR
-: <a class="el" href="structICB__Type.html#ac43ad74d42fdfff0055b2a62705474f3">ICB_Type</a>
-, <a class="el" href="structSCnSCB__Type.html#a13af9b718dde7481f1c0344f00593c23">SCnSCB_Type</a>
-</li>
-<li>ADR
-: <a class="el" href="structSCB__Type.html#af084e1b2dad004a88668efea1dfe7fa1">SCB_Type</a>
-</li>
-<li>AFSR
-: <a class="el" href="structSCB__Type.html#ab65372404ce64b0f0b35e2709429404e">SCB_Type</a>
-</li>
-<li>AIRCR
-: <a class="el" href="structSCB__Type.html#ad3e5b8934c647eb1b7383c1894f01380">SCB_Type</a>
-</li>
-<li>AUTHSTATUS
-: <a class="el" href="structPMU__Type.html#a60a8296d51236329e79d1604080aa9c1">PMU_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_b"></a>- b -</h3><ul>
-<li>b
-: <a class="el" href="unionAPSR__Type.html#a7dbc79a057ded4b11ca5323fc2d5ab14">APSR_Type</a>
-, <a class="el" href="unionCONTROL__Type.html#adc6a38ab2980d0e9577b5a871da14eb9">CONTROL_Type</a>
-, <a class="el" href="unionIPSR__Type.html#add0d6497bd50c25569ea22b48a03ec50">IPSR_Type</a>
-, <a class="el" href="unionxPSR__Type.html#a3b1063bb5cdad67e037cba993b693b70">xPSR_Type</a>
-</li>
-<li>BFAR
-: <a class="el" href="structSCB__Type.html#a3f8e7e58be4e41c88dfa78f54589271c">SCB_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_c"></a>- c -</h3><ul>
-<li>C
-: <a class="el" href="unionAPSR__Type.html#a86e2c5b891ecef1ab55b1edac0da79a6">APSR_Type</a>
-, <a class="el" href="unionxPSR__Type.html#a40213a6b5620410cac83b0d89564609d">xPSR_Type</a>
-</li>
-<li>CALIB
-: <a class="el" href="structSysTick__Type.html#afcadb0c6d35b21cdc0018658a13942de">SysTick_Type</a>
-</li>
-<li>CCFILTR
-: <a class="el" href="structPMU__Type.html#a61fea523ea0f4e9242101cb09fc6f6a8">PMU_Type</a>
-</li>
-<li>CCNTR
-: <a class="el" href="structPMU__Type.html#ada85996bd815d9eff9552794feec6d74">PMU_Type</a>
-</li>
-<li>CCR
-: <a class="el" href="structSCB__Type.html#a2d6653b0b70faac936046a02809b577f">SCB_Type</a>
-</li>
-<li>CFSR
-: <a class="el" href="structSCB__Type.html#a0cda9e061b42373383418663092ad19a">SCB_Type</a>
-</li>
-<li>CID0
-: <a class="el" href="structITM__Type.html#a30bb2b166b1723867da4a708935677ba">ITM_Type</a>
-</li>
-<li>CID1
-: <a class="el" href="structITM__Type.html#ac40df2c3a6cef02f90b4e82c8204756f">ITM_Type</a>
-</li>
-<li>CID2
-: <a class="el" href="structITM__Type.html#a8000b92e4e528ae7ac4cb8b8d9f6757d">ITM_Type</a>
-</li>
-<li>CID3
-: <a class="el" href="structITM__Type.html#a43451f43f514108d9eaed5b017f8d921">ITM_Type</a>
-</li>
-<li>CIDR0
-: <a class="el" href="structPMU__Type.html#a54117364a5e8d3af0cc45769bb9b11c7">PMU_Type</a>
-</li>
-<li>CIDR1
-: <a class="el" href="structPMU__Type.html#a0eded5a42f8b81a09df17ce0a9f90897">PMU_Type</a>
-</li>
-<li>CIDR2
-: <a class="el" href="structPMU__Type.html#a94fa4cd97b83324090d6e696f3568415">PMU_Type</a>
-</li>
-<li>CIDR3
-: <a class="el" href="structPMU__Type.html#aff7ed1b5979deb4fb0a536aa477c6830">PMU_Type</a>
-</li>
-<li>CLAIMCLR
-: <a class="el" href="structTPI__Type.html#a0e10e292cb019a832b03ddd055b2f6ac">TPI_Type</a>
-</li>
-<li>CLAIMSET
-: <a class="el" href="structTPI__Type.html#af8b7d15fa5252b733dd4b11fa1b5730a">TPI_Type</a>
-</li>
-<li>CNTENCLR
-: <a class="el" href="structPMU__Type.html#a3c24c882b1679390b1dd957dbd0f0bf6">PMU_Type</a>
-</li>
-<li>CNTENSET
-: <a class="el" href="structPMU__Type.html#a030ee86cd33b72a0c5e66fbaf418d1be">PMU_Type</a>
-</li>
-<li>COMP0
-: <a class="el" href="structDWT__Type.html#a61c2965af5bc0643f9af65620b0e67c9">DWT_Type</a>
-</li>
-<li>COMP1
-: <a class="el" href="structDWT__Type.html#a38714af6b7fa7c64d68f5e1efbe7a931">DWT_Type</a>
-</li>
-<li>COMP2
-: <a class="el" href="structDWT__Type.html#a5ae6dde39989f27bae90afc2347deb46">DWT_Type</a>
-</li>
-<li>COMP3
-: <a class="el" href="structDWT__Type.html#a85eb73d1848ac3f82d39d6c3e8910847">DWT_Type</a>
-</li>
-<li>CPACR
-: <a class="el" href="structSCB__Type.html#ac6a860c1b8d8154a1f00d99d23b67764">SCB_Type</a>
-</li>
-<li>CPICNT
-: <a class="el" href="structDWT__Type.html#a2c08096c82abe245c0fa97badc458154">DWT_Type</a>
-</li>
-<li>CPPWR
-: <a class="el" href="structICB__Type.html#ae81003a1446544876fc9c9eccffddab7">ICB_Type</a>
-, <a class="el" href="structSCnSCB__Type.html#a356efebfcbdaecaf1176e6cd86a60bf1">SCnSCB_Type</a>
-</li>
-<li>CPUID
-: <a class="el" href="structSCB__Type.html#a21e08d546d8b641bee298a459ea73e46">SCB_Type</a>
-</li>
-<li>CSPSR
-: <a class="el" href="structTPI__Type.html#a8826aa84e5806053395a742d38d59d0f">TPI_Type</a>
-</li>
-<li>CTRL
-: <a class="el" href="structDWT__Type.html#add790c53410023b3b581919bb681fe2a">DWT_Type</a>
-, <a class="el" href="structMPU__Type.html#a769178ef949f0d5d8f18ddbd9e4e926f">MPU_Type</a>
-, <a class="el" href="structPMU__Type.html#aba9bddd6b49c88e38f4bb79d32002c3c">PMU_Type</a>
-, <a class="el" href="structSysTick__Type.html#a875e7afa5c4fd43997fb544a4ac6e37e">SysTick_Type</a>
-</li>
-<li>CYCCNT
-: <a class="el" href="structDWT__Type.html#a102eaa529d9098242851cb57c52b42d9">DWT_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_d"></a>- d -</h3><ul>
-<li>DCRDR
-: <a class="el" href="structCoreDebug__Type.html#aab3cc92ef07bc1f04b3a3aa6db2c2d55">CoreDebug_Type</a>
-</li>
-<li>DCRSR
-: <a class="el" href="structCoreDebug__Type.html#af907cf64577eaf927dac6787df6dd98b">CoreDebug_Type</a>
-</li>
-<li>DEMCR
-: <a class="el" href="structCoreDebug__Type.html#aeb3126abc4c258a858f21f356c0df6ee">CoreDebug_Type</a>
-</li>
-<li>DEVARCH
-: <a class="el" href="structITM__Type.html#a2372a4ebb63e36d1eb3fcf83a74fd537">ITM_Type</a>
-, <a class="el" href="structPMU__Type.html#a439c7a309f02c41a6581d0819e896fdc">PMU_Type</a>
-</li>
-<li>DEVID
-: <a class="el" href="structTPI__Type.html#abc0ecda8a5446bc754080276bad77514">TPI_Type</a>
-</li>
-<li>DEVTYPE
-: <a class="el" href="structPMU__Type.html#aac8b7bca579afd4969d8bfffa61afbed">PMU_Type</a>
-, <a class="el" href="structTPI__Type.html#ad98855854a719bbea33061e71529a472">TPI_Type</a>
-</li>
-<li>DFR
-: <a class="el" href="structSCB__Type.html#a85dd6fe77aab17e7ea89a52c59da6004">SCB_Type</a>
-</li>
-<li>DFSR
-: <a class="el" href="structSCB__Type.html#a191579bde0d21ff51d30a714fd887033">SCB_Type</a>
-</li>
-<li>DHCSR
-: <a class="el" href="structCoreDebug__Type.html#ad63554e4650da91a8e79929cbb63db66">CoreDebug_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_e"></a>- e -</h3><ul>
-<li>EVCNTR
-: <a class="el" href="structPMU__Type.html#a08f877e8edcb1c19b81ebcf95f85e2f7">PMU_Type</a>
-</li>
-<li>EVTYPER
-: <a class="el" href="structPMU__Type.html#a27682a8d2fe09d2052a4295d5b4a243b">PMU_Type</a>
-</li>
-<li>EXCCNT
-: <a class="el" href="structDWT__Type.html#a9fe20c16c5167ca61486caf6832686d1">DWT_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_f"></a>- f -</h3><ul>
-<li>FFCR
-: <a class="el" href="structTPI__Type.html#a3f68b6e73561b4849ebf953a894df8d2">TPI_Type</a>
-</li>
-<li>FFSR
-: <a class="el" href="structTPI__Type.html#a6c47a0b4c7ffc66093ef993d36bb441c">TPI_Type</a>
-</li>
-<li>FIFO0
-: <a class="el" href="structTPI__Type.html#aa4d7b5cf39dff9f53bf7f69bc287a814">TPI_Type</a>
-</li>
-<li>FIFO1
-: <a class="el" href="structTPI__Type.html#a061372fcd72f1eea871e2d9c1be849bc">TPI_Type</a>
-</li>
-<li>FOLDCNT
-: <a class="el" href="structDWT__Type.html#a1cfc48384ebd8fd8fb7e5d955aae6c97">DWT_Type</a>
-</li>
-<li>FPCA
-: <a class="el" href="unionCONTROL__Type.html#ac62cfff08e6f055e0101785bad7094cd">CONTROL_Type</a>
-</li>
-<li>FPCAR
-: <a class="el" href="structFPU__Type.html#a55263b468d0f8e11ac77aec9ff87c820">FPU_Type</a>
-</li>
-<li>FPCCR
-: <a class="el" href="structFPU__Type.html#af1b708c5e413739150df3d16ca3b7061">FPU_Type</a>
-</li>
-<li>FPDSCR
-: <a class="el" href="structFPU__Type.html#a58d1989664a06db6ec2e122eefa9f04a">FPU_Type</a>
-</li>
-<li>FSCR
-: <a class="el" href="structTPI__Type.html#ad6901bfd8a0089ca7e8a20475cf494a8">TPI_Type</a>
-</li>
-<li>FUNCTION0
-: <a class="el" href="structDWT__Type.html#a579ae082f58a0317b7ef029b20f52889">DWT_Type</a>
-</li>
-<li>FUNCTION1
-: <a class="el" href="structDWT__Type.html#a8dfcf25675f9606aa305c46e85182e4e">DWT_Type</a>
-</li>
-<li>FUNCTION2
-: <a class="el" href="structDWT__Type.html#ab1b60d6600c38abae515bab8e86a188f">DWT_Type</a>
-</li>
-<li>FUNCTION3
-: <a class="el" href="structDWT__Type.html#a52d4ff278fae6f9216c63b74ce328841">DWT_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_h"></a>- h -</h3><ul>
-<li>HFSR
-: <a class="el" href="structSCB__Type.html#a14ad254659362b9752c69afe3fd80934">SCB_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_i"></a>- i -</h3><ul>
-<li>IABR
-: <a class="el" href="structNVIC__Type.html#a4bca5452748ba84d64536fb6a5d795af">NVIC_Type</a>
-</li>
-<li>ICER
-: <a class="el" href="structNVIC__Type.html#a245df8bac1da05c39eadabede9323203">NVIC_Type</a>
-</li>
-<li>ICPR
-: <a class="el" href="structNVIC__Type.html#a8d8f45d9c5c67bba3c153c55574bac95">NVIC_Type</a>
-</li>
-<li>ICSR
-: <a class="el" href="structSCB__Type.html#a0ca18ef984d132c6bf4d9b61cd00f05a">SCB_Type</a>
-</li>
-<li>ICTR
-: <a class="el" href="structICB__Type.html#af468675de58ebcffd888d55cd9c1715d">ICB_Type</a>
-, <a class="el" href="structSCnSCB__Type.html#a34ec1d771245eb9bd0e3ec9336949762">SCnSCB_Type</a>
-</li>
-<li>IMCR
-: <a class="el" href="structITM__Type.html#ae2ce4d3a54df2fd11a197ccac4406cd0">ITM_Type</a>
-</li>
-<li>INTENCLR
-: <a class="el" href="structPMU__Type.html#aaff7d5f3246c641d1f503d74a5adb0ee">PMU_Type</a>
-</li>
-<li>INTENSET
-: <a class="el" href="structPMU__Type.html#a3f5a5872105d9056145e9095bc1c63ac">PMU_Type</a>
-</li>
-<li>IP
-: <a class="el" href="structNVIC__Type.html#a7ff7364a4260df67a2784811e8da4efd">NVIC_Type</a>
-</li>
-<li>IRR
-: <a class="el" href="structITM__Type.html#a66eb82a070953f09909f39b8e516fb91">ITM_Type</a>
-</li>
-<li>ISAR
-: <a class="el" href="structSCB__Type.html#ae0136a2d2d3c45f016b2c449e92b2066">SCB_Type</a>
-</li>
-<li>ISER
-: <a class="el" href="structNVIC__Type.html#a9fccef5a60a0d5e81fcd7869a6274f47">NVIC_Type</a>
-</li>
-<li>ISPR
-: <a class="el" href="structNVIC__Type.html#a8f731a9f428efc86e8d311b52ce823d0">NVIC_Type</a>
-</li>
-<li>ISR
-: <a class="el" href="unionIPSR__Type.html#ab46e5f1b2f4d17cfb9aca4fffcbb2fa5">IPSR_Type</a>
-, <a class="el" href="unionxPSR__Type.html#a3e9120dcf1a829fc8d2302b4d0673970">xPSR_Type</a>
-</li>
-<li>IT
-: <a class="el" href="unionxPSR__Type.html#a3200966922a194d84425e2807a7f1328">xPSR_Type</a>
-</li>
-<li>ITATBCTR0
-: <a class="el" href="structTPI__Type.html#aaa573b2e073e76e93c51ecec79c616d0">TPI_Type</a>
-</li>
-<li>ITATBCTR2
-: <a class="el" href="structTPI__Type.html#ab358319b969d3fed0f89bbe33e9f1652">TPI_Type</a>
-</li>
-<li>ITCTRL
-: <a class="el" href="structTPI__Type.html#aaa4c823c10f115f7517c82ef86a5a68d">TPI_Type</a>
-</li>
-<li>IWR
-: <a class="el" href="structITM__Type.html#aa9da04891e48d1a2f054de186e9c4c94">ITM_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_l"></a>- l -</h3><ul>
-<li>LAR
-: <a class="el" href="structITM__Type.html#a7f9c2a2113a11c7f3e98915f95b669d5">ITM_Type</a>
-</li>
-<li>LOAD
-: <a class="el" href="structSysTick__Type.html#a4780a489256bb9f54d0ba8ed4de191cd">SysTick_Type</a>
-</li>
-<li>LSR
-: <a class="el" href="structITM__Type.html#a3861c67933a24dd6632288c4ed0b80c8">ITM_Type</a>
-</li>
-<li>LSUCNT
-: <a class="el" href="structDWT__Type.html#acc05d89bdb1b4fe2fa499920ec02d0b1">DWT_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_m"></a>- m -</h3><ul>
-<li>MASK0
-: <a class="el" href="structDWT__Type.html#a821eb5e71f340ec077efc064cfc567db">DWT_Type</a>
-</li>
-<li>MASK1
-: <a class="el" href="structDWT__Type.html#aabf94936c9340e62fed836dcfb152405">DWT_Type</a>
-</li>
-<li>MASK2
-: <a class="el" href="structDWT__Type.html#a00ac4d830dfe0070a656cda9baed170f">DWT_Type</a>
-</li>
-<li>MASK3
-: <a class="el" href="structDWT__Type.html#a2a509d8505c37a3b64f6b24993df5f3f">DWT_Type</a>
-</li>
-<li>MMFAR
-: <a class="el" href="structSCB__Type.html#a2d03d0b7cec2254f39eb1c46c7445e80">SCB_Type</a>
-</li>
-<li>MMFR
-: <a class="el" href="structSCB__Type.html#aa11887804412bda283cc85a83fdafa7c">SCB_Type</a>
-</li>
-<li>MVFR0
-: <a class="el" href="structFPU__Type.html#a4f19014defe6033d070b80af19ef627c">FPU_Type</a>
-</li>
-<li>MVFR1
-: <a class="el" href="structFPU__Type.html#a66f8cfa49a423b480001a4e101bf842d">FPU_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_n"></a>- n -</h3><ul>
-<li>N
-: <a class="el" href="unionAPSR__Type.html#a7e7bbba9b00b0bb3283dc07f1abe37e0">APSR_Type</a>
-, <a class="el" href="unionxPSR__Type.html#a2db9a52f6d42809627d1a7a607c5dbc5">xPSR_Type</a>
-</li>
-<li>nPRIV
-: <a class="el" href="unionCONTROL__Type.html#a35c1732cf153b7b5c4bd321cf1de9605">CONTROL_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_o"></a>- o -</h3><ul>
-<li>OVSCLR
-: <a class="el" href="structPMU__Type.html#a2acdf96dc7f60ad5a384d1f47e0bb8e0">PMU_Type</a>
-</li>
-<li>OVSSET
-: <a class="el" href="structPMU__Type.html#a153e694a19f845e65a3d2abd4d64faa7">PMU_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_p"></a>- p -</h3><ul>
-<li>PCSR
-: <a class="el" href="structDWT__Type.html#a6353ca1d1ad9bc1be05d3b5632960113">DWT_Type</a>
-</li>
-<li>PFR
-: <a class="el" href="structSCB__Type.html#a681c9d9e518b217976bef38c2423d83d">SCB_Type</a>
-</li>
-<li>PID0
-: <a class="el" href="structITM__Type.html#ab4a4cc97ad658e9c46cf17490daffb8a">ITM_Type</a>
-</li>
-<li>PID1
-: <a class="el" href="structITM__Type.html#a89ea1d805a668d6589b22d8e678eb6a4">ITM_Type</a>
-</li>
-<li>PID2
-: <a class="el" href="structITM__Type.html#a8471c4d77b7107cf580587509da69f38">ITM_Type</a>
-</li>
-<li>PID3
-: <a class="el" href="structITM__Type.html#af317d5e2d946d70e6fb67c02b92cc8a3">ITM_Type</a>
-</li>
-<li>PID4
-: <a class="el" href="structITM__Type.html#aad5e11dd4baf6d941bd6c7450f60a158">ITM_Type</a>
-</li>
-<li>PID5
-: <a class="el" href="structITM__Type.html#af9085648bf18f69b5f9d1136d45e1d37">ITM_Type</a>
-</li>
-<li>PID6
-: <a class="el" href="structITM__Type.html#ad34dbe6b1072c77d36281049c8b169f6">ITM_Type</a>
-</li>
-<li>PID7
-: <a class="el" href="structITM__Type.html#a2bcec6803f28f30d5baf5e20e3517d3d">ITM_Type</a>
-</li>
-<li>PIDR0
-: <a class="el" href="structPMU__Type.html#afe7c3069b9a30d54e5e30166a2281bd7">PMU_Type</a>
-</li>
-<li>PIDR1
-: <a class="el" href="structPMU__Type.html#a8a764266e9b41e7c100a9853889d94ab">PMU_Type</a>
-</li>
-<li>PIDR2
-: <a class="el" href="structPMU__Type.html#a2f7053542f392f435ad51930d0504622">PMU_Type</a>
-</li>
-<li>PIDR3
-: <a class="el" href="structPMU__Type.html#a831a9b4e2e07eef0b93713beb26a6516">PMU_Type</a>
-</li>
-<li>PIDR4
-: <a class="el" href="structPMU__Type.html#abe4612a6387c5be0e56898bfa6b16902">PMU_Type</a>
-</li>
-<li>PORT
-: <a class="el" href="structITM__Type.html#af95bc1810f9ea802d628cb9dea81e02e">ITM_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_q"></a>- q -</h3><ul>
-<li>Q
-: <a class="el" href="unionAPSR__Type.html#a22d10913489d24ab08bd83457daa88de">APSR_Type</a>
-, <a class="el" href="unionxPSR__Type.html#add7cbd2b0abd8954d62cd7831796ac7c">xPSR_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_r"></a>- r -</h3><ul>
-<li>RASR
-: <a class="el" href="structARM__MPU__Region__t.html#a6a3e404b403c8df611f27d902d745d8d">ARM_MPU_Region_t</a>
-, <a class="el" href="structMPU__Type.html#a8f00c4a5e31b0a8d103ed3b0732c17a3">MPU_Type</a>
-</li>
-<li>RASR_A1
-: <a class="el" href="structMPU__Type.html#a1658326c6762637eeef8a79bb467445e">MPU_Type</a>
-</li>
-<li>RASR_A2
-: <a class="el" href="structMPU__Type.html#a37131c513d8a8d211b402e5dfda97205">MPU_Type</a>
-</li>
-<li>RASR_A3
-: <a class="el" href="structMPU__Type.html#a7d15172b163797736a6c6b4dcc0fa3dd">MPU_Type</a>
-</li>
-<li>RBAR
-: <a class="el" href="structARM__MPU__Region__t.html#afe7a7721aa08988d915670efa432cdd2">ARM_MPU_Region_t</a>
-, <a class="el" href="structMPU__Type.html#a990c609b26d990b8ba832b110adfd353">MPU_Type</a>
-</li>
-<li>RBAR_A1
-: <a class="el" href="structMPU__Type.html#af8b510a85b175edfd8dd8cc93e967066">MPU_Type</a>
-</li>
-<li>RBAR_A2
-: <a class="el" href="structMPU__Type.html#a80d534f0dfc080c841e1772c7a68e1a2">MPU_Type</a>
-</li>
-<li>RBAR_A3
-: <a class="el" href="structMPU__Type.html#a207f6e9c3af753367554cc06df300a55">MPU_Type</a>
-</li>
-<li>RESERVED0
-: <a class="el" href="structDWT__Type.html#addd893d655ed90d40705b20170daac59">DWT_Type</a>
-, <a class="el" href="structFPU__Type.html#a7b2967b069046c8544adbbc1db143a36">FPU_Type</a>
-, <a class="el" href="structICB__Type.html#a99113d72c2c7e817ffada9ecb3525c16">ICB_Type</a>
-, <a class="el" href="structNVIC__Type.html#a2de17698945ea49abd58a2d45bdc9c80">NVIC_Type</a>
-, <a class="el" href="structSCB__Type.html#ac89a5d9901e3748d22a7090bfca2bee6">SCB_Type</a>
-, <a class="el" href="structSCnSCB__Type.html#afe1d5fd2966d5062716613b05c8d0ae1">SCnSCB_Type</a>
-, <a class="el" href="structTPI__Type.html#af143c5e8fc9a3b2be2878e9c1f331aa9">TPI_Type</a>
-</li>
-<li>RESERVED1
-: <a class="el" href="structDWT__Type.html#a069871233a8c1df03521e6d7094f1de4">DWT_Type</a>
-, <a class="el" href="structTPI__Type.html#ac3956fe93987b725d89d3be32738da12">TPI_Type</a>
-</li>
-<li>RESERVED2
-: <a class="el" href="structDWT__Type.html#a8556ca1c32590517602d92fe0cd55738">DWT_Type</a>
-, <a class="el" href="structNVIC__Type.html#a0953af43af8ec7fd5869a1d826ce5b72">NVIC_Type</a>
-, <a class="el" href="structTPI__Type.html#ac7bbb92e6231b9b38ac483f7d161a096">TPI_Type</a>
-</li>
-<li>RESERVED3
-: <a class="el" href="structNVIC__Type.html#a9dd330835dbf21471e7b5be8692d77ab">NVIC_Type</a>
-, <a class="el" href="structTPI__Type.html#a31700c8cdd26e4c094db72af33d9f24c">TPI_Type</a>
-</li>
-<li>RESERVED4
-: <a class="el" href="structNVIC__Type.html#a5c0e5d507ac3c1bd5cdaaf9bbd177790">NVIC_Type</a>
-, <a class="el" href="structTPI__Type.html#a684071216fafee4e80be6aaa932cec46">TPI_Type</a>
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-: <a class="el" href="structDWT__Type.html#add790c53410023b3b581919bb681fe2a">DWT_Type</a>
-, <a class="el" href="structMPU__Type.html#a769178ef949f0d5d8f18ddbd9e4e926f">MPU_Type</a>
-, <a class="el" href="structPMU__Type.html#aba9bddd6b49c88e38f4bb79d32002c3c">PMU_Type</a>
-, <a class="el" href="structSysTick__Type.html#a875e7afa5c4fd43997fb544a4ac6e37e">SysTick_Type</a>
-</li>
-<li>CYCCNT
-: <a class="el" href="structDWT__Type.html#a102eaa529d9098242851cb57c52b42d9">DWT_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_d"></a>- d -</h3><ul>
-<li>DCRDR
-: <a class="el" href="structCoreDebug__Type.html#aab3cc92ef07bc1f04b3a3aa6db2c2d55">CoreDebug_Type</a>
-</li>
-<li>DCRSR
-: <a class="el" href="structCoreDebug__Type.html#af907cf64577eaf927dac6787df6dd98b">CoreDebug_Type</a>
-</li>
-<li>DEMCR
-: <a class="el" href="structCoreDebug__Type.html#aeb3126abc4c258a858f21f356c0df6ee">CoreDebug_Type</a>
-</li>
-<li>DEVARCH
-: <a class="el" href="structITM__Type.html#a2372a4ebb63e36d1eb3fcf83a74fd537">ITM_Type</a>
-, <a class="el" href="structPMU__Type.html#a439c7a309f02c41a6581d0819e896fdc">PMU_Type</a>
-</li>
-<li>DEVID
-: <a class="el" href="structTPI__Type.html#abc0ecda8a5446bc754080276bad77514">TPI_Type</a>
-</li>
-<li>DEVTYPE
-: <a class="el" href="structPMU__Type.html#aac8b7bca579afd4969d8bfffa61afbed">PMU_Type</a>
-, <a class="el" href="structTPI__Type.html#ad98855854a719bbea33061e71529a472">TPI_Type</a>
-</li>
-<li>DFR
-: <a class="el" href="structSCB__Type.html#a85dd6fe77aab17e7ea89a52c59da6004">SCB_Type</a>
-</li>
-<li>DFSR
-: <a class="el" href="structSCB__Type.html#a191579bde0d21ff51d30a714fd887033">SCB_Type</a>
-</li>
-<li>DHCSR
-: <a class="el" href="structCoreDebug__Type.html#ad63554e4650da91a8e79929cbb63db66">CoreDebug_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_e"></a>- e -</h3><ul>
-<li>EVCNTR
-: <a class="el" href="structPMU__Type.html#a08f877e8edcb1c19b81ebcf95f85e2f7">PMU_Type</a>
-</li>
-<li>EVTYPER
-: <a class="el" href="structPMU__Type.html#a27682a8d2fe09d2052a4295d5b4a243b">PMU_Type</a>
-</li>
-<li>EXCCNT
-: <a class="el" href="structDWT__Type.html#a9fe20c16c5167ca61486caf6832686d1">DWT_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_f"></a>- f -</h3><ul>
-<li>FFCR
-: <a class="el" href="structTPI__Type.html#a3f68b6e73561b4849ebf953a894df8d2">TPI_Type</a>
-</li>
-<li>FFSR
-: <a class="el" href="structTPI__Type.html#a6c47a0b4c7ffc66093ef993d36bb441c">TPI_Type</a>
-</li>
-<li>FIFO0
-: <a class="el" href="structTPI__Type.html#aa4d7b5cf39dff9f53bf7f69bc287a814">TPI_Type</a>
-</li>
-<li>FIFO1
-: <a class="el" href="structTPI__Type.html#a061372fcd72f1eea871e2d9c1be849bc">TPI_Type</a>
-</li>
-<li>FOLDCNT
-: <a class="el" href="structDWT__Type.html#a1cfc48384ebd8fd8fb7e5d955aae6c97">DWT_Type</a>
-</li>
-<li>FPCA
-: <a class="el" href="unionCONTROL__Type.html#ac62cfff08e6f055e0101785bad7094cd">CONTROL_Type</a>
-</li>
-<li>FPCAR
-: <a class="el" href="structFPU__Type.html#a55263b468d0f8e11ac77aec9ff87c820">FPU_Type</a>
-</li>
-<li>FPCCR
-: <a class="el" href="structFPU__Type.html#af1b708c5e413739150df3d16ca3b7061">FPU_Type</a>
-</li>
-<li>FPDSCR
-: <a class="el" href="structFPU__Type.html#a58d1989664a06db6ec2e122eefa9f04a">FPU_Type</a>
-</li>
-<li>FSCR
-: <a class="el" href="structTPI__Type.html#ad6901bfd8a0089ca7e8a20475cf494a8">TPI_Type</a>
-</li>
-<li>FUNCTION0
-: <a class="el" href="structDWT__Type.html#a579ae082f58a0317b7ef029b20f52889">DWT_Type</a>
-</li>
-<li>FUNCTION1
-: <a class="el" href="structDWT__Type.html#a8dfcf25675f9606aa305c46e85182e4e">DWT_Type</a>
-</li>
-<li>FUNCTION2
-: <a class="el" href="structDWT__Type.html#ab1b60d6600c38abae515bab8e86a188f">DWT_Type</a>
-</li>
-<li>FUNCTION3
-: <a class="el" href="structDWT__Type.html#a52d4ff278fae6f9216c63b74ce328841">DWT_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_h"></a>- h -</h3><ul>
-<li>HFSR
-: <a class="el" href="structSCB__Type.html#a14ad254659362b9752c69afe3fd80934">SCB_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_i"></a>- i -</h3><ul>
-<li>IABR
-: <a class="el" href="structNVIC__Type.html#a4bca5452748ba84d64536fb6a5d795af">NVIC_Type</a>
-</li>
-<li>ICER
-: <a class="el" href="structNVIC__Type.html#a245df8bac1da05c39eadabede9323203">NVIC_Type</a>
-</li>
-<li>ICPR
-: <a class="el" href="structNVIC__Type.html#a8d8f45d9c5c67bba3c153c55574bac95">NVIC_Type</a>
-</li>
-<li>ICSR
-: <a class="el" href="structSCB__Type.html#a0ca18ef984d132c6bf4d9b61cd00f05a">SCB_Type</a>
-</li>
-<li>ICTR
-: <a class="el" href="structICB__Type.html#af468675de58ebcffd888d55cd9c1715d">ICB_Type</a>
-, <a class="el" href="structSCnSCB__Type.html#a34ec1d771245eb9bd0e3ec9336949762">SCnSCB_Type</a>
-</li>
-<li>IMCR
-: <a class="el" href="structITM__Type.html#ae2ce4d3a54df2fd11a197ccac4406cd0">ITM_Type</a>
-</li>
-<li>INTENCLR
-: <a class="el" href="structPMU__Type.html#aaff7d5f3246c641d1f503d74a5adb0ee">PMU_Type</a>
-</li>
-<li>INTENSET
-: <a class="el" href="structPMU__Type.html#a3f5a5872105d9056145e9095bc1c63ac">PMU_Type</a>
-</li>
-<li>IP
-: <a class="el" href="structNVIC__Type.html#a7ff7364a4260df67a2784811e8da4efd">NVIC_Type</a>
-</li>
-<li>IRR
-: <a class="el" href="structITM__Type.html#a66eb82a070953f09909f39b8e516fb91">ITM_Type</a>
-</li>
-<li>ISAR
-: <a class="el" href="structSCB__Type.html#ae0136a2d2d3c45f016b2c449e92b2066">SCB_Type</a>
-</li>
-<li>ISER
-: <a class="el" href="structNVIC__Type.html#a9fccef5a60a0d5e81fcd7869a6274f47">NVIC_Type</a>
-</li>
-<li>ISPR
-: <a class="el" href="structNVIC__Type.html#a8f731a9f428efc86e8d311b52ce823d0">NVIC_Type</a>
-</li>
-<li>ISR
-: <a class="el" href="unionIPSR__Type.html#ab46e5f1b2f4d17cfb9aca4fffcbb2fa5">IPSR_Type</a>
-, <a class="el" href="unionxPSR__Type.html#a3e9120dcf1a829fc8d2302b4d0673970">xPSR_Type</a>
-</li>
-<li>IT
-: <a class="el" href="unionxPSR__Type.html#a3200966922a194d84425e2807a7f1328">xPSR_Type</a>
-</li>
-<li>ITATBCTR0
-: <a class="el" href="structTPI__Type.html#aaa573b2e073e76e93c51ecec79c616d0">TPI_Type</a>
-</li>
-<li>ITATBCTR2
-: <a class="el" href="structTPI__Type.html#ab358319b969d3fed0f89bbe33e9f1652">TPI_Type</a>
-</li>
-<li>ITCTRL
-: <a class="el" href="structTPI__Type.html#aaa4c823c10f115f7517c82ef86a5a68d">TPI_Type</a>
-</li>
-<li>IWR
-: <a class="el" href="structITM__Type.html#aa9da04891e48d1a2f054de186e9c4c94">ITM_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_l"></a>- l -</h3><ul>
-<li>LAR
-: <a class="el" href="structITM__Type.html#a7f9c2a2113a11c7f3e98915f95b669d5">ITM_Type</a>
-</li>
-<li>LOAD
-: <a class="el" href="structSysTick__Type.html#a4780a489256bb9f54d0ba8ed4de191cd">SysTick_Type</a>
-</li>
-<li>LSR
-: <a class="el" href="structITM__Type.html#a3861c67933a24dd6632288c4ed0b80c8">ITM_Type</a>
-</li>
-<li>LSUCNT
-: <a class="el" href="structDWT__Type.html#acc05d89bdb1b4fe2fa499920ec02d0b1">DWT_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_m"></a>- m -</h3><ul>
-<li>MASK0
-: <a class="el" href="structDWT__Type.html#a821eb5e71f340ec077efc064cfc567db">DWT_Type</a>
-</li>
-<li>MASK1
-: <a class="el" href="structDWT__Type.html#aabf94936c9340e62fed836dcfb152405">DWT_Type</a>
-</li>
-<li>MASK2
-: <a class="el" href="structDWT__Type.html#a00ac4d830dfe0070a656cda9baed170f">DWT_Type</a>
-</li>
-<li>MASK3
-: <a class="el" href="structDWT__Type.html#a2a509d8505c37a3b64f6b24993df5f3f">DWT_Type</a>
-</li>
-<li>MMFAR
-: <a class="el" href="structSCB__Type.html#a2d03d0b7cec2254f39eb1c46c7445e80">SCB_Type</a>
-</li>
-<li>MMFR
-: <a class="el" href="structSCB__Type.html#aa11887804412bda283cc85a83fdafa7c">SCB_Type</a>
-</li>
-<li>MVFR0
-: <a class="el" href="structFPU__Type.html#a4f19014defe6033d070b80af19ef627c">FPU_Type</a>
-</li>
-<li>MVFR1
-: <a class="el" href="structFPU__Type.html#a66f8cfa49a423b480001a4e101bf842d">FPU_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_n"></a>- n -</h3><ul>
-<li>N
-: <a class="el" href="unionAPSR__Type.html#a7e7bbba9b00b0bb3283dc07f1abe37e0">APSR_Type</a>
-, <a class="el" href="unionxPSR__Type.html#a2db9a52f6d42809627d1a7a607c5dbc5">xPSR_Type</a>
-</li>
-<li>nPRIV
-: <a class="el" href="unionCONTROL__Type.html#a35c1732cf153b7b5c4bd321cf1de9605">CONTROL_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_o"></a>- o -</h3><ul>
-<li>OVSCLR
-: <a class="el" href="structPMU__Type.html#a2acdf96dc7f60ad5a384d1f47e0bb8e0">PMU_Type</a>
-</li>
-<li>OVSSET
-: <a class="el" href="structPMU__Type.html#a153e694a19f845e65a3d2abd4d64faa7">PMU_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_p"></a>- p -</h3><ul>
-<li>PCSR
-: <a class="el" href="structDWT__Type.html#a6353ca1d1ad9bc1be05d3b5632960113">DWT_Type</a>
-</li>
-<li>PFR
-: <a class="el" href="structSCB__Type.html#a681c9d9e518b217976bef38c2423d83d">SCB_Type</a>
-</li>
-<li>PID0
-: <a class="el" href="structITM__Type.html#ab4a4cc97ad658e9c46cf17490daffb8a">ITM_Type</a>
-</li>
-<li>PID1
-: <a class="el" href="structITM__Type.html#a89ea1d805a668d6589b22d8e678eb6a4">ITM_Type</a>
-</li>
-<li>PID2
-: <a class="el" href="structITM__Type.html#a8471c4d77b7107cf580587509da69f38">ITM_Type</a>
-</li>
-<li>PID3
-: <a class="el" href="structITM__Type.html#af317d5e2d946d70e6fb67c02b92cc8a3">ITM_Type</a>
-</li>
-<li>PID4
-: <a class="el" href="structITM__Type.html#aad5e11dd4baf6d941bd6c7450f60a158">ITM_Type</a>
-</li>
-<li>PID5
-: <a class="el" href="structITM__Type.html#af9085648bf18f69b5f9d1136d45e1d37">ITM_Type</a>
-</li>
-<li>PID6
-: <a class="el" href="structITM__Type.html#ad34dbe6b1072c77d36281049c8b169f6">ITM_Type</a>
-</li>
-<li>PID7
-: <a class="el" href="structITM__Type.html#a2bcec6803f28f30d5baf5e20e3517d3d">ITM_Type</a>
-</li>
-<li>PIDR0
-: <a class="el" href="structPMU__Type.html#afe7c3069b9a30d54e5e30166a2281bd7">PMU_Type</a>
-</li>
-<li>PIDR1
-: <a class="el" href="structPMU__Type.html#a8a764266e9b41e7c100a9853889d94ab">PMU_Type</a>
-</li>
-<li>PIDR2
-: <a class="el" href="structPMU__Type.html#a2f7053542f392f435ad51930d0504622">PMU_Type</a>
-</li>
-<li>PIDR3
-: <a class="el" href="structPMU__Type.html#a831a9b4e2e07eef0b93713beb26a6516">PMU_Type</a>
-</li>
-<li>PIDR4
-: <a class="el" href="structPMU__Type.html#abe4612a6387c5be0e56898bfa6b16902">PMU_Type</a>
-</li>
-<li>PORT
-: <a class="el" href="structITM__Type.html#af95bc1810f9ea802d628cb9dea81e02e">ITM_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_q"></a>- q -</h3><ul>
-<li>Q
-: <a class="el" href="unionAPSR__Type.html#a22d10913489d24ab08bd83457daa88de">APSR_Type</a>
-, <a class="el" href="unionxPSR__Type.html#add7cbd2b0abd8954d62cd7831796ac7c">xPSR_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_r"></a>- r -</h3><ul>
-<li>RASR
-: <a class="el" href="structARM__MPU__Region__t.html#a6a3e404b403c8df611f27d902d745d8d">ARM_MPU_Region_t</a>
-, <a class="el" href="structMPU__Type.html#a8f00c4a5e31b0a8d103ed3b0732c17a3">MPU_Type</a>
-</li>
-<li>RASR_A1
-: <a class="el" href="structMPU__Type.html#a1658326c6762637eeef8a79bb467445e">MPU_Type</a>
-</li>
-<li>RASR_A2
-: <a class="el" href="structMPU__Type.html#a37131c513d8a8d211b402e5dfda97205">MPU_Type</a>
-</li>
-<li>RASR_A3
-: <a class="el" href="structMPU__Type.html#a7d15172b163797736a6c6b4dcc0fa3dd">MPU_Type</a>
-</li>
-<li>RBAR
-: <a class="el" href="structARM__MPU__Region__t.html#afe7a7721aa08988d915670efa432cdd2">ARM_MPU_Region_t</a>
-, <a class="el" href="structMPU__Type.html#a990c609b26d990b8ba832b110adfd353">MPU_Type</a>
-</li>
-<li>RBAR_A1
-: <a class="el" href="structMPU__Type.html#af8b510a85b175edfd8dd8cc93e967066">MPU_Type</a>
-</li>
-<li>RBAR_A2
-: <a class="el" href="structMPU__Type.html#a80d534f0dfc080c841e1772c7a68e1a2">MPU_Type</a>
-</li>
-<li>RBAR_A3
-: <a class="el" href="structMPU__Type.html#a207f6e9c3af753367554cc06df300a55">MPU_Type</a>
-</li>
-<li>RESERVED0
-: <a class="el" href="structDWT__Type.html#addd893d655ed90d40705b20170daac59">DWT_Type</a>
-, <a class="el" href="structFPU__Type.html#a7b2967b069046c8544adbbc1db143a36">FPU_Type</a>
-, <a class="el" href="structICB__Type.html#a99113d72c2c7e817ffada9ecb3525c16">ICB_Type</a>
-, <a class="el" href="structNVIC__Type.html#a2de17698945ea49abd58a2d45bdc9c80">NVIC_Type</a>
-, <a class="el" href="structSCB__Type.html#ac89a5d9901e3748d22a7090bfca2bee6">SCB_Type</a>
-, <a class="el" href="structSCnSCB__Type.html#afe1d5fd2966d5062716613b05c8d0ae1">SCnSCB_Type</a>
-, <a class="el" href="structTPI__Type.html#af143c5e8fc9a3b2be2878e9c1f331aa9">TPI_Type</a>
-</li>
-<li>RESERVED1
-: <a class="el" href="structDWT__Type.html#a069871233a8c1df03521e6d7094f1de4">DWT_Type</a>
-, <a class="el" href="structTPI__Type.html#ac3956fe93987b725d89d3be32738da12">TPI_Type</a>
-</li>
-<li>RESERVED2
-: <a class="el" href="structDWT__Type.html#a8556ca1c32590517602d92fe0cd55738">DWT_Type</a>
-, <a class="el" href="structNVIC__Type.html#a0953af43af8ec7fd5869a1d826ce5b72">NVIC_Type</a>
-, <a class="el" href="structTPI__Type.html#ac7bbb92e6231b9b38ac483f7d161a096">TPI_Type</a>
-</li>
-<li>RESERVED3
-: <a class="el" href="structNVIC__Type.html#a9dd330835dbf21471e7b5be8692d77ab">NVIC_Type</a>
-, <a class="el" href="structTPI__Type.html#a31700c8cdd26e4c094db72af33d9f24c">TPI_Type</a>
-</li>
-<li>RESERVED4
-: <a class="el" href="structNVIC__Type.html#a5c0e5d507ac3c1bd5cdaaf9bbd177790">NVIC_Type</a>
-, <a class="el" href="structTPI__Type.html#a684071216fafee4e80be6aaa932cec46">TPI_Type</a>
-</li>
-<li>RESERVED5
-: <a class="el" href="structNVIC__Type.html#a4f753b4f824270175af045ac99bc12e8">NVIC_Type</a>
-, <a class="el" href="structTPI__Type.html#a3f80dd93f6bab6524603a7aa58de9a30">TPI_Type</a>
-</li>
-<li>RESERVED7
-: <a class="el" href="structTPI__Type.html#a476ca23fbc9480f1697fbec871130550">TPI_Type</a>
-</li>
-<li>RLAR
-: <a class="el" href="structARM__MPU__Region__t.html#ab5d3a650dbffd0b272bf7df5b140e8a8">ARM_MPU_Region_t</a>
-</li>
-<li>RNR
-: <a class="el" href="structMPU__Type.html#a2f7a117a12cb661c76edc4765453f05c">MPU_Type</a>
-</li>
-<li>RSERVED1
-: <a class="el" href="structNVIC__Type.html#a6d1daf7ab6f2ba83f57ff67ae6f571fe">NVIC_Type</a>
-</li>
-</ul>
-
-
-<h3><a class="anchor" id="index_s"></a>- s -</h3><ul>
-<li>SCR
-: <a class="el" href="structSCB__Type.html#a3a4840c6fa4d1ee75544f4032c88ec34">SCB_Type</a>
-</li>
-<li>SHCSR
-: <a class="el" href="structSCB__Type.html#a7b5ae9741a99808043394c4743b635c4">SCB_Type</a>
-</li>
-<li>SHP
-: <a class="el" href="structSCB__Type.html#a85768f4b3dbbc41fd760041ee1202162">SCB_Type</a>
-</li>
-<li>SLEEPCNT
-: <a class="el" href="structDWT__Type.html#a416a54e2084ce66e5ca74f152a5ecc70">DWT_Type</a>
-</li>
-<li>SPPR
-: <a class="el" href="structTPI__Type.html#a12f79d4e3ddc69893ba8bff890d04cc5">TPI_Type</a>
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-: <a class="el" href="unionCONTROL__Type.html#a8cc085fea1c50a8bd9adea63931ee8e2">CONTROL_Type</a>
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-: <a class="el" href="structTPI__Type.html#a7b72598e20066133e505bb781690dc22">TPI_Type</a>
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-</li>
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-
-
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-<li>T
-: <a class="el" href="unionxPSR__Type.html#a7eed9fe24ae8d354cd76ae1c1110a658">xPSR_Type</a>
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-: <a class="el" href="structITM__Type.html#a04b9fbc83759cb818dfa161d39628426">ITM_Type</a>
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-: <a class="el" href="structITM__Type.html#acd03c6858f7b678dab6a6121462e7807">ITM_Type</a>
-</li>
-<li>TPR
-: <a class="el" href="structITM__Type.html#ae907229ba50538bf370fbdfd54c099a2">ITM_Type</a>
-</li>
-<li>TRIGGER
-: <a class="el" href="structTPI__Type.html#a4d4cd2357f72333a82a1313228287bbd">TPI_Type</a>
-</li>
-<li>TYPE
-: <a class="el" href="structMPU__Type.html#aba02af87f77577c725cf73879cabb609">MPU_Type</a>
-, <a class="el" href="structPMU__Type.html#a1f2e763ceeeff8ff15c0bd3520b683e8">PMU_Type</a>
-</li>
-</ul>
-
-
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-<li>u16
-: <a class="el" href="structITM__Type.html#a962a970dfd286cad7f8a8577e87d4ad3">ITM_Type</a>
-</li>
-<li>u32
-: <a class="el" href="structITM__Type.html#a5834885903a557674f078f3b71fa8bc8">ITM_Type</a>
-</li>
-<li>u8
-: <a class="el" href="structITM__Type.html#ae773bf9f9dac64e6c28b14aa39f74275">ITM_Type</a>
-</li>
-</ul>
-
-
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-<li>V
-: <a class="el" href="unionAPSR__Type.html#a8004d224aacb78ca37774c35f9156e7e">APSR_Type</a>
-, <a class="el" href="unionxPSR__Type.html#af14df16ea0690070c45b95f2116b7a0a">xPSR_Type</a>
-</li>
-<li>VAL
-: <a class="el" href="structSysTick__Type.html#a9b5420d17e8e43104ddd4ae5a610af93">SysTick_Type</a>
-</li>
-<li>VTOR
-: <a class="el" href="structSCB__Type.html#a187a4578e920544ed967f98020fb8170">SCB_Type</a>
-</li>
-</ul>
-
-
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-<li>w
-: <a class="el" href="unionAPSR__Type.html#ae4c2ef8c9430d7b7bef5cbfbbaed3a94">APSR_Type</a>
-, <a class="el" href="unionCONTROL__Type.html#a6b642cca3d96da660b1198c133ca2a1f">CONTROL_Type</a>
-, <a class="el" href="unionIPSR__Type.html#a4adca999d3a0bc1ae682d73ea7cfa879">IPSR_Type</a>
-, <a class="el" href="unionxPSR__Type.html#a1a47176768f45f79076c4f5b1b534bc2">xPSR_Type</a>
-</li>
-</ul>
-
-
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-<li>Z
-: <a class="el" href="unionAPSR__Type.html#a3b04d58738b66a28ff13f23d8b0ba7e5">APSR_Type</a>
-, <a class="el" href="unionxPSR__Type.html#a1e5d9801013d5146f2e02d9b7b3da562">xPSR_Type</a>
-</li>
-</ul>
-</div><!-- contents -->
-</div><!-- doc-content -->
-<!-- start footer part -->
-<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
-  <ul>
-    <li class="footer">
-      <script type="text/javascript">
-        <!--
-        writeFooter.call(this);
-        //-->
-      </script>    
-    </li>
-  </ul>
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-</html>

diff --git a/Documentation/Core/html/globals.html b/Documentation/Core/html/globals.html
deleted file mode 100644
index f0d2ec7..0000000
--- a/Documentation/Core/html/globals.html
+++ /dev/null

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-<head>
-<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
-<meta http-equiv="X-UA-Compatible" content="IE=9"/>
-<title>Globals</title>
-<title>CMSIS-Core (Cortex-M): Globals</title>
-<link href="tabs.css" rel="stylesheet" type="text/css"/>
-<link href="cmsis.css" rel="stylesheet" type="text/css" />
-<script type="text/javascript" src="jquery.js"></script>
-<script type="text/javascript" src="dynsections.js"></script>
-<script type="text/javascript" src="printComponentTabs.js"></script>
-<script type="text/javascript" src="cmsis_footer.js"></script>
-<link href="navtree.css" rel="stylesheet" type="text/css"/>
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-  $(window).load(resizeHeight);
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-<script type="text/javascript" src="search/search.js"></script>
-<script type="text/javascript">
-  $(document).ready(function() { searchBox.OnSelectItem(0); });
-</script>
-</head>
-<body>
-<div id="top"><!-- do not remove this div, it is closed by doxygen! -->
-<div id="titlearea">
-<table cellspacing="0" cellpadding="0">
- <tbody>
- <tr style="height: 46px;">
-  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
-  <td style="padding-left: 0.5em;">
-   <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.6.0</span>
-   </div>
-   <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
-  </td>
- </tr>
- </tbody>
-</table>
-</div>
-<!-- end header part -->
-<div id="CMSISnav" class="tabs1">
-    <ul class="tablist">
-      <script type="text/javascript">
-		<!--
-		writeComponentTabs.call(this);
-		//-->
-      </script>
-	  </ul>
-</div>
-<!-- Generated by Doxygen 1.8.6 -->
-<script type="text/javascript">
-var searchBox = new SearchBox("searchBox", "search",false,'Search');
-</script>
-  <div id="navrow1" class="tabs">
-    <ul class="tablist">
-      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
-      <li><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
-      <li><a href="modules.html"><span>Reference</span></a></li>
-      <li>
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-  <div id="navrow3" class="tabs2">
-    <ul class="tablist">
-      <li class="current"><a href="globals.html"><span>All</span></a></li>
-      <li><a href="globals_func.html"><span>Functions</span></a></li>
-      <li><a href="globals_vars.html"><span>Variables</span></a></li>
-      <li><a href="globals_enum.html"><span>Enumerations</span></a></li>
-      <li><a href="globals_eval.html"><span>Enumerator</span></a></li>
-      <li><a href="globals_defs.html"><span>Macros</span></a></li>
-    </ul>
-  </div>
-  <div id="navrow4" class="tabs3">
-    <ul class="tablist">
-      <li class="current"><a href="globals.html#index__"><span>_</span></a></li>
-      <li><a href="globals_a.html#index_a"><span>a</span></a></li>
-      <li><a href="globals_b.html#index_b"><span>b</span></a></li>
-      <li><a href="globals_c.html#index_c"><span>c</span></a></li>
-      <li><a href="globals_d.html#index_d"><span>d</span></a></li>
-      <li><a href="globals_h.html#index_h"><span>h</span></a></li>
-      <li><a href="globals_i.html#index_i"><span>i</span></a></li>
-      <li><a href="globals_m.html#index_m"><span>m</span></a></li>
-      <li><a href="globals_n.html#index_n"><span>n</span></a></li>
-      <li><a href="globals_p.html#index_p"><span>p</span></a></li>
-      <li><a href="globals_s.html#index_s"><span>s</span></a></li>
-      <li><a href="globals_t.html#index_t"><span>t</span></a></li>
-      <li><a href="globals_u.html#index_u"><span>u</span></a></li>
-      <li><a href="globals_w.html#index_w"><span>w</span></a></li>
-    </ul>
-  </div>
-</div><!-- top -->
-<div id="side-nav" class="ui-resizable side-nav-resizable">
-  <div id="nav-tree">
-    <div id="nav-tree-contents">
-      <div id="nav-sync" class="sync"></div>
-    </div>
-  </div>
-  <div id="splitbar" style="-moz-user-select:none;" 
-       class="ui-resizable-handle">
-  </div>
-</div>
-<script type="text/javascript">
-$(document).ready(function(){initNavTree('globals.html','');});
-</script>
-<div id="doc-content">
-<!-- window showing the filter options -->
-<div id="MSearchSelectWindow"
-     onmouseover="return searchBox.OnSearchSelectShow()"
-     onmouseout="return searchBox.OnSearchSelectHide()"
-     onkeydown="return searchBox.OnSearchSelectKey(event)">
-<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Pages</a></div>
-
-<!-- iframe showing the search results (closed by default) -->
-<div id="MSearchResultsWindow">
-<iframe src="javascript:void(0)" frameborder="0" 
-        name="MSearchResults" id="MSearchResults">
-</iframe>
-</div>
-
-<div class="contents">
-<div class="textblock">Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:</div>
-
-<h3><a class="anchor" id="index__"></a>- _ -</h3><ul>
-<li>__ALIGNED
-: <a class="el" href="group__compiler__conntrol__gr.html#ga0c58caa5a273e2c21924509a45f8b849">Ref_CompilerControl.txt</a>
-</li>
-<li>__ARM_ARCH_6M__
-: <a class="el" href="group__compiler__conntrol__gr.html#ga8be4ebde5d4dd91b161d206545ce59aa">Ref_CompilerControl.txt</a>
-</li>
-<li>__ARM_ARCH_7EM__
-: <a class="el" href="group__compiler__conntrol__gr.html#ga43ab3e79ec5ecb615f1f2f6e83e7d48a">Ref_CompilerControl.txt</a>
-</li>
-<li>__ARM_ARCH_7M__
-: <a class="el" href="group__compiler__conntrol__gr.html#ga43e1af8bedda108dfc4f8584e6b278a2">Ref_CompilerControl.txt</a>
-</li>
-<li>__ARM_ARCH_8M_BASE__
-: <a class="el" href="group__compiler__conntrol__gr.html#gab3f1284f4cdc6c5e5c9c9d4b8ec29b2a">Ref_CompilerControl.txt</a>
-</li>
-<li>__ARM_ARCH_8M_MAIN__
-: <a class="el" href="group__compiler__conntrol__gr.html#gad424c7143edd08c982dddad0ff65f4cd">Ref_CompilerControl.txt</a>
-</li>
-<li>__ARMv81MML_REV
-: <a class="el" href="group__device__config.html#ga4dd7b69d473733e59cd99fc786174cd3">Template.txt</a>
-</li>
-<li>__ARMv8MBL_REV
-: <a class="el" href="group__device__config.html#ga645c9be694a2d5b5a5b772a0102c727a">Template.txt</a>
-</li>
-<li>__ARMv8MML_REV
-: <a class="el" href="group__device__config.html#gadb7d425f5ad0389b0eb1c6a69f8eb214">Template.txt</a>
-</li>
-<li>__ASM
-: <a class="el" href="group__compiler__conntrol__gr.html#ga1378040bcf22428955c6e3ce9c2053cd">Ref_CompilerControl.txt</a>
-</li>
-<li>__BKPT()
-: <a class="el" href="group__intrinsic__CPU__gr.html#ga92f5621626711931da71eaa8bf301af7">Ref_cmInstr.txt</a>
-</li>
-<li>__CLREX()
-: <a class="el" href="group__intrinsic__CPU__gr.html#ga354c5ac8870cc3dfb823367af9c4b412">Ref_cmInstr.txt</a>
-</li>
-<li>__CLZ()
-: <a class="el" href="group__intrinsic__CPU__gr.html#ga90884c591ac5d73d6069334eba9d6c02">Ref_cmInstr.txt</a>
-</li>
-<li>__CM0_REV
-: <a class="el" href="group__device__config.html#ga905517438930a3f13cbc632e52990534">Template.txt</a>
-</li>
-<li>__CM0PLUS_REV
-: <a class="el" href="group__device__config.html#ga2b7180ed347a0e902c5765deb46e650e">Template.txt</a>
-</li>
-<li>__CM1_REV
-: <a class="el" href="group__device__config.html#ga71248e1e7db00ff28754b6fd80807654">Template.txt</a>
-</li>
-<li>__CM23_REV
-: <a class="el" href="group__device__config.html#ga0f6c2b504ee424a7895fd7a420acdd0e">Template.txt</a>
-</li>
-<li>__CM33_REV
-: <a class="el" href="group__device__config.html#ga178e7a57b608f3e20d1c0cf18a2c2ac3">Template.txt</a>
-</li>
-<li>__CM35P_REV
-: <a class="el" href="group__device__config.html#gadd339c07b13a763dda6e83f4c05122f6">Template.txt</a>
-</li>
-<li>__CM3_REV
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-</li>
-<li>__CM4_REV
-: <a class="el" href="group__device__config.html#ga45a97e4bb8b6ce7c334acc5f45ace3ba">Template.txt</a>
-</li>
-<li>__CM55_REV
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-</li>
-<li>__CM7_REV
-: <a class="el" href="group__device__config.html#ga8eb40c0d30a09a0ae388e56b21d8f22c">Template.txt</a>
-</li>
-<li>__CM85_REV
-: <a class="el" href="group__device__config.html#gab1efd620a97f291faa1092e10e693bd3">Template.txt</a>
-</li>
-<li>__CM_CMSIS_VERSION
-: <a class="el" href="group__version__control__gr.html#ga39f3d64ff95fb58feccc7639e537ff89">Ref_VersionControl.txt</a>
-</li>
-<li>__CM_CMSIS_VERSION_MAIN
-: <a class="el" href="group__version__control__gr.html#ga85987c5fcc1e012d7ac01369ee6ca2b5">Ref_VersionControl.txt</a>
-</li>
-<li>__CM_CMSIS_VERSION_SUB
-: <a class="el" href="group__version__control__gr.html#ga22083cbe7f0606cfd538ec12b2e41608">Ref_VersionControl.txt</a>
-</li>
-<li>__COMPILER_BARRIER
-: <a class="el" href="group__compiler__conntrol__gr.html#ga6f053389e2958b5a239a54d4e4047bf5">Ref_CompilerControl.txt</a>
-</li>
-<li>__CORTEX_M
-: <a class="el" href="group__version__control__gr.html#ga63ea62503c88acab19fcf3d5743009e3">Ref_VersionControl.txt</a>
-</li>
-<li>__CORTEX_SC
-: <a class="el" href="group__version__control__gr.html#gaeaaf66c86e5ae02a0e1fe542cb7f4d8c">Ref_VersionControl.txt</a>
-</li>
-<li>__DCACHE_PRESENT
-: <a class="el" href="group__device__config.html#ga11d3ac679daeb58d0cec0a4e6ca59010">Template.txt</a>
-</li>
-<li>__disable_fault_irq()
-: <a class="el" href="group__Core__Register__gr.html#ga9d174f979b2f76fdb3228a9b338fd939">Ref_CoreReg.txt</a>
-</li>
-<li>__disable_irq()
-: <a class="el" href="group__Core__Register__gr.html#gaeb8e5f7564a8ea23678fe3c987b04013">Ref_CoreReg.txt</a>
-</li>
-<li>__DMB()
-: <a class="el" href="group__intrinsic__CPU__gr.html#gab1c9b393641dc2d397b3408fdbe72b96">Ref_cmInstr.txt</a>
-</li>
-<li>__DSB()
-: <a class="el" href="group__intrinsic__CPU__gr.html#gacb2a8ca6eae1ba4b31161578b720c199">Ref_cmInstr.txt</a>
-</li>
-<li>__DSP_PRESENT
-: <a class="el" href="group__device__config.html#ga165f052f5641898a02bb07096dc177b6">Template.txt</a>
-</li>
-<li>__DTCM_PRESENT
-: <a class="el" href="group__device__config.html#gacbb998663708df6626abb09378303019">Template.txt</a>
-</li>
-<li>__enable_fault_irq()
-: <a class="el" href="group__Core__Register__gr.html#ga6575d37863cec5d334864f93b5b783bf">Ref_CoreReg.txt</a>
-</li>
-<li>__enable_irq()
-: <a class="el" href="group__Core__Register__gr.html#ga0f98dfbd252b89d12564472dbeba9c27">Ref_CoreReg.txt</a>
-</li>
-<li>__FPU_DP
-: <a class="el" href="group__device__config.html#ga2a528de57b6217f9fc9d4487d0db6328">Template.txt</a>
-</li>
-<li>__FPU_PRESENT
-: <a class="el" href="group__device__config.html#gac1ba8a48ca926bddc88be9bfd7d42641">Template.txt</a>
-</li>
-<li>__get_APSR()
-: <a class="el" href="group__Core__Register__gr.html#ga811c0012221ee918a75111ca84c4d5e7">Ref_CoreReg.txt</a>
-</li>
-<li>__get_BASEPRI()
-: <a class="el" href="group__Core__Register__gr.html#ga32da759f46e52c95bcfbde5012260667">Ref_CoreReg.txt</a>
-</li>
-<li>__get_CONTROL()
-: <a class="el" href="group__Core__Register__gr.html#ga963cf236b73219ce78e965deb01b81a7">Ref_CoreReg.txt</a>
-</li>
-<li>__get_FAULTMASK()
-: <a class="el" href="group__Core__Register__gr.html#gaa78e4e6bf619a65e9f01b4af13fed3a8">Ref_CoreReg.txt</a>
-</li>
-<li>__get_FPSCR()
-: <a class="el" href="group__Core__Register__gr.html#gad6d7eca9ddd1d9072dd7b020cfe64905">Ref_CoreReg.txt</a>
-</li>
-<li>__get_IPSR()
-: <a class="el" href="group__Core__Register__gr.html#ga2c32fc5c7f8f07fb3d436c6f6fe4e8c8">Ref_CoreReg.txt</a>
-</li>
-<li>__get_MSP()
-: <a class="el" href="group__Core__Register__gr.html#gab898559392ba027814e5bbb5a98b38d2">Ref_CoreReg.txt</a>
-</li>
-<li>__get_MSPLIM()
-: <a class="el" href="group__Core__Register__gr.html#gaf39856ca50fc88cf459031b44eb2521c">Ref_CoreReg.txt</a>
-</li>
-<li>__get_PRIMASK()
-: <a class="el" href="group__Core__Register__gr.html#ga799b5d9a2ae75e459264c8512c7c0e02">Ref_CoreReg.txt</a>
-</li>
-<li>__get_PSP()
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-</li>
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-: <a class="el" href="group__coreregister__trustzone__functions.html#gaea8db21c00cfa4144ee74dc65dbd7580">Ref_Trustzone.txt</a>
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diff --git a/Documentation/Core/html/globals_a.html b/Documentation/Core/html/globals_a.html
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-  <td style="padding-left: 0.5em;">
-   <div id="projectname">CMSIS-Core (Cortex-M)
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-      <li><a href="globals_m.html#index_m"><span>m</span></a></li>
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-<div class="contents">
-<div class="textblock">Here is a list of all functions, variables, defines, enums, and typedefs with links to the files they belong to:</div>
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-</li>
-<li>ARM_MPU_ATTR_DEVICE
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-</li>
-<li>ARM_MPU_ATTR_DEVICE_GRE
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-</li>
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-<li>ARM_MPU_ATTR_DEVICE_nGRE
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-<li>ARM_MPU_ATTR_MEMORY_
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-</li>
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-</li>
-<li>ARM_MPU_ClrRegionEx()
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-</li>
-<li>ARM_MPU_Disable()
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-</li>
-<li>ARM_MPU_Disable_NS()
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-, <a class="el" href="group__mpu8__functions.html#ga6d7f220015c070c0e469948c1775ee3d">Ref_MPU8.txt</a>
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-, <a class="el" href="group__mpu8__functions.html#ga3d50ba8546252bea959e45c8fdf16993">Ref_MPU8.txt</a>
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-<li>ARM_PMU_EVCNTR_ALL_Reset()
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-: <a class="el" href="group__pmu8__events__armv81.html#gac97858bd621eab4592569444f0a5c37f">Ref_PMU8.txt</a>
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-<li>ARM_PMU_Get_CCNTR()
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-<li>ARM_PMU_Get_EVCNTR()
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-: <a class="el" href="group__pmu8__events__armv81.html#ga6e02b08550d7e9b273ff7913f1b57bea">Ref_PMU8.txt</a>
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-: <a class="el" href="group__pmu8__events__armv81.html#gab80e47ffebc3ae6ed2952756b020dbb9">Ref_PMU8.txt</a>
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-: <a class="el" href="group__pmu8__events__armv81.html#gad70a3b074efd967485ffbfd3e387051d">Ref_PMU8.txt</a>
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-: <a class="el" href="group__pmu8__events__armcm55.html#ga49e8162cf70ec75017dee7428462f38f">Ref_PMU8.txt</a>
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-: <a class="el" href="group__pmu8__events__armcm55.html#ga8e3f50182b0fdacab4b09bb0e4007136">Ref_PMU8.txt</a>
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-: <a class="el" href="group__pmu8__events__armcm55.html#ga8b005f5e47bc8bf9ee8d84a43b798ca9">Ref_PMU8.txt</a>
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-: <a class="el" href="group__pmu8__events__armcm55.html#ga6bf0106f269b33afbe3482bab385f152">Ref_PMU8.txt</a>
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-: <a class="el" href="group__pmu8__events__armcm55.html#gab423c79d244d071407afb49dfcfb6e05">Ref_PMU8.txt</a>
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-: <a class="el" href="group__pmu8__events__armcm55.html#ga88ab1b9d04cd44c53a92962fad8e3bdc">Ref_PMU8.txt</a>
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-: <a class="el" href="group__pmu8__events__armcm55.html#ga45cc9a0330e159e4afbce93e3cb5ef2e">Ref_PMU8.txt</a>
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-: <a class="el" href="group__pmu8__events__armcm85.html#gae3c87b378d4c60d45f856f1d7b40016f">Ref_PMU8.txt</a>
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-: <a class="el" href="group__pmu8__events__armcm85.html#gaa7d0a66f89539bee090a467ed129c976">Ref_PMU8.txt</a>
-</li>
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-</li>
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-: <a class="el" href="group__intrinsic__CPU__gr.html#ga0a354bdf71caa52f081a4a54e84c8d2a">Ref_cmInstr.txt</a>
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-: <a class="el" href="group__intrinsic__CPU__gr.html#ga335deaaa7991490e1450cb7d1e4c5197">Ref_cmInstr.txt</a>
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-: <a class="el" href="group__intrinsic__CPU__gr.html#ga2b5d93b8e461755b1072a03df3f1722e">Ref_cmInstr.txt</a>
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-: <a class="el" href="group__intrinsic__CPU__gr.html#ga625bc4ac0b1d50de9bcd13d9f050030e">Ref_cmInstr.txt</a>
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-: <a class="el" href="group__intrinsic__SIMD__gr.html#gac540b4fc41d30778ba102d2a65db5589">Ref_cm4_simd.txt</a>
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-: <a class="el" href="group__intrinsic__SIMD__gr.html#gaf0029ec2b0decbff4df5bc6f4352bba4">Ref_cm4_simd.txt</a>
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-: <a class="el" href="group__intrinsic__SIMD__gr.html#ga38dce3dd13ba212e80ec3cff4abeb11a">Ref_cm4_simd.txt</a>
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-: <a class="el" href="group__intrinsic__SIMD__gr.html#gaef7e08ba1dbaaae1efdb76c113155ed1">Ref_cm4_simd.txt</a>
-</li>
-<li>__TZ_get_BASEPRI_NS()
-: <a class="el" href="group__coreregister__trustzone__functions.html#ga624509c924d2583f0d4dca6ab270f051">Ref_Trustzone.txt</a>
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-<li>__TZ_get_CONTROL_NS()
-: <a class="el" href="group__coreregister__trustzone__functions.html#ga27bf1f88e794c30808ee73a29d46e358">Ref_Trustzone.txt</a>
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-<li>__TZ_get_FAULTMASK_NS()
-: <a class="el" href="group__coreregister__trustzone__functions.html#ga578b41087f207e1a475daae6cc8a28dc">Ref_Trustzone.txt</a>
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-: <a class="el" href="group__coreregister__trustzone__functions.html#gab3aa15eb4f352e230b9f7a3e8856a9e9">Ref_Trustzone.txt</a>
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-: <a class="el" href="group__coreregister__trustzone__functions.html#gada00853d3e49fa8d21f375c53d28fa51">Ref_Trustzone.txt</a>
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-: <a class="el" href="group__coreregister__trustzone__functions.html#ga7cc3271c79e619f8838e8767df3cb509">Ref_Trustzone.txt</a>
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-<li>__TZ_get_PSP_NS()
-: <a class="el" href="group__coreregister__trustzone__functions.html#ga40ff8336c6d09af6da1081d4e4adc126">Ref_Trustzone.txt</a>
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-: <a class="el" href="group__coreregister__trustzone__functions.html#ga5da646ec291b6a183f38497ce92be51c">Ref_Trustzone.txt</a>
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-: <a class="el" href="group__coreregister__trustzone__functions.html#ga3eb150204e6d389d5b49065179b9cde5">Ref_Trustzone.txt</a>
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-: <a class="el" href="group__intrinsic__SIMD__gr.html#gaa1160f0cf76d6aa292fbad54a1aa6b74">Ref_cm4_simd.txt</a>
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-: <a class="el" href="group__intrinsic__SIMD__gr.html#gab3d7fd00d113b20fb3741a17394da762">Ref_cm4_simd.txt</a>
-</li>
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-: <a class="el" href="group__intrinsic__SIMD__gr.html#ga980353d2c72ebb879282e49f592fddc0">Ref_cm4_simd.txt</a>
-</li>
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-: <a class="el" href="group__intrinsic__SIMD__gr.html#gabd0b0e2da2e6364e176d051687702b86">Ref_cm4_simd.txt</a>
-</li>
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-: <a class="el" href="group__intrinsic__SIMD__gr.html#ga028f0732b961fb6e5209326fb3855261">Ref_cm4_simd.txt</a>
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-</li>
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-: <a class="el" href="group__intrinsic__SIMD__gr.html#ga1f7545b8dc33bb97982731cb9d427a69">Ref_cm4_simd.txt</a>
-</li>
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-</li>
-<li>__UQASX()
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-<li>__UQSAX()
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-</li>
-<li>__UQSUB16()
-: <a class="el" href="group__intrinsic__SIMD__gr.html#ga5ec4e2e231d15e5c692233feb3806187">Ref_cm4_simd.txt</a>
-</li>
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-</li>
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-: <a class="el" href="group__intrinsic__SIMD__gr.html#gac8855c07044239ea775c8128013204f0">Ref_cm4_simd.txt</a>
-</li>
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-: <a class="el" href="group__intrinsic__SIMD__gr.html#gad032bd21f013c5d29f5fcb6b0f02bc3f">Ref_cm4_simd.txt</a>
-</li>
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-: <a class="el" href="group__intrinsic__CPU__gr.html#ga9ba87371aebd17dd6244ed3458b29b5d">Ref_cmInstr.txt</a>
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-</li>
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-</li>
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-</li>
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-: <a class="el" href="group__intrinsic__CPU__gr.html#gad3efec76c3bfa2b8528ded530386c563">Ref_cmInstr.txt</a>
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-<tr class="separator:ga70b4e1a6c1c86eb913fb9d6e8400156f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga32da759f46e52c95bcfbde5012260667"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Core__Register__gr.html#ga32da759f46e52c95bcfbde5012260667">__get_BASEPRI</a> (void)</td></tr>
-<tr class="memdesc:ga32da759f46e52c95bcfbde5012260667"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000].  <a href="#ga32da759f46e52c95bcfbde5012260667">More...</a><br/></td></tr>
-<tr class="separator:ga32da759f46e52c95bcfbde5012260667"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga360c73eb7ffb16088556f9278953b882"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Core__Register__gr.html#ga360c73eb7ffb16088556f9278953b882">__set_BASEPRI</a> (uint32_t basePri)</td></tr>
-<tr class="memdesc:ga360c73eb7ffb16088556f9278953b882"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000].  <a href="#ga360c73eb7ffb16088556f9278953b882">More...</a><br/></td></tr>
-<tr class="separator:ga360c73eb7ffb16088556f9278953b882"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga62fa63d39cf22df348857d5f44ab64d9"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Core__Register__gr.html#ga62fa63d39cf22df348857d5f44ab64d9">__set_BASEPRI_MAX</a> (uint32_t basePri)</td></tr>
-<tr class="memdesc:ga62fa63d39cf22df348857d5f44ab64d9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Increase the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000].  <a href="#ga62fa63d39cf22df348857d5f44ab64d9">More...</a><br/></td></tr>
-<tr class="separator:ga62fa63d39cf22df348857d5f44ab64d9"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaa78e4e6bf619a65e9f01b4af13fed3a8"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Core__Register__gr.html#gaa78e4e6bf619a65e9f01b4af13fed3a8">__get_FAULTMASK</a> (void)</td></tr>
-<tr class="memdesc:gaa78e4e6bf619a65e9f01b4af13fed3a8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the FAULTMASK register [not for Cortex-M0, Cortex-M0+, or SC000].  <a href="#gaa78e4e6bf619a65e9f01b4af13fed3a8">More...</a><br/></td></tr>
-<tr class="separator:gaa78e4e6bf619a65e9f01b4af13fed3a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaa5587cc09031053a40a35c14ec36078a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Core__Register__gr.html#gaa5587cc09031053a40a35c14ec36078a">__set_FAULTMASK</a> (uint32_t faultMask)</td></tr>
-<tr class="memdesc:gaa5587cc09031053a40a35c14ec36078a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the FAULTMASK register [not for Cortex-M0, Cortex-M0+, or SC000].  <a href="#gaa5587cc09031053a40a35c14ec36078a">More...</a><br/></td></tr>
-<tr class="separator:gaa5587cc09031053a40a35c14ec36078a"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad6d7eca9ddd1d9072dd7b020cfe64905"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Core__Register__gr.html#gad6d7eca9ddd1d9072dd7b020cfe64905">__get_FPSCR</a> (void)</td></tr>
-<tr class="memdesc:gad6d7eca9ddd1d9072dd7b020cfe64905"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the FPSCR register [only Cortex-M4 and Cortex-M7].  <a href="#gad6d7eca9ddd1d9072dd7b020cfe64905">More...</a><br/></td></tr>
-<tr class="separator:gad6d7eca9ddd1d9072dd7b020cfe64905"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga6f26bd75ca7e3247f27b272acc10536b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Core__Register__gr.html#ga6f26bd75ca7e3247f27b272acc10536b">__set_FPSCR</a> (uint32_t fpscr)</td></tr>
-<tr class="memdesc:ga6f26bd75ca7e3247f27b272acc10536b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the FPSC register [only for Cortex-M4 and Cortex-M7].  <a href="#ga6f26bd75ca7e3247f27b272acc10536b">More...</a><br/></td></tr>
-<tr class="separator:ga6f26bd75ca7e3247f27b272acc10536b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga0f98dfbd252b89d12564472dbeba9c27"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Core__Register__gr.html#ga0f98dfbd252b89d12564472dbeba9c27">__enable_irq</a> (void)</td></tr>
-<tr class="memdesc:ga0f98dfbd252b89d12564472dbeba9c27"><td class="mdescLeft">&#160;</td><td class="mdescRight">Globally enables interrupts and configurable fault handlers.  <a href="#ga0f98dfbd252b89d12564472dbeba9c27">More...</a><br/></td></tr>
-<tr class="separator:ga0f98dfbd252b89d12564472dbeba9c27"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaeb8e5f7564a8ea23678fe3c987b04013"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Core__Register__gr.html#gaeb8e5f7564a8ea23678fe3c987b04013">__disable_irq</a> (void)</td></tr>
-<tr class="memdesc:gaeb8e5f7564a8ea23678fe3c987b04013"><td class="mdescLeft">&#160;</td><td class="mdescRight">Globally disables interrupts and configurable fault handlers.  <a href="#gaeb8e5f7564a8ea23678fe3c987b04013">More...</a><br/></td></tr>
-<tr class="separator:gaeb8e5f7564a8ea23678fe3c987b04013"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga6575d37863cec5d334864f93b5b783bf"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Core__Register__gr.html#ga6575d37863cec5d334864f93b5b783bf">__enable_fault_irq</a> (void)</td></tr>
-<tr class="memdesc:ga6575d37863cec5d334864f93b5b783bf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enables interrupts and all fault handlers [not for Cortex-M0, Cortex-M0+, or SC000].  <a href="#ga6575d37863cec5d334864f93b5b783bf">More...</a><br/></td></tr>
-<tr class="separator:ga6575d37863cec5d334864f93b5b783bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga9d174f979b2f76fdb3228a9b338fd939"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Core__Register__gr.html#ga9d174f979b2f76fdb3228a9b338fd939">__disable_fault_irq</a> (void)</td></tr>
-<tr class="memdesc:ga9d174f979b2f76fdb3228a9b338fd939"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disables interrupts and all fault handlers [not for Cortex-M0, Cortex-M0+, or SC000].  <a href="#ga9d174f979b2f76fdb3228a9b338fd939">More...</a><br/></td></tr>
-<tr class="separator:ga9d174f979b2f76fdb3228a9b338fd939"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga8b226929264e903c7019e326b42bef47"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Core__Register__gr.html#ga8b226929264e903c7019e326b42bef47">__get_PSPLIM</a> (void)</td></tr>
-<tr class="memdesc:ga8b226929264e903c7019e326b42bef47"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Process Stack Pointer Limit Devices without Armv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence zero is returned always in non-secure mode.  <a href="#ga8b226929264e903c7019e326b42bef47">More...</a><br/></td></tr>
-<tr class="separator:ga8b226929264e903c7019e326b42bef47"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga4348d14fc5eefbfd34ab8c51be44a81b"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Core__Register__gr.html#ga4348d14fc5eefbfd34ab8c51be44a81b">__set_PSPLIM</a> (uint32_t ProcStackPtrLimit)</td></tr>
-<tr class="memdesc:ga4348d14fc5eefbfd34ab8c51be44a81b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Process Stack Pointer Limit Devices without Armv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence the write is silently ignored in non-secure mode.  <a href="#ga4348d14fc5eefbfd34ab8c51be44a81b">More...</a><br/></td></tr>
-<tr class="separator:ga4348d14fc5eefbfd34ab8c51be44a81b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf39856ca50fc88cf459031b44eb2521c"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Core__Register__gr.html#gaf39856ca50fc88cf459031b44eb2521c">__get_MSPLIM</a> (void)</td></tr>
-<tr class="memdesc:gaf39856ca50fc88cf459031b44eb2521c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Main Stack Pointer Limit Devices without Armv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence zero is returned always in non-secure mode.  <a href="#gaf39856ca50fc88cf459031b44eb2521c">More...</a><br/></td></tr>
-<tr class="separator:gaf39856ca50fc88cf459031b44eb2521c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga6809a07c5cb7410e361f3fba57f72172"><td class="memItemLeft" align="right" valign="top">&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__Core__Register__gr.html#ga6809a07c5cb7410e361f3fba57f72172">__set_MSPLIM</a> (uint32_t MainStackPtrLimit)</td></tr>
-<tr class="memdesc:ga6809a07c5cb7410e361f3fba57f72172"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Main Stack Pointer Limit Devices without Armv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence the write is silently ignored in non-secure mode.  <a href="#ga6809a07c5cb7410e361f3fba57f72172">More...</a><br/></td></tr>
-<tr class="separator:ga6809a07c5cb7410e361f3fba57f72172"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Functions to access the Cortex-M core registers. </p>
-<p>The following functions provide access to Cortex-M core registers. </p>
-<h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga9d174f979b2f76fdb3228a9b338fd939"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void __disable_fault_irq </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Disables interrupts and all fault handlers [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
-<p>The function disables interrupts and all fault handlers by setting FAULTMASK. The function uses the instruction <b>CPSID f</b>.</p>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>not for Cortex-M0, Cortex-M0+, or SC000.</li>
-<li>Can be executed in privileged mode only.</li>
-<li>An interrupt can enter pending state even if it is disabled. Disabling an interrupt only prevents the processor from taking that interrupt.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#ga6575d37863cec5d334864f93b5b783bf">__enable_fault_irq</a>; <a class="el" href="group__Core__Register__gr.html#ga360c73eb7ffb16088556f9278953b882" title="Set the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000]. ">__set_BASEPRI</a>; <a class="el" href="group__Core__Register__gr.html#gac64d37e7ff9de06437f9fb94bbab8b6c" title="Set the CONTROL Register. ">__set_CONTROL</a>; <a class="el" href="group__Core__Register__gr.html#gaa5587cc09031053a40a35c14ec36078a" title="Set the FAULTMASK register [not for Cortex-M0, Cortex-M0+, or SC000]. ">__set_FAULTMASK</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gaeb8e5f7564a8ea23678fe3c987b04013"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
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-          <td class="memname">void __disable_irq </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Globally disables interrupts and configurable fault handlers. </p>
-<p>The function disables interrupts and all configurable fault handlers by setting PRIMASK. The function uses the instruction <b>CPSID i</b>.</p>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>Can be executed in privileged mode only.</li>
-<li>An interrupt can enter pending state even if it is disabled. Disabling an interrupt only prevents the processor from taking that interrupt.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#ga0f98dfbd252b89d12564472dbeba9c27">__enable_irq</a>; <a class="el" href="group__Core__Register__gr.html#ga360c73eb7ffb16088556f9278953b882" title="Set the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000]. ">__set_BASEPRI</a>; <a class="el" href="group__Core__Register__gr.html#gac64d37e7ff9de06437f9fb94bbab8b6c" title="Set the CONTROL Register. ">__set_CONTROL</a>; <a class="el" href="group__Core__Register__gr.html#ga70b4e1a6c1c86eb913fb9d6e8400156f" title="Set the Priority Mask bit. ">__set_PRIMASK</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga6575d37863cec5d334864f93b5b783bf"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void __enable_fault_irq </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Enables interrupts and all fault handlers [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
-<p>The function enables interrupts and all fault handlers by clearing FAULTMASK. The function uses the instruction <b>CPSIE f</b>.</p>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>not for Cortex-M0, Cortex-M0+, or SC000.</li>
-<li>Can be executed in privileged mode only.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#ga9d174f979b2f76fdb3228a9b338fd939">__disable_fault_irq</a>; <a class="el" href="group__Core__Register__gr.html#ga360c73eb7ffb16088556f9278953b882" title="Set the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000]. ">__set_BASEPRI</a>; <a class="el" href="group__Core__Register__gr.html#gac64d37e7ff9de06437f9fb94bbab8b6c" title="Set the CONTROL Register. ">__set_CONTROL</a>; <a class="el" href="group__Core__Register__gr.html#gaa5587cc09031053a40a35c14ec36078a" title="Set the FAULTMASK register [not for Cortex-M0, Cortex-M0+, or SC000]. ">__set_FAULTMASK</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga0f98dfbd252b89d12564472dbeba9c27"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void __enable_irq </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Globally enables interrupts and configurable fault handlers. </p>
-<p>The function enables interrupts and all configurable fault handlers by clearing PRIMASK. The function uses the instruction <b>CPSIE i</b>.</p>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>Can be executed in privileged mode only.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#gaeb8e5f7564a8ea23678fe3c987b04013">__disable_irq</a>; <a class="el" href="group__Core__Register__gr.html#ga360c73eb7ffb16088556f9278953b882" title="Set the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000]. ">__set_BASEPRI</a>; <a class="el" href="group__Core__Register__gr.html#gac64d37e7ff9de06437f9fb94bbab8b6c" title="Set the CONTROL Register. ">__set_CONTROL</a>; <a class="el" href="group__Core__Register__gr.html#ga70b4e1a6c1c86eb913fb9d6e8400156f" title="Set the Priority Mask bit. ">__set_PRIMASK</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga811c0012221ee918a75111ca84c4d5e7"></a>
-<div class="memitem">
-<div class="memproto">
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-        <tr>
-          <td class="memname">uint32_t __get_APSR </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Read the APSR register. </p>
-<p>The function reads the Application Program Status Register (APSR) using the instruction <b>MRS</b>. <br/>
-<br/>
-The APSR contains the current state of the condition flags from instructions executed previously. The APSR is essential for controlling conditional branches. The following flags are used:</p>
-<ul>
-<li><b>N</b> (APSR[31]) (Negative flag)<ul>
-<li>=1 The instruction result has a negative value (when interpreted as signed integer).</li>
-<li>=0 The instruction result has a positive value or equal zero. <br/>
-<br/>
-</li>
-</ul>
-</li>
-<li><b>Z</b> (APSR[30]) (Zero flag)<ul>
-<li>=1 The instruction result is zero. Or, after a compare instruction, when the two values are the same. <br/>
-<br/>
-</li>
-</ul>
-</li>
-<li><b>C</b> (APSR[29]) (Carry or borrow flag)<ul>
-<li>=1 For unsigned additions, if an unsigned overflow occurred.</li>
-<li>=<em>inverse of borrow output status</em> For unsigned subtract operations. <br/>
-<br/>
-</li>
-</ul>
-</li>
-<li><b>V</b> (APSR[28]) (Overflow flag)<ul>
-<li>=1 A signed overflow occurred (for signed additions or subtractions). <br/>
-<br/>
-</li>
-</ul>
-</li>
-<li><b>Q</b> (APSR[27]) (DSP overflow or saturation flag) [not Cortex-M0]<ul>
-<li>This flag is a <em>sticky</em> flag. Saturating and certain multiplying instructions can set the flag, but cannot clear it.</li>
-<li>=1 When saturation or an overflow occurred. <br/>
-<br/>
-</li>
-</ul>
-</li>
-<li><b>GE</b> (APSR[19:16]) (Greater than or Equal flags) [not Cortex-M0]<ul>
-<li>Can be set by the parallel add and subtract instructions.</li>
-<li>Are used by the <code>SEL</code> instruction to perform byte-based selection from two registers.</li>
-</ul>
-</li>
-</ul>
-<dl class="section return"><dt>Returns</dt><dd>APSR register value</dd></dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>Some instructions update all flags; some instructions update a subset of the flags.</li>
-<li>If a flag is not updated, the original value is preserved.</li>
-<li>Conditional instructions that are not executed have no effect on the flags.</li>
-<li>The CMSIS does not provide a function to update this register.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#ga732e08184154f44a617963cc65ff95bd">__get_xPSR</a>; <a class="el" href="unionAPSR__Type.html" title="Union type to access the Application Program Status Register (APSR). ">APSR_Type</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga32da759f46e52c95bcfbde5012260667"></a>
-<div class="memitem">
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-          <td class="memname">uint32_t __get_BASEPRI </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Read the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
-<p>The function returns the Base Priority Mask register (BASEPRI) using the instruction <b>MRS</b>. <br/>
-<br/>
-BASEPRI defines the minimum priority for exception processing. When BASEPRI is set to a non-zero value, it prevents the activation of all exceptions with the same or lower priority level as the BASEPRI value.</p>
-<dl class="section return"><dt>Returns</dt><dd>BASEPRI register value</dd></dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>Not for Cortex-M0, Cortex-M0+, or SC000.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#ga360c73eb7ffb16088556f9278953b882">__set_BASEPRI</a>; <a class="el" href="group__Core__Register__gr.html#ga62fa63d39cf22df348857d5f44ab64d9" title="Increase the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000]. ">__set_BASEPRI_MAX</a>; <a class="el" href="group__Core__Register__gr.html#gaa78e4e6bf619a65e9f01b4af13fed3a8" title="Read the FAULTMASK register [not for Cortex-M0, Cortex-M0+, or SC000]. ">__get_FAULTMASK</a>; <a class="el" href="group__Core__Register__gr.html#ga799b5d9a2ae75e459264c8512c7c0e02" title="Read the PRIMASK register bit. ">__get_PRIMASK</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga963cf236b73219ce78e965deb01b81a7"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __get_CONTROL </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Read the CONTROL register. </p>
-<p>The function reads the CONTROL register value using the instruction <b>MRS</b>. <br/>
-<br/>
-The CONTROL register controls the stack used and the privilege level for software execution when the processor is in thread mode and, if implemented, indicates whether the FPU state is active. This register uses the following bits: <br/>
-</p>
-<ul>
-<li><b>CONTROL</b>[2] [only Cortex-M4 and Cortex-M7]<ul>
-<li>=0 FPU not active</li>
-<li>=1 FPU active <br/>
-<br/>
-</li>
-</ul>
-</li>
-<li><b>CONTROL</b>[1]<ul>
-<li>=0 In handler mode - MSP is selected. No alternate stack possible for handler mode.</li>
-<li>=0 In thread mode - Default stack pointer MSP is used.</li>
-<li>=1 In thread mode - Alternate stack pointer PSP is used. <br/>
-<br/>
-</li>
-</ul>
-</li>
-<li><b>CONTROL</b>[0] [not Cortex-M0]<ul>
-<li>=0 In thread mode and privileged state.</li>
-<li>=1 In thread mode and user state.</li>
-</ul>
-</li>
-</ul>
-<dl class="section return"><dt>Returns</dt><dd>CONTROL register value</dd></dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>The processor can be in user state or privileged state when running in thread mode.</li>
-<li>Exception handlers always run in privileged state.</li>
-<li>On reset, the processor is in thread mode with privileged access rights.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#gac64d37e7ff9de06437f9fb94bbab8b6c">__set_CONTROL</a>; <a class="el" href="unionCONTROL__Type.html" title="Union type to access the Control Registers (CONTROL). ">CONTROL_Type</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gaa78e4e6bf619a65e9f01b4af13fed3a8"></a>
-<div class="memitem">
-<div class="memproto">
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-        <tr>
-          <td class="memname">uint32_t __get_FAULTMASK </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Read the FAULTMASK register [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
-<p>The function reads the Fault Mask register (FAULTMASK) value using the instruction <b>MRS</b>. <br/>
-<br/>
-FAULTMASK prevents activation of all exceptions except for the Non-Maskable Interrupt (NMI).</p>
-<dl class="section return"><dt>Returns</dt><dd>FAULTMASK register value</dd></dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>not for Cortex-M0, Cortex-M0+, or SC000.</li>
-<li>Is cleared automatically upon exiting the exception handler, except when returning from the NMI handler.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#gaa5587cc09031053a40a35c14ec36078a">__set_FAULTMASK</a>; <a class="el" href="group__Core__Register__gr.html#ga32da759f46e52c95bcfbde5012260667" title="Read the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000]. ">__get_BASEPRI</a>; <a class="el" href="group__Core__Register__gr.html#ga799b5d9a2ae75e459264c8512c7c0e02" title="Read the PRIMASK register bit. ">__get_PRIMASK</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gad6d7eca9ddd1d9072dd7b020cfe64905"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __get_FPSCR </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Read the FPSCR register [only Cortex-M4 and Cortex-M7]. </p>
-<p>The function reads the Floating-Point Status Control Register (FPSCR) value. <br/>
-<br/>
-FPSCR provides all necessary User level controls of the floating-point system.</p>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>FPSCR register value, when __FPU_PRESENT=1</li>
-<li>=0, when __FPU_PRESENT=0</li>
-</ul>
-</dd></dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>Only for Cortex-M4 and Cortex-M7.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#ga6f26bd75ca7e3247f27b272acc10536b">__set_FPSCR</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga2c32fc5c7f8f07fb3d436c6f6fe4e8c8"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __get_IPSR </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Read the IPSR register. </p>
-<p>The function reads the Interrupt Program Status Register (IPSR) using the instruction <b>MRS</b>. <br/>
-<br/>
-The ISPR contains the exception type number of the current Interrupt Service Routine (ISR). Each exception has an associated unique IRQn number. The following bits are used:</p>
-<ul>
-<li><b>ISR_NUMBER</b> (IPSR[8:0])<ul>
-<li>= 0 Thread mode</li>
-<li>= 1 Reserved</li>
-<li>= 2 NMI</li>
-<li>= 3 HardFault</li>
-<li>= 4 MemManage</li>
-<li>= 5 BusFault</li>
-<li>= 6 UsageFault</li>
-<li>= 7-10 Reserved</li>
-<li>= 11 SVC</li>
-<li>= 12 Reserved for Debug</li>
-<li>= 13 Reserved</li>
-<li>= 14 PendSV</li>
-<li>= 15 SysTick</li>
-<li>= 16 IRQ0</li>
-<li>...</li>
-<li>= n+15 IRQ(n-1)</li>
-</ul>
-</li>
-</ul>
-<dl class="section return"><dt>Returns</dt><dd>ISPR register value</dd></dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>This register is read-only.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#ga732e08184154f44a617963cc65ff95bd">__get_xPSR</a>; <a class="el" href="unionIPSR__Type.html" title="Union type to access the Interrupt Program Status Register (IPSR). ">IPSR_Type</a></li>
-<li><a class="el" href="group__NVIC__gr.html">Interrupts and Exceptions (NVIC)</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gab898559392ba027814e5bbb5a98b38d2"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __get_MSP </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Read the MSP register. </p>
-<p>The function reads the Main Stack Pointer (MSP) value using the instruction <b>MRS</b>. <br/>
-<br/>
-Physically two different stack pointers (SP) exist:</p>
-<ul>
-<li>The Main Stack Pointer (MSP) is the default stack pointer after reset. It is also used when running exception handlers (handler mode).</li>
-<li>The Process Stack Pointer (PSP), which can be used only in thread mode.</li>
-</ul>
-<p>Register R13 banks the SP. The SP selection is determined by the bit[1] of the CONTROL register:</p>
-<ul>
-<li>=0 MSP is the current stack pointer. This is also the default SP. The initial value is loaded from the first 32-bit word of the vector table from the program memory.</li>
-<li>=1 PSP is the current stack pointer. The initial value is undefined.</li>
-</ul>
-<dl class="section return"><dt>Returns</dt><dd>MSP Register value</dd></dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>Only one of the two SPs is visible at a time.</li>
-<li>For many applications, the system can completely rely on the MSP.</li>
-<li>The PSP is normally used in designs with an OS where the stack memory for OS Kernel must be separated from the application code.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#ga0bf9564ebc1613a8faba014275dac2a4">__set_MSP</a>; <a class="el" href="group__Core__Register__gr.html#ga914dfa8eff7ca53380dd54cf1d8bebd9" title="Read the PSP register. ">__get_PSP</a>; <a class="el" href="group__Core__Register__gr.html#ga963cf236b73219ce78e965deb01b81a7" title="Read the CONTROL register. ">__get_CONTROL</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gaf39856ca50fc88cf459031b44eb2521c"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __get_MSPLIM </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Get Main Stack Pointer Limit Devices without Armv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence zero is returned always in non-secure mode. </p>
-<p>Returns the current value of the Main Stack Pointer Limit (MSPLIM). </p>
-<dl class="section return"><dt>Returns</dt><dd>MSPLIM Register value </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga799b5d9a2ae75e459264c8512c7c0e02"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __get_PRIMASK </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Read the PRIMASK register bit. </p>
-<p>The function reads the Priority Mask register (PRIMASK) value using the instruction <b>MRS</b>. <br/>
-<br/>
-PRIMASK is a 1-bit-wide interrupt mask register. When set, it blocks all interrupts apart from the non-maskable interrupt (NMI) and the hard fault exception. The PRIMASK prevents activation of all exceptions with configurable priority.</p>
-<dl class="section return"><dt>Returns</dt><dd>PRIMASK register value<ul>
-<li>=0 no effect</li>
-<li>=1 prevents the activation of all exceptions with configurable priority</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#ga70b4e1a6c1c86eb913fb9d6e8400156f">__set_PRIMASK</a>; <a class="el" href="group__Core__Register__gr.html#ga32da759f46e52c95bcfbde5012260667" title="Read the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000]. ">__get_BASEPRI</a>; <a class="el" href="group__Core__Register__gr.html#gaa78e4e6bf619a65e9f01b4af13fed3a8" title="Read the FAULTMASK register [not for Cortex-M0, Cortex-M0+, or SC000]. ">__get_FAULTMASK</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga914dfa8eff7ca53380dd54cf1d8bebd9"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __get_PSP </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Read the PSP register. </p>
-<p>The function reads the Process Stack Pointer (PSP) value using the instruction <b>MRS</b>. <br/>
-<br/>
-Physically two different stack pointers (SP) exist:</p>
-<ul>
-<li>The Main Stack Pointer (MSP) is the default stack pointer after reset. It is also used when running exception handlers (handler mode).</li>
-<li>The Process Stack Pointer (PSP), which can be used only in thread mode.</li>
-</ul>
-<p>Register R13 banks the SP. The SP selection is determined by the bit[1] of the CONTROL register:</p>
-<ul>
-<li>=0 MSP is the current stack pointer. This is also the default SP. The initial value is loaded from the first 32-bit word of the vector table from the program memory.</li>
-<li>=1 PSP is the current stack pointer. The initial value is undefined.</li>
-</ul>
-<dl class="section return"><dt>Returns</dt><dd>PSP register value</dd></dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>Only one of the two SPs is visible at a time.</li>
-<li>For many applications, the system can completely rely on the MSP.</li>
-<li>The PSP is normally used in designs with an OS where the stack memory for OS Kernel must be separated from the application code.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#ga48e5853f417e17a8a65080f6a605b743">__set_PSP</a>; <a class="el" href="group__Core__Register__gr.html#gab898559392ba027814e5bbb5a98b38d2" title="Read the MSP register. ">__get_MSP</a>; <a class="el" href="group__Core__Register__gr.html#ga963cf236b73219ce78e965deb01b81a7" title="Read the CONTROL register. ">__get_CONTROL</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga8b226929264e903c7019e326b42bef47"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __get_PSPLIM </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Get Process Stack Pointer Limit Devices without Armv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence zero is returned always in non-secure mode. </p>
-<p>Returns the current value of the Process Stack Pointer Limit (PSPLIM). </p>
-<dl class="section return"><dt>Returns</dt><dd>PSPLIM Register value </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga732e08184154f44a617963cc65ff95bd"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __get_xPSR </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Read the xPSR register. </p>
-<p>The function reads the combined Program Status Register (xPSR) using the instruction <b>MRS</b>. <br/>
-<br/>
-xPSR provides information about program execution and the APSR flags. It consists of the following PSRs: </p>
-<ul>
-<li>Application Program Status Register (APSR) </li>
-<li>Interrupt Program Status Register (IPSR) </li>
-<li>Execution Program Status Register (EPSR)</li>
-</ul>
-<p>In addition to the flags described in <a class="el" href="group__Core__Register__gr.html#ga811c0012221ee918a75111ca84c4d5e7">__get_APSR</a> and <a class="el" href="group__Core__Register__gr.html#ga2c32fc5c7f8f07fb3d436c6f6fe4e8c8">__get_IPSR</a>, the register provides the following flags:</p>
-<ul>
-<li><b>IT</b> (xPSR[26:25]) (If-Then condition instruction)<ul>
-<li>Contains up to four instructions following an IT instruction.</li>
-<li>Each instruction in the block is conditional.</li>
-<li>The conditions for the instructions are either all the same, or some can be the inverse of others. <br/>
-<br/>
-</li>
-</ul>
-</li>
-<li><b>T</b> (xPSR[24]) (Thumb bit)<ul>
-<li>=1 Indicates that that the processor is in Thumb state.</li>
-<li>=0 Attempting to execute instructions when the T bit is 0 results in a fault or lockup.</li>
-<li>The conditions for the instructions are either all the same, or some can be the inverse of others.</li>
-</ul>
-</li>
-</ul>
-<dl class="section return"><dt>Returns</dt><dd>xPSR register value</dd></dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>The CMSIS does not provide functions that access EPSR.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#ga811c0012221ee918a75111ca84c4d5e7">__get_APSR</a>; <a class="el" href="group__Core__Register__gr.html#ga2c32fc5c7f8f07fb3d436c6f6fe4e8c8" title="Read the IPSR register. ">__get_IPSR</a>; <a class="el" href="unionxPSR__Type.html" title="Union type to access the Special-Purpose Program Status Registers (xPSR). ">xPSR_Type</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga360c73eb7ffb16088556f9278953b882"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void __set_BASEPRI </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>basePri</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Set the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
-<p>The function sets the Base Priority Mask register (BASEPRI) value using the instruction <b>MSR</b>. <br/>
-<br/>
-BASEPRI defines the minimum priority for exception processing. When BASEPRI is set to a non-zero value, it prevents the activation of all exceptions with the same or lower priority level as the BASEPRI value.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">basePri</td><td>BASEPRI value to set</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>Not for Cortex-M0, Cortex-M0+, or SC000.</li>
-<li>Cannot be set in user state.</li>
-<li>Useful for changing the masking level or disabling the masking.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#ga32da759f46e52c95bcfbde5012260667">__get_BASEPRI</a>; <a class="el" href="group__Core__Register__gr.html#ga62fa63d39cf22df348857d5f44ab64d9" title="Increase the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000]. ">__set_BASEPRI_MAX</a>; <a class="el" href="group__Core__Register__gr.html#gaa5587cc09031053a40a35c14ec36078a" title="Set the FAULTMASK register [not for Cortex-M0, Cortex-M0+, or SC000]. ">__set_FAULTMASK</a>; <a class="el" href="group__Core__Register__gr.html#ga70b4e1a6c1c86eb913fb9d6e8400156f" title="Set the Priority Mask bit. ">__set_PRIMASK</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga62fa63d39cf22df348857d5f44ab64d9"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void __set_BASEPRI_MAX </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>basePri</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Increase the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
-<p>The function only increases the Base Priority Mask register (BASEPRI) value using the instruction <b>MSR</b>. The value is set only if BASEPRI masking is disabled, or the new value increases the BASEPRI priority level. <br/>
-<br/>
-BASEPRI defines the minimum priority for exception processing.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">basePri</td><td>BASEPRI value to set</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>Not for Cortex-M0, Cortex-M0+, or SC000.</li>
-<li>Cannot be set in user state.</li>
-<li>Useful for increasing the masking level.</li>
-<li>Has no effect when <em>basePri</em> is lower than the current value of BASEPRI.</li>
-<li>Use <a class="el" href="group__Core__Register__gr.html#ga360c73eb7ffb16088556f9278953b882">__set_BASEPRI</a> to lower the Base Priority Mask register.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#ga360c73eb7ffb16088556f9278953b882">__set_BASEPRI</a>; <a class="el" href="group__Core__Register__gr.html#ga32da759f46e52c95bcfbde5012260667" title="Read the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000]. ">__get_BASEPRI</a>; <a class="el" href="group__Core__Register__gr.html#gaa5587cc09031053a40a35c14ec36078a" title="Set the FAULTMASK register [not for Cortex-M0, Cortex-M0+, or SC000]. ">__set_FAULTMASK</a>; <a class="el" href="group__Core__Register__gr.html#ga70b4e1a6c1c86eb913fb9d6e8400156f" title="Set the Priority Mask bit. ">__set_PRIMASK</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gac64d37e7ff9de06437f9fb94bbab8b6c"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void __set_CONTROL </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>control</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Set the CONTROL Register. </p>
-<p>The function sets the CONTROL register value using the instruction <b>MSR</b>. <br/>
-<br/>
-The CONTROL register controls the stack used and the privilege level for software execution when the processor is in thread mode and, if implemented, indicates whether the FPU state is active. This register uses the following bits: <br/>
-</p>
-<ul>
-<li><b>CONTROL</b>[2] [only Cortex-M4 and Cortex-M7]<ul>
-<li>=0 FPU not active</li>
-<li>=1 FPU active <br/>
-<br/>
-</li>
-</ul>
-</li>
-<li><b>CONTROL</b>[1]<ul>
-<li>Writeable only when the processor is in thread mode and privileged state (CONTROL[0]=0).</li>
-<li>=0 In handler mode - MSP is selected. No alternate stack pointer possible for handler mode.</li>
-<li>=0 In thread mode - Default stack pointer MSP is used.</li>
-<li>=1 In thread mode - Alternate stack pointer PSP is used. <br/>
-<br/>
-</li>
-</ul>
-</li>
-<li><b>CONTROL</b>[0] [not writeable for Cortex-M0]<ul>
-<li>Writeable only when the processor is in privileged state.</li>
-<li>Can be used to switch the processor to user state (thread mode).</li>
-<li>Once in user state, trigger an interrupt and change the state to privileged in the exception handler (the only way).</li>
-<li>=0 In thread mode and privileged state.</li>
-<li>=1 In thread mode and user state.</li>
-</ul>
-</li>
-</ul>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">control</td><td>CONTROL register value to set</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>The processor can be in user state or privileged state when running in thread mode.</li>
-<li>Exception handlers always run in privileged state.</li>
-<li>On reset, the processor is in thread mode with privileged access rights.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#ga963cf236b73219ce78e965deb01b81a7">__get_CONTROL</a>; <a class="el" href="group__Core__Register__gr.html#ga48e5853f417e17a8a65080f6a605b743" title="Set the PSP register. ">__set_PSP</a>; <a class="el" href="group__Core__Register__gr.html#ga0bf9564ebc1613a8faba014275dac2a4" title="Set the MSP register. ">__set_MSP</a>; <a class="el" href="unionCONTROL__Type.html" title="Union type to access the Control Registers (CONTROL). ">CONTROL_Type</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gaa5587cc09031053a40a35c14ec36078a"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void __set_FAULTMASK </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>faultMask</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Set the FAULTMASK register [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
-<p>The function sets the Fault Mask register (FAULTMASK) value using the instruction <b>MSR</b>. <br/>
-<br/>
-FAULTMASK prevents activation of all exceptions except for Non-Maskable Interrupt (NMI). FAULTMASK can be used to escalate a configurable fault handler (BusFault, usage fault, or memory management fault) to hard fault level without invoking a hard fault. This allows the fault handler to pretend to be the hard fault handler, with the ability to:</p>
-<ol type="1">
-<li><b>Mask BusFault</b> by setting the BFHFNMIGN in the Configuration Control register. It can be used to test the bus system without causing a lockup.</li>
-<li><b>Bypass the MPU</b>, allowing accessing the MPU protected memory location without reprogramming the MPU to just carry out a few transfers for fixing faults.</li>
-</ol>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">faultMask</td><td>FAULTMASK register value to set</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>not for Cortex-M0, Cortex-M0+, or SC000.</li>
-<li>Is cleared automatically upon exiting the exception handler, except when returning from the NMI handler.</li>
-<li>When set, it changes the effective current priority level to -1, so that even the hard fault handler is blocked.</li>
-<li>Can be used by fault handlers to change their priority to -1 to have access to some features for hard fault exceptions (see above).</li>
-<li>When set, lockups can still be caused by incorrect or undefined instructions, or by using SVC in the wrong priority level.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#gaa78e4e6bf619a65e9f01b4af13fed3a8">__get_FAULTMASK</a>; <a class="el" href="group__Core__Register__gr.html#ga360c73eb7ffb16088556f9278953b882" title="Set the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000]. ">__set_BASEPRI</a>; <a class="el" href="group__Core__Register__gr.html#ga70b4e1a6c1c86eb913fb9d6e8400156f" title="Set the Priority Mask bit. ">__set_PRIMASK</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga6f26bd75ca7e3247f27b272acc10536b"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void __set_FPSCR </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>fpscr</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Set the FPSC register [only for Cortex-M4 and Cortex-M7]. </p>
-<p>The function sets the Floating-Point Status Control Register (FPSCR) value. <br/>
-<br/>
-FPSCR provides all necessary User level control of the floating-point system. <br/>
-</p>
-<ul>
-<li><b>N</b> (FPSC[31]) (Negative flag)<ul>
-<li>=1 The instruction result has a negative value (when interpreted as signed integer).</li>
-<li>=0 The instruction result has a positive value or equal zero. <br/>
-<br/>
-</li>
-</ul>
-</li>
-<li><b>Z</b> (FPSC[30]) (Zero flag)<ul>
-<li>=1 The instruction result is zero. Or, after a compare instruction, when the two values are the same. <br/>
-<br/>
-</li>
-</ul>
-</li>
-<li><b>C</b> (FPSC[29]) (Carry or borrow flag)<ul>
-<li>=1 For unsigned additions, if an unsigned overflow occurred.</li>
-<li>=<em>inverse of borrow output status</em> For unsigned subtract operations. <br/>
-<br/>
-</li>
-</ul>
-</li>
-<li><b>V</b> (FPSC[28]) (Overflow flag)<ul>
-<li>=1 A signed overflow occurred (for signed additions or subtractions). <br/>
-<br/>
-</li>
-</ul>
-</li>
-<li><b>AHP</b> (FPSC[26]) (Alternative half-precision flag)<ul>
-<li>=1 Alternative half-precision format selected.</li>
-<li>=0 IEEE half-precision format selected. <br/>
-<br/>
-</li>
-</ul>
-</li>
-<li><b>DN</b> (FPSC[25]) (Default NaN mode control flag)<ul>
-<li>=1 Any operation involving one or more NaNs returns the Default NaN.</li>
-<li>=0 NaN operands propagate through to the output of a floating-point operation. <br/>
-<br/>
-</li>
-</ul>
-</li>
-<li><b>FZ</b> (FPSC[24]) (Flush-to-zero mode control flag)<ul>
-<li>=1 Flush-to-zero mode enabled.</li>
-<li>=0 Flush-to-zero mode disabled. Behavior of the floating-point system is fully compliant with the IEEE 754 standard. <br/>
-<br/>
-</li>
-</ul>
-</li>
-<li><b>RMode</b> (FPSC[23:22]) (Rounding Mode control flags)<ul>
-<li>=0b00 Round to Nearest (RN) mode.</li>
-<li>=0b01 Round towards Plus Infinity (RP) mode.</li>
-<li>=0b10 Round towards Minus Infinity (RM) mode.</li>
-<li>=0b11 Round towards Zero (RZ) mode.</li>
-<li>The specified rounding mode is used by almost all floating-point instructions. <br/>
-<br/>
-</li>
-</ul>
-</li>
-<li><b>IDC</b> (FPSC[7]) (Input Denormal cumulative exception flags)<ul>
-<li>See Cumulative exception bits (FPSC[4:0]). <br/>
-<br/>
-</li>
-</ul>
-</li>
-<li><b>IXC</b> (FPSC[4]) (Inexact cumulative exception flag)<ul>
-<li>=1 Exception occurred.</li>
-<li>=0 Value has to be set explicitly.</li>
-<li>Flag is not cleared automatically. <br/>
-<br/>
-</li>
-</ul>
-</li>
-<li><b>UFC</b> (FPSC[3]) (Underflow cumulative exception flag)<ul>
-<li>=1 Exception occurred.</li>
-<li>=0 Value has to be set explicitly.</li>
-<li>Flag is not cleared automatically. <br/>
-<br/>
-</li>
-</ul>
-</li>
-<li><b>OFC</b> (FPSC[2]) (Overflow cumulative exception flag)<ul>
-<li>=1 Exception occurred.</li>
-<li>=0 Value has to be set explicitly.</li>
-<li>Flag is not cleared automatically. <br/>
-<br/>
-</li>
-</ul>
-</li>
-<li><b>DZC</b> (FPSC[1]) (Division by Zero cumulative exception flag)<ul>
-<li>=1 Exception occurred.</li>
-<li>=0 Value has to be set explicitly.</li>
-<li>Flag is not cleared automatically. <br/>
-<br/>
-</li>
-</ul>
-</li>
-<li><b>IOC</b> (FPSC[0]) (Invalid Operation cumulative exception flag)<ul>
-<li>=1 Exception occurred.</li>
-<li>=0 Value has to be set explicitly.</li>
-<li>Flag is not cleared automatically.</li>
-</ul>
-</li>
-</ul>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">fpscr</td><td>FPSCR value to set</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>Only for Cortex-M4 and Cortex-M7.</li>
-<li>The variable <b>__FPU_PRESENT</b> has to be set to 1.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#gad6d7eca9ddd1d9072dd7b020cfe64905">__get_FPSCR</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga0bf9564ebc1613a8faba014275dac2a4"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void __set_MSP </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>topOfMainStack</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Set the MSP register. </p>
-<p>The function sets the Main Stack Pointer (MSP) value using the instruction <b>MSR</b>. <br/>
-<br/>
-Physically two different stack pointers (SP) exist:</p>
-<ul>
-<li>The Main Stack Pointer (MSP) is the default stack pointer after reset. It is also used when running exception handlers (handler mode).</li>
-<li>The Process Stack Pointer (PSP), which can be used only in thread mode.</li>
-</ul>
-<p>Register R13 banks the SP. The SP selection is determined by the bit[1] of the CONTROL register:</p>
-<ul>
-<li>=0 MSP is the current stack pointer. This is also the default SP. The initial value is loaded from the first 32-bit word of the vector table from the program memory.</li>
-<li>=1 PSP is the current stack pointer. The initial value is undefined.</li>
-</ul>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">topOfMainStack</td><td>MSP value to set</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>Only one of the two SPs is visible at a time.</li>
-<li>For many applications, the system can completely rely on the MSP.</li>
-<li>The PSP is normally used in designs with an OS where the stack memory for OS Kernel must be separated from the application code.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#gab898559392ba027814e5bbb5a98b38d2">__get_MSP</a>; <a class="el" href="group__Core__Register__gr.html#ga48e5853f417e17a8a65080f6a605b743" title="Set the PSP register. ">__set_PSP</a>; <a class="el" href="group__Core__Register__gr.html#gac64d37e7ff9de06437f9fb94bbab8b6c" title="Set the CONTROL Register. ">__set_CONTROL</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga6809a07c5cb7410e361f3fba57f72172"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">__set_MSPLIM </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>MainStackPtrLimit</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Set Main Stack Pointer Limit Devices without Armv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence the write is silently ignored in non-secure mode. </p>
-<p>Assigns the given value to the Main Stack Pointer Limit (MSPLIM). </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">MainStackPtrLimit</td><td>Main Stack Pointer Limit value to set </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga70b4e1a6c1c86eb913fb9d6e8400156f"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void __set_PRIMASK </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>priMask</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Set the Priority Mask bit. </p>
-<p>The function sets the Priority Mask register (PRIMASK) value using the instruction <b>MSR</b>. <br/>
-<br/>
-PRIMASK is a 1-bit-wide interrupt mask register. When set, it blocks all interrupts apart from the non-maskable interrupt (NMI) and the hard fault exception. The PRIMASK prevents activation of all exceptions with configurable priority.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">priMask</td><td>Priority Mask<ul>
-<li>=0 no effect</li>
-<li>=1 prevents the activation of all exceptions with configurable priority</li>
-</ul>
-</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>When set, PRIMASK effectively changes the current priority level to 0. This is the highest programmable level.</li>
-<li>When set and a fault occurs, the hard fault handler will be executed.</li>
-<li>Useful for temporarily disabling all interrupts for timing critical tasks.</li>
-<li>Does not have the ability to mask BusFault or bypass MPU.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#ga799b5d9a2ae75e459264c8512c7c0e02">__get_PRIMASK</a>; <a class="el" href="group__Core__Register__gr.html#ga360c73eb7ffb16088556f9278953b882" title="Set the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000]. ">__set_BASEPRI</a>; <a class="el" href="group__Core__Register__gr.html#gaa5587cc09031053a40a35c14ec36078a" title="Set the FAULTMASK register [not for Cortex-M0, Cortex-M0+, or SC000]. ">__set_FAULTMASK</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga48e5853f417e17a8a65080f6a605b743"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void __set_PSP </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>topOfProcStack</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Set the PSP register. </p>
-<p>The function sets the Process Stack Pointer (PSP) value using the instruction <b>MSR</b>. <br/>
-<br/>
-Physically two different stack pointers (SP) exist:</p>
-<ul>
-<li>The Main Stack Pointer (MSP) is the default stack pointer after reset. It is also used when running exception handlers (handler mode).</li>
-<li>The Process Stack Pointer (PSP), which can be used only in thread mode.</li>
-</ul>
-<p>Register R13 banks the SP. The SP selection is determined by the bit[1] of the CONTROL register:</p>
-<ul>
-<li>=0 MSP is the current stack pointer. This is also the default SP. The initial value is loaded from the first 32-bit word of the vector table from the program memory.</li>
-<li>=1 PSP is the current stack pointer. The initial value is undefined.</li>
-</ul>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">topOfProcStack</td><td>PSP value to set</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>Only one of the two SPs is visible at a time.</li>
-<li>For many applications, the system can completely rely on the MSP.</li>
-<li>The PSP is normally used in designs with an OS where the stack memory for OS Kernel must be separated from the application code.</li>
-</ul>
-</dd></dl>
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-<p>Set Process Stack Pointer Limit Devices without Armv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence the write is silently ignored in non-secure mode. </p>
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-<p>Functions for the level-1 data cache.  
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-<div class="title">Debug Access</div>  </div>
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-
-<p>Debug Access to the Instrumented Trace Macrocell (ITM)  
-<a href="#details">More...</a></p>
-<table class="memberdecls">
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-Functions</h2></td></tr>
-<tr class="memitem:gaaa7c716331f74d644bf6bf25cd3392d1"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ITM__Debug__gr.html#gaaa7c716331f74d644bf6bf25cd3392d1">ITM_SendChar</a> (uint32_t ch)</td></tr>
-<tr class="memdesc:gaaa7c716331f74d644bf6bf25cd3392d1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Transmits a character via channel 0.  <a href="#gaaa7c716331f74d644bf6bf25cd3392d1">More...</a><br/></td></tr>
-<tr class="separator:gaaa7c716331f74d644bf6bf25cd3392d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga37b8f41cae703b5ff6947e271065558c"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ITM__Debug__gr.html#ga37b8f41cae703b5ff6947e271065558c">ITM_ReceiveChar</a> (void)</td></tr>
-<tr class="memdesc:ga37b8f41cae703b5ff6947e271065558c"><td class="mdescLeft">&#160;</td><td class="mdescRight">ITM Receive Character.  <a href="#ga37b8f41cae703b5ff6947e271065558c">More...</a><br/></td></tr>
-<tr class="separator:ga37b8f41cae703b5ff6947e271065558c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga7f9bbabd9756d1a7eafb2d9bf27e0535"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ITM__Debug__gr.html#ga7f9bbabd9756d1a7eafb2d9bf27e0535">ITM_CheckChar</a> (void)</td></tr>
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-<tr class="memitem:ga12e68e55a7badc271b948d6c7230b2a8"><td class="memItemLeft" align="right" valign="top">volatile int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__ITM__Debug__gr.html#ga12e68e55a7badc271b948d6c7230b2a8">ITM_RxBuffer</a></td></tr>
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-<tr class="separator:ga12e68e55a7badc271b948d6c7230b2a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<p>Debug Access to the Instrumented Trace Macrocell (ITM) </p>
-<p>CMSIS provides additional debug functions to enlarge the Debug Access. Data can be transmitted via a certain global buffer variable towards the target system.</p>
-<p>The Cortex-M3 / Cortex-M4 / Cortex-M7 incorporates the <b>Instrumented Trace Macrocell (ITM)</b> that provides together with the <b>Serial Wire Output (SWO)</b> trace capabilities for the microcontroller system. The ITM has 32 communication channels; two ITM communication channels are used by CMSIS to output the following information:</p>
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-<li><b>ITM Channel 0</b>: implements the <a class="el" href="group__ITM__Debug__gr.html#gaaa7c716331f74d644bf6bf25cd3392d1">ITM_SendChar</a> function which can be used for printf-style output via the debug interface.</li>
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-<p>A debugger may support a <b>Debug (printf) Viewer</b> window to display data.</p>
-<p><b>Direction: Microcontroller &ndash;&gt; Debugger:</b></p>
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-<hr/>
- <h1><a class="anchor" id="itm_debug_ex"></a>
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-<div class="fragment"><div class="line"><span class="comment">// check if debugger connected and ITM channel enabled for tracing</span></div>
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-<p>ITM Check Character. </p>
-<p>This function reads the external variable <a class="el" href="group__ITM__Debug__gr.html#ga12e68e55a7badc271b948d6c7230b2a8">ITM_RxBuffer</a> and checks whether a character is available or not.</p>
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-<p>Functions to access the Nested Vector Interrupt Controller (NVIC).  
-<a href="#details">More...</a></p>
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-Macros</h2></td></tr>
-<tr class="memitem:gadc48b4ed09386aab48fa6b9c96d9034c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NVIC__gr.html#gadc48b4ed09386aab48fa6b9c96d9034c">CMSIS_NVIC_VIRTUAL</a></td></tr>
-<tr class="memdesc:gadc48b4ed09386aab48fa6b9c96d9034c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Virtualization of the NVIC API.  <a href="#gadc48b4ed09386aab48fa6b9c96d9034c">More...</a><br/></td></tr>
-<tr class="separator:gadc48b4ed09386aab48fa6b9c96d9034c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad01d3aa220b50ef141b06c93888b268d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NVIC__gr.html#gad01d3aa220b50ef141b06c93888b268d">CMSIS_VECTAB_VIRTUAL</a></td></tr>
-<tr class="memdesc:gad01d3aa220b50ef141b06c93888b268d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Virtualization of interrupt vector table access functions.  <a href="#gad01d3aa220b50ef141b06c93888b268d">More...</a><br/></td></tr>
-<tr class="separator:gad01d3aa220b50ef141b06c93888b268d"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table><table class="memberdecls">
-<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="enum-members"></a>
-Enumerations</h2></td></tr>
-<tr class="memitem:ga7e1129cd8a196f4284d41db3e82ad5c8"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> { <br/>
-&#160;&#160;<a class="el" href="group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8ade177d9c70c89e084093024b932a4e30">NonMaskableInt_IRQn</a> = -14, 
-<br/>
-&#160;&#160;<a class="el" href="group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8ab1a222a34a32f0ef5ac65e714efc1f85">HardFault_IRQn</a> = -13, 
-<br/>
-&#160;&#160;<a class="el" href="group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a33ff1cf7098de65d61b6354fee6cd5aa">MemoryManagement_IRQn</a> = -12, 
-<br/>
-&#160;&#160;<a class="el" href="group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a8693500eff174f16119e96234fee73af">BusFault_IRQn</a> = -11, 
-<br/>
-&#160;&#160;<a class="el" href="group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6895237c9443601ac832efa635dd8bbf">UsageFault_IRQn</a> = -10, 
-<br/>
-&#160;&#160;<a class="el" href="group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a9cda5594d898247bfa9d16ad966724da">SecureFault_IRQn</a> = -9, 
-<br/>
-&#160;&#160;<a class="el" href="group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a4ce820b3cc6cf3a796b41aadc0cf1237">SVCall_IRQn</a> = -5, 
-<br/>
-&#160;&#160;<a class="el" href="group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a8e033fcef7aed98a31c60a7de206722c">DebugMonitor_IRQn</a> = -4, 
-<br/>
-&#160;&#160;<a class="el" href="group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a03c3cc89984928816d81793fc7bce4a2">PendSV_IRQn</a> = -2, 
-<br/>
-&#160;&#160;<a class="el" href="group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6dbff8f8543325f3474cbae2446776e7">SysTick_IRQn</a> = -1, 
-<br/>
-&#160;&#160;<a class="el" href="group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8aa62e040960b4beb6cba107e4703c12d2">WWDG_STM_IRQn</a> = 0, 
-<br/>
-&#160;&#160;<a class="el" href="group__NVIC__gr.html#gga7e1129cd8a196f4284d41db3e82ad5c8a853e0f318108110e0527f29733d11f86">PVD_STM_IRQn</a> = 1
-<br/>
- }</td></tr>
-<tr class="memdesc:ga7e1129cd8a196f4284d41db3e82ad5c8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Definition of IRQn numbers.  <a href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">More...</a><br/></td></tr>
-<tr class="separator:ga7e1129cd8a196f4284d41db3e82ad5c8"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table><table class="memberdecls">
-<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
-Functions</h2></td></tr>
-<tr class="memitem:gad78f447e891789b4d8f2e5b21eeda354"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NVIC__gr.html#gad78f447e891789b4d8f2e5b21eeda354">NVIC_SetPriorityGrouping</a> (uint32_t PriorityGroup)</td></tr>
-<tr class="memdesc:gad78f447e891789b4d8f2e5b21eeda354"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set priority grouping [not for Cortex-M0, Cortex-M0+, or SC000].  <a href="#gad78f447e891789b4d8f2e5b21eeda354">More...</a><br/></td></tr>
-<tr class="separator:gad78f447e891789b4d8f2e5b21eeda354"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaa81b19849367d3cdb95ac108c500fa78"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NVIC__gr.html#gaa81b19849367d3cdb95ac108c500fa78">NVIC_GetPriorityGrouping</a> (void)</td></tr>
-<tr class="memdesc:gaa81b19849367d3cdb95ac108c500fa78"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read the priority grouping [not for Cortex-M0, Cortex-M0+, or SC000].  <a href="#gaa81b19849367d3cdb95ac108c500fa78">More...</a><br/></td></tr>
-<tr class="separator:gaa81b19849367d3cdb95ac108c500fa78"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga530ad9fda2ed1c8b70e439ecfe80591f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NVIC__gr.html#ga530ad9fda2ed1c8b70e439ecfe80591f">NVIC_EnableIRQ</a> (<a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
-<tr class="memdesc:ga530ad9fda2ed1c8b70e439ecfe80591f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable a device specific interrupt.  <a href="#ga530ad9fda2ed1c8b70e439ecfe80591f">More...</a><br/></td></tr>
-<tr class="separator:ga530ad9fda2ed1c8b70e439ecfe80591f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga72f102d31af0ee4aa7a6fb7a180840f3"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NVIC__gr.html#ga72f102d31af0ee4aa7a6fb7a180840f3">NVIC_GetEnableIRQ</a> (<a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
-<tr class="memdesc:ga72f102d31af0ee4aa7a6fb7a180840f3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get a device specific interrupt enable status.  <a href="#ga72f102d31af0ee4aa7a6fb7a180840f3">More...</a><br/></td></tr>
-<tr class="separator:ga72f102d31af0ee4aa7a6fb7a180840f3"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga736ba13a76eb37ef6e2c253be8b0331c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NVIC__gr.html#ga736ba13a76eb37ef6e2c253be8b0331c">NVIC_DisableIRQ</a> (<a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
-<tr class="memdesc:ga736ba13a76eb37ef6e2c253be8b0331c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable a device specific interrupt.  <a href="#ga736ba13a76eb37ef6e2c253be8b0331c">More...</a><br/></td></tr>
-<tr class="separator:ga736ba13a76eb37ef6e2c253be8b0331c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga95a8329a680b051ecf3ee8f516acc662"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NVIC__gr.html#ga95a8329a680b051ecf3ee8f516acc662">NVIC_GetPendingIRQ</a> (<a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
-<tr class="memdesc:ga95a8329a680b051ecf3ee8f516acc662"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the pending device specific interrupt.  <a href="#ga95a8329a680b051ecf3ee8f516acc662">More...</a><br/></td></tr>
-<tr class="separator:ga95a8329a680b051ecf3ee8f516acc662"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga3b885147ef9965ecede49614de8df9d2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NVIC__gr.html#ga3b885147ef9965ecede49614de8df9d2">NVIC_SetPendingIRQ</a> (<a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
-<tr class="memdesc:ga3b885147ef9965ecede49614de8df9d2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set a device specific interrupt to pending.  <a href="#ga3b885147ef9965ecede49614de8df9d2">More...</a><br/></td></tr>
-<tr class="separator:ga3b885147ef9965ecede49614de8df9d2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga382ad6bedd6eecfdabd1b94dd128a01a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NVIC__gr.html#ga382ad6bedd6eecfdabd1b94dd128a01a">NVIC_ClearPendingIRQ</a> (<a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
-<tr class="memdesc:ga382ad6bedd6eecfdabd1b94dd128a01a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear a device specific interrupt from pending.  <a href="#ga382ad6bedd6eecfdabd1b94dd128a01a">More...</a><br/></td></tr>
-<tr class="separator:ga382ad6bedd6eecfdabd1b94dd128a01a"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gadf4252e600661fd762cfc0d1a9f5b892"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NVIC__gr.html#gadf4252e600661fd762cfc0d1a9f5b892">NVIC_GetActive</a> (<a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
-<tr class="memdesc:gadf4252e600661fd762cfc0d1a9f5b892"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the device specific interrupt active status [not for Cortex-M0, Cortex-M0+, or SC000].  <a href="#gadf4252e600661fd762cfc0d1a9f5b892">More...</a><br/></td></tr>
-<tr class="separator:gadf4252e600661fd762cfc0d1a9f5b892"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga5bb7f43ad92937c039dee3d36c3c2798"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NVIC__gr.html#ga5bb7f43ad92937c039dee3d36c3c2798">NVIC_SetPriority</a> (<a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn, uint32_t priority)</td></tr>
-<tr class="memdesc:ga5bb7f43ad92937c039dee3d36c3c2798"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set the priority for an interrupt.  <a href="#ga5bb7f43ad92937c039dee3d36c3c2798">More...</a><br/></td></tr>
-<tr class="separator:ga5bb7f43ad92937c039dee3d36c3c2798"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab18fb9f6c5f4c70fdd73047f0f7c8395"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NVIC__gr.html#gab18fb9f6c5f4c70fdd73047f0f7c8395">NVIC_GetPriority</a> (<a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
-<tr class="memdesc:gab18fb9f6c5f4c70fdd73047f0f7c8395"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get the priority of an interrupt.  <a href="#gab18fb9f6c5f4c70fdd73047f0f7c8395">More...</a><br/></td></tr>
-<tr class="separator:gab18fb9f6c5f4c70fdd73047f0f7c8395"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga0688c59605b119c53c71b2505ab23eb5"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NVIC__gr.html#ga0688c59605b119c53c71b2505ab23eb5">NVIC_EncodePriority</a> (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)</td></tr>
-<tr class="memdesc:ga0688c59605b119c53c71b2505ab23eb5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Encodes Priority [not for Cortex-M0, Cortex-M0+, or SC000].  <a href="#ga0688c59605b119c53c71b2505ab23eb5">More...</a><br/></td></tr>
-<tr class="separator:ga0688c59605b119c53c71b2505ab23eb5"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad3cbca1be7a4726afa9448a9acd89377"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NVIC__gr.html#gad3cbca1be7a4726afa9448a9acd89377">NVIC_DecodePriority</a> (uint32_t Priority, uint32_t PriorityGroup, uint32_t *pPreemptPriority, uint32_t *pSubPriority)</td></tr>
-<tr class="memdesc:gad3cbca1be7a4726afa9448a9acd89377"><td class="mdescLeft">&#160;</td><td class="mdescRight">Decode the interrupt priority [not for Cortex-M0, Cortex-M0+, or SC000].  <a href="#gad3cbca1be7a4726afa9448a9acd89377">More...</a><br/></td></tr>
-<tr class="separator:gad3cbca1be7a4726afa9448a9acd89377"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaebee9cad6724a5bac1857f0f1fb6d6af"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NVIC__gr.html#gaebee9cad6724a5bac1857f0f1fb6d6af">NVIC_GetVector</a> (<a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
-<tr class="memdesc:gaebee9cad6724a5bac1857f0f1fb6d6af"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read Interrupt Vector [not for Cortex-M0, SC000].  <a href="#gaebee9cad6724a5bac1857f0f1fb6d6af">More...</a><br/></td></tr>
-<tr class="separator:gaebee9cad6724a5bac1857f0f1fb6d6af"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab43c1c59d5c081f1bc725237f4b1f916"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NVIC__gr.html#gab43c1c59d5c081f1bc725237f4b1f916">NVIC_SetVector</a> (<a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn, uint32_t vector)</td></tr>
-<tr class="memdesc:gab43c1c59d5c081f1bc725237f4b1f916"><td class="mdescLeft">&#160;</td><td class="mdescRight">Modify Interrupt Vector [not for Cortex-M0, SC000].  <a href="#gab43c1c59d5c081f1bc725237f4b1f916">More...</a><br/></td></tr>
-<tr class="separator:gab43c1c59d5c081f1bc725237f4b1f916"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga1b47d17e90b6a03e7bd1ec6a0d549b46"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NVIC__gr.html#ga1b47d17e90b6a03e7bd1ec6a0d549b46">NVIC_SystemReset</a> (void)</td></tr>
-<tr class="memdesc:ga1b47d17e90b6a03e7bd1ec6a0d549b46"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reset the system.  <a href="#ga1b47d17e90b6a03e7bd1ec6a0d549b46">More...</a><br/></td></tr>
-<tr class="separator:ga1b47d17e90b6a03e7bd1ec6a0d549b46"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga62b37611e1ccbac47d747c98ef302746"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NVIC__gr.html#ga62b37611e1ccbac47d747c98ef302746">NVIC_GetTargetState</a> (<a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
-<tr class="memdesc:ga62b37611e1ccbac47d747c98ef302746"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Interrupt Target State.  <a href="#ga62b37611e1ccbac47d747c98ef302746">More...</a><br/></td></tr>
-<tr class="separator:ga62b37611e1ccbac47d747c98ef302746"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf46218d01a6a3b70666ad0492a7f950a"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NVIC__gr.html#gaf46218d01a6a3b70666ad0492a7f950a">NVIC_SetTargetState</a> (<a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
-<tr class="memdesc:gaf46218d01a6a3b70666ad0492a7f950a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Interrupt Target State.  <a href="#gaf46218d01a6a3b70666ad0492a7f950a">More...</a><br/></td></tr>
-<tr class="separator:gaf46218d01a6a3b70666ad0492a7f950a"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga44b31316872e91bda1af7e17173de24b"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__NVIC__gr.html#ga44b31316872e91bda1af7e17173de24b">NVIC_ClearTargetState</a> (<a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
-<tr class="memdesc:ga44b31316872e91bda1af7e17173de24b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear Interrupt Target State.  <a href="#ga44b31316872e91bda1af7e17173de24b">More...</a><br/></td></tr>
-<tr class="separator:ga44b31316872e91bda1af7e17173de24b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Functions to access the Nested Vector Interrupt Controller (NVIC). </p>
-<p>This section explains how to use interrupts and exceptions and access functions for the Nested Vector Interrupt Controller (NVIC).</p>
-<p>Arm provides a template file <b>startup_<em>device</em></b> for each supported compiler. The file must be adapted by the silicon vendor to include interrupt vectors for all device-specific interrupt handlers. Each interrupt handler is defined as a <b><em>weak</em></b> function to an dummy handler. These interrupt handlers can be used directly in application software without being adapted by the programmer.</p>
-<p>The table below lists the core exception vectors of the various Cortex-M processors.</p>
-<table  class="cmtable" summary="Core Exception Name">
-<tr>
-<th>Exception Vector </th><th>Handler Function </th><th>IRQn<br/>
-Value </th><th title="Cortex-M0/M0+
-and SC000
-      ">Armv6-M </th><th title="Cortex-M3/M4/M7
-and SC300
-      ">Armv7-M </th><th title="Cortex-M23">Armv8-M<br/>
-Baseline </th><th title="Cortex-M33/M35P">Armv8-M<br/>
-Mainline </th><th>Armv8.1-M<br/>
-Mainline </th><th>Description  </th></tr>
-<tr>
-<td><b>NonMaskableInt_IRQn</b> </td><td>NMI_Handler </td><td>-14 </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td>Non Maskable Interrupt  </td></tr>
-<tr>
-<td><b>HardFault_IRQn</b> </td><td>HardFault_Handler </td><td>-13 </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td>Hard Fault Interrupt  </td></tr>
-<tr>
-<td><b>MemoryManagement_IRQn</b> </td><td>MemManage_Handler </td><td>-12 </td><td>&#160; </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td>&#160; </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td>Memory Management Interrupt  </td></tr>
-<tr>
-<td><b>BusFault_IRQn</b> </td><td>BusFault_Handler </td><td>-11 </td><td>&#160; </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td>&#160; </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td>Bus Fault Interrupt  </td></tr>
-<tr>
-<td><b>UsageFault_IRQn</b> </td><td>UsageFault_Handler </td><td>-10 </td><td>&#160; </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td>&#160; </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td>Usage Fault Interrupt  </td></tr>
-<tr>
-<td><b>SecureFault_IRQn</b> </td><td>SecureFault_Handler </td><td>-9 </td><td>&#160; </td><td>&#160; </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td>Secure Fault Interrupt  </td></tr>
-<tr>
-<td><b>SVCall_IRQn</b> </td><td>SVC_Handler </td><td>-5 </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td>SVC Interrupt   </td></tr>
-<tr>
-<td><b>DebugMonitor_IRQn</b> </td><td>DebugMon_Handler </td><td>-4 </td><td>&#160; </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td>&#160; </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td>Debug Monitor Interrupt  </td></tr>
-<tr>
-<td><b>PendSV_IRQn</b> </td><td>PendSV_Handler </td><td>-2 </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td>Pend SV Interrupt  </td></tr>
-<tr>
-<td><b>SysTick_IRQn</b> </td><td>SysTick_Handler </td><td>-1 </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td><div class="image">
-<img src="check.png"  alt="available"/>
-</div>
- </td><td>System Tick Interrupt  </td></tr>
-</table>
-<h1>Vector Table </h1>
-<p>The Vector Table defines the entry addresses of the processor exceptions and the device specific interrupts. It is typically located at the beginning of the program memory, however <a class="el" href="using_VTOR_pg.html">Using Interrupt Vector Remap</a> it can be relocated to RAM. The symbol <b>__Vectors</b> is the address of the vector table in the startup code and the register <b>SCB-&gt;VTOR</b> holds the start address of the vector table.</p>
-<p>An Armv8-M implementation with TrustZone provides two vector tables:</p>
-<ul>
-<li>vector table for Secure handlers</li>
-<li>vector table for Non-Secure handlers</li>
-</ul>
-<p>Refer to <a class="el" href="using_TrustZone_pg.html#Model_TrustZone">Programmers Model with TrustZone</a> for more information.</p>
-<h2>Processor Exceptions </h2>
-<p>At the beginning of the vector table, the initial stack value and the exception vectors of the processor are defined. The vector table below shows the exception vectors of a Armv8-M Mainline processor. Other processor variants may have fewer vectors.</p>
-<div class="fragment"><div class="line">__Vectors       DCD     __initial_sp              ; Top of Stack initialization</div>
-<div class="line">                DCD     Reset_Handler             ; Reset Handler</div>
-<div class="line">                DCD     NMI_Handler               ; NMI Handler</div>
-<div class="line">                DCD     HardFault_Handler         ; Hard Fault Handler</div>
-<div class="line">                DCD     MemManage_Handler         ; MPU Fault Handler</div>
-<div class="line">                DCD     BusFault_Handler          ; Bus Fault Handler</div>
-<div class="line">                DCD     UsageFault_Handler        ; Usage Fault Handler</div>
-<div class="line">                DCD     SecureFault_Handler       ; Secure Fault Handler</div>
-<div class="line">                DCD     0                         ; Reserved</div>
-<div class="line">                DCD     0                         ; Reserved</div>
-<div class="line">                DCD     0                         ; Reserved</div>
-<div class="line">                DCD     SVC_Handler               ; SVC Handler</div>
-<div class="line">                DCD     DebugMon_Handler          ; Debug Monitor Handler</div>
-<div class="line">                DCD     0                         ; Reserved</div>
-<div class="line">                DCD     PendSV_Handler            ; PendSV Handler</div>
-<div class="line">                DCD     SysTick_Handler           ; SysTick Handler</div>
-</div><!-- fragment --><h2>Device Specific Vectors </h2>
-<p>Following the processor exception vectors, the vector table contains also the device specific interrupt vectors.</p>
-<div class="fragment"><div class="line">; device specific interrupts</div>
-<div class="line">                DCD     WWDG_IRQHandler           ; Window Watchdog</div>
-<div class="line">                DCD     PVD_IRQHandler            ; PVD through EXTI Line detect</div>
-<div class="line">                DCD     TAMPER_IRQHandler         ; Tamper</div>
-</div><!-- fragment --><p>All device specific interrupts should have a default interrupt handler function that can be overwritten in user code. Below is an example for this default handler function.</p>
-<div class="fragment"><div class="line">Default_Handler PROC</div>
-<div class="line">                EXPORT WWDG_IRQHandler   [WEAK]</div>
-<div class="line">                EXPORT PVD_IRQHandler    [WEAK]</div>
-<div class="line">                EXPORT TAMPER_IRQHandler [WEAK]</div>
-<div class="line">                :</div>
-<div class="line">                :</div>
-<div class="line">                WWDG_IRQHandler</div>
-<div class="line">                PVD_IRQHandler</div>
-<div class="line">                TAMPER_IRQHandler</div>
-<div class="line">                :</div>
-<div class="line">                :</div>
-<div class="line">                B .</div>
-<div class="line">                ENDP</div>
-</div><!-- fragment --><p>The user application may simply define an interrupt handler function by using the handler name as shown below.</p>
-<div class="fragment"><div class="line"><span class="keywordtype">void</span> WWDG_IRQHandler(<span class="keywordtype">void</span>)</div>
-<div class="line">{</div>
-<div class="line">  ...</div>
-<div class="line">}</div>
-</div><!-- fragment --><h1>NVIC Function Usage </h1>
-<p>The code below shows the usage of various CMSIS NVIC functions with an LPC1700 device.</p>
-<h2>Code Example 1 </h2>
-<div class="fragment"><div class="line"><span class="preprocessor">#include &quot;LPC17xx.h&quot;</span></div>
-<div class="line"> </div>
-<div class="line">uint32_t priorityGroup;                                     <span class="comment">/* Variables to store priority group and priority */</span></div>
-<div class="line">uint32_t priority;</div>
-<div class="line">uint32_t preemptPriority;</div>
-<div class="line">uint32_t subPriority;</div>
-<div class="line"> </div>
-<div class="line"><span class="keywordtype">int</span> main (<span class="keywordtype">void</span>)  {</div>
-<div class="line">  <a class="code" href="group__NVIC__gr.html#gad78f447e891789b4d8f2e5b21eeda354">NVIC_SetPriorityGrouping</a>(5);                              <span class="comment">/* Set priority group to 5:</span></div>
-<div class="line"><span class="comment">                                                               Bit[7..6] preempt priority Bits, </span></div>
-<div class="line"><span class="comment">                                                               Bit[5..3] subpriority Bits </span></div>
-<div class="line"><span class="comment">                                                               (valid for five priority bits) */</span></div>
-<div class="line">     </div>
-<div class="line">  priorityGroup =  <a class="code" href="group__NVIC__gr.html#gaa81b19849367d3cdb95ac108c500fa78">NVIC_GetPriorityGrouping</a>();              <span class="comment">/* Get used priority grouping */</span></div>
-<div class="line"> </div>
-<div class="line">  priority = <a class="code" href="group__NVIC__gr.html#ga0688c59605b119c53c71b2505ab23eb5">NVIC_EncodePriority</a>(priorityGroup, 1, 6);      <span class="comment">/* Encode priority with 6 for subpriority and 1 for preempt priority</span></div>
-<div class="line"><span class="comment">                                                               Note: priority depends on the used priority grouping */</span></div>
-<div class="line">  <a class="code" href="group__NVIC__gr.html#ga5bb7f43ad92937c039dee3d36c3c2798">NVIC_SetPriority</a>(UART0_IRQn, priority);                   <span class="comment">/* Set new priority */</span></div>
-<div class="line"> </div>
-<div class="line">  priority =  <a class="code" href="group__NVIC__gr.html#gab18fb9f6c5f4c70fdd73047f0f7c8395">NVIC_GetPriority</a>(UART0_IRQn);                 <span class="comment">/* Retrieve priority again */</span>    </div>
-<div class="line">  <a class="code" href="group__NVIC__gr.html#gad3cbca1be7a4726afa9448a9acd89377">NVIC_DecodePriority</a>(priority, priorityGroup, &amp;preemptPriority, &amp;subPriority);</div>
-<div class="line"> </div>
-<div class="line">  <span class="keywordflow">while</span>(1);</div>
-<div class="line">}</div>
-</div><!-- fragment --><h2>Code Example 2 </h2>
-<div class="fragment"><div class="line"><span class="preprocessor">#include &quot;LPC17xx.h&quot;</span></div>
-<div class="line"> </div>
-<div class="line">uint32_t active;                                            <span class="comment">/* Variable to store interrupt active state */</span></div>
-<div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> TIMER0_IRQHandler(<span class="keywordtype">void</span>)  {                             <span class="comment">/* Timer 0 interrupt handler  */</span></div>
-<div class="line"> </div>
-<div class="line">  <span class="keywordflow">if</span> (LPC_TIM0-&gt;IR &amp; (1 &lt;&lt; 0))  {                           <span class="comment">/* Check if interrupt for match channel 0 occurred */</span> </div>
-<div class="line">    LPC_TIM0-&gt;IR |= (1 &lt;&lt; 0);                               <span class="comment">/* Acknowledge interrupt for match channel 0 occurred */</span></div>
-<div class="line">  }</div>
-<div class="line">  active = <a class="code" href="group__NVIC__gr.html#gadf4252e600661fd762cfc0d1a9f5b892">NVIC_GetActive</a>(TIMER0_IRQn);                     <span class="comment">/* Get interrupt active state of timer 0 */</span></div>
-<div class="line">}</div>
-<div class="line"> </div>
-<div class="line"><span class="keywordtype">int</span> main (<span class="keywordtype">void</span>) {</div>
-<div class="line">                                                            <span class="comment">/* Set match channel register MR0 to 1 millisecond */</span></div>
-<div class="line">  LPC_TIM0-&gt;MR0 = (((<a class="code" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6">SystemCoreClock</a> / 1000) / 4) - 1);     <span class="comment">/* 1 ms? */</span></div>
-<div class="line">   </div>
-<div class="line">  LPC_TIM0-&gt;MCR = (3 &lt;&lt; 0);                                 <span class="comment">/* Enable interrupt and reset for match channel MR0 */</span></div>
-<div class="line">  <a class="code" href="group__NVIC__gr.html#ga530ad9fda2ed1c8b70e439ecfe80591f">NVIC_EnableIRQ</a>(TIMER0_IRQn);                              <span class="comment">/* Enable NVIC interrupt for timer 0 */</span></div>
-<div class="line">  LPC_TIM0-&gt;TCR = (1 &lt;&lt; 0);                                 <span class="comment">/* Enable timer 0 */</span></div>
-<div class="line"> </div>
-<div class="line">  <span class="keywordflow">while</span>(1);</div>
-<div class="line">}</div>
-</div><!-- fragment --><h1>NVIC API Virtualization </h1>
-<p>The CMSIS-Core has provisions for overriding NVIC APIs as required for implementing secure systems that control access to peripherals and related interrupts. These overrides allow an operating system to control the access privileges of application code to critical interrupts.</p>
-<p>The NVIC function virtualization is enabled with the following #define symbols:</p>
-<ul>
-<li><a class="el" href="group__NVIC__gr.html#gadc48b4ed09386aab48fa6b9c96d9034c">CMSIS_NVIC_VIRTUAL</a> enables overriding the CMSIS-Core (Cortex-M) NVIC functions.</li>
-<li><a class="el" href="group__NVIC__gr.html#gad01d3aa220b50ef141b06c93888b268d">CMSIS_VECTAB_VIRTUAL</a> enables overriding the CMSIS-Core (Cortex-M) interrupt vector table access functions. </li>
-</ul>
-<h2 class="groupheader">Macro Definition Documentation</h2>
-<a class="anchor" id="gadc48b4ed09386aab48fa6b9c96d9034c"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define CMSIS_NVIC_VIRTUAL</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Virtualization of the NVIC API. </p>
-<p>When <a class="el" href="group__NVIC__gr.html#gadc48b4ed09386aab48fa6b9c96d9034c">CMSIS_NVIC_VIRTUAL</a> is defined, the NVIC access functions in the table below must be implemented for virtualizing NVIC access. These functions should be implemented in a separate source module. The original CMSIS-Core __NVIC functions are always available independent of <a class="el" href="group__NVIC__gr.html#gadc48b4ed09386aab48fa6b9c96d9034c">CMSIS_NVIC_VIRTUAL</a>.</p>
-<table class="doxtable">
-<tr>
-<th>NVIC Access Functions </th><th>CMSIS-Core Functions  </th></tr>
-<tr>
-<td>NVIC_EnableIRQ </td><td>__NVIC_EnableIRQ </td></tr>
-<tr>
-<td>NVIC_GetEnableIRQ </td><td>__NVIC_GetEnableIRQ </td></tr>
-<tr>
-<td>NVIC_DisableIRQ </td><td>__NVIC_DisableIRQ </td></tr>
-<tr>
-<td>NVIC_GetPendingIRQ </td><td>__NVIC_GetPendingIRQ </td></tr>
-<tr>
-<td>NVIC_SetPendingIRQ </td><td>__NVIC_SetPendingIRQ </td></tr>
-<tr>
-<td>NVIC_ClearPendingIRQ </td><td>__NVIC_ClearPendingIRQ </td></tr>
-<tr>
-<td>NVIC_GetActive </td><td>__NVIC_GetActive </td></tr>
-<tr>
-<td>NVIC_SetPriority </td><td>__NVIC_SetPriority </td></tr>
-<tr>
-<td>NVIC_GetPriority </td><td>__NVIC_GetPriority </td></tr>
-<tr>
-<td>NVIC_SetPriorityGrouping </td><td>__NVIC_SetPriorityGrouping </td></tr>
-<tr>
-<td>NVIC_GetPriorityGrouping </td><td>__NVIC_GetPriorityGrouping </td></tr>
-</table>
-
-</div>
-</div>
-<a class="anchor" id="gad01d3aa220b50ef141b06c93888b268d"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define CMSIS_VECTAB_VIRTUAL</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Virtualization of interrupt vector table access functions. </p>
-<p>When <a class="el" href="group__NVIC__gr.html#gadc48b4ed09386aab48fa6b9c96d9034c">CMSIS_NVIC_VIRTUAL</a> is defined, the functions in the table below must be replaced to virtualize the API access functions to the interrupt vector table. The NVIC vector table API should be implemented in a separate source module. This allows, for example, alternate implementations to relocate the vector table from flash to RAM on the first vector table update.</p>
-<p>The original CMSIS-Core functions are always available, but prefixed with __NVIC.</p>
-<table class="doxtable">
-<tr>
-<th>Interrupt Vector Table Access </th><th>CMSIS-Core Functions  </th></tr>
-<tr>
-<td>NVIC_GetVector </td><td>__NVIC_GetVector </td></tr>
-<tr>
-<td>NVIC_SetVector </td><td>__NVIC_SetVector </td></tr>
-</table>
-
-</div>
-</div>
-<h2 class="groupheader">Enumeration Type Documentation</h2>
-<a class="anchor" id="ga7e1129cd8a196f4284d41db3e82ad5c8"></a>
-<div class="memitem">
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-        <tr>
-          <td class="memname">enum <a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Definition of IRQn numbers. </p>
-<p>The core exception enumeration names for IRQn values are defined in the <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a>.</p>
-<ul>
-<li>Negative IRQn values represent processor core exceptions (internal interrupts).</li>
-<li>Positive IRQn values represent device-specific exceptions (external interrupts).</li>
-<li>The first device-specific interrupt has the IRQn value 0.</li>
-</ul>
-<p>The table below describes the core exception names and their availability in various Cortex-M cores. </p>
-<table class="fieldtable">
-<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8ade177d9c70c89e084093024b932a4e30"></a>NonMaskableInt_IRQn</em>&#160;</td><td class="fielddoc">
-<p>Exception 2: Non Maskable Interrupt. </p>
-</td></tr>
-<tr><td class="fieldname"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8ab1a222a34a32f0ef5ac65e714efc1f85"></a>HardFault_IRQn</em>&#160;</td><td class="fielddoc">
-<p>Exception 3: Hard Fault Interrupt. </p>
-</td></tr>
-<tr><td class="fieldname"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8a33ff1cf7098de65d61b6354fee6cd5aa"></a>MemoryManagement_IRQn</em>&#160;</td><td class="fielddoc">
-<p>Exception 4: Memory Management Interrupt [not on Cortex-M0 variants]. </p>
-</td></tr>
-<tr><td class="fieldname"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8a8693500eff174f16119e96234fee73af"></a>BusFault_IRQn</em>&#160;</td><td class="fielddoc">
-<p>Exception 5: Bus Fault Interrupt [not on Cortex-M0 variants]. </p>
-</td></tr>
-<tr><td class="fieldname"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8a6895237c9443601ac832efa635dd8bbf"></a>UsageFault_IRQn</em>&#160;</td><td class="fielddoc">
-<p>Exception 6: Usage Fault Interrupt [not on Cortex-M0 variants]. </p>
-</td></tr>
-<tr><td class="fieldname"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8a9cda5594d898247bfa9d16ad966724da"></a>SecureFault_IRQn</em>&#160;</td><td class="fielddoc">
-<p>Exception 7: Secure Fault Interrupt [only on Armv8-M]. </p>
-</td></tr>
-<tr><td class="fieldname"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8a4ce820b3cc6cf3a796b41aadc0cf1237"></a>SVCall_IRQn</em>&#160;</td><td class="fielddoc">
-<p>Exception 11: SVC Interrupt. </p>
-</td></tr>
-<tr><td class="fieldname"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8a8e033fcef7aed98a31c60a7de206722c"></a>DebugMonitor_IRQn</em>&#160;</td><td class="fielddoc">
-<p>Exception 12: Debug Monitor Interrupt [not on Cortex-M0 variants]. </p>
-</td></tr>
-<tr><td class="fieldname"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8a03c3cc89984928816d81793fc7bce4a2"></a>PendSV_IRQn</em>&#160;</td><td class="fielddoc">
-<p>Exception 14: Pend SV Interrupt [not on Cortex-M0 variants]. </p>
-</td></tr>
-<tr><td class="fieldname"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8a6dbff8f8543325f3474cbae2446776e7"></a>SysTick_IRQn</em>&#160;</td><td class="fielddoc">
-<p>Exception 15: System Tick Interrupt. </p>
-</td></tr>
-<tr><td class="fieldname"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8aa62e040960b4beb6cba107e4703c12d2"></a>WWDG_STM_IRQn</em>&#160;</td><td class="fielddoc">
-<p>Device Interrupt 0: Window WatchDog Interrupt. </p>
-</td></tr>
-<tr><td class="fieldname"><em><a class="anchor" id="gga7e1129cd8a196f4284d41db3e82ad5c8a853e0f318108110e0527f29733d11f86"></a>PVD_STM_IRQn</em>&#160;</td><td class="fielddoc">
-<p>Device Interrupt 1: PVD through EXTI Line detection Interrupt. </p>
-</td></tr>
-</table>
-
-</div>
-</div>
-<h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga382ad6bedd6eecfdabd1b94dd128a01a"></a>
-<div class="memitem">
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-      <table class="memname">
-        <tr>
-          <td class="memname">void NVIC_ClearPendingIRQ </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
-          <td class="paramname"><em>IRQn</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Clear a device specific interrupt from pending. </p>
-<p>This function removes the pending state of the specified device specific interrupt <em>IRQn</em>. <em>IRQn</em> cannot be a negative number.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt number</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>IRQn must not be negative.</li>
-<li>The registers that control the status of interrupts are called SETPEND and CLRPEND.</li>
-<li>An interrupt can have the status pending though it is not active.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#ga3b885147ef9965ecede49614de8df9d2">NVIC_SetPendingIRQ</a>; <a class="el" href="group__NVIC__gr.html#ga95a8329a680b051ecf3ee8f516acc662" title="Get the pending device specific interrupt. ">NVIC_GetPendingIRQ</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga44b31316872e91bda1af7e17173de24b"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t NVIC_ClearTargetState </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
-          <td class="paramname"><em>IRQn</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Clear Interrupt Target State. </p>
-<p>Clears the interrupt target field in the non-secure NVIC when in secure state. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>External interrupt number. Value cannot be negative. </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>0 if interrupt is assigned to Secure</li>
-<li>1 if interrupt is assigned to Non Secure </li>
-</ul>
-</dd></dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>Only available for Armv8-M in secure state.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#ga62b37611e1ccbac47d747c98ef302746">NVIC_GetTargetState</a>; <a class="el" href="group__NVIC__gr.html#gaf46218d01a6a3b70666ad0492a7f950a" title="Set Interrupt Target State. ">NVIC_SetTargetState</a>; </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gad3cbca1be7a4726afa9448a9acd89377"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void NVIC_DecodePriority </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>Priority</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>PriorityGroup</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t *&#160;</td>
-          <td class="paramname"><em>pPreemptPriority</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t *&#160;</td>
-          <td class="paramname"><em>pSubPriority</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Decode the interrupt priority [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
-<p>This function decodes an interrupt priority value with the priority group <em>PriorityGroup</em> to preemptive priority value <em>pPreemptPriority</em> and subpriority value <em>pSubPriority</em>. In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">Priority</td><td>Priority </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">PriorityGroup</td><td>Priority group </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pPreemptPriority</td><td>Preemptive priority value (starting from 0) </td></tr>
-    <tr><td class="paramdir">[out]</td><td class="paramname">*pSubPriority</td><td>Subpriority value (starting from 0)</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>not for Cortex-M0, Cortex-M0+, or SC000.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#ga0688c59605b119c53c71b2505ab23eb5">NVIC_EncodePriority</a>; <a class="el" href="group__NVIC__gr.html#gab18fb9f6c5f4c70fdd73047f0f7c8395" title="Get the priority of an interrupt. ">NVIC_GetPriority</a>; <a class="el" href="group__NVIC__gr.html#gaa81b19849367d3cdb95ac108c500fa78" title="Read the priority grouping [not for Cortex-M0, Cortex-M0+, or SC000]. ">NVIC_GetPriorityGrouping</a>;</li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga736ba13a76eb37ef6e2c253be8b0331c"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void NVIC_DisableIRQ </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
-          <td class="paramname"><em>IRQn</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Disable a device specific interrupt. </p>
-<p>This function disables the specified device specific interrupt <em>IRQn</em>. <em>IRQn</em> cannot be a negative value.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Number of the external interrupt to disable</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>IRQn must not be negative.</li>
-<li>The registers that control the enabling and disabling of interrupts are called SETENA and CLRENA.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#ga530ad9fda2ed1c8b70e439ecfe80591f">NVIC_EnableIRQ</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga530ad9fda2ed1c8b70e439ecfe80591f"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void NVIC_EnableIRQ </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
-          <td class="paramname"><em>IRQn</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Enable a device specific interrupt. </p>
-<p>This function enables the specified device specific interrupt <em>IRQn</em>. <em>IRQn</em> cannot be a negative value.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt number</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>IRQn must not be negative.</li>
-<li>The registers that control the enabling and disabling of interrupts are called SETENA and CLRENA.</li>
-<li>The number of supported interrupts depends on the implementation of the chip designer and can be read form the Interrupt Controller Type Register (ICTR) in granularities of 32: <br/>
- ICTR[4:0]<ul>
-<li>0 - 32 interrupts supported</li>
-<li>1 - 64 interrupts supported</li>
-<li>...</li>
-</ul>
-</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#ga736ba13a76eb37ef6e2c253be8b0331c">NVIC_DisableIRQ</a>; <a class="el" href="structSCnSCB__Type.html" title="Structure type to access the System Control and ID Register not in the SCB. ">SCnSCB_Type</a>;</li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga0688c59605b119c53c71b2505ab23eb5"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t NVIC_EncodePriority </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>PriorityGroup</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>PreemptPriority</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>SubPriority</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Encodes Priority [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
-<p>This function encodes the priority for an interrupt with the priority group <em>PriorityGroup</em>, preemptive priority value <em>PreemptPriority</em>, and subpriority value <em>SubPriority</em>. In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS) the smallest possible priority group is set.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">PriorityGroup</td><td>Priority group </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">PreemptPriority</td><td>Preemptive priority value (starting from 0) </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">SubPriority</td><td>Subpriority value (starting from 0)</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>Encoded priority for the interrupt</dd></dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>not for Cortex-M0, Cortex-M0+, or SC000.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#gad3cbca1be7a4726afa9448a9acd89377">NVIC_DecodePriority</a>; <a class="el" href="group__NVIC__gr.html#ga5bb7f43ad92937c039dee3d36c3c2798" title="Set the priority for an interrupt. ">NVIC_SetPriority</a>;</li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gadf4252e600661fd762cfc0d1a9f5b892"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t NVIC_GetActive </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
-          <td class="paramname"><em>IRQn</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Get the device specific interrupt active status [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
-<p>This function reads the Interrupt Active Register (NVIC_IABR0-NVIC_IABR7) in NVIC and returns the active bit of the interrupt <em>IRQn</em>.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt number</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>0 Interrupt is not active</li>
-<li>1 Interrupt is active, or active and pending</li>
-</ul>
-</dd></dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>not for Cortex-M0, Cortex-M0+, or SC000.</li>
-<li>IRQn must not be negative.</li>
-<li>Each external interrupt has an active status bit. When the processor starts the interrupt handler the bit is set to 1 and cleared when the interrupt return is executed.</li>
-<li>When an ISR is preempted and the processor executes another interrupt handler, the previous interrupt is still defined as active.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga72f102d31af0ee4aa7a6fb7a180840f3"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t NVIC_GetEnableIRQ </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
-          <td class="paramname"><em>IRQn</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Get a device specific interrupt enable status. </p>
-<p>This function returns the interrupt enable status for the specified device specific interrupt <em>IRQn</em>. <em>IRQn</em> cannot be a negative value.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt number</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>0 Interrupt is not enabled</li>
-<li>1 Interrupt is enabled</li>
-</ul>
-</dd></dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>IRQn must not be negative.</li>
-<li>The registers that control the enabling and disabling of interrupts are called SETENA and CLRENA.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#ga530ad9fda2ed1c8b70e439ecfe80591f">NVIC_EnableIRQ</a>; <a class="el" href="group__NVIC__gr.html#ga736ba13a76eb37ef6e2c253be8b0331c" title="Disable a device specific interrupt. ">NVIC_DisableIRQ</a>;</li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga95a8329a680b051ecf3ee8f516acc662"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t NVIC_GetPendingIRQ </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
-          <td class="paramname"><em>IRQn</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
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-
-<p>Get the pending device specific interrupt. </p>
-<p>This function returns the pending status of the specified device specific interrupt <em>IRQn</em>.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt number</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>0 Interrupt is not pending</li>
-<li>1 Interrupt is pending</li>
-</ul>
-</dd></dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>IRQn must not be negative.</li>
-<li>The registers that control the status of interrupts are called SETPEND and CLRPEND.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#ga3b885147ef9965ecede49614de8df9d2">NVIC_SetPendingIRQ</a>; <a class="el" href="group__NVIC__gr.html#ga382ad6bedd6eecfdabd1b94dd128a01a" title="Clear a device specific interrupt from pending. ">NVIC_ClearPendingIRQ</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gab18fb9f6c5f4c70fdd73047f0f7c8395"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t NVIC_GetPriority </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
-          <td class="paramname"><em>IRQn</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Get the priority of an interrupt. </p>
-<p>This function reads the priority for the specified interrupt <em>IRQn</em>. <em>IRQn</em> can can specify any device specific interrupt, or processor exception.</p>
-<p>The returned priority value is automatically aligned to the implemented priority bits of the microcontroller.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt number</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>Interrupt priority</dd></dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>Each external interrupt has an associated priority-level register.</li>
-<li>Unimplemented bits are read as zero.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#ga5bb7f43ad92937c039dee3d36c3c2798">NVIC_SetPriority</a>; <a class="el" href="group__NVIC__gr.html#gaa81b19849367d3cdb95ac108c500fa78" title="Read the priority grouping [not for Cortex-M0, Cortex-M0+, or SC000]. ">NVIC_GetPriorityGrouping</a>; <a class="el" href="group__Core__Register__gr.html#ga32da759f46e52c95bcfbde5012260667" title="Read the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000]. ">__get_BASEPRI</a>;</li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gaa81b19849367d3cdb95ac108c500fa78"></a>
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-        <tr>
-          <td class="memname">uint32_t NVIC_GetPriorityGrouping </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Read the priority grouping [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
-<p>This function returns the priority grouping (flag PRIGROUP in AIRCR[10:8]).</p>
-<dl class="section return"><dt>Returns</dt><dd>Priority grouping field</dd></dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>not for Cortex-M0, Cortex-M0+, or SC000.</li>
-<li>By default, priority group setting is zero.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#gad78f447e891789b4d8f2e5b21eeda354">NVIC_SetPriorityGrouping</a>; <a class="el" href="group__NVIC__gr.html#gab18fb9f6c5f4c70fdd73047f0f7c8395" title="Get the priority of an interrupt. ">NVIC_GetPriority</a>; <a class="el" href="structSCB__Type.html" title="Structure type to access the System Control Block (SCB). ">SCB_Type</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga62b37611e1ccbac47d747c98ef302746"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t NVIC_GetTargetState </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
-          <td class="paramname"><em>IRQn</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Get Interrupt Target State. </p>
-<p>Reads the interrupt target field from the non-secure NVIC when in secure state. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>External interrupt number. Value cannot be negative. </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>0 if interrupt is assigned to Secure</li>
-<li>1 if interrupt is assigned to Non Secure </li>
-</ul>
-</dd></dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>Only available for Armv8-M in secure state.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#ga44b31316872e91bda1af7e17173de24b">NVIC_ClearTargetState</a>; <a class="el" href="group__NVIC__gr.html#gaf46218d01a6a3b70666ad0492a7f950a" title="Set Interrupt Target State. ">NVIC_SetTargetState</a>; </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gaebee9cad6724a5bac1857f0f1fb6d6af"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t NVIC_GetVector </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
-          <td class="paramname"><em>IRQn</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Read Interrupt Vector [not for Cortex-M0, SC000]. </p>
-<p>This function allows to read the address of an interrupt handler function.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt number</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>Address of interrupt handler function</dd></dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>For using this function with Cortex-M0+ processor based devices, the SBC-&gt;VTOR register must be implemented.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#gab43c1c59d5c081f1bc725237f4b1f916">NVIC_SetVector</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga3b885147ef9965ecede49614de8df9d2"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void NVIC_SetPendingIRQ </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
-          <td class="paramname"><em>IRQn</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Set a device specific interrupt to pending. </p>
-<p>This function sets the pending bit for the specified device specific interrupt <em>IRQn</em>. <em>IRQn</em> cannot be a negative value.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt number</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>IRQn must not be negative.</li>
-<li>The registers that control the status of interrupts are called SETPEND and CLRPEND.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#ga95a8329a680b051ecf3ee8f516acc662">NVIC_GetPendingIRQ</a>; <a class="el" href="group__NVIC__gr.html#ga382ad6bedd6eecfdabd1b94dd128a01a" title="Clear a device specific interrupt from pending. ">NVIC_ClearPendingIRQ</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga5bb7f43ad92937c039dee3d36c3c2798"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void NVIC_SetPriority </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
-          <td class="paramname"><em>IRQn</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>priority</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Set the priority for an interrupt. </p>
-<p>Sets the priority for the interrupt specified by <em>IRQn</em>.<em>IRQn</em> can can specify any device specific interrupt, or processor exception. The <em>priority</em> specifies the interrupt priority value, whereby lower values indicate a higher priority. The default priority is 0 for every interrupt. This is the highest possible priority.</p>
-<p>The priority cannot be set for every core interrupt. HardFault and NMI have a fixed (negative) priority that is higher than any configurable exception or interrupt.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt Number </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">priority</td><td>Priority to set</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>The number of priority levels is configurable and depends on the implementation of the chip designer. To determine the number of bits implemented for interrupt priority-level registers, write <em>0xFF</em> to one of the priority-level register, then read back the value. For example, if the minimum number of 3 bits have been implemented, the read-back value is <em>0xE0</em>.</li>
-<li>Writes to unimplemented bits are ignored.</li>
-<li><b>For Cortex-M0</b>:<ul>
-<li>Dynamic switching of interrupt priority levels is not supported. The priority level of an interrupt should not be changed after it has been enabled.</li>
-<li>Supports 0 to 192 priority levels.</li>
-<li>Priority-level registers are 2 bit wide, occupying the two MSBs. Each Interrupt Priority Level Register is 1-byte wide.</li>
-</ul>
-</li>
-<li><b>For Cortex-M3, Cortex-M4, and Cortex-M7</b>:<ul>
-<li>Dynamic switching of interrupt priority levels is supported.</li>
-<li>Supports 0 to 255 priority levels.</li>
-<li>Priority-level registers have a maximum width of 8 bits and a minimum of 3 bits. Each register can be further divided into preempt priority level and subpriority level.</li>
-</ul>
-</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#gab18fb9f6c5f4c70fdd73047f0f7c8395">NVIC_GetPriority</a>; <a class="el" href="group__NVIC__gr.html#gad78f447e891789b4d8f2e5b21eeda354" title="Set priority grouping [not for Cortex-M0, Cortex-M0+, or SC000]. ">NVIC_SetPriorityGrouping</a>; <a class="el" href="group__Core__Register__gr.html#ga360c73eb7ffb16088556f9278953b882" title="Set the BASEPRI register [not for Cortex-M0, Cortex-M0+, or SC000]. ">__set_BASEPRI</a>;</li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gad78f447e891789b4d8f2e5b21eeda354"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void NVIC_SetPriorityGrouping </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>PriorityGroup</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Set priority grouping [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
-<p>The function sets the priority grouping <em>PriorityGroup</em> using the required unlock sequence. <em>PriorityGroup</em> is assigned to the field PRIGROUP (register AIRCR[10:8]). This field determines the split of group priority from subpriority. Only values from 0..7 are used. In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">PriorityGroup</td><td>Priority group</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>not for Cortex-M0, Cortex-M0+, or SC000.</li>
-<li>By default, priority group setting is zero.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#gaa81b19849367d3cdb95ac108c500fa78">NVIC_GetPriorityGrouping</a>; <a class="el" href="group__NVIC__gr.html#ga5bb7f43ad92937c039dee3d36c3c2798" title="Set the priority for an interrupt. ">NVIC_SetPriority</a>; <a class="el" href="structSCB__Type.html" title="Structure type to access the System Control Block (SCB). ">SCB_Type</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gaf46218d01a6a3b70666ad0492a7f950a"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t NVIC_SetTargetState </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
-          <td class="paramname"><em>IRQn</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Set Interrupt Target State. </p>
-<p>Sets the interrupt target field in the non-secure NVIC when in secure state. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>External interrupt number. Value cannot be negative. </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>0 if interrupt is assigned to Secure</li>
-<li>1 if interrupt is assigned to Non Secure </li>
-</ul>
-</dd></dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>Only available for Armv8-M in secure state.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#ga44b31316872e91bda1af7e17173de24b">NVIC_ClearTargetState</a>; <a class="el" href="group__NVIC__gr.html#ga62b37611e1ccbac47d747c98ef302746" title="Get Interrupt Target State. ">NVIC_GetTargetState</a>; </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gab43c1c59d5c081f1bc725237f4b1f916"></a>
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-        <tr>
-          <td class="memname">void NVIC_SetVector </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
-          <td class="paramname"><em>IRQn</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
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-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Modify Interrupt Vector [not for Cortex-M0, SC000]. </p>
-<p>This function allows to change the address of an interrupt handler function.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt number </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">vector</td><td>Address of new interrupt handler function</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>Usage of this function requires vector relocation to RAM. Refer to <a class="el" href="using_VTOR_pg.html">Using Interrupt Vector Remap</a> for more information.<ul>
-<li>For using this function with Cortex-M0+ processor based devices, the SBC-&gt;VTOR register must be implemented.</li>
-</ul>
-</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#gaebee9cad6724a5bac1857f0f1fb6d6af">NVIC_GetVector</a></li>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
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-<a class="anchor" id="ga1b47d17e90b6a03e7bd1ec6a0d549b46"></a>
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-          <td class="memname">void NVIC_SystemReset </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
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-          <td></td>
-        </tr>
-      </table>
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-
-<p>Reset the system. </p>
-<p>This function requests a system reset by setting the SYSRESETREQ flag in the AIRCR register.</p>
-<dl class="section remark"><dt>Remarks</dt><dd><ul>
-<li>In most microcontroller designs, setting the SYSRESETREQ flag resets the processor and most parts of the system, but should not affect the debug system.</li>
-</ul>
-</dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> </li>
-</ul>
-</dd></dl>
-
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-<p>Initialize and start the SysTick timer.  
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-<tr class="separator:gadb9cd73446f7e11e92383cd327a23407"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga254322c344d954c9f829719a50a88e87"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#ga254322c344d954c9f829719a50a88e87">__UNALIGNED_UINT32_READ</a></td></tr>
-<tr class="memdesc:ga254322c344d954c9f829719a50a88e87"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer for unaligned read of a uint32_t variable.  <a href="#ga254322c344d954c9f829719a50a88e87">More...</a><br/></td></tr>
-<tr class="separator:ga254322c344d954c9f829719a50a88e87"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gabb2180285c417aa9120a360c51f64b4b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#gabb2180285c417aa9120a360c51f64b4b">__UNALIGNED_UINT32_WRITE</a></td></tr>
-<tr class="memdesc:gabb2180285c417aa9120a360c51f64b4b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Pointer for unaligned write of a uint32_t variable.  <a href="#gabb2180285c417aa9120a360c51f64b4b">More...</a><br/></td></tr>
-<tr class="separator:gabb2180285c417aa9120a360c51f64b4b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga0c58caa5a273e2c21924509a45f8b849"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#ga0c58caa5a273e2c21924509a45f8b849">__ALIGNED</a></td></tr>
-<tr class="memdesc:ga0c58caa5a273e2c21924509a45f8b849"><td class="mdescLeft">&#160;</td><td class="mdescRight">Minimum alignment for a variable.  <a href="#ga0c58caa5a273e2c21924509a45f8b849">More...</a><br/></td></tr>
-<tr class="separator:ga0c58caa5a273e2c21924509a45f8b849"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga6f053389e2958b5a239a54d4e4047bf5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#ga6f053389e2958b5a239a54d4e4047bf5">__COMPILER_BARRIER</a></td></tr>
-<tr class="memdesc:ga6f053389e2958b5a239a54d4e4047bf5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Barrier to prevent compiler from reordering instructions.  <a href="#ga6f053389e2958b5a239a54d4e4047bf5">More...</a><br/></td></tr>
-<tr class="separator:ga6f053389e2958b5a239a54d4e4047bf5"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga72db8b026c5e100254080fefabd9fd88"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#ga72db8b026c5e100254080fefabd9fd88">__PROGRAM_START</a></td></tr>
-<tr class="memdesc:ga72db8b026c5e100254080fefabd9fd88"><td class="mdescLeft">&#160;</td><td class="mdescRight">Entry function into the user application or library startup.  <a href="#ga72db8b026c5e100254080fefabd9fd88">More...</a><br/></td></tr>
-<tr class="separator:ga72db8b026c5e100254080fefabd9fd88"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga1002e751427b1189f92787d4e4eef965"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#ga1002e751427b1189f92787d4e4eef965">__INITIAL_SP</a></td></tr>
-<tr class="memdesc:ga1002e751427b1189f92787d4e4eef965"><td class="mdescLeft">&#160;</td><td class="mdescRight">Compiler/linker symbol specifying the location of the main stack (MSP).  <a href="#ga1002e751427b1189f92787d4e4eef965">More...</a><br/></td></tr>
-<tr class="separator:ga1002e751427b1189f92787d4e4eef965"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga84b0bad4aa39632d3faea46aa1e102a8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#ga84b0bad4aa39632d3faea46aa1e102a8">__STACK_LIMIT</a></td></tr>
-<tr class="memdesc:ga84b0bad4aa39632d3faea46aa1e102a8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Compiler/linker symbol specifying the limit of the main stack (MSP).  <a href="#ga84b0bad4aa39632d3faea46aa1e102a8">More...</a><br/></td></tr>
-<tr class="separator:ga84b0bad4aa39632d3faea46aa1e102a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab94ebeb20055f1848d7b707d3c7cfc5d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#gab94ebeb20055f1848d7b707d3c7cfc5d">__VECTOR_TABLE</a></td></tr>
-<tr class="memdesc:gab94ebeb20055f1848d7b707d3c7cfc5d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Symbol name used for the (static) interrupt vector table.  <a href="#gab94ebeb20055f1848d7b707d3c7cfc5d">More...</a><br/></td></tr>
-<tr class="separator:gab94ebeb20055f1848d7b707d3c7cfc5d"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga4f65c96effa79fbd610fea43ee7d745b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__compiler__conntrol__gr.html#ga4f65c96effa79fbd610fea43ee7d745b">__VECTOR_TABLE_ATTRIBUTE</a></td></tr>
-<tr class="memdesc:ga4f65c96effa79fbd610fea43ee7d745b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Additional decl specs to be used when defining the (static) interrupt vector table.  <a href="#ga4f65c96effa79fbd610fea43ee7d745b">More...</a><br/></td></tr>
-<tr class="separator:ga4f65c96effa79fbd610fea43ee7d745b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Compiler agnostic #define symbols for generic C/C++ source code. </p>
-<p>The CMSIS-Core provides the header file <b>cmsis_compiler.h</b> with consistent #define symbols for generate C or C++ source files that should be compiler agnostic. Each CMSIS compliant compiler should support the functionality described in this section.</p>
-<p>The header file <b>cmsis_compiler.h</b> is also included by each <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> so that these definitions are available. </p>
-<h2 class="groupheader">Macro Definition Documentation</h2>
-<a class="anchor" id="ga0c58caa5a273e2c21924509a45f8b849"></a>
-<div class="memitem">
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-          <td class="memname">#define __ALIGNED</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Minimum alignment for a variable. </p>
-<p>Specifies a minimum alignment for a variable or structure field, measured in bytes.</p>
-<p><b>Code Example:</b> </p>
-<div class="fragment"><div class="line">uint32_t stack_space[0x100] <a class="code" href="group__compiler__conntrol__gr.html#ga0c58caa5a273e2c21924509a45f8b849">__ALIGNED</a>(8);   <span class="comment">// 8-byte alignment required</span></div>
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-</div>
-</div>
-<a class="anchor" id="ga8be4ebde5d4dd91b161d206545ce59aa"></a>
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-          <td class="memname">#define __ARM_ARCH_6M__</td>
-        </tr>
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-</div><div class="memdoc">
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-<p>Set to 1 when generating code for Armv6-M (Cortex-M0, Cortex-M1) </p>
-<p>The <b>#define <b>ARM_ARCH_6M</b></b> is set to 1 when generating code for the Armv6-M architecture. This architecture is for example used by the Cortex-M0, Cortex-M0+, and Cortex-M1 processor. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga43ab3e79ec5ecb615f1f2f6e83e7d48a"></a>
-<div class="memitem">
-<div class="memproto">
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-          <td class="memname">#define __ARM_ARCH_7EM__</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Set to 1 when generating code for Armv7-M (Cortex-M4) with FPU. </p>
-<p>The <b>#define <b>ARM_ARCH_7EM</b></b> is set to 1 when generating code for the Armv7-M architecture with floating point extension. This architecture is for example used by the Cortex-M4 processor with FPU </p>
-
-</div>
-</div>
-<a class="anchor" id="ga43e1af8bedda108dfc4f8584e6b278a2"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define __ARM_ARCH_7M__</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Set to 1 when generating code for Armv7-M (Cortex-M3) </p>
-<p>The <b>#define <b>ARM_ARCH_7M</b></b> is set to 1 when generating code for the Armv7-M architecture. This architecture is for example used by the Cortex-M3 processor. </p>
-
-</div>
-</div>
-<a class="anchor" id="gab3f1284f4cdc6c5e5c9c9d4b8ec29b2a"></a>
-<div class="memitem">
-<div class="memproto">
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-          <td class="memname">#define __ARM_ARCH_8M_BASE__</td>
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-</div><div class="memdoc">
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-<p>Set to 1 when generating code for Armv8-M Baseline. </p>
-<p>The <b>#define <b>ARM_ARCH_8M_BASE</b></b> is set to 1 when generating code for the Armv8-M architecture baseline variant. </p>
-
-</div>
-</div>
-<a class="anchor" id="gad424c7143edd08c982dddad0ff65f4cd"></a>
-<div class="memitem">
-<div class="memproto">
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-          <td class="memname">#define __ARM_ARCH_8M_MAIN__</td>
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-</div><div class="memdoc">
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-<p>Set to 1 when generating code for Armv8-M Mainline. </p>
-<p>The <b>#define <b>ARM_ARCH_8M_MAIN</b></b> is set to 1 when generating code for the Armv8-M architecture mainline variant. </p>
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-</div>
-</div>
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-          <td class="memname">#define __ASM</td>
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-<p>Pass information from the compiler to the assembler. </p>
-<p>The <b>__ASM</b> keyword can declare or define an embedded assembly function or incorporate inline assembly into a function (shown in the code example below).</p>
-<p><b>Code Example:</b> </p>
-<div class="fragment"><div class="line"><span class="comment">// Reverse bit order of value</span></div>
-<div class="line"> </div>
-<div class="line">__attribute__( ( always_inline ) ) <a class="code" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t <a class="code" href="group__intrinsic__CPU__gr.html#gad6f9f297f6b91a995ee199fbc796b863">__RBIT</a>(uint32_t value)</div>
-<div class="line">{</div>
-<div class="line">  uint32_t result;</div>
-<div class="line"> </div>
-<div class="line">   <a class="code" href="group__compiler__conntrol__gr.html#ga1378040bcf22428955c6e3ce9c2053cd">__ASM</a> <span class="keyword">volatile</span> (<span class="stringliteral">&quot;rbit %0, %1&quot;</span> : <span class="stringliteral">&quot;=r&quot;</span> (result) : <span class="stringliteral">&quot;r&quot;</span> (value) );</div>
-<div class="line">   <span class="keywordflow">return</span>(result);</div>
-<div class="line">}</div>
-</div><!-- fragment --> 
-</div>
-</div>
-<a class="anchor" id="ga6f053389e2958b5a239a54d4e4047bf5"></a>
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-          <td class="memname">#define __COMPILER_BARRIER</td>
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-</div><div class="memdoc">
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-<p>Barrier to prevent compiler from reordering instructions. </p>
-<p>This barrier limits the compilers reordering optimizations. It prevents the compiler from swapping instructions resulting from code before and after the barrier.</p>
-<p><b>Code Example:</b> The assignments in the example are independent. Hence the compiler could choose a different order of execution, e.g. for a better pipeline utilization. Using the barrier in between prevents this type of reordering.</p>
-<div class="fragment"><div class="line"><span class="keywordtype">void</span> test (uint8_t *ptr) {</div>
-<div class="line">  var1 = 1;</div>
-<div class="line">  __COMPILE_BARRIER();</div>
-<div class="line">  var2 = var3 + 1;</div>
-<div class="line">}</div>
-</div><!-- fragment --> 
-</div>
-</div>
-<a class="anchor" id="ga1002e751427b1189f92787d4e4eef965"></a>
-<div class="memitem">
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-          <td class="memname">#define __INITIAL_SP</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Compiler/linker symbol specifying the location of the main stack (MSP). </p>
-<p>The address of the specified symbol is used to initialize the main stack pointer (MSP) during low level init. This is compiler/linker specific. CMSIS specifies common default for supported compilers.</p>
-<dl class="section note"><dt>Note</dt><dd>This define is only intended to be used by the <a class="el" href="startup_c_pg.html">Startup File startup_&lt;device&gt;.c</a>. </dd></dl>
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-</div>
-</div>
-<a class="anchor" id="gade2d8d7118f8ff49547f60aa0c3382bb"></a>
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-          <td class="memname">#define __INLINE</td>
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-</div><div class="memdoc">
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-<p>Recommend that function should be inlined by the compiler. </p>
-<p>Inline functions offer a trade-off between code size and performance. By default, the compiler decides during optimization whether to inline code or not. The <b>__INLINE</b> attribute gives the compiler an hint to inline this function. Still, the compiler may decide not to inline the function. As the function is global an callable function is also generated.</p>
-<p><b>Code Example:</b> </p>
-<div class="fragment"><div class="line"><span class="keyword">const</span> uint32_t led_mask[] = {1U &lt;&lt; 4, 1U &lt;&lt; 5, 1U &lt;&lt; 6, 1U &lt;&lt; 7};</div>
-<div class="line"> </div>
-<div class="line"><span class="comment">/*------------------------------------------------------------------------------</span></div>
-<div class="line"><span class="comment">  Switch on LEDs</span></div>
-<div class="line"><span class="comment"> *------------------------------------------------------------------------------*/</span></div>
-<div class="line"><a class="code" href="group__compiler__conntrol__gr.html#gade2d8d7118f8ff49547f60aa0c3382bb">__INLINE</a> <span class="keyword">static</span> <span class="keywordtype">void</span> LED_On (uint32_t led) {</div>
-<div class="line"> </div>
-<div class="line">  PTD-&gt;PCOR   = led_mask[led];</div>
-<div class="line">}</div>
-</div><!-- fragment --> 
-</div>
-</div>
-<a class="anchor" id="ga153a4a31b276a9758959580538720a51"></a>
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-          <td class="memname">#define __NO_RETURN</td>
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-<p>Inform the compiler that a function does not return. </p>
-<p>Informs the compiler that the function does not return. The compiler can then perform optimizations by removing code that is never reached.</p>
-<p><b>Code Example:</b> </p>
-<div class="fragment"><div class="line"><span class="comment">// OS idle demon (running when no other thread is ready to run).</span></div>
-<div class="line"> </div>
-<div class="line"><a class="code" href="group__compiler__conntrol__gr.html#ga153a4a31b276a9758959580538720a51">__NO_RETURN</a> <span class="keywordtype">void</span> os_idle_demon (<span class="keywordtype">void</span>);</div>
-</div><!-- fragment --> 
-</div>
-</div>
-<a class="anchor" id="gabe8996d3d985ee1529475443cc635bf1"></a>
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-          <td class="memname">#define __PACKED</td>
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-</div><div class="memdoc">
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-<p>Request smallest possible alignment. </p>
-<p>Specifies that a type must have the smallest possible alignment.</p>
-<p><b>Code Example:</b> </p>
-<div class="fragment"><div class="line"><span class="keyword">struct </span>foo {</div>
-<div class="line">  uint8_t  u8;</div>
-<div class="line">  uint32_t u32[2] <a class="code" href="group__compiler__conntrol__gr.html#gabe8996d3d985ee1529475443cc635bf1">__PACKED</a>;</div>
-<div class="line">};</div>
-</div><!-- fragment --> 
-</div>
-</div>
-<a class="anchor" id="ga4dbb70fab85207c27b581ecb6532b314"></a>
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-          <td class="memname">#define __PACKED_STRUCT</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Request smallest possible alignment for a structure. </p>
-<p>Specifies that a structure must have the smallest possible alignment.</p>
-<p><b>Code Example:</b> </p>
-<div class="fragment"><div class="line"><a class="code" href="group__compiler__conntrol__gr.html#ga4dbb70fab85207c27b581ecb6532b314">__PACKED_STRUCT</a> foo {</div>
-<div class="line">  uint8_t   u8;</div>
-<div class="line">  uint32_t  u32;</div>
-<div class="line">  uint16_t  u16;</div>
-<div class="line">};</div>
-</div><!-- fragment --> 
-</div>
-</div>
-<a class="anchor" id="ga72db8b026c5e100254080fefabd9fd88"></a>
-<div class="memitem">
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-          <td class="memname">#define __PROGRAM_START</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
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-<p>Entry function into the user application or library startup. </p>
-<p>Gives the function to be jumped into right after low level initialization, i.e. SystemInit. This is compiler and library specific. CMSIS specifies common default for supported compilers.</p>
-<dl class="section note"><dt>Note</dt><dd>This define is only intended to be used by the <a class="el" href="startup_c_pg.html">Startup File startup_&lt;device&gt;.c</a>.</dd></dl>
-<p><b>Code Example:</b> </p>
-<div class="fragment"><div class="line"><span class="keywordtype">void</span> Reset_Handler(<span class="keywordtype">void</span>)</div>
-<div class="line">{</div>
-<div class="line">  <a class="code" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2">SystemInit</a>();                             <span class="comment">/* CMSIS System Initialization */</span></div>
-<div class="line">  <a class="code" href="group__compiler__conntrol__gr.html#ga72db8b026c5e100254080fefabd9fd88">__PROGRAM_START</a>();                        <span class="comment">/* Enter PreMain (C library entry point) */</span></div>
-<div class="line">}</div>
-</div><!-- fragment --> 
-</div>
-</div>
-<a class="anchor" id="ga378ac21329d33f561f90265eef89f564"></a>
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-          <td class="memname">#define __RESTRICT</td>
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-<p>restrict pointer qualifier to enable additional optimizations. </p>
-<p>The __RESTRICT keyword corresponds to the <b>restrict</b> pointer qualifier that has been introduced in C99. __RESTRICT is a hint to the compiler that enables additional optimizations. It specifies that for the lifetime of the pointer, only the pointer itself or a value directly derived from it (such as pointer + 1) is used to access the object. The compiler may therefore ignore potential pointer aliasing effects and perform additional optimizations.</p>
-<dl class="section note"><dt>Note</dt><dd>For compilers that do not support the restrict keyword, __RESTRICT is defined as an empty macro and a warning is issued.</dd></dl>
-<p><b>Code Example:</b> </p>
-<div class="fragment"><div class="line"><a class="code" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> <span class="keywordtype">void</span> <a class="code" href="group__mpu__functions.html#gac1a949403bf84eecaf407003fb553ae7">ARM_MPU_OrderedMemcpy</a> (<span class="keyword">volatile</span> uint32_t* dst, <span class="keyword">const</span> uint32_t* <a class="code" href="group__compiler__conntrol__gr.html#ga378ac21329d33f561f90265eef89f564">__RESTRICT</a> src, uint32_t len)</div>
-<div class="line">{</div>
-<div class="line">  uint32_t i;</div>
-<div class="line">  <span class="keywordflow">for</span> (i = 0U; i &lt; len; ++i) </div>
-<div class="line">  {</div>
-<div class="line">    dst[i] = src[i];   <span class="comment">// Since src is restrict, the compiler can assume that dst and src are not overlapping may load multiple values at a time</span></div>
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-          <td class="memname">#define __STACK_LIMIT</td>
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-
-<p>Compiler/linker symbol specifying the limit of the main stack (MSP). </p>
-<p>The address of the specified symbol is used to initialize the main stack pointer limit (MSPLIM on Armv8-M) during low level init. This is compiler/linker specific. CMSIS specifies common default for supported compilers.</p>
-<dl class="section note"><dt>Note</dt><dd>This define is only intended to be used by the <a class="el" href="startup_c_pg.html">Startup File startup_&lt;device&gt;.c</a>.</dd></dl>
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define __STATIC_FORCEINLINE</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Define a static function that should be always inlined by the compiler. </p>
-<p>Defines a static function that should be always inlined by the compiler.</p>
-<dl class="section note"><dt>Note</dt><dd>For compilers that do not allow to force function inlining, the macro maps to <a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a>.</dd></dl>
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-</div>
-</div>
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-<div class="memitem">
-<div class="memproto">
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-        <tr>
-          <td class="memname">#define __STATIC_INLINE</td>
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-      </table>
-</div><div class="memdoc">
-
-<p>Define a static function that may be inlined by the compiler. </p>
-<p>Defines a static function that may be inlined by the compiler. If the compiler generates inline code for all calls to this functions, no additional function implementation is generated which may further optimize space.</p>
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-</div>
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-<div class="memitem">
-<div class="memproto">
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-<p>Pointer for unaligned read of a uint16_t variable. </p>
-<p>Defines a pointer to a uint16_t from an address that does not need to be aligned. This can then be used in read operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying Arm processor core and compiler settings.</p>
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-<div class="memitem">
-<div class="memproto">
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-        <tr>
-          <td class="memname">#define __UNALIGNED_UINT16_WRITE</td>
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-      </table>
-</div><div class="memdoc">
-
-<p>Pointer for unaligned write of a uint16_t variable. </p>
-<p>Defines a pointer to a uint16_t from an address that does not need to be aligned. This can then be used in write operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying Arm processor core and compiler settings.</p>
-<p><b>Code Example:</b> </p>
-<div class="fragment"><div class="line">uint16_t val16 = 0U;</div>
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-<div class="line"><span class="keywordtype">void</span> test (uint8_t *ptr) {</div>
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-<div class="memproto">
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-          <td class="memname">#define __UNALIGNED_UINT32</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Pointer for unaligned access of a uint32_t variable. </p>
-<dl class="deprecated"><dt><b><a class="el" href="deprecated.html#_deprecated000001">Deprecated:</a></b></dt><dd>Do not use this macro. It has been superseded by <a class="el" href="group__compiler__conntrol__gr.html#ga254322c344d954c9f829719a50a88e87">__UNALIGNED_UINT32_READ</a>, <a class="el" href="group__compiler__conntrol__gr.html#gabb2180285c417aa9120a360c51f64b4b">__UNALIGNED_UINT32_WRITE</a> and will be removed in the future.</dd></dl>
-<p>Defines a pointer to a uint32_t from an address that does not need to be aligned. This can then be used in read/write operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying Arm processor core and compiler settings.</p>
-<p><b>Code Example:</b> </p>
-<div class="fragment"><div class="line">uint32_t val32;</div>
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-<div class="line"><span class="keywordtype">void</span> test (uint8_t *ptr) {</div>
-<div class="line">  <a class="code" href="group__compiler__conntrol__gr.html#ga27fd2ec6767ca1ab66d36b5cc0103268">__UNALIGNED_UINT32</a>(ptr) = val32;</div>
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-      </table>
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-<p>Pointer for unaligned read of a uint32_t variable. </p>
-<p>Defines a pointer to a uint32_t from an address that does not need to be aligned. This can then be used in read operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying Arm processor core and compiler settings.</p>
-<p><b>Code Example:</b> </p>
-<div class="fragment"><div class="line">uint32_t val32;</div>
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-<p>Pointer for unaligned write of a uint32_t variable. </p>
-<p>Defines a pointer to a uint32_t from an address that does not need to be aligned. This can then be used in write operations. The compiler will generate the appropriate access (aligned or non-aligned) depending on the underlying Arm processor core and compiler settings.</p>
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-<p>Inform that a variable shall be retained in executable image. </p>
-<p>Definitions tagged with <b>__USED</b> in the source code should be not removed by the linker when detected as unused.</p>
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-
-<p>Symbol name used for the (static) interrupt vector table. </p>
-<p>The given name is used for defining the static (compiler time) interrupt vector table. The name must comply with any compiler/linker conventions, e.g. if used for vector table relocation or debugger awareness. CMSIS specifies common default for supported compilers.</p>
-<dl class="section note"><dt>Note</dt><dd>This define is only intended to be used by the <a class="el" href="startup_c_pg.html">Startup File startup_&lt;device&gt;.c</a>. </dd></dl>
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-<p>Additional decl specs to be used when defining the (static) interrupt vector table. </p>
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-<p>Export a function or variable weakly to allow overwrites. </p>
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-<p>RTOS Thread Context Management for Armv8-M TrustZone.  
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-<table class="memberdecls">
-<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
-Functions</h2></td></tr>
-<tr class="memitem:ga926e2ec472535a6d2b8125be1a79e3c0"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__context__trustzone__functions.html#ga926e2ec472535a6d2b8125be1a79e3c0">TZ_InitContextSystem_S</a> (void)</td></tr>
-<tr class="memdesc:ga926e2ec472535a6d2b8125be1a79e3c0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Initialize secure context memory system.  <a href="#ga926e2ec472535a6d2b8125be1a79e3c0">More...</a><br/></td></tr>
-<tr class="separator:ga926e2ec472535a6d2b8125be1a79e3c0"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:gacd016f166bee549a0d3e970132e64a90"><td class="mdescLeft">&#160;</td><td class="mdescRight">Allocate context memory for calling secure software modules in TrustZone.  <a href="#gacd016f166bee549a0d3e970132e64a90">More...</a><br/></td></tr>
-<tr class="separator:gacd016f166bee549a0d3e970132e64a90"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:gac84f678fbe974f8b02c683e0b8046524"><td class="mdescLeft">&#160;</td><td class="mdescRight">Free context memory that was previously allocated with <a class="el" href="group__context__trustzone__functions.html#gacd016f166bee549a0d3e970132e64a90">TZ_AllocModuleContext_S</a>.  <a href="#gac84f678fbe974f8b02c683e0b8046524">More...</a><br/></td></tr>
-<tr class="separator:gac84f678fbe974f8b02c683e0b8046524"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:ga4748f6bcdd5fed279ac5a6cd7eca2689"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<p>The CMSIS-Core provides the file <b>tz_context.h</b> which defines an API to standardize the context memory system for real-time operating systems. For more information refer to <a class="el" href="using_TrustZone_pg.html#RTOS_TrustZone">RTOS Thread Context Management</a>. </p>
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-<p>Allocate context memory for calling secure software modules in TrustZone. </p>
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-<p>Free context memory that was previously allocated with <a class="el" href="group__context__trustzone__functions.html#gacd016f166bee549a0d3e970132e64a90">TZ_AllocModuleContext_S</a>. </p>
-<p>De-allocates the secure memory regions. The parameter <em>id</em> refers to a TrustZone memory slot that has been obtained with <a class="el" href="group__context__trustzone__functions.html#gacd016f166bee549a0d3e970132e64a90">TZ_AllocModuleContext_S</a>. This function should be called by an RTOS kernel at the termination of a thread. </p>
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-<p>Initialize secure context memory system. </p>
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-<tr class="memitem:ga27bf1f88e794c30808ee73a29d46e358"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__coreregister__trustzone__functions.html#ga27bf1f88e794c30808ee73a29d46e358">__TZ_get_CONTROL_NS</a> (void)</td></tr>
-<tr class="memdesc:ga27bf1f88e794c30808ee73a29d46e358"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Control register (non-secure)  <a href="#ga27bf1f88e794c30808ee73a29d46e358">More...</a><br/></td></tr>
-<tr class="separator:ga27bf1f88e794c30808ee73a29d46e358"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga3eb150204e6d389d5b49065179b9cde5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__coreregister__trustzone__functions.html#ga3eb150204e6d389d5b49065179b9cde5">__TZ_set_CONTROL_NS</a> (uint32_t control)</td></tr>
-<tr class="memdesc:ga3eb150204e6d389d5b49065179b9cde5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Control register (non-secure)  <a href="#ga3eb150204e6d389d5b49065179b9cde5">More...</a><br/></td></tr>
-<tr class="separator:ga3eb150204e6d389d5b49065179b9cde5"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga40ff8336c6d09af6da1081d4e4adc126"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__coreregister__trustzone__functions.html#ga40ff8336c6d09af6da1081d4e4adc126">__TZ_get_PSP_NS</a> (void)</td></tr>
-<tr class="memdesc:ga40ff8336c6d09af6da1081d4e4adc126"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Process Stack Pointer (non-secure)  <a href="#ga40ff8336c6d09af6da1081d4e4adc126">More...</a><br/></td></tr>
-<tr class="separator:ga40ff8336c6d09af6da1081d4e4adc126"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaea8db21c00cfa4144ee74dc65dbd7580"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__coreregister__trustzone__functions.html#gaea8db21c00cfa4144ee74dc65dbd7580">__TZ_set_PSP_NS</a> (uint32_t topOfProcStack)</td></tr>
-<tr class="memdesc:gaea8db21c00cfa4144ee74dc65dbd7580"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Process Stack Pointer (non-secure)  <a href="#gaea8db21c00cfa4144ee74dc65dbd7580">More...</a><br/></td></tr>
-<tr class="separator:gaea8db21c00cfa4144ee74dc65dbd7580"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab3aa15eb4f352e230b9f7a3e8856a9e9"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__coreregister__trustzone__functions.html#gab3aa15eb4f352e230b9f7a3e8856a9e9">__TZ_get_MSP_NS</a> (void)</td></tr>
-<tr class="memdesc:gab3aa15eb4f352e230b9f7a3e8856a9e9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Main Stack Pointer (non-secure)  <a href="#gab3aa15eb4f352e230b9f7a3e8856a9e9">More...</a><br/></td></tr>
-<tr class="separator:gab3aa15eb4f352e230b9f7a3e8856a9e9"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga41c3ac2d9af23c40647c053ad7d564e7"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__coreregister__trustzone__functions.html#ga41c3ac2d9af23c40647c053ad7d564e7">__TZ_set_MSP_NS</a> (uint32_t topOfMainStack)</td></tr>
-<tr class="memdesc:ga41c3ac2d9af23c40647c053ad7d564e7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Main Stack Pointer (non-secure)  <a href="#ga41c3ac2d9af23c40647c053ad7d564e7">More...</a><br/></td></tr>
-<tr class="separator:ga41c3ac2d9af23c40647c053ad7d564e7"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaaaf2aaf904b25ed17fd3e5e63f8e029b"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__coreregister__trustzone__functions.html#gaaaf2aaf904b25ed17fd3e5e63f8e029b">__TZ_get_SP_NS</a> (void)</td></tr>
-<tr class="memdesc:gaaaf2aaf904b25ed17fd3e5e63f8e029b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Stack Pointer (non-secure)  <a href="#gaaaf2aaf904b25ed17fd3e5e63f8e029b">More...</a><br/></td></tr>
-<tr class="separator:gaaaf2aaf904b25ed17fd3e5e63f8e029b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab7263167cb006aeeb04b68e579dae015"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__coreregister__trustzone__functions.html#gab7263167cb006aeeb04b68e579dae015">__TZ_set_SP_NS</a> (uint32_t topOfStack)</td></tr>
-<tr class="memdesc:gab7263167cb006aeeb04b68e579dae015"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Stack Pointer (non-secure)  <a href="#gab7263167cb006aeeb04b68e579dae015">More...</a><br/></td></tr>
-<tr class="separator:gab7263167cb006aeeb04b68e579dae015"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga7cc3271c79e619f8838e8767df3cb509"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__coreregister__trustzone__functions.html#ga7cc3271c79e619f8838e8767df3cb509">__TZ_get_PRIMASK_NS</a> (void)</td></tr>
-<tr class="memdesc:ga7cc3271c79e619f8838e8767df3cb509"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Priority Mask (non-secure)  <a href="#ga7cc3271c79e619f8838e8767df3cb509">More...</a><br/></td></tr>
-<tr class="separator:ga7cc3271c79e619f8838e8767df3cb509"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga6686c2ab5756b5049fad1644e89b3340"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__coreregister__trustzone__functions.html#ga6686c2ab5756b5049fad1644e89b3340">__TZ_set_PRIMASK_NS</a> (uint32_t priMask)</td></tr>
-<tr class="memdesc:ga6686c2ab5756b5049fad1644e89b3340"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Priority Mask (non-secure)  <a href="#ga6686c2ab5756b5049fad1644e89b3340">More...</a><br/></td></tr>
-<tr class="separator:ga6686c2ab5756b5049fad1644e89b3340"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga624509c924d2583f0d4dca6ab270f051"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__coreregister__trustzone__functions.html#ga624509c924d2583f0d4dca6ab270f051">__TZ_get_BASEPRI_NS</a> (void)</td></tr>
-<tr class="memdesc:ga624509c924d2583f0d4dca6ab270f051"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Base Priority (non-secure)  <a href="#ga624509c924d2583f0d4dca6ab270f051">More...</a><br/></td></tr>
-<tr class="separator:ga624509c924d2583f0d4dca6ab270f051"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga92c187f0b4d53627b59e0fd0bda0b0df"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__coreregister__trustzone__functions.html#ga92c187f0b4d53627b59e0fd0bda0b0df">__TZ_set_BASEPRI_NS</a> (uint32_t basePri)</td></tr>
-<tr class="memdesc:ga92c187f0b4d53627b59e0fd0bda0b0df"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Base Priority (non-secure)  <a href="#ga92c187f0b4d53627b59e0fd0bda0b0df">More...</a><br/></td></tr>
-<tr class="separator:ga92c187f0b4d53627b59e0fd0bda0b0df"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga578b41087f207e1a475daae6cc8a28dc"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__coreregister__trustzone__functions.html#ga578b41087f207e1a475daae6cc8a28dc">__TZ_get_FAULTMASK_NS</a> (void)</td></tr>
-<tr class="memdesc:ga578b41087f207e1a475daae6cc8a28dc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Fault Mask (non-secure)  <a href="#ga578b41087f207e1a475daae6cc8a28dc">More...</a><br/></td></tr>
-<tr class="separator:ga578b41087f207e1a475daae6cc8a28dc"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga4f0912db7bc65439d23817c1d372a7a4"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__coreregister__trustzone__functions.html#ga4f0912db7bc65439d23817c1d372a7a4">__TZ_set_FAULTMASK_NS</a> (uint32_t faultMask)</td></tr>
-<tr class="memdesc:ga4f0912db7bc65439d23817c1d372a7a4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Fault Mask (non-secure)  <a href="#ga4f0912db7bc65439d23817c1d372a7a4">More...</a><br/></td></tr>
-<tr class="separator:ga4f0912db7bc65439d23817c1d372a7a4"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga5da646ec291b6a183f38497ce92be51c"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__coreregister__trustzone__functions.html#ga5da646ec291b6a183f38497ce92be51c">__TZ_get_PSPLIM_NS</a> (void)</td></tr>
-<tr class="memdesc:ga5da646ec291b6a183f38497ce92be51c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Process Stack Pointer Limit (non-secure) Devices without Armv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence zero is returned always.  <a href="#ga5da646ec291b6a183f38497ce92be51c">More...</a><br/></td></tr>
-<tr class="separator:ga5da646ec291b6a183f38497ce92be51c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga81e0995ee0fd2a9dcd9e9681bc22c76f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__coreregister__trustzone__functions.html#ga81e0995ee0fd2a9dcd9e9681bc22c76f">__TZ_set_PSPLIM_NS</a> (uint32_t ProcStackPtrLimit)</td></tr>
-<tr class="memdesc:ga81e0995ee0fd2a9dcd9e9681bc22c76f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Process Stack Pointer (non-secure) Devices without Armv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence zero is returned always.  <a href="#ga81e0995ee0fd2a9dcd9e9681bc22c76f">More...</a><br/></td></tr>
-<tr class="separator:ga81e0995ee0fd2a9dcd9e9681bc22c76f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gada00853d3e49fa8d21f375c53d28fa51"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__coreregister__trustzone__functions.html#gada00853d3e49fa8d21f375c53d28fa51">__TZ_get_MSPLIM_NS</a> (void)</td></tr>
-<tr class="memdesc:gada00853d3e49fa8d21f375c53d28fa51"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Main Stack Pointer Limit (non-secure) Devices without Armv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence zero is returned always.  <a href="#gada00853d3e49fa8d21f375c53d28fa51">More...</a><br/></td></tr>
-<tr class="separator:gada00853d3e49fa8d21f375c53d28fa51"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad2013f4d4311d6db253594a12d192617"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__coreregister__trustzone__functions.html#gad2013f4d4311d6db253594a12d192617">__TZ_set_MSPLIM_NS</a> (uint32_t MainStackPtrLimit)</td></tr>
-<tr class="memdesc:gad2013f4d4311d6db253594a12d192617"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Main Stack Pointer Limit (non-secure) Devices without Armv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence zero is returned always.  <a href="#gad2013f4d4311d6db253594a12d192617">More...</a><br/></td></tr>
-<tr class="separator:gad2013f4d4311d6db253594a12d192617"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Core register Access functions related to TrustZone for Armv8-M. </p>
-<h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga624509c924d2583f0d4dca6ab270f051"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __TZ_get_BASEPRI_NS </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Get Base Priority (non-secure) </p>
-<p>Returns the current value of the non-secure Base Priority register when in secure state. </p>
-<dl class="section return"><dt>Returns</dt><dd>Base Priority register value </dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#ga32da759f46e52c95bcfbde5012260667">__get_BASEPRI</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga27bf1f88e794c30808ee73a29d46e358"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __TZ_get_CONTROL_NS </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Get Control register (non-secure) </p>
-<p>Returns the content of the non-secure Control register when in secure mode. </p>
-<dl class="section return"><dt>Returns</dt><dd>non-secure Control register value </dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#ga963cf236b73219ce78e965deb01b81a7">__get_CONTROL</a>; <a class="el" href="unionCONTROL__Type.html" title="Union type to access the Control Registers (CONTROL). ">CONTROL_Type</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga578b41087f207e1a475daae6cc8a28dc"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __TZ_get_FAULTMASK_NS </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Get Fault Mask (non-secure) </p>
-<p>Returns the current value of the non-secure Fault Mask register when in secure state. </p>
-<dl class="section return"><dt>Returns</dt><dd>Fault Mask register value </dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#gaa78e4e6bf619a65e9f01b4af13fed3a8">__get_FAULTMASK</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gab3aa15eb4f352e230b9f7a3e8856a9e9"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __TZ_get_MSP_NS </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Get Main Stack Pointer (non-secure) </p>
-<p>Returns the current value of the non-secure Main Stack Pointer (MSP) when in secure state. </p>
-<dl class="section return"><dt>Returns</dt><dd>MSP register value </dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#gab898559392ba027814e5bbb5a98b38d2">__get_MSP</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gada00853d3e49fa8d21f375c53d28fa51"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __TZ_get_MSPLIM_NS </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Get Main Stack Pointer Limit (non-secure) Devices without Armv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence zero is returned always. </p>
-<p>Returns the current value of the non-secure Main Stack Pointer Limit(MSPLIM) when in secure state. </p>
-<dl class="section return"><dt>Returns</dt><dd>MSPLIM register value </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga7cc3271c79e619f8838e8767df3cb509"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __TZ_get_PRIMASK_NS </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Get Priority Mask (non-secure) </p>
-<p>Returns the current state of the non-secure priority mask bit from the Priority Mask register when in secure state. </p>
-<dl class="section return"><dt>Returns</dt><dd>Priority Mask value </dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#ga799b5d9a2ae75e459264c8512c7c0e02">__get_PRIMASK</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga40ff8336c6d09af6da1081d4e4adc126"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __TZ_get_PSP_NS </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Get Process Stack Pointer (non-secure) </p>
-<p>Returns the current value of the non-secure Process Stack Pointer (PSP) when in secure state. </p>
-<dl class="section return"><dt>Returns</dt><dd>PSP register value </dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__Core__Register__gr.html#ga914dfa8eff7ca53380dd54cf1d8bebd9">__get_PSP</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga5da646ec291b6a183f38497ce92be51c"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __TZ_get_PSPLIM_NS </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Get Process Stack Pointer Limit (non-secure) Devices without Armv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure Stack Pointer Limit register hence zero is returned always. </p>
-<p>Returns the current value of the non-secure Process Stack Pointer Limit (PSPLIM) when in secure state. </p>
-<dl class="section return"><dt>Returns</dt><dd>PSPLIM register value </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gaaaf2aaf904b25ed17fd3e5e63f8e029b"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __TZ_get_SP_NS </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Get Stack Pointer (non-secure) </p>
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-<tr class="memdesc:gac6a3f185c4640e06443c18b3c8d93f53"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cortex-M3 Core revision r0p1.  <a href="#gac6a3f185c4640e06443c18b3c8d93f53">More...</a><br/></td></tr>
-<tr class="separator:gac6a3f185c4640e06443c18b3c8d93f53"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga45a97e4bb8b6ce7c334acc5f45ace3ba"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#ga45a97e4bb8b6ce7c334acc5f45ace3ba">__CM4_REV</a></td></tr>
-<tr class="memdesc:ga45a97e4bb8b6ce7c334acc5f45ace3ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cortex-M4 Core revision r0p1.  <a href="#ga45a97e4bb8b6ce7c334acc5f45ace3ba">More...</a><br/></td></tr>
-<tr class="separator:ga45a97e4bb8b6ce7c334acc5f45ace3ba"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga8eb40c0d30a09a0ae388e56b21d8f22c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#ga8eb40c0d30a09a0ae388e56b21d8f22c">__CM7_REV</a></td></tr>
-<tr class="memdesc:ga8eb40c0d30a09a0ae388e56b21d8f22c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cortex-M7 Core revision r0p1.  <a href="#ga8eb40c0d30a09a0ae388e56b21d8f22c">More...</a><br/></td></tr>
-<tr class="separator:ga8eb40c0d30a09a0ae388e56b21d8f22c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf293b060f9c15592d18e6b0b977194bf"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#gaf293b060f9c15592d18e6b0b977194bf">__SC000_REV</a></td></tr>
-<tr class="memdesc:gaf293b060f9c15592d18e6b0b977194bf"><td class="mdescLeft">&#160;</td><td class="mdescRight">SC000 Core revision r0p1.  <a href="#gaf293b060f9c15592d18e6b0b977194bf">More...</a><br/></td></tr>
-<tr class="separator:gaf293b060f9c15592d18e6b0b977194bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga3029728b4fc64727b43bcfd853a7180b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#ga3029728b4fc64727b43bcfd853a7180b">__SC300_REV</a></td></tr>
-<tr class="memdesc:ga3029728b4fc64727b43bcfd853a7180b"><td class="mdescLeft">&#160;</td><td class="mdescRight">SC300 Core revision r0p1.  <a href="#ga3029728b4fc64727b43bcfd853a7180b">More...</a><br/></td></tr>
-<tr class="separator:ga3029728b4fc64727b43bcfd853a7180b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga0f6c2b504ee424a7895fd7a420acdd0e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#ga0f6c2b504ee424a7895fd7a420acdd0e">__CM23_REV</a></td></tr>
-<tr class="memdesc:ga0f6c2b504ee424a7895fd7a420acdd0e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cortex-M23 Core revision r0p1.  <a href="#ga0f6c2b504ee424a7895fd7a420acdd0e">More...</a><br/></td></tr>
-<tr class="separator:ga0f6c2b504ee424a7895fd7a420acdd0e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga178e7a57b608f3e20d1c0cf18a2c2ac3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#ga178e7a57b608f3e20d1c0cf18a2c2ac3">__CM33_REV</a></td></tr>
-<tr class="memdesc:ga178e7a57b608f3e20d1c0cf18a2c2ac3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cortex-M33 Core revision r0p1.  <a href="#ga178e7a57b608f3e20d1c0cf18a2c2ac3">More...</a><br/></td></tr>
-<tr class="separator:ga178e7a57b608f3e20d1c0cf18a2c2ac3"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gadd339c07b13a763dda6e83f4c05122f6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#gadd339c07b13a763dda6e83f4c05122f6">__CM35P_REV</a></td></tr>
-<tr class="memdesc:gadd339c07b13a763dda6e83f4c05122f6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cortex-M35P Core revision r0p1.  <a href="#gadd339c07b13a763dda6e83f4c05122f6">More...</a><br/></td></tr>
-<tr class="separator:gadd339c07b13a763dda6e83f4c05122f6"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaea2d16e963063038cde86cee33c4ef37"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#gaea2d16e963063038cde86cee33c4ef37">__CM55_REV</a></td></tr>
-<tr class="memdesc:gaea2d16e963063038cde86cee33c4ef37"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cortex-M55 Core revision r0p1.  <a href="#gaea2d16e963063038cde86cee33c4ef37">More...</a><br/></td></tr>
-<tr class="separator:gaea2d16e963063038cde86cee33c4ef37"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab1efd620a97f291faa1092e10e693bd3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#gab1efd620a97f291faa1092e10e693bd3">__CM85_REV</a></td></tr>
-<tr class="memdesc:gab1efd620a97f291faa1092e10e693bd3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cortex-M85 Core revision r0p1.  <a href="#gab1efd620a97f291faa1092e10e693bd3">More...</a><br/></td></tr>
-<tr class="separator:gab1efd620a97f291faa1092e10e693bd3"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga645c9be694a2d5b5a5b772a0102c727a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#ga645c9be694a2d5b5a5b772a0102c727a">__ARMv8MBL_REV</a></td></tr>
-<tr class="memdesc:ga645c9be694a2d5b5a5b772a0102c727a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Armv8-M Baseline device Core revision r0p1.  <a href="#ga645c9be694a2d5b5a5b772a0102c727a">More...</a><br/></td></tr>
-<tr class="separator:ga645c9be694a2d5b5a5b772a0102c727a"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gadb7d425f5ad0389b0eb1c6a69f8eb214"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#gadb7d425f5ad0389b0eb1c6a69f8eb214">__ARMv8MML_REV</a></td></tr>
-<tr class="memdesc:gadb7d425f5ad0389b0eb1c6a69f8eb214"><td class="mdescLeft">&#160;</td><td class="mdescRight">Armv8-M Mainline device Core revision r0p1.  <a href="#gadb7d425f5ad0389b0eb1c6a69f8eb214">More...</a><br/></td></tr>
-<tr class="separator:gadb7d425f5ad0389b0eb1c6a69f8eb214"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga4dd7b69d473733e59cd99fc786174cd3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#ga4dd7b69d473733e59cd99fc786174cd3">__ARMv81MML_REV</a></td></tr>
-<tr class="memdesc:ga4dd7b69d473733e59cd99fc786174cd3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Armv8.1-M Baseline device Core revision r0p1.  <a href="#ga4dd7b69d473733e59cd99fc786174cd3">More...</a><br/></td></tr>
-<tr class="separator:ga4dd7b69d473733e59cd99fc786174cd3"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gae3fe3587d5100c787e02102ce3944460"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a></td></tr>
-<tr class="memdesc:gae3fe3587d5100c787e02102ce3944460"><td class="mdescLeft">&#160;</td><td class="mdescRight">Number of Bits used for Priority Levels.  <a href="#gae3fe3587d5100c787e02102ce3944460">More...</a><br/></td></tr>
-<tr class="separator:gae3fe3587d5100c787e02102ce3944460"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab58771b4ec03f9bdddc84770f7c95c68"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#gab58771b4ec03f9bdddc84770f7c95c68">__Vendor_SysTickConfig</a></td></tr>
-<tr class="memdesc:gab58771b4ec03f9bdddc84770f7c95c68"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set to 1 if a venor specfic SysTick configuration is used.  <a href="#gab58771b4ec03f9bdddc84770f7c95c68">More...</a><br/></td></tr>
-<tr class="separator:gab58771b4ec03f9bdddc84770f7c95c68"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaddbae1a1b57539f398eb5546a17de8f6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#gaddbae1a1b57539f398eb5546a17de8f6">__VTOR_PRESENT</a></td></tr>
-<tr class="memdesc:gaddbae1a1b57539f398eb5546a17de8f6"><td class="mdescLeft">&#160;</td><td class="mdescRight">VTOR present or not.  <a href="#gaddbae1a1b57539f398eb5546a17de8f6">More...</a><br/></td></tr>
-<tr class="separator:gaddbae1a1b57539f398eb5546a17de8f6"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga4127d1b31aaf336fab3d7329d117f448"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#ga4127d1b31aaf336fab3d7329d117f448">__MPU_PRESENT</a></td></tr>
-<tr class="memdesc:ga4127d1b31aaf336fab3d7329d117f448"><td class="mdescLeft">&#160;</td><td class="mdescRight">MPU present or not.  <a href="#ga4127d1b31aaf336fab3d7329d117f448">More...</a><br/></td></tr>
-<tr class="separator:ga4127d1b31aaf336fab3d7329d117f448"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac1ba8a48ca926bddc88be9bfd7d42641"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#gac1ba8a48ca926bddc88be9bfd7d42641">__FPU_PRESENT</a></td></tr>
-<tr class="memdesc:gac1ba8a48ca926bddc88be9bfd7d42641"><td class="mdescLeft">&#160;</td><td class="mdescRight">FPU present or not.  <a href="#gac1ba8a48ca926bddc88be9bfd7d42641">More...</a><br/></td></tr>
-<tr class="separator:gac1ba8a48ca926bddc88be9bfd7d42641"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga2a528de57b6217f9fc9d4487d0db6328"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#ga2a528de57b6217f9fc9d4487d0db6328">__FPU_DP</a></td></tr>
-<tr class="memdesc:ga2a528de57b6217f9fc9d4487d0db6328"><td class="mdescLeft">&#160;</td><td class="mdescRight">Double precision FPU present.  <a href="#ga2a528de57b6217f9fc9d4487d0db6328">More...</a><br/></td></tr>
-<tr class="separator:ga2a528de57b6217f9fc9d4487d0db6328"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga165f052f5641898a02bb07096dc177b6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#ga165f052f5641898a02bb07096dc177b6">__DSP_PRESENT</a></td></tr>
-<tr class="memdesc:ga165f052f5641898a02bb07096dc177b6"><td class="mdescLeft">&#160;</td><td class="mdescRight">DSP extension present or not.  <a href="#ga165f052f5641898a02bb07096dc177b6">More...</a><br/></td></tr>
-<tr class="separator:ga165f052f5641898a02bb07096dc177b6"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gadae9d54c744e525135b097c618bae3c4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#gadae9d54c744e525135b097c618bae3c4">__SAUREGION_PRESENT</a></td></tr>
-<tr class="memdesc:gadae9d54c744e525135b097c618bae3c4"><td class="mdescLeft">&#160;</td><td class="mdescRight">SAU regions present or not.  <a href="#gadae9d54c744e525135b097c618bae3c4">More...</a><br/></td></tr>
-<tr class="separator:gadae9d54c744e525135b097c618bae3c4"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga1c6eba273d4d6189eee91c6cbe7ec289"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#ga1c6eba273d4d6189eee91c6cbe7ec289">__PMU_PRESENT</a></td></tr>
-<tr class="memdesc:ga1c6eba273d4d6189eee91c6cbe7ec289"><td class="mdescLeft">&#160;</td><td class="mdescRight">PMU present or not.  <a href="#ga1c6eba273d4d6189eee91c6cbe7ec289">More...</a><br/></td></tr>
-<tr class="separator:ga1c6eba273d4d6189eee91c6cbe7ec289"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga9d4c51d9ca3eae58635d1040a3fb5fd2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#ga9d4c51d9ca3eae58635d1040a3fb5fd2">__PMU_NUM_EVENTCNT</a></td></tr>
-<tr class="memdesc:ga9d4c51d9ca3eae58635d1040a3fb5fd2"><td class="mdescLeft">&#160;</td><td class="mdescRight">PMU Event Counters.  <a href="#ga9d4c51d9ca3eae58635d1040a3fb5fd2">More...</a><br/></td></tr>
-<tr class="separator:ga9d4c51d9ca3eae58635d1040a3fb5fd2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga3580fa1aeb7c2ed580904f8f70f8a919"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#ga3580fa1aeb7c2ed580904f8f70f8a919">__ICACHE_PRESENT</a></td></tr>
-<tr class="memdesc:ga3580fa1aeb7c2ed580904f8f70f8a919"><td class="mdescLeft">&#160;</td><td class="mdescRight">Instruction Cache present or not.  <a href="#ga3580fa1aeb7c2ed580904f8f70f8a919">More...</a><br/></td></tr>
-<tr class="separator:ga3580fa1aeb7c2ed580904f8f70f8a919"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga11d3ac679daeb58d0cec0a4e6ca59010"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#ga11d3ac679daeb58d0cec0a4e6ca59010">__DCACHE_PRESENT</a></td></tr>
-<tr class="memdesc:ga11d3ac679daeb58d0cec0a4e6ca59010"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Cache present or not.  <a href="#ga11d3ac679daeb58d0cec0a4e6ca59010">More...</a><br/></td></tr>
-<tr class="separator:ga11d3ac679daeb58d0cec0a4e6ca59010"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gacbb998663708df6626abb09378303019"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__device__config.html#gacbb998663708df6626abb09378303019">__DTCM_PRESENT</a></td></tr>
-<tr class="memdesc:gacbb998663708df6626abb09378303019"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data Tightly Coupled Memory is present or not.  <a href="#gacbb998663708df6626abb09378303019">More...</a><br/></td></tr>
-<tr class="separator:gacbb998663708df6626abb09378303019"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Defines to configure and check device capabilities. </p>
-<p>These defines are used by the <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> in order to enable or disable functionality provided by CMSIS-Core(M) dependent on the device capabilities. </p>
-<h2 class="groupheader">Macro Definition Documentation</h2>
-<a class="anchor" id="ga4dd7b69d473733e59cd99fc786174cd3"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define __ARMv81MML_REV</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Armv8.1-M Baseline device Core revision r0p1. </p>
-<p>([15:8] revision number, [7:0] patch number) </p>
-
-</div>
-</div>
-<a class="anchor" id="ga645c9be694a2d5b5a5b772a0102c727a"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define __ARMv8MBL_REV</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Armv8-M Baseline device Core revision r0p1. </p>
-<p>([15:8] revision number, [7:0] patch number) </p>
-
-</div>
-</div>
-<a class="anchor" id="gadb7d425f5ad0389b0eb1c6a69f8eb214"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define __ARMv8MML_REV</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Armv8-M Mainline device Core revision r0p1. </p>
-<p>([15:8] revision number, [7:0] patch number) </p>
-
-</div>
-</div>
-<a class="anchor" id="ga905517438930a3f13cbc632e52990534"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define __CM0_REV</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Cortex-M0 Core revision r0p1. </p>
-<p>([15:8] revision number, [7:0] patch number) </p>
-
-</div>
-</div>
-<a class="anchor" id="ga2b7180ed347a0e902c5765deb46e650e"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define __CM0PLUS_REV</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Cortex-M0+ Core revision r0p1. </p>
-<p>([15:8] revision number, [7:0] patch number) </p>
-
-</div>
-</div>
-<a class="anchor" id="ga71248e1e7db00ff28754b6fd80807654"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define __CM1_REV</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Cortex-M1 Core revision r0p1. </p>
-<p>([15:8] revision number, [7:0] patch number) </p>
-
-</div>
-</div>
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-</div><div class="memdoc">
-
-<p>Cortex-M23 Core revision r0p1. </p>
-<p>([15:8] revision number, [7:0] patch number) </p>
-
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-</div>
-<a class="anchor" id="ga178e7a57b608f3e20d1c0cf18a2c2ac3"></a>
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-</div><div class="memdoc">
-
-<p>Cortex-M33 Core revision r0p1. </p>
-<p>([15:8] revision number, [7:0] patch number) </p>
-
-</div>
-</div>
-<a class="anchor" id="gadd339c07b13a763dda6e83f4c05122f6"></a>
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-</div><div class="memdoc">
-
-<p>Cortex-M35P Core revision r0p1. </p>
-<p>([15:8] revision number, [7:0] patch number) </p>
-
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-<a class="anchor" id="gac6a3f185c4640e06443c18b3c8d93f53"></a>
-<div class="memitem">
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-</div><div class="memdoc">
-
-<p>Cortex-M3 Core revision r0p1. </p>
-<p>([15:8] revision number, [7:0] patch number) </p>
-
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-<p>Cortex-M4 Core revision r0p1. </p>
-<p>([15:8] revision number, [7:0] patch number) </p>
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-
-<p>Cortex-M55 Core revision r0p1. </p>
-<p>([15:8] revision number, [7:0] patch number) </p>
-
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-
-<p>Cortex-M7 Core revision r0p1. </p>
-<p>([15:8] revision number, [7:0] patch number) </p>
-
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-</div><div class="memdoc">
-
-<p>Cortex-M85 Core revision r0p1. </p>
-<p>([15:8] revision number, [7:0] patch number) </p>
-
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-<a class="anchor" id="ga11d3ac679daeb58d0cec0a4e6ca59010"></a>
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-</div><div class="memdoc">
-
-<p>Data Cache present or not. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga165f052f5641898a02bb07096dc177b6"></a>
-<div class="memitem">
-<div class="memproto">
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-</div><div class="memdoc">
-
-<p>DSP extension present or not. </p>
-
-</div>
-</div>
-<a class="anchor" id="gacbb998663708df6626abb09378303019"></a>
-<div class="memitem">
-<div class="memproto">
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-        <tr>
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-
-<p>Data Tightly Coupled Memory is present or not. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga2a528de57b6217f9fc9d4487d0db6328"></a>
-<div class="memitem">
-<div class="memproto">
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-        <tr>
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-</div><div class="memdoc">
-
-<p>Double precision FPU present. </p>
-<p>The combination of the defines <a class="el" href="group__device__config.html#gac1ba8a48ca926bddc88be9bfd7d42641">__FPU_PRESENT</a> and <a class="el" href="group__device__config.html#ga2a528de57b6217f9fc9d4487d0db6328">__FPU_DP</a> determine the whether the FPU is with single or double precision as shown in the table below. </p>
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-<td><a class="el" href="group__device__config.html#gac1ba8a48ca926bddc88be9bfd7d42641">__FPU_PRESENT</a> </td><td><a class="el" href="group__device__config.html#ga2a528de57b6217f9fc9d4487d0db6328">__FPU_DP</a> </td><td><b>Description</b>  </td></tr>
-<tr>
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-<tr>
-<td align="center">1 </td><td align="center">0 </td><td>Processor with FPU with single precision.  </td></tr>
-<tr>
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-<p>FPU present or not. </p>
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-<tr>
-<td align="center">0 </td><td align="center"><em>ignored</em> </td><td>Processor has no FPU. The value set for <a class="el" href="group__device__config.html#ga2a528de57b6217f9fc9d4487d0db6328">__FPU_DP</a>.  </td></tr>
-<tr>
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-<p>Instruction Cache present or not. </p>
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-
-<p>MPU present or not. </p>
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-<a class="anchor" id="gae3fe3587d5100c787e02102ce3944460"></a>
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-<p>Number of Bits used for Priority Levels. </p>
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-<p>PMU Event Counters. </p>
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-<p>PMU present or not. </p>
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-<p>([15:8] revision number, [7:0] patch number) </p>
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-<p>([15:8] revision number, [7:0] patch number) </p>
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-<p>Functions that generate specific Cortex-M CPU Instructions.  
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-<tr class="memdesc:ga9feffc093d6f68b120d592a7a0d45a15"><td class="mdescLeft">&#160;</td><td class="mdescRight">LDR Exclusive (16 bit) [not for Cortex-M0, Cortex-M0+, or SC000].  <a href="#ga9feffc093d6f68b120d592a7a0d45a15">More...</a><br/></td></tr>
-<tr class="separator:ga9feffc093d6f68b120d592a7a0d45a15"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gabd78840a0f2464905b7cec791ebc6a4c"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gabd78840a0f2464905b7cec791ebc6a4c">__LDREXW</a> (volatile uint32_t *addr)</td></tr>
-<tr class="memdesc:gabd78840a0f2464905b7cec791ebc6a4c"><td class="mdescLeft">&#160;</td><td class="mdescRight">LDR Exclusive (32 bit) [not for Cortex-M0, Cortex-M0+, or SC000].  <a href="#gabd78840a0f2464905b7cec791ebc6a4c">More...</a><br/></td></tr>
-<tr class="separator:gabd78840a0f2464905b7cec791ebc6a4c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaab6482d1f59f59e2b6b7efc1af391c99"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gaab6482d1f59f59e2b6b7efc1af391c99">__STREXB</a> (uint8_t value, volatile uint8_t *addr)</td></tr>
-<tr class="memdesc:gaab6482d1f59f59e2b6b7efc1af391c99"><td class="mdescLeft">&#160;</td><td class="mdescRight">STR Exclusive (8 bit) [not for Cortex-M0, Cortex-M0+, or SC000].  <a href="#gaab6482d1f59f59e2b6b7efc1af391c99">More...</a><br/></td></tr>
-<tr class="separator:gaab6482d1f59f59e2b6b7efc1af391c99"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga0a354bdf71caa52f081a4a54e84c8d2a"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga0a354bdf71caa52f081a4a54e84c8d2a">__STREXH</a> (uint16_t value, volatile uint16_t *addr)</td></tr>
-<tr class="memdesc:ga0a354bdf71caa52f081a4a54e84c8d2a"><td class="mdescLeft">&#160;</td><td class="mdescRight">STR Exclusive (16 bit) [not for Cortex-M0, Cortex-M0+, or SC000].  <a href="#ga0a354bdf71caa52f081a4a54e84c8d2a">More...</a><br/></td></tr>
-<tr class="separator:ga0a354bdf71caa52f081a4a54e84c8d2a"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga335deaaa7991490e1450cb7d1e4c5197"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga335deaaa7991490e1450cb7d1e4c5197">__STREXW</a> (uint32_t value, volatile uint32_t *addr)</td></tr>
-<tr class="memdesc:ga335deaaa7991490e1450cb7d1e4c5197"><td class="mdescLeft">&#160;</td><td class="mdescRight">STR Exclusive (32 bit) [not for Cortex-M0, Cortex-M0+, or SC000].  <a href="#ga335deaaa7991490e1450cb7d1e4c5197">More...</a><br/></td></tr>
-<tr class="separator:ga335deaaa7991490e1450cb7d1e4c5197"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga354c5ac8870cc3dfb823367af9c4b412"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga354c5ac8870cc3dfb823367af9c4b412">__CLREX</a> (void)</td></tr>
-<tr class="memdesc:ga354c5ac8870cc3dfb823367af9c4b412"><td class="mdescLeft">&#160;</td><td class="mdescRight">Remove the exclusive lock [not for Cortex-M0, Cortex-M0+, or SC000].  <a href="#ga354c5ac8870cc3dfb823367af9c4b412">More...</a><br/></td></tr>
-<tr class="separator:ga354c5ac8870cc3dfb823367af9c4b412"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga8cfeb5ffe0e49ec6b29dafdde92e5118"><td class="memItemLeft" align="right" valign="top">int32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga8cfeb5ffe0e49ec6b29dafdde92e5118">__SSAT</a> (int32_t value, uint32_t sat)</td></tr>
-<tr class="memdesc:ga8cfeb5ffe0e49ec6b29dafdde92e5118"><td class="mdescLeft">&#160;</td><td class="mdescRight">Signed Saturate.  <a href="#ga8cfeb5ffe0e49ec6b29dafdde92e5118">More...</a><br/></td></tr>
-<tr class="separator:ga8cfeb5ffe0e49ec6b29dafdde92e5118"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga9ba87371aebd17dd6244ed3458b29b5d"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga9ba87371aebd17dd6244ed3458b29b5d">__USAT</a> (int32_t value, uint32_t sat)</td></tr>
-<tr class="memdesc:ga9ba87371aebd17dd6244ed3458b29b5d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Unsigned Saturate.  <a href="#ga9ba87371aebd17dd6244ed3458b29b5d">More...</a><br/></td></tr>
-<tr class="separator:ga9ba87371aebd17dd6244ed3458b29b5d"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga90884c591ac5d73d6069334eba9d6c02"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga90884c591ac5d73d6069334eba9d6c02">__CLZ</a> (uint32_t value)</td></tr>
-<tr class="memdesc:ga90884c591ac5d73d6069334eba9d6c02"><td class="mdescLeft">&#160;</td><td class="mdescRight">Count leading zeros.  <a href="#ga90884c591ac5d73d6069334eba9d6c02">More...</a><br/></td></tr>
-<tr class="separator:ga90884c591ac5d73d6069334eba9d6c02"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac09134f1bf9c49db07282001afcc9380"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gac09134f1bf9c49db07282001afcc9380">__RRX</a> (uint32_t value)</td></tr>
-<tr class="memdesc:gac09134f1bf9c49db07282001afcc9380"><td class="mdescLeft">&#160;</td><td class="mdescRight">Rotate Right with Extend (32 bit)  <a href="#gac09134f1bf9c49db07282001afcc9380">More...</a><br/></td></tr>
-<tr class="separator:gac09134f1bf9c49db07282001afcc9380"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga9464d75db32846aa8295c3c3adfacb41"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga9464d75db32846aa8295c3c3adfacb41">__LDRBT</a> (uint8_t ptr)</td></tr>
-<tr class="memdesc:ga9464d75db32846aa8295c3c3adfacb41"><td class="mdescLeft">&#160;</td><td class="mdescRight">LDRT Unprivileged (8 bit)  <a href="#ga9464d75db32846aa8295c3c3adfacb41">More...</a><br/></td></tr>
-<tr class="separator:ga9464d75db32846aa8295c3c3adfacb41"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaa762b8bc5634ce38cb14d62a6b2aee32"><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gaa762b8bc5634ce38cb14d62a6b2aee32">__LDRHT</a> (uint16_t ptr)</td></tr>
-<tr class="memdesc:gaa762b8bc5634ce38cb14d62a6b2aee32"><td class="mdescLeft">&#160;</td><td class="mdescRight">LDRT Unprivileged (16 bit)  <a href="#gaa762b8bc5634ce38cb14d62a6b2aee32">More...</a><br/></td></tr>
-<tr class="separator:gaa762b8bc5634ce38cb14d62a6b2aee32"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga616504f5da979ba8a073d428d6e8d5c7"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga616504f5da979ba8a073d428d6e8d5c7">__LDRT</a> (uint32_t ptr)</td></tr>
-<tr class="memdesc:ga616504f5da979ba8a073d428d6e8d5c7"><td class="mdescLeft">&#160;</td><td class="mdescRight">LDRT Unprivileged (32 bit)  <a href="#ga616504f5da979ba8a073d428d6e8d5c7">More...</a><br/></td></tr>
-<tr class="separator:ga616504f5da979ba8a073d428d6e8d5c7"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad41aa59c92c0a165b7f98428d3320cd5"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gad41aa59c92c0a165b7f98428d3320cd5">__STRBT</a> (uint8_t value, uint8_t ptr)</td></tr>
-<tr class="memdesc:gad41aa59c92c0a165b7f98428d3320cd5"><td class="mdescLeft">&#160;</td><td class="mdescRight">STRT Unprivileged (8 bit)  <a href="#gad41aa59c92c0a165b7f98428d3320cd5">More...</a><br/></td></tr>
-<tr class="separator:gad41aa59c92c0a165b7f98428d3320cd5"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga2b5d93b8e461755b1072a03df3f1722e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga2b5d93b8e461755b1072a03df3f1722e">__STRHT</a> (uint16_t value, uint16_t ptr)</td></tr>
-<tr class="memdesc:ga2b5d93b8e461755b1072a03df3f1722e"><td class="mdescLeft">&#160;</td><td class="mdescRight">STRT Unprivileged (16 bit)  <a href="#ga2b5d93b8e461755b1072a03df3f1722e">More...</a><br/></td></tr>
-<tr class="separator:ga2b5d93b8e461755b1072a03df3f1722e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga625bc4ac0b1d50de9bcd13d9f050030e"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga625bc4ac0b1d50de9bcd13d9f050030e">__STRT</a> (uint32_t value, uint32_t ptr)</td></tr>
-<tr class="memdesc:ga625bc4ac0b1d50de9bcd13d9f050030e"><td class="mdescLeft">&#160;</td><td class="mdescRight">STRT Unprivileged (32 bit)  <a href="#ga625bc4ac0b1d50de9bcd13d9f050030e">More...</a><br/></td></tr>
-<tr class="separator:ga625bc4ac0b1d50de9bcd13d9f050030e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga263b9b2d9c06d731022873acddb6aa3f"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga263b9b2d9c06d731022873acddb6aa3f">__LDAB</a> (volatile uint8_t *ptr)</td></tr>
-<tr class="memdesc:ga263b9b2d9c06d731022873acddb6aa3f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Load-Acquire (8 bit)  <a href="#ga263b9b2d9c06d731022873acddb6aa3f">More...</a><br/></td></tr>
-<tr class="separator:ga263b9b2d9c06d731022873acddb6aa3f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga5810ac0b87a37e321c2f909cd3860499"><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga5810ac0b87a37e321c2f909cd3860499">__LDAH</a> (volatile uint16_t *ptr)</td></tr>
-<tr class="memdesc:ga5810ac0b87a37e321c2f909cd3860499"><td class="mdescLeft">&#160;</td><td class="mdescRight">Load-Acquire (16 bit)  <a href="#ga5810ac0b87a37e321c2f909cd3860499">More...</a><br/></td></tr>
-<tr class="separator:ga5810ac0b87a37e321c2f909cd3860499"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga22a24f416b65c2f5a82d9f1162d9394d"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga22a24f416b65c2f5a82d9f1162d9394d">__LDA</a> (volatile uint32_t *ptr)</td></tr>
-<tr class="memdesc:ga22a24f416b65c2f5a82d9f1162d9394d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Load-Acquire (32 bit)  <a href="#ga22a24f416b65c2f5a82d9f1162d9394d">More...</a><br/></td></tr>
-<tr class="separator:ga22a24f416b65c2f5a82d9f1162d9394d"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gace025d3a1f85d2ab9bae7288838d6bc8"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gace025d3a1f85d2ab9bae7288838d6bc8">__STLB</a> (uint8_t value, volatile uint8_t *ptr)</td></tr>
-<tr class="memdesc:gace025d3a1f85d2ab9bae7288838d6bc8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Store-Release (8 bit)  <a href="#gace025d3a1f85d2ab9bae7288838d6bc8">More...</a><br/></td></tr>
-<tr class="separator:gace025d3a1f85d2ab9bae7288838d6bc8"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga25691650de536f9b248b15f6dc4a3e70"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga25691650de536f9b248b15f6dc4a3e70">__STLH</a> (uint16_t value, volatile uint16_t *ptr)</td></tr>
-<tr class="memdesc:ga25691650de536f9b248b15f6dc4a3e70"><td class="mdescLeft">&#160;</td><td class="mdescRight">Store-Release (16 bit)  <a href="#ga25691650de536f9b248b15f6dc4a3e70">More...</a><br/></td></tr>
-<tr class="separator:ga25691650de536f9b248b15f6dc4a3e70"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga5429d7083fb8d30c43cecd3a861e1672"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga5429d7083fb8d30c43cecd3a861e1672">__STL</a> (uint32_t value, volatile uint32_t *ptr)</td></tr>
-<tr class="memdesc:ga5429d7083fb8d30c43cecd3a861e1672"><td class="mdescLeft">&#160;</td><td class="mdescRight">Store-Release (32 bit)  <a href="#ga5429d7083fb8d30c43cecd3a861e1672">More...</a><br/></td></tr>
-<tr class="separator:ga5429d7083fb8d30c43cecd3a861e1672"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga513beada40cdd7123281f22482603bcc"><td class="memItemLeft" align="right" valign="top">uint8_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga513beada40cdd7123281f22482603bcc">__LDAEXB</a> (volatile uint32_t *ptr)</td></tr>
-<tr class="memdesc:ga513beada40cdd7123281f22482603bcc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Load-Acquire Exclusive (8 bit)  <a href="#ga513beada40cdd7123281f22482603bcc">More...</a><br/></td></tr>
-<tr class="separator:ga513beada40cdd7123281f22482603bcc"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga426b61640fc68f21b21ae4dc2726f3b4"><td class="memItemLeft" align="right" valign="top">uint16_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga426b61640fc68f21b21ae4dc2726f3b4">__LDAEXH</a> (volatile uint32_t *ptr)</td></tr>
-<tr class="memdesc:ga426b61640fc68f21b21ae4dc2726f3b4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Load-Acquire Exclusive (16 bit)  <a href="#ga426b61640fc68f21b21ae4dc2726f3b4">More...</a><br/></td></tr>
-<tr class="separator:ga426b61640fc68f21b21ae4dc2726f3b4"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga3c74d923529f664eda099d1b2668b3c1"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga3c74d923529f664eda099d1b2668b3c1">__LDAEX</a> (volatile uint32_t *ptr)</td></tr>
-<tr class="memdesc:ga3c74d923529f664eda099d1b2668b3c1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Load-Acquire Exclusive (32 bit)  <a href="#ga3c74d923529f664eda099d1b2668b3c1">More...</a><br/></td></tr>
-<tr class="separator:ga3c74d923529f664eda099d1b2668b3c1"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga590724a32a229978536fbbbd6cc82536"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga590724a32a229978536fbbbd6cc82536">__STLEXB</a> (uint8_t value, volatile uint8_t *ptr)</td></tr>
-<tr class="memdesc:ga590724a32a229978536fbbbd6cc82536"><td class="mdescLeft">&#160;</td><td class="mdescRight">Store-Release Exclusive (8 bit)  <a href="#ga590724a32a229978536fbbbd6cc82536">More...</a><br/></td></tr>
-<tr class="separator:ga590724a32a229978536fbbbd6cc82536"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga047c3bebca3d0ae348ab8370a046301d"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#ga047c3bebca3d0ae348ab8370a046301d">__STLEXH</a> (uint16_t value, volatile uint16_t *ptr)</td></tr>
-<tr class="memdesc:ga047c3bebca3d0ae348ab8370a046301d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Store-Release Exclusive (16 bit)  <a href="#ga047c3bebca3d0ae348ab8370a046301d">More...</a><br/></td></tr>
-<tr class="separator:ga047c3bebca3d0ae348ab8370a046301d"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gae7f955b91595cfd82a03e4b437c59afe"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__CPU__gr.html#gae7f955b91595cfd82a03e4b437c59afe">__STLEX</a> (uint32_t value, volatile uint32_t *ptr)</td></tr>
-<tr class="memdesc:gae7f955b91595cfd82a03e4b437c59afe"><td class="mdescLeft">&#160;</td><td class="mdescRight">Store-Release Exclusive (32 bit)  <a href="#gae7f955b91595cfd82a03e4b437c59afe">More...</a><br/></td></tr>
-<tr class="separator:gae7f955b91595cfd82a03e4b437c59afe"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Functions that generate specific Cortex-M CPU Instructions. </p>
-<p>The following functions generate specific Cortex-M instructions that cannot be directly accessed by the C/C++ Compiler. Refer to the <a class="el" href="index.html#ref_man_sec">Cortex-M Generic User Guides</a> for detailed information about these Cortex-M instructions.</p>
-<dl class="section note"><dt>Note</dt><dd>When using the <b>Arm Compiler Version 5 Toolchain</b> the following <a class="el" href="group__intrinsic__CPU__gr.html">Intrinsic Functions for CPU Instructions</a> are implemented using the Embedded Assembler. As the Embedded Assembler may cause side effects (Refer to <b>Arm Compiler v5.xx User Guide - Using the Inline and Embedded Assemblers of the Arm Compiler</b> for more information) it is possible to disable the following intrinsic functions and therefore the usage of the Embedded Assembler with the <b><em>define __NO_EMBEDDED_ASM</em></b>:<ul>
-<li><a class="el" href="group__intrinsic__CPU__gr.html#gaeef6f853b6df3a365c838ee5b49a7a26">__REV16</a></li>
-<li><a class="el" href="group__intrinsic__CPU__gr.html#ga211618c03a0bf3264a7b22ad626d4f0a">__REVSH</a></li>
-<li><a class="el" href="group__intrinsic__CPU__gr.html#gac09134f1bf9c49db07282001afcc9380">__RRX</a> </li>
-</ul>
-</dd></dl>
-<h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga92f5621626711931da71eaa8bf301af7"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void __BKPT </td>
-          <td>(</td>
-          <td class="paramtype">uint8_t&#160;</td>
-          <td class="paramname"><em>value</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Set Breakpoint. </p>
-<p>This function causes the processor to enter Debug state. Debug tools can use this to investigate system state when the instruction at a particular address is reached.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>is ignored by the processor. If required, a debugger can use it to obtain additional information about the breakpoint. </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="ga354c5ac8870cc3dfb823367af9c4b412"></a>
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-<div class="memproto">
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-        <tr>
-          <td class="memname">void __CLREX </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Remove the exclusive lock [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
-<p>This function removes the exclusive lock which is created by LDREX [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga90884c591ac5d73d6069334eba9d6c02"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint8_t __CLZ </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>value</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Count leading zeros. </p>
-<p>This function counts the number of leading zeros of a data value.</p>
-<p>On Armv6-M (Cortex-M0, Cortex-M0+, and SC000) this function is not available as a core instruction instruction and thus __CLZ is implemented in software.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to count the leading zeros </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>number of leading zeros in value </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gab1c9b393641dc2d397b3408fdbe72b96"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void __DMB </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Data Memory Barrier. </p>
-<p>This function ensures the apparent order of the explicit memory operations before and after the instruction, without ensuring their completion. </p>
-
-</div>
-</div>
-<a class="anchor" id="gacb2a8ca6eae1ba4b31161578b720c199"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void __DSB </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Data Synchronization Barrier. </p>
-<p>This function acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga93c09b4709394d81977300d5f84950e5"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void __ISB </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Instruction Synchronization Barrier. </p>
-<p>Instruction Synchronization Barrier flushes the pipeline in the processor, so that all instructions following the ISB are fetched from cache or memory, after the instruction has been completed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga22a24f416b65c2f5a82d9f1162d9394d"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __LDA </td>
-          <td>(</td>
-          <td class="paramtype">volatile uint32_t *&#160;</td>
-          <td class="paramname"><em>ptr</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Load-Acquire (32 bit) </p>
-<p>Executes a LDA instruction for 32 bit values. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to data </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>value of type uint32_t at (*ptr) </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga263b9b2d9c06d731022873acddb6aa3f"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint8_t __LDAB </td>
-          <td>(</td>
-          <td class="paramtype">volatile uint8_t *&#160;</td>
-          <td class="paramname"><em>ptr</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Load-Acquire (8 bit) </p>
-<p>Executes a LDAB instruction for 8 bit value. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to data </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>value of type uint8_t at (*ptr) </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga3c74d923529f664eda099d1b2668b3c1"></a>
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-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __LDAEX </td>
-          <td>(</td>
-          <td class="paramtype">volatile uint32_t *&#160;</td>
-          <td class="paramname"><em>ptr</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Load-Acquire Exclusive (32 bit) </p>
-<p>Executes a LDA exclusive instruction for 32 bit values. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to data </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>value of type uint32_t at (*ptr) </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga513beada40cdd7123281f22482603bcc"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint8_t __LDAEXB </td>
-          <td>(</td>
-          <td class="paramtype">volatile uint32_t *&#160;</td>
-          <td class="paramname"><em>ptr</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Load-Acquire Exclusive (8 bit) </p>
-<p>Executes a LDAB exclusive instruction for 8 bit value. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to data </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>value of type uint8_t at (*ptr) </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga426b61640fc68f21b21ae4dc2726f3b4"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint16_t __LDAEXH </td>
-          <td>(</td>
-          <td class="paramtype">volatile uint32_t *&#160;</td>
-          <td class="paramname"><em>ptr</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Load-Acquire Exclusive (16 bit) </p>
-<p>Executes a LDAH exclusive instruction for 16 bit values. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to data </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>value of type uint16_t at (*ptr) </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga5810ac0b87a37e321c2f909cd3860499"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint16_t __LDAH </td>
-          <td>(</td>
-          <td class="paramtype">volatile uint16_t *&#160;</td>
-          <td class="paramname"><em>ptr</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Load-Acquire (16 bit) </p>
-<p>Executes a LDAH instruction for 16 bit values. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to data </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>value of type uint16_t at (*ptr) </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga9464d75db32846aa8295c3c3adfacb41"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint8_t __LDRBT </td>
-          <td>(</td>
-          <td class="paramtype">uint8_t&#160;</td>
-          <td class="paramname"><em>ptr</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>LDRT Unprivileged (8 bit) </p>
-<p>This function executed an Unprivileged LDRT command for 8 bit value.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to data </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>value of type uint8_t at (*ptr) </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga9e3ac13d8dcf4331176b624cf6234a7e"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint8_t __LDREXB </td>
-          <td>(</td>
-          <td class="paramtype">volatile uint8_t *&#160;</td>
-          <td class="paramname"><em>addr</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>LDR Exclusive (8 bit) [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
-<p>This function executed an exclusive LDR command for 8 bit value [not for Cortex-M0, Cortex-M0+, or SC000].</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*addr</td><td>Pointer to data </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>value of type uint8_t at (*addr) </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga9feffc093d6f68b120d592a7a0d45a15"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint16_t __LDREXH </td>
-          <td>(</td>
-          <td class="paramtype">volatile uint16_t *&#160;</td>
-          <td class="paramname"><em>addr</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>LDR Exclusive (16 bit) [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
-<p>This function executed an exclusive LDR command for 16 bit values [not for Cortex-M0, Cortex-M0+, or SC000].</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*addr</td><td>Pointer to data </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>value of type uint16_t at (*addr) </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gabd78840a0f2464905b7cec791ebc6a4c"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __LDREXW </td>
-          <td>(</td>
-          <td class="paramtype">volatile uint32_t *&#160;</td>
-          <td class="paramname"><em>addr</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>LDR Exclusive (32 bit) [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
-<p>This function executed an exclusive LDR command for 32 bit values [not for Cortex-M0, Cortex-M0+, or SC000].</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">*addr</td><td>Pointer to data </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>value of type uint32_t at (*addr) </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gaa762b8bc5634ce38cb14d62a6b2aee32"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint16_t __LDRHT </td>
-          <td>(</td>
-          <td class="paramtype">uint16_t&#160;</td>
-          <td class="paramname"><em>ptr</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>LDRT Unprivileged (16 bit) </p>
-<p>This function executed an Unprivileged LDRT command for 16 bit values.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to data </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>value of type uint16_t at (*ptr) </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga616504f5da979ba8a073d428d6e8d5c7"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __LDRT </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>ptr</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>LDRT Unprivileged (32 bit) </p>
-<p>This function executed an Unprivileged LDRT command for 32 bit values.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to data </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>value of type uint32_t at (*ptr) </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gac71fad9f0a91980fecafcb450ee0a63e"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void __NOP </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>No Operation. </p>
-<p>This function does nothing. This instruction can be used for code alignment purposes. </p>
-
-</div>
-</div>
-<a class="anchor" id="gad6f9f297f6b91a995ee199fbc796b863"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __RBIT </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>value</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Reverse bit order of value. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to reverse </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>Reversed value </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga4717abc17af5ba29b1e4c055e0a0d9b8"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __REV </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>value</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Reverse byte order (32 bit) </p>
-<p>Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to reverse </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>Reversed value </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gaeef6f853b6df3a365c838ee5b49a7a26"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __REV16 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>value</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Reverse byte order (16 bit) </p>
-<p>Reverses the byte order within each halfword of a word. For example, 0x12345678 becomes 0x34127856. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to reverse </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>Reversed value </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga211618c03a0bf3264a7b22ad626d4f0a"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">int16_t __REVSH </td>
-          <td>(</td>
-          <td class="paramtype">int16_t&#160;</td>
-          <td class="paramname"><em>value</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Reverse byte order (16 bit) </p>
-<p>Reverses the byte order in a 16-bit value and returns the signed 16-bit result. For example, 0x0080 becomes 0x8000. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to reverse </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>Reversed value </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gaf66beb577bb9d90424c3d1d7f684c024"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __ROR </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>value</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>shift</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Rotate a value right by a number of bits. </p>
-<p>This function rotates a value right by a specified number of bits.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to be shifted right </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">shift</td><td>Number of bits in the range [1..31] </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>Rotated value </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gac09134f1bf9c49db07282001afcc9380"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __RRX </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>value</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Rotate Right with Extend (32 bit) </p>
-<p>This function moves each bit of a bitstring right by one bit. The carry input is shifted in at the left end of the bitstring.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to rotate </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>Rotated value </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga3c34da7eb16496ae2668a5b95fa441e7"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void __SEV </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Send Event. </p>
-<p>Send Event is a hint instruction. It causes an event to be signaled to the CPU. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga8cfeb5ffe0e49ec6b29dafdde92e5118"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">int32_t __SSAT </td>
-          <td>(</td>
-          <td class="paramtype">int32_t&#160;</td>
-          <td class="paramname"><em>value</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>sat</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Signed Saturate. </p>
-<p>This function saturates a signed value. The Q bit is set if saturation occurs [not for Cortex-M0, Cortex-M0+, or SC000].</p>
-<p>On Armv6-M (Cortex-M0, Cortex-M0+, and SC000) this function is not available as a core instruction instruction and thus __SSAT is implemented in software.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to be saturated </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">sat</td><td>Bit position to saturate to [1..32] </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>Saturated value </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga5429d7083fb8d30c43cecd3a861e1672"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void __STL </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>value</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">volatile uint32_t *&#160;</td>
-          <td class="paramname"><em>ptr</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Store-Release (32 bit) </p>
-<p>Executes a STL instruction for 32 bit values. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to location </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gace025d3a1f85d2ab9bae7288838d6bc8"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void __STLB </td>
-          <td>(</td>
-          <td class="paramtype">uint8_t&#160;</td>
-          <td class="paramname"><em>value</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">volatile uint8_t *&#160;</td>
-          <td class="paramname"><em>ptr</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Store-Release (8 bit) </p>
-<p>Executes a STLB instruction for 8 bit values. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to location </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gae7f955b91595cfd82a03e4b437c59afe"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __STLEX </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>value</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">volatile uint32_t *&#160;</td>
-          <td class="paramname"><em>ptr</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Store-Release Exclusive (32 bit) </p>
-<p>Executes a STL exclusive instruction for 32 bit values. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to location </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>0 Function succeeded </dd>
-<dd>
-1 Function failed </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga590724a32a229978536fbbbd6cc82536"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __STLEXB </td>
-          <td>(</td>
-          <td class="paramtype">uint8_t&#160;</td>
-          <td class="paramname"><em>value</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">volatile uint8_t *&#160;</td>
-          <td class="paramname"><em>ptr</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Store-Release Exclusive (8 bit) </p>
-<p>Executes a STLB exclusive instruction for 8 bit values. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to location </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>0 Function succeeded </dd>
-<dd>
-1 Function failed </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga047c3bebca3d0ae348ab8370a046301d"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __STLEXH </td>
-          <td>(</td>
-          <td class="paramtype">uint16_t&#160;</td>
-          <td class="paramname"><em>value</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">volatile uint16_t *&#160;</td>
-          <td class="paramname"><em>ptr</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Store-Release Exclusive (16 bit) </p>
-<p>Executes a STLH exclusive instruction for 16 bit values. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to location </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>0 Function succeeded </dd>
-<dd>
-1 Function failed </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga25691650de536f9b248b15f6dc4a3e70"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void __STLH </td>
-          <td>(</td>
-          <td class="paramtype">uint16_t&#160;</td>
-          <td class="paramname"><em>value</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">volatile uint16_t *&#160;</td>
-          <td class="paramname"><em>ptr</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Store-Release (16 bit) </p>
-<p>Executes a STLH instruction for 16 bit values. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to location </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Architecture. </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gad41aa59c92c0a165b7f98428d3320cd5"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void __STRBT </td>
-          <td>(</td>
-          <td class="paramtype">uint8_t&#160;</td>
-          <td class="paramname"><em>value</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint8_t&#160;</td>
-          <td class="paramname"><em>ptr</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>STRT Unprivileged (8 bit) </p>
-<p>This function executed an Unprivileged STRT command for 8 bit values.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to location </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="gaab6482d1f59f59e2b6b7efc1af391c99"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __STREXB </td>
-          <td>(</td>
-          <td class="paramtype">uint8_t&#160;</td>
-          <td class="paramname"><em>value</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">volatile uint8_t *&#160;</td>
-          <td class="paramname"><em>addr</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>STR Exclusive (8 bit) [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
-<p>This function executed an exclusive STR command for 8 bit values [not for Cortex-M0, Cortex-M0+, or SC000].</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*addr</td><td>Pointer to location </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>0 Function succeeded </dd>
-<dd>
-1 Function failed </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga0a354bdf71caa52f081a4a54e84c8d2a"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __STREXH </td>
-          <td>(</td>
-          <td class="paramtype">uint16_t&#160;</td>
-          <td class="paramname"><em>value</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">volatile uint16_t *&#160;</td>
-          <td class="paramname"><em>addr</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>STR Exclusive (16 bit) [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
-<p>This function executed an exclusive STR command for 16 bit values [not for Cortex-M0, Cortex-M0+, or SC000].</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*addr</td><td>Pointer to location </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>0 Function succeeded </dd>
-<dd>
-1 Function failed </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga335deaaa7991490e1450cb7d1e4c5197"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __STREXW </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>value</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">volatile uint32_t *&#160;</td>
-          <td class="paramname"><em>addr</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>STR Exclusive (32 bit) [not for Cortex-M0, Cortex-M0+, or SC000]. </p>
-<p>This function executed an exclusive STR command for 32 bit values [not for Cortex-M0, Cortex-M0+, or SC000].</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">*addr</td><td>Pointer to location </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>0 Function succeeded </dd>
-<dd>
-1 Function failed </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga2b5d93b8e461755b1072a03df3f1722e"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void __STRHT </td>
-          <td>(</td>
-          <td class="paramtype">uint16_t&#160;</td>
-          <td class="paramname"><em>value</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint16_t&#160;</td>
-          <td class="paramname"><em>ptr</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>STRT Unprivileged (16 bit) </p>
-<p>This function executed an Unprivileged STRT command for 16 bit values.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to location </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="ga625bc4ac0b1d50de9bcd13d9f050030e"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void __STRT </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>value</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>ptr</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>STRT Unprivileged (32 bit) </p>
-<p>This function executed an Unprivileged STRT command for 32 bit values.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">value</td><td>Value to store </td></tr>
-    <tr><td class="paramdir">[in]</td><td class="paramname">ptr</td><td>Pointer to location </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="ga9ba87371aebd17dd6244ed3458b29b5d"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __USAT </td>
-          <td>(</td>
-          <td class="paramtype">int32_t&#160;</td>
-          <td class="paramname"><em>value</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>sat</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
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-<p>Access to dedicated SIMD instructions available on Armv7E-M (Cortex-M4/M7), Armv8-M Mainline (Cortex-M33/M35P), and Armv8.1-M (Cortex-M55/M85).  
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-<tr class="memdesc:ga9736fe816aec74fe886e7fb949734eab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Quad 8-bit unsigned saturating subtraction.  <a href="#ga9736fe816aec74fe886e7fb949734eab">More...</a><br/></td></tr>
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-<tr class="memdesc:gad032bd21f013c5d29f5fcb6b0f02bc3f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Unsigned sum of quad 8-bit unsigned absolute difference with 32-bit accumulate.  <a href="#gad032bd21f013c5d29f5fcb6b0f02bc3f">More...</a><br/></td></tr>
-<tr class="separator:gad032bd21f013c5d29f5fcb6b0f02bc3f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga95e666b82216066bf6064d1244e6883c"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#ga95e666b82216066bf6064d1244e6883c">__SSAT16</a> (uint32_t val1, const uint32_t val2)</td></tr>
-<tr class="memdesc:ga95e666b82216066bf6064d1244e6883c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q setting dual 16-bit saturate.  <a href="#ga95e666b82216066bf6064d1244e6883c">More...</a><br/></td></tr>
-<tr class="separator:ga95e666b82216066bf6064d1244e6883c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga967f516afff5900cf30f1a81907cdd89"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#ga967f516afff5900cf30f1a81907cdd89">__USAT16</a> (uint32_t val1, const uint32_t val2)</td></tr>
-<tr class="memdesc:ga967f516afff5900cf30f1a81907cdd89"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q setting dual 16-bit unsigned saturate.  <a href="#ga967f516afff5900cf30f1a81907cdd89">More...</a><br/></td></tr>
-<tr class="separator:ga967f516afff5900cf30f1a81907cdd89"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab41d713653b16f8d9fef44d14e397228"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#gab41d713653b16f8d9fef44d14e397228">__UXTB16</a> (uint32_t val)</td></tr>
-<tr class="memdesc:gab41d713653b16f8d9fef44d14e397228"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dual extract 8-bits and zero-extend to 16-bits.  <a href="#gab41d713653b16f8d9fef44d14e397228">More...</a><br/></td></tr>
-<tr class="separator:gab41d713653b16f8d9fef44d14e397228"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad25ce96db0f17096bbd815f4817faf09"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#gad25ce96db0f17096bbd815f4817faf09">__UXTAB16</a> (uint32_t val1, uint32_t val2)</td></tr>
-<tr class="memdesc:gad25ce96db0f17096bbd815f4817faf09"><td class="mdescLeft">&#160;</td><td class="mdescRight">Extracted 16-bit to 32-bit unsigned addition.  <a href="#gad25ce96db0f17096bbd815f4817faf09">More...</a><br/></td></tr>
-<tr class="separator:gad25ce96db0f17096bbd815f4817faf09"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga38dce3dd13ba212e80ec3cff4abeb11a"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#ga38dce3dd13ba212e80ec3cff4abeb11a">__SXTB16</a> (uint32_t val)</td></tr>
-<tr class="memdesc:ga38dce3dd13ba212e80ec3cff4abeb11a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dual extract 8-bits and sign extend each to 16-bits.  <a href="#ga38dce3dd13ba212e80ec3cff4abeb11a">More...</a><br/></td></tr>
-<tr class="separator:ga38dce3dd13ba212e80ec3cff4abeb11a"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaef7e08ba1dbaaae1efdb76c113155ed1"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#gaef7e08ba1dbaaae1efdb76c113155ed1">__SXTB16_RORn</a> (uint32_t val, uint32_r rotate)</td></tr>
-<tr class="memdesc:gaef7e08ba1dbaaae1efdb76c113155ed1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Rotate right, dual extract 8-bits and sign extend each to 16-bits.  <a href="#gaef7e08ba1dbaaae1efdb76c113155ed1">More...</a><br/></td></tr>
-<tr class="separator:gaef7e08ba1dbaaae1efdb76c113155ed1"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac540b4fc41d30778ba102d2a65db5589"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#gac540b4fc41d30778ba102d2a65db5589">__SXTAB16</a> (uint32_t val1, uint32_t val2)</td></tr>
-<tr class="memdesc:gac540b4fc41d30778ba102d2a65db5589"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dual extracted 8-bit to 16-bit signed addition.  <a href="#gac540b4fc41d30778ba102d2a65db5589">More...</a><br/></td></tr>
-<tr class="separator:gac540b4fc41d30778ba102d2a65db5589"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf0029ec2b0decbff4df5bc6f4352bba4"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#gaf0029ec2b0decbff4df5bc6f4352bba4">__SXTAB16_RORn</a> (uint32_t val1, uint32_t val2, uint32_r rotate)</td></tr>
-<tr class="memdesc:gaf0029ec2b0decbff4df5bc6f4352bba4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Rotate right, followed by sign extension of two 8-bits with add to 16-bits.  <a href="#gaf0029ec2b0decbff4df5bc6f4352bba4">More...</a><br/></td></tr>
-<tr class="separator:gaf0029ec2b0decbff4df5bc6f4352bba4"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gae326e368a1624d2dfb4b97c626939257"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#gae326e368a1624d2dfb4b97c626939257">__SMUAD</a> (uint32_t val1, uint32_t val2)</td></tr>
-<tr class="memdesc:gae326e368a1624d2dfb4b97c626939257"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q setting sum of dual 16-bit signed multiply.  <a href="#gae326e368a1624d2dfb4b97c626939257">More...</a><br/></td></tr>
-<tr class="separator:gae326e368a1624d2dfb4b97c626939257"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaee6390f86965cb662500f690b0012092"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#gaee6390f86965cb662500f690b0012092">__SMUADX</a> (uint32_t val1, uint32_t val2)</td></tr>
-<tr class="memdesc:gaee6390f86965cb662500f690b0012092"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q setting sum of dual 16-bit signed multiply with exchange.  <a href="#gaee6390f86965cb662500f690b0012092">More...</a><br/></td></tr>
-<tr class="separator:gaee6390f86965cb662500f690b0012092"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaea60757232f740ec6b09980eebb614ff"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#gaea60757232f740ec6b09980eebb614ff">__SMMLA</a> (int32_t val1, int32_t val2, int32_t val3)</td></tr>
-<tr class="memdesc:gaea60757232f740ec6b09980eebb614ff"><td class="mdescLeft">&#160;</td><td class="mdescRight">32-bit signed multiply with 32-bit truncated accumulator.  <a href="#gaea60757232f740ec6b09980eebb614ff">More...</a><br/></td></tr>
-<tr class="separator:gaea60757232f740ec6b09980eebb614ff"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gae0c86f3298532183f3a29f5bb454d354"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#gae0c86f3298532183f3a29f5bb454d354">__SMLAD</a> (uint32_t val1, uint32_t val2, uint32_t val3)</td></tr>
-<tr class="memdesc:gae0c86f3298532183f3a29f5bb454d354"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q setting dual 16-bit signed multiply with single 32-bit accumulator.  <a href="#gae0c86f3298532183f3a29f5bb454d354">More...</a><br/></td></tr>
-<tr class="separator:gae0c86f3298532183f3a29f5bb454d354"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga9c286d330f4fb29b256335add91eec9f"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#ga9c286d330f4fb29b256335add91eec9f">__SMLADX</a> (uint32_t val1, uint32_t val2, uint32_t val3)</td></tr>
-<tr class="memdesc:ga9c286d330f4fb29b256335add91eec9f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q setting pre-exchanged dual 16-bit signed multiply with single 32-bit accumulator.  <a href="#ga9c286d330f4fb29b256335add91eec9f">More...</a><br/></td></tr>
-<tr class="separator:ga9c286d330f4fb29b256335add91eec9f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad80e9b20c1736fd798f897362273a146"><td class="memItemLeft" align="right" valign="top">uint64_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#gad80e9b20c1736fd798f897362273a146">__SMLALD</a> (uint32_t val1, uint32_t val2, uint64_t val3)</td></tr>
-<tr class="memdesc:gad80e9b20c1736fd798f897362273a146"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dual 16-bit signed multiply with single 64-bit accumulator.  <a href="#gad80e9b20c1736fd798f897362273a146">More...</a><br/></td></tr>
-<tr class="separator:gad80e9b20c1736fd798f897362273a146"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad1adad1b3f2667328cc0db6c6b4f41cf"><td class="memItemLeft" align="right" valign="top">unsigned long long&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#gad1adad1b3f2667328cc0db6c6b4f41cf">__SMLALDX</a> (uint32_t val1, uint32_t val2, unsigned long long val3)</td></tr>
-<tr class="memdesc:gad1adad1b3f2667328cc0db6c6b4f41cf"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dual 16-bit signed multiply with exchange with single 64-bit accumulator.  <a href="#gad1adad1b3f2667328cc0db6c6b4f41cf">More...</a><br/></td></tr>
-<tr class="separator:gad1adad1b3f2667328cc0db6c6b4f41cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga039142a5368840683cf329cb55b73f84"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#ga039142a5368840683cf329cb55b73f84">__SMUSD</a> (uint32_t val1, uint32_t val2)</td></tr>
-<tr class="memdesc:ga039142a5368840683cf329cb55b73f84"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dual 16-bit signed multiply returning difference.  <a href="#ga039142a5368840683cf329cb55b73f84">More...</a><br/></td></tr>
-<tr class="separator:ga039142a5368840683cf329cb55b73f84"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gabb5bcba694bf17b141c32e6a8474f60e"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#gabb5bcba694bf17b141c32e6a8474f60e">__SMUSDX</a> (uint32_t val1, uint32_t val2)</td></tr>
-<tr class="memdesc:gabb5bcba694bf17b141c32e6a8474f60e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Dual 16-bit signed multiply with exchange returning difference.  <a href="#gabb5bcba694bf17b141c32e6a8474f60e">More...</a><br/></td></tr>
-<tr class="separator:gabb5bcba694bf17b141c32e6a8474f60e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf4350af7f2030c36f43b2c104a9d16cd"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#gaf4350af7f2030c36f43b2c104a9d16cd">__SMLSD</a> (uint32_t val1, uint32_t val2, uint32_t val3)</td></tr>
-<tr class="memdesc:gaf4350af7f2030c36f43b2c104a9d16cd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q setting dual 16-bit signed multiply subtract with 32-bit accumulate.  <a href="#gaf4350af7f2030c36f43b2c104a9d16cd">More...</a><br/></td></tr>
-<tr class="separator:gaf4350af7f2030c36f43b2c104a9d16cd"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga5290ce5564770ad124910d2583dc0a9e"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#ga5290ce5564770ad124910d2583dc0a9e">__SMLSDX</a> (uint32_t val1, uint32_t val2, uint32_t val3)</td></tr>
-<tr class="memdesc:ga5290ce5564770ad124910d2583dc0a9e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q setting dual 16-bit signed multiply with exchange subtract with 32-bit accumulate.  <a href="#ga5290ce5564770ad124910d2583dc0a9e">More...</a><br/></td></tr>
-<tr class="separator:ga5290ce5564770ad124910d2583dc0a9e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga5611f7314e0c8f53da377918dfbf42ee"><td class="memItemLeft" align="right" valign="top">uint64_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#ga5611f7314e0c8f53da377918dfbf42ee">__SMLSLD</a> (uint32_t val1, uint32_t val2, uint64_t val3)</td></tr>
-<tr class="memdesc:ga5611f7314e0c8f53da377918dfbf42ee"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q setting dual 16-bit signed multiply subtract with 64-bit accumulate.  <a href="#ga5611f7314e0c8f53da377918dfbf42ee">More...</a><br/></td></tr>
-<tr class="separator:ga5611f7314e0c8f53da377918dfbf42ee"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga83e69ef81057d3cbd06863d729385187"><td class="memItemLeft" align="right" valign="top">unsigned long long&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#ga83e69ef81057d3cbd06863d729385187">__SMLSLDX</a> (uint32_t val1, uint32_t val2, unsigned long long val3)</td></tr>
-<tr class="memdesc:ga83e69ef81057d3cbd06863d729385187"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q setting dual 16-bit signed multiply with exchange subtract with 64-bit accumulate.  <a href="#ga83e69ef81057d3cbd06863d729385187">More...</a><br/></td></tr>
-<tr class="separator:ga83e69ef81057d3cbd06863d729385187"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf5448e591fe49161b6759b48aecb08fe"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#gaf5448e591fe49161b6759b48aecb08fe">__SEL</a> (uint32_t val1, uint32_t val2)</td></tr>
-<tr class="memdesc:gaf5448e591fe49161b6759b48aecb08fe"><td class="mdescLeft">&#160;</td><td class="mdescRight">Select bytes based on GE bits.  <a href="#gaf5448e591fe49161b6759b48aecb08fe">More...</a><br/></td></tr>
-<tr class="separator:gaf5448e591fe49161b6759b48aecb08fe"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga17b873f246c9f5e9355760ffef3dad4a"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#ga17b873f246c9f5e9355760ffef3dad4a">__QADD</a> (uint32_t val1, uint32_t val2)</td></tr>
-<tr class="memdesc:ga17b873f246c9f5e9355760ffef3dad4a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q setting saturating add.  <a href="#ga17b873f246c9f5e9355760ffef3dad4a">More...</a><br/></td></tr>
-<tr class="separator:ga17b873f246c9f5e9355760ffef3dad4a"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga3ba259f8f05a36f7b88b469a71ffc096"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#ga3ba259f8f05a36f7b88b469a71ffc096">__QSUB</a> (uint32_t val1, uint32_t val2)</td></tr>
-<tr class="memdesc:ga3ba259f8f05a36f7b88b469a71ffc096"><td class="mdescLeft">&#160;</td><td class="mdescRight">Q setting saturating subtract.  <a href="#ga3ba259f8f05a36f7b88b469a71ffc096">More...</a><br/></td></tr>
-<tr class="separator:ga3ba259f8f05a36f7b88b469a71ffc096"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaefb8ebf3a54e197464da1ff69a44f4b5"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#gaefb8ebf3a54e197464da1ff69a44f4b5">__PKHBT</a> (uint32_t val1, uint32_t val2, uint32_t val3)</td></tr>
-<tr class="memdesc:gaefb8ebf3a54e197464da1ff69a44f4b5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Halfword packing instruction. Combines bits[15:0] of <em>val1</em> with bits[31:16] of <em>val2</em> levitated with the <em>val3</em>.  <a href="#gaefb8ebf3a54e197464da1ff69a44f4b5">More...</a><br/></td></tr>
-<tr class="separator:gaefb8ebf3a54e197464da1ff69a44f4b5"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gafd8fe4a6d87e947caa81a69ec36c1666"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__intrinsic__SIMD__gr.html#gafd8fe4a6d87e947caa81a69ec36c1666">__PKHTB</a> (uint32_t val1, uint32_t val2, uint32_t val3)</td></tr>
-<tr class="memdesc:gafd8fe4a6d87e947caa81a69ec36c1666"><td class="mdescLeft">&#160;</td><td class="mdescRight">Halfword packing instruction. Combines bits[31:16] of <em>val1</em> with bits[15:0] of <em>val2</em> right-shifted with the <em>val3</em>.  <a href="#gafd8fe4a6d87e947caa81a69ec36c1666">More...</a><br/></td></tr>
-<tr class="separator:gafd8fe4a6d87e947caa81a69ec36c1666"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Access to dedicated SIMD instructions available on Armv7E-M (Cortex-M4/M7), Armv8-M Mainline (Cortex-M33/M35P), and Armv8.1-M (Cortex-M55/M85). </p>
-<p><b>Single Instruction Multiple Data (SIMD)</b> extensions are provided <b>only for Cortex-M4 and Cortex-M7 cores</b> to simplify development of application software. SIMD extensions increase the processing capability without materially increasing the power consumption. The SIMD extensions are completely transparent to the operating system (OS), allowing existing OS ports to be used.</p>
-<p><b>SIMD Features:</b></p>
-<ul>
-<li>Simultaneous computation of 2x16-bit or 4x8-bit operands</li>
-<li>Fractional arithmetic</li>
-<li>User definable saturation modes (arbitrary word-width)</li>
-<li>Dual 16x16 multiply-add/subtract 32x32 fractional MAC</li>
-<li>Simultaneous 8/16-bit select operations</li>
-<li>Performance up to 3.2 GOPS at 800MHz</li>
-<li>Performance is achieved with a "near zero" increase in power consumption on a typical implementation</li>
-</ul>
-<p><b>Examples:</b> </p>
-<p><b>Addition:</b> Add two values using SIMD function</p>
-<div class="fragment"><div class="line">uint32_t add_halfwords(uint32_t val1, uint32_t val2)</div>
-<div class="line">{</div>
-<div class="line">  <span class="keywordflow">return</span> <a class="code" href="group__intrinsic__SIMD__gr.html#gad0bf46373a1c05aabf64517e84be5984">__SADD16</a>(val1, val2);</div>
-<div class="line">}</div>
-</div><!-- fragment --><p><b>Subtraction:</b> Subtract two values using SIMD function</p>
-<div class="fragment"><div class="line">uint32_t sub_halfwords(uint32_t val1, uint32_t val2)</div>
-<div class="line">{</div>
-<div class="line">  <span class="keywordflow">return</span> <a class="code" href="group__intrinsic__SIMD__gr.html#ga4262f73be75efbac6b46ab7c71aa6cbc">__SSUB16</a>(val1, val2);</div>
-<div class="line">}</div>
-</div><!-- fragment --><p><b>Multiplication:</b> Performing a multiplication using SIMD function</p>
-<div class="fragment"><div class="line">uint32_t dual_mul_add_products(uint32_t val1, uint32_t val2)</div>
-<div class="line">{</div>
-<div class="line">  <span class="keywordflow">return</span> <a class="code" href="group__intrinsic__SIMD__gr.html#gae326e368a1624d2dfb4b97c626939257">__SMUAD</a>(val1, val2);</div>
-<div class="line">}</div>
-</div><!-- fragment --> <h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="gaefb8ebf3a54e197464da1ff69a44f4b5"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __PKHBT </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val3</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Halfword packing instruction. Combines bits[15:0] of <em>val1</em> with bits[31:16] of <em>val2</em> levitated with the <em>val3</em>. </p>
-<p>Combine a halfword from one register with a halfword from another register. The second argument can be left-shifted before extraction of the halfword. The registers PC and SP are not allowed as arguments. This instruction does not change the flags.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first 16-bit operands </td></tr>
-    <tr><td class="paramname">val2</td><td>second 16-bit operands </td></tr>
-    <tr><td class="paramname">val3</td><td>value for left-shifting <em>val2</em>. Value range [0..31].</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the combination of halfwords.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = val1[15:0]</div>
-<div class="line">res[31:16] = val2[31:16]&lt;&lt;val3</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gafd8fe4a6d87e947caa81a69ec36c1666"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __PKHTB </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val3</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Halfword packing instruction. Combines bits[31:16] of <em>val1</em> with bits[15:0] of <em>val2</em> right-shifted with the <em>val3</em>. </p>
-<p>Combines a halfword from one register with a halfword from another register. The second argument can be right-shifted before extraction of the halfword. The registers PC and SP are not allowed as arguments. This instruction does not change the flags.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>second 16-bit operands </td></tr>
-    <tr><td class="paramname">val2</td><td>first 16-bit operands </td></tr>
-    <tr><td class="paramname">val3</td><td>value for right-shifting <em>val2</em>. Value range [1..32].</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the combination of halfwords.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = val2[15:0]&gt;&gt;val3</div>
-<div class="line">res[31:16] = val1[31:16]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga17b873f246c9f5e9355760ffef3dad4a"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __QADD </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Q setting saturating add. </p>
-<p>This function enables you to obtain the saturating add of two integers.<br/>
- The Q bit is set if the operation saturates.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first summand of the saturating add operation. </td></tr>
-    <tr><td class="paramname">val2</td><td>second summand of the saturating add operation.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the saturating addition of val1 and val2.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[31:0] = SAT(val1 + SAT(val2))</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gae83a53ec04b496304bed6d9fe8f7461b"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __QADD16 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Q setting dual 16-bit saturating addition. </p>
-<p>This function enables you to perform two 16-bit integer arithmetic additions in parallel, saturating the results to the 16-bit signed integer range -2<sup>15</sup> &lt;= x &lt;= 2<sup>15</sup> - 1.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first two 16-bit summands. </td></tr>
-    <tr><td class="paramname">val2</td><td>second two 16-bit summands.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the saturated addition of the low halfwords, in the low halfword of the return value. </li>
-<li>the saturated addition of the high halfwords, in the high halfword of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>The returned results are saturated to the 16-bit signed integer range -2<sup>15</sup> &lt;= x &lt;= 2<sup>15</sup> - 1</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = val1[15:0]  + val2[15:0]</div>
-<div class="line">res[31:16] = val1[31:16] + val2[31:16]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gaf2f5a9132dcfc6d01d34cd971c425713"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __QADD8 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Q setting quad 8-bit saturating addition. </p>
-<p>This function enables you to perform four 8-bit integer additions, saturating the results to the 8-bit signed integer range -2<sup>7</sup> &lt;= x &lt;= 2<sup>7</sup> - 1. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first four 8-bit summands. </td></tr>
-    <tr><td class="paramname">val2</td><td>second four 8-bit summands.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the saturated addition of the first byte of each operand in the first byte of the return value. </li>
-<li>the saturated addition of the second byte of each operand in the second byte of the return value. </li>
-<li>the saturated addition of the third byte of each operand in the third byte of the return value. </li>
-<li>the saturated addition of the fourth byte of each operand in the fourth byte of the return value. </li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>The returned results are saturated to the 16-bit signed integer range -2<sup>7</sup> &lt;= x &lt;= 2<sup>7</sup> - 1.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0]   = val1[7:0]   + val2[7:0]</div>
-<div class="line">res[15:8]  = val1[15:8]  + val2[15:8]</div>
-<div class="line">res[23:16] = val1[23:16] + val2[23:16]</div>
-<div class="line">res[31:24] = val1[31:24] + val2[31:24]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga87618799672e1511e33964bc71467eb3"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __QASX </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Q setting dual 16-bit add and subtract with exchange. </p>
-<p>This function enables you to exchange the halfwords of the one operand, then add the high halfwords and subtract the low halfwords, saturating the results to the 16-bit signed integer range -2<sup>15</sup> &lt;= x &lt;= 2<sup>15</sup> - 1.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first operand for the subtraction in the low halfword, and the first operand for the addition in the high halfword. </td></tr>
-    <tr><td class="paramname">val2</td><td>second operand for the subtraction in the high halfword, and the second operand for the addition in the low halfword.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the saturated subtraction of the high halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value. </li>
-<li>the saturated addition of the high halfword in the first operand and the low halfword in the second operand, in the high halfword of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>The returned results are saturated to the 16-bit signed integer range -2<sup>15</sup> &lt;= x &lt;= 2<sup>15</sup> - 1.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = val1[15:0]  - val2[31:16]</div>
-<div class="line">res[31:16] = val1[31:16] + val2[15:0]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gab41eb2b17512ab01d476fc9d5bd19520"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __QSAX </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Q setting dual 16-bit subtract and add with exchange. </p>
-<p>This function enables you to exchange the halfwords of one operand, then subtract the high halfwords and add the low halfwords, saturating the results to the 16-bit signed integer range -2<sup>15</sup> &lt;= x &lt;= 2<sup>15</sup> - 1.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first operand for the addition in the low halfword, and the first operand for the subtraction in the high halfword. </td></tr>
-    <tr><td class="paramname">val2</td><td>second operand for the addition in the high halfword, and the second operand for the subtraction in the low halfword.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the saturated addition of the low halfword of the first operand and the high halfword of the second operand, in the low halfword of the return value. </li>
-<li>the saturated subtraction of the low halfword of the second operand from the high halfword of the first operand, in the high halfword of the return value. </li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>The returned results are saturated to the 16-bit signed integer range -2<sup>15</sup> &lt;= x &lt;= 2<sup>15</sup> - 1.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = val1[15:0]  + val2[31:16]</div>
-<div class="line">res[31:16] = val1[31:16] - val2[15:0]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga3ba259f8f05a36f7b88b469a71ffc096"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __QSUB </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Q setting saturating subtract. </p>
-<p>This function enables you to obtain the saturating subtraction of two integers.<br/>
- The Q bit is set if the operation saturates.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>minuend of the saturating subtraction operation. </td></tr>
-    <tr><td class="paramname">val2</td><td>subtrahend of the saturating subtraction operation.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the saturating subtraction of val1 and val2.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[31:0] = SAT(val1 - SAT(val2))</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gad089605c16df9823a2c8aaa37777aae5"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __QSUB16 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Q setting dual 16-bit saturating subtract. </p>
-<p>This function enables you to perform two 16-bit integer subtractions, saturating the results to the 16-bit signed integer range -2<sup>15</sup> &lt;= x &lt;= 2<sup>15</sup> - 1.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first two 16-bit operands. </td></tr>
-    <tr><td class="paramname">val2</td><td>second two 16-bit operands.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the saturated subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the returned result. </li>
-<li>the saturated subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the returned result.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>The returned results are saturated to the 16-bit signed integer range -2<sup>15</sup> &lt;= x &lt;= 2<sup>15</sup> - 1.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = val1[15:0]  - val2[15:0]</div>
-<div class="line">res[31:16] = val1[31:16] - val2[31:16]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga753493a65493880c28baa82c151a0d61"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __QSUB8 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Q setting quad 8-bit saturating subtract. </p>
-<p>This function enables you to perform four 8-bit integer subtractions, saturating the results to the 8-bit signed integer range -2<sup>7</sup> &lt;= x &lt;= 2<sup>7</sup> - 1.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first four 8-bit operands. </td></tr>
-    <tr><td class="paramname">val2</td><td>second four 8-bit operands.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the subtraction of the first byte in the second operand from the first byte in the first operand, in the first bytes of the return value. </li>
-<li>the subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value. </li>
-<li>the subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value. </li>
-<li>the subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>The returned results are saturated to the 8-bit signed integer range -2<sup>7</sup> &lt;= x &lt;= 2<sup>7</sup> - 1.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0]   = val1[7:0]   - val2[7:0]</div>
-<div class="line">res[15:8]  = val1[15:8]  - val2[15:8]</div>
-<div class="line">res[23:16] = val1[23:16] - val2[23:16]</div>
-<div class="line">res[31:24] = val1[31:24] - val2[31:24]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gad0bf46373a1c05aabf64517e84be5984"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SADD16 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>GE setting dual 16-bit signed addition. </p>
-<p>This function enables you to perform two 16-bit signed integer additions.<br/>
- The GE bits in the APSR are set according to the results of the additions.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first two 16-bit summands. </td></tr>
-    <tr><td class="paramname">val2</td><td>second two 16-bit summands.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the addition of the low halfwords in the low halfword of the return value. </li>
-<li>the addition of the high halfwords in the high halfword of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation. </dd></dl>
-<dl class="section user"><dt></dt><dd>If <em>res</em> is the return value, then: <ul>
-<li>if res[15:0] &gt;= 0 then APSR.GE[1:0] = 11 else 00 </li>
-<li>if res[31:16] &gt;= 0 then APSR.GE[3:2] = 11 else 00</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = val1[15:0]  + val2[15:0]</div>
-<div class="line">res[31:16] = val1[31:16] + val2[31:16]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gac20aa0f741d0a1494d58c531e38d5785"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SADD8 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>GE setting quad 8-bit signed addition. </p>
-<p>This function performs four 8-bit signed integer additions. The GE bits of the APSR are set according to the results of the additions. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first four 8-bit summands. </td></tr>
-    <tr><td class="paramname">val2</td><td>second four 8-bit summands.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the addition of the first bytes from each operand, in the first byte of the return value. </li>
-<li>the addition of the second bytes of each operand, in the second byte of the return value. </li>
-<li>the addition of the third bytes of each operand, in the third byte of the return value. </li>
-<li>the addition of the fourth bytes of each operand, in the fourth byte of the return value. </li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation. </dd></dl>
-<dl class="section user"><dt></dt><dd>If <em>res</em> is the return value, then: <ul>
-<li>if res[7:0] &gt;= 0 then APSR.GE[0] = 1 else 0 </li>
-<li>if res[15:8] &gt;= 0 then APSR.GE[1] = 1 else 0 </li>
-<li>if res[23:16] &gt;= 0 then APSR.GE[2] = 1 else 0 </li>
-<li>if res[31:24] &gt;= 0 then APSR.GE[3] = 1 else 0</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0]   = val1[7:0]   + val2[7:0]</div>
-<div class="line">res[15:8]  = val1[15:8]  + val2[15:8]</div>
-<div class="line">res[23:16] = val1[23:16] + val2[23:16]</div>
-<div class="line">res[31:24] = val1[31:24] + val2[31:24]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga5845084fd99c872e98cf5553d554de2a"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SASX </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>GE setting dual 16-bit addition and subtraction with exchange. </p>
-<p>This function inserts an SASX instruction into the instruction stream generated by the compiler. It enables you to exchange the halfwords of the second operand, add the high halfwords and subtract the low halfwords.<br/>
- The GE bits in the APRS are set according to the results.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first operand for the subtraction in the low halfword, and the first operand for the addition in the high halfword. </td></tr>
-    <tr><td class="paramname">val2</td><td>second operand for the subtraction in the high halfword, and the second operand for the addition in the low halfword.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the subtraction of the high halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value. </li>
-<li>the addition of the high halfword in the first operand and the low halfword in the second operand, in the high halfword of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation. </dd></dl>
-<dl class="section user"><dt></dt><dd>If <em>res</em> is the return value, then: <ul>
-<li>if res[15:0] &gt;= 0 then APSR.GE[1:0] = 11 else 00 </li>
-<li>if res[31:16] &gt;= 0 then APSR.GE[3:2] = 11 else 00</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = val1[15:0]  - val2[31:16]</div>
-<div class="line">res[31:16] = val1[31:16] + val2[15:0]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gaf5448e591fe49161b6759b48aecb08fe"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SEL </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Select bytes based on GE bits. </p>
-<p>This function inserts a SEL instruction into the instruction stream generated by the compiler. It enables you to select bytes from the input parameters, whereby the bytes that are selected depend upon the results of previous SIMD instruction function. The results of previous SIMD instruction function are represented by the Greater than or Equal flags in the Application Program Status Register (APSR). The __SEL function works equally well on both halfword and byte operand function results. This is because halfword operand operations set two (duplicate) GE bits per value.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>four selectable 8-bit values. </td></tr>
-    <tr><td class="paramname">val2</td><td>four selectable 8-bit values.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>The function selects bytes from the input parameters and returns them in the return value, res, according to the following criteria: <ul>
-<li>if APSR.GE[0] == 1 then res[7:0] = val1[7:0] else res[7:0] = val2[7:0] </li>
-<li>if APSR.GE[1] == 1 then res[15:8] = val1[15:8] else res[15:8] = val2[15:8] </li>
-<li>if APSR.GE[2] == 1 then res[23:16] = val1[23:16] else res[23:16] = val2[23:16] </li>
-<li>if APSR.GE[3] == 1 then res[31;24] = val1[31:24] else res = val2[31:24] </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga15d8899a173effb8ad8c7268da32b60e"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SHADD16 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Dual 16-bit signed addition with halved results. </p>
-<p>This function enables you to perform two signed 16-bit integer additions, halving the results.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first two 16-bit summands. </td></tr>
-    <tr><td class="paramname">val2</td><td>second two 16-bit summands.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the halved addition of the low halfwords, in the low halfword of the return value. </li>
-<li>the halved addition of the high halfwords, in the high halfword of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = val1[15:0]  + val2[15:0]  &gt;&gt; 1</div>
-<div class="line">res[31:16] = val1[31:16] + val2[31:16] &gt;&gt; 1</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga524575b442ea01aec10c762bf4d85fea"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SHADD8 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Quad 8-bit signed addition with halved results. </p>
-<p>This function enables you to perform four signed 8-bit integer additions, halving the results. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first four 8-bit summands. </td></tr>
-    <tr><td class="paramname">val2</td><td>second four 8-bit summands.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the halved addition of the first bytes from each operand, in the first byte of the return value. </li>
-<li>the halved addition of the second bytes from each operand, in the second byte of the return value. </li>
-<li>the halved addition of the third bytes from each operand, in the third byte of the return value. </li>
-<li>the halved addition of the fourth bytes from each operand, in the fourth byte of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0]   = val1[7:0]   + val2[7:0]  &gt;&gt; 1</div>
-<div class="line">res[15:8]  = val1[15:8]  + val2[15:8] &gt;&gt; 1</div>
-<div class="line">res[23:16] = val1[23:16] + val2[23:16] &gt;&gt; 1</div>
-<div class="line">res[31:24] = val1[31:24] + val2[31:24] &gt;&gt; 1</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gae0a649035f67627464fd80e7218c89d5"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SHASX </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Dual 16-bit signed addition and subtraction with halved results. </p>
-<p>This function enables you to exchange the two halfwords of one operand, perform one signed 16-bit integer addition and one signed 16-bit subtraction, and halve the results.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first 16-bit operands. </td></tr>
-    <tr><td class="paramname">val2</td><td>second 16-bit operands.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the halved subtraction of the high halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value. </li>
-<li>the halved addition of the low halfword in the second operand and the high halfword in the first operand, in the high halfword of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = (val1[15:0]  - val2[31:16]) &gt;&gt; 1</div>
-<div class="line">res[31:16] = (val1[31:16] + val2[15:0] ) &gt;&gt; 1</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gafadbd89c36b5addcf1ca10dd392db3e9"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SHSAX </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Dual 16-bit signed subtraction and addition with halved results. </p>
-<p>This function enables you to exchange the two halfwords of one operand, perform one signed 16-bit integer subtraction and one signed 16-bit addition, and halve the results.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first 16-bit operands. </td></tr>
-    <tr><td class="paramname">val2</td><td>second 16-bit operands.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the halved addition of the low halfword in the first operand and the high halfword in the second operand, in the low halfword of the return value. </li>
-<li>the halved subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = (val1[15:0]  + val2[31:16]) &gt;&gt; 1</div>
-<div class="line">res[31:16] = (val1[31:16] - val2[15:0] ) &gt;&gt; 1</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga31328467f0f91b8ff9ae9a01682ad3bf"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SHSUB16 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Dual 16-bit signed subtraction with halved results. </p>
-<p>This function enables you to perform two signed 16-bit integer subtractions, halving the results.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first two 16-bit operands. </td></tr>
-    <tr><td class="paramname">val2</td><td>second two 16-bit operands.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the halved subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the returned result. </li>
-<li>the halved subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the returned result.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = val1[15:0]  - val2[15:0]   &gt;&gt; 1</div>
-<div class="line">res[31:16] = val1[31:16] - val2[31:16]  &gt;&gt; 1</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gac3ec7215b354d925a239f3b31df2b77b"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SHSUB8 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Quad 8-bit signed subtraction with halved results. </p>
-<p>This function enables you to perform four signed 8-bit integer subtractions, halving the results.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first four 8-bit operands. </td></tr>
-    <tr><td class="paramname">val2</td><td>second four 8-bit operands.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the halved subtraction of the first byte in the second operand from the first byte in the first operand, in the first bytes of the return value. </li>
-<li>the halved subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value. </li>
-<li>the halved subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value. </li>
-<li>the halved subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0]   = val1[7:0]   - val2[7:0]   &gt;&gt; 1</div>
-<div class="line">res[15:8]  = val1[15:8]  - val2[15:8]  &gt;&gt; 1</div>
-<div class="line">res[23:16] = val1[23:16] - val2[23:16] &gt;&gt; 1</div>
-<div class="line">res[31:24] = val1[31:24] - val2[31:24] &gt;&gt; 1</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gae0c86f3298532183f3a29f5bb454d354"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SMLAD </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val3</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Q setting dual 16-bit signed multiply with single 32-bit accumulator. </p>
-<p>This function enables you to perform two signed 16-bit multiplications, adding both results to a 32-bit accumulate operand.<br/>
- The Q bit is set if the addition overflows. Overflow cannot occur during the multiplications.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr>
-    <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication. </td></tr>
-    <tr><td class="paramname">val3</td><td>accumulate value.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the product of each multiplication added to the accumulate value, as a 32-bit integer.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0]  * val2[15:0]</div>
-<div class="line">p2 = val1[31:16] * val2[31:16]</div>
-<div class="line">res[31:0] = p1 + p2 + val3[31:0]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga9c286d330f4fb29b256335add91eec9f"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SMLADX </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val3</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Q setting pre-exchanged dual 16-bit signed multiply with single 32-bit accumulator. </p>
-<p>This function enables you to perform two signed 16-bit multiplications with exchanged halfwords of the second operand, adding both results to a 32-bit accumulate operand.<br/>
- The Q bit is set if the addition overflows. Overflow cannot occur during the multiplications.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr>
-    <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication. </td></tr>
-    <tr><td class="paramname">val3</td><td>accumulate value.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the product of each multiplication with exchanged halfwords of the second operand added to the accumulate value, as a 32-bit integer.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0]  * val2[31:16]</div>
-<div class="line">p2 = val1[31:16] * val2[15:0]</div>
-<div class="line">res[31:0] = p1 + p2 + val3[31:0]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gad80e9b20c1736fd798f897362273a146"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint64_t __SMLALD </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint64_t&#160;</td>
-          <td class="paramname"><em>val3</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Dual 16-bit signed multiply with single 64-bit accumulator. </p>
-<p>This function enables you to perform two signed 16-bit multiplications, adding both results to a 64-bit accumulate operand. Overflow is only possible as a result of the 64-bit addition. This overflow is not detected if it occurs. Instead, the result wraps around modulo2<sup>64</sup>.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr>
-    <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication. </td></tr>
-    <tr><td class="paramname">val3</td><td>accumulate value.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the product of each multiplication added to the accumulate value.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0]  * val2[15:0]</div>
-<div class="line">p2 = val1[31:16] * val2[31:16]</div>
-<div class="line">sum = p1 + p2 + val3[63:32][31:0]</div>
-<div class="line">res[63:32] = sum[63:32]</div>
-<div class="line">res[31:0]  = sum[31:0]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gad1adad1b3f2667328cc0db6c6b4f41cf"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">unsigned long long __SMLALDX </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">unsigned long long&#160;</td>
-          <td class="paramname"><em>val3</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Dual 16-bit signed multiply with exchange with single 64-bit accumulator. </p>
-<p>This function enables you to exchange the halfwords of the second operand, and perform two signed 16-bit multiplications, adding both results to a 64-bit accumulate operand. Overflow is only possible as a result of the 64-bit addition. This overflow is not detected if it occurs. Instead, the result wraps around modulo2<sup>64</sup>.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr>
-    <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication. </td></tr>
-    <tr><td class="paramname">val3</td><td>accumulate value.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the product of each multiplication added to the accumulate value.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0]  * val2[31:16]</div>
-<div class="line">p2 = val1[31:16] * val2[15:0]</div>
-<div class="line">sum = p1 + p2 + val3[63:32][31:0]</div>
-<div class="line">res[63:32] = sum[63:32]</div>
-<div class="line">res[31:0] = sum[31:0]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gaf4350af7f2030c36f43b2c104a9d16cd"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SMLSD </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val3</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Q setting dual 16-bit signed multiply subtract with 32-bit accumulate. </p>
-<p>This function enables you to perform two 16-bit signed multiplications, take the difference of the products, subtracting the high halfword product from the low halfword product, and add the difference to a 32-bit accumulate operand.<br/>
- The Q bit is set if the accumulation overflows. Overflow cannot occur during the multiplications or the subtraction.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr>
-    <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication. </td></tr>
-    <tr><td class="paramname">val3</td><td>accumulate value.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the difference of the product of each multiplication, added to the accumulate value.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0]  * val2[15:0]</div>
-<div class="line">p2 = val1[31:16] * val2[31:16]</div>
-<div class="line">res[31:0] = p1 - p2 + val3[31:0]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga5290ce5564770ad124910d2583dc0a9e"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SMLSDX </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val3</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Q setting dual 16-bit signed multiply with exchange subtract with 32-bit accumulate. </p>
-<p>This function enables you to exchange the halfwords in the second operand, then perform two 16-bit signed multiplications. The difference of the products is added to a 32-bit accumulate operand.<br/>
- The Q bit is set if the addition overflows. Overflow cannot occur during the multiplications or the subtraction.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr>
-    <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication. </td></tr>
-    <tr><td class="paramname">val3</td><td>accumulate value.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the difference of the product of each multiplication, added to the accumulate value.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0]  * val2[31:16]</div>
-<div class="line">p2 = val1[31:16] * val2[15:0]</div>
-<div class="line">res[31:0] = p1 - p2 + val3[31:0]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga5611f7314e0c8f53da377918dfbf42ee"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint64_t __SMLSLD </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint64_t&#160;</td>
-          <td class="paramname"><em>val3</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Q setting dual 16-bit signed multiply subtract with 64-bit accumulate. </p>
-<p>This function It enables you to perform two 16-bit signed multiplications, take the difference of the products, subtracting the high halfword product from the low halfword product, and add the difference to a 64-bit accumulate operand. Overflow cannot occur during the multiplications or the subtraction. Overflow can occur as a result of the 64-bit addition, and this overflow is not detected. Instead, the result wraps round to modulo2<sup>64</sup>.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr>
-    <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication. </td></tr>
-    <tr><td class="paramname">val3</td><td>accumulate value.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the difference of the product of each multiplication, added to the accumulate value.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0]  * val2[15:0]</div>
-<div class="line">p2 = val1[31:16] * val2[31:16]</div>
-<div class="line">res[63:0] = p1 - p2 + val3[63:0]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga83e69ef81057d3cbd06863d729385187"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">unsigned long long __SMLSLDX </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">unsigned long long&#160;</td>
-          <td class="paramname"><em>val3</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Q setting dual 16-bit signed multiply with exchange subtract with 64-bit accumulate. </p>
-<p>This function enables you to exchange the halfwords of the second operand, perform two 16-bit multiplications, adding the difference of the products to a 64-bit accumulate operand. Overflow cannot occur during the multiplications or the subtraction. Overflow can occur as a result of the 64-bit addition, and this overflow is not detected. Instead, the result wraps round to modulo2<sup>64</sup>.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr>
-    <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication. </td></tr>
-    <tr><td class="paramname">val3</td><td>accumulate value.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the difference of the product of each multiplication, added to the accumulate value.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0]  * val2[31:16]</div>
-<div class="line">p2 = val1[31:16] * val2[15:0]</div>
-<div class="line">res[63:0] = p1 - p2 + val3[63:0]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gaea60757232f740ec6b09980eebb614ff"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SMMLA </td>
-          <td>(</td>
-          <td class="paramtype">int32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">int32_t&#160;</td>
-          <td class="paramname"><em>val2</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">int32_t&#160;</td>
-          <td class="paramname"><em>val3</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>32-bit signed multiply with 32-bit truncated accumulator. </p>
-<p>This function enables you to perform a signed 32-bit multiplications, adding the most significant 32 bits of the 64-bit result to a 32-bit accumulate operand.<br/>
-</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first operand for multiplication. </td></tr>
-    <tr><td class="paramname">val2</td><td>second operand for multiplication. </td></tr>
-    <tr><td class="paramname">val3</td><td>accumulate value.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the product of multiplication (most significant 32 bits) is added to the accumulate value, as a 32-bit integer.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p = val1 * val2</div>
-<div class="line">res[31:0] = p[61:32] + val3[31:0]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gae326e368a1624d2dfb4b97c626939257"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SMUAD </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Q setting sum of dual 16-bit signed multiply. </p>
-<p>This function enables you to perform two 16-bit signed multiplications, adding the products together.<br/>
- The Q bit is set if the addition overflows.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr>
-    <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the sum of the products of the two 16-bit signed multiplications.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0]  * val2[15:0]</div>
-<div class="line">p2 = val1[31:16] * val2[31:16]</div>
-<div class="line">res[31:0] = p1 + p2</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gaee6390f86965cb662500f690b0012092"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SMUADX </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Q setting sum of dual 16-bit signed multiply with exchange. </p>
-<p>This function enables you to perform two 16-bit signed multiplications with exchanged halfwords of the second operand, adding the products together.<br/>
- The Q bit is set if the addition overflows.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr>
-    <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the sum of the products of the two 16-bit signed multiplications with exchanged halfwords of the second operand.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0]  * val2[31:16]</div>
-<div class="line">p2 = val1[31:16] * val2[15:0]</div>
-<div class="line">res[31:0] = p1 + p2</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga039142a5368840683cf329cb55b73f84"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SMUSD </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Dual 16-bit signed multiply returning difference. </p>
-<p>This function enables you to perform two 16-bit signed multiplications, taking the difference of the products by subtracting the high halfword product from the low halfword product.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr>
-    <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the difference of the products of the two 16-bit signed multiplications.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0]  * val2[15:0]</div>
-<div class="line">p2 = val1[31:16] * val2[31:16]</div>
-<div class="line">res[31:0] = p1 - p2</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gabb5bcba694bf17b141c32e6a8474f60e"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SMUSDX </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Dual 16-bit signed multiply with exchange returning difference. </p>
-<p>This function enables you to perform two 16-bit signed multiplications, subtracting one of the products from the other. The halfwords of the second operand are exchanged before performing the arithmetic. This produces top * bottom and bottom * top multiplication.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first 16-bit operands for each multiplication. </td></tr>
-    <tr><td class="paramname">val2</td><td>second 16-bit operands for each multiplication.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the difference of the products of the two 16-bit signed multiplications.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">p1 = val1[15:0]  * val2[31:16]</div>
-<div class="line">p2 = val1[31:16] * val2[15:0]</div>
-<div class="line">res[31:0] = p1 - p2</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga95e666b82216066bf6064d1244e6883c"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SSAT16 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">const uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Q setting dual 16-bit saturate. </p>
-<p>This function enables you to saturate two signed 16-bit values to a selected signed range.<br/>
- The Q bit is set if either operation saturates.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>two signed 16-bit values to be saturated. </td></tr>
-    <tr><td class="paramname">val2</td><td>bit position for saturation, an integral constant expression in the range 1 to 16.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the sum of the absolute differences of the following bytes, added to the accumulation value: <ul>
-<li>the signed saturation of the low halfword in <em>val1</em>, saturated to the bit position specified in <em>val2</em> and returned in the low halfword of the return value. </li>
-<li>the signed saturation of the high halfword in <em>val1</em>, saturated to the bit position specified in <em>val2</em> and returned in the high halfword of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">Saturate halfwords in val1 to the <span class="keywordtype">signed</span> range specified by the bit position in val2</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga9d3bc5c539f9bd50f7d59ffa37ac6a65"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SSAX </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>GE setting dual 16-bit signed subtraction and addition with exchange. </p>
-<p>This function enables you to exchange the two halfwords of one operand and perform one 16-bit integer subtraction and one 16-bit addition.<br/>
- The GE bits in the APSR are set according to the results.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first operand for the addition in the low halfword, and the first operand for the subtraction in the high halfword. </td></tr>
-    <tr><td class="paramname">val2</td><td>second operand for the addition in the high halfword, and the second operand for the subtraction in the low halfword.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the addition of the low halfword in the first operand and the high halfword in the second operand, in the low halfword of the return value. </li>
-<li>the subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value. </li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation. </dd></dl>
-<dl class="section user"><dt></dt><dd>If <em>res</em> is the return value, then: <ul>
-<li>if res[15:0] &gt;= 0 then APSR.GE[1:0] = 11 else 00 </li>
-<li>if res[31:16] &gt;= 0 then APSR.GE[3:2] = 11 else 00</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = val1[15:0]  + val2[31:16]</div>
-<div class="line">res[31:16] = val1[31:16] - val2[15:0]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga4262f73be75efbac6b46ab7c71aa6cbc"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SSUB16 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>GE setting dual 16-bit signed subtraction. </p>
-<p>This function enables you to perform two 16-bit signed integer subtractions.<br/>
- The GE bits in the APSR are set according to the results.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first two 16-bit operands of each subtraction. </td></tr>
-    <tr><td class="paramname">val2</td><td>second two 16-bit operands of each subtraction.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value. </li>
-<li>the subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation. </dd></dl>
-<dl class="section user"><dt></dt><dd>If <ul>
-<li>res is the return value, then: </li>
-<li>if res[15:0] &gt;= 0 then APSR.GE[1:0] = 11 else 00 </li>
-<li>if res[31:16] &gt;= 0 then APSR.GE[3:2] = 11 else 00</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = val1[15:0]  - val2[15:0]</div>
-<div class="line">res[31:16] = val1[31:16] - val2[31:16]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gaba63bb52e1e93fb527e26f3d474da12e"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SSUB8 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>GE setting quad 8-bit signed subtraction. </p>
-<p>This function enables you to perform four 8-bit signed integer subtractions.<br/>
- The GE bits in the APSR are set according to the results.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first four 8-bit operands of each subtraction. </td></tr>
-    <tr><td class="paramname">val2</td><td>second four 8-bit operands of each subtraction.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the subtraction of the first byte in the second operand from the first byte in the first operand, in the first bytes of the return value. </li>
-<li>the subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value. </li>
-<li>the subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value. </li>
-<li>the subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on</dt><dd>the results of the operation.</dd></dl>
-<dl class="section user"><dt></dt><dd>If <em>res</em> is the return value, then: <ul>
-<li>if res[8:0] &gt;= 0 then APSR.GE[0] = 1 else 0 </li>
-<li>if res[15:8] &gt;= 0 then APSR.GE[1] = 1 else 0 </li>
-<li>if res[23:16] &gt;= 0 then APSR.GE[2] = 1 else 0 </li>
-<li>if res[31:24] &gt;= 0 then APSR.GE[3] = 1 else 0</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0]   = val1[7:0]   - val2[7:0]</div>
-<div class="line">res[15:8]  = val1[15:8]  - val2[15:8]</div>
-<div class="line">res[23:16] = val1[23:16] - val2[23:16]</div>
-<div class="line">res[31:24] = val1[31:24] - val2[31:24]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gac540b4fc41d30778ba102d2a65db5589"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SXTAB16 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Dual extracted 8-bit to 16-bit signed addition. </p>
-<p>This function enables you to extract two 8-bit values from the second operand (at bit positions [7:0] and [23:16]), sign-extend them to 16-bits each, and add the results to the first operand.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>values added to the zero-extended to 16-bit values. </td></tr>
-    <tr><td class="paramname">val2</td><td>two 8-bit values to be extracted and zero-extended.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the addition of <em>val1</em> and <em>val2</em>, where the 8-bit values in val2[7:0] and val2[23:16] have been extracted and sign-extended prior to the addition.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = val1[15:0]  + SignExtended(val2[7:0])</div>
-<div class="line">res[31:16] = val1[31:16] + SignExtended(val2[23:16])</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gaf0029ec2b0decbff4df5bc6f4352bba4"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SXTAB16_RORn </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_r&#160;</td>
-          <td class="paramname"><em>rotate</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Rotate right, followed by sign extension of two 8-bits with add to 16-bits. </p>
-<p>This function enables you to rotate the second operand by 8/16/24 bit as specified by the third operand, extract two 8-bit values from the rotated result (at bit positions [7:0] and [23:16]), sign-extend them to 16-bits each, and add the results to the first operand.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>two 16-bit values in val1[15:0] and val1[31:16] </td></tr>
-    <tr><td class="paramname">val2</td><td>two 8-bit values in val[7:0] and val[23:16] to be sign-extended post rotation </td></tr>
-    <tr><td class="paramname">rotate</td><td>number of bits to rotate val2. Constant rotate value of 8, 16 and 24 can be optimally used with a single __SXTAB16 instruction. Any other valid constant rotate value will result in use of two instructions, __ROR and __SXTAB16</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the addition of <em>val1</em> and <em>val2</em>, where the rotated 8-bit values in val2[7:0] and val2[23:16] have been extracted and sign-extended prior to the addition.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">val2       = Rotate(val2, rotate)</div>
-<div class="line">res[15:0]  = val1[15:0]  + SignExtended(val2[7:0])</div>
-<div class="line">res[31:16] = val1[31:16] + SignExtended(val2[23:16])</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga38dce3dd13ba212e80ec3cff4abeb11a"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SXTB16 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Dual extract 8-bits and sign extend each to 16-bits. </p>
-<p>This function enables you to extract two 8-bit values from an operand and sign-extend them to 16 bits each.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val</td><td>two 8-bit values in val[7:0] and val[23:16] to be sign-extended.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the 8-bit values sign-extended to 16-bit values. <ul>
-<li>sign-extended value of val[7:0] in the low halfword of the return value. </li>
-<li>sign-extended value of val[23:16] in the high halfword of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = SignExtended(val[7:0]</div>
-<div class="line">res[31:16] = SignExtended(val[23:16]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gaef7e08ba1dbaaae1efdb76c113155ed1"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __SXTB16_RORn </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_r&#160;</td>
-          <td class="paramname"><em>rotate</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Rotate right, dual extract 8-bits and sign extend each to 16-bits. </p>
-<p>This function enables you to rotate an operand by 8/16/24 bit, extract two 8-bit values and sign-extend them to 16 bits each.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val</td><td>two 8-bit values in val[7:0] and val[23:16] to be sign-extended. </td></tr>
-    <tr><td class="paramname">rotate</td><td>number of bits to rotate val. Constant rotate value of 8, 16 and 24 can be optimally used with a single __SXTB16 instruction. Any other valid constant rotate value will result in use of two instructions, __ROR and __SXTB16</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the 8-bit values sign-extended to 16-bit values. <ul>
-<li>sign-extended value of val[7:0] in the low halfword of the return value. </li>
-<li>sign-extended value of val[23:16] in the high halfword of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">val        = Rotate(val, rotate)</div>
-<div class="line">res[15:0]  = SignExtended(val[7:0])</div>
-<div class="line">res[31:16] = SignExtended(val[23:16])</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gaa1160f0cf76d6aa292fbad54a1aa6b74"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __UADD16 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>GE setting dual 16-bit unsigned addition. </p>
-<p>This function enables you to perform two 16-bit unsigned integer additions.<br/>
- The GE bits in the APSR are set according to the results.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first two 16-bit summands for each addition. </td></tr>
-    <tr><td class="paramname">val2</td><td>second two 16-bit summands for each addition.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the addition of the low halfwords in each operand, in the low halfword of the return value. </li>
-<li>the addition of the high halfwords in each operand, in the high halfword of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation. </dd></dl>
-<dl class="section user"><dt></dt><dd>If <em>res</em> is the return value, then: <ul>
-<li>if res[15:0] &gt;= 0x10000 then APSR.GE[0] = 11 else 00 </li>
-<li>if res[31:16] &gt;= 0x10000 then APSR.GE[1] = 11 else 00</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = val1[15:0]  + val2[15:0]</div>
-<div class="line">res[31:16] = val1[31:16] + val2[31:16]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gab3d7fd00d113b20fb3741a17394da762"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __UADD8 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>GE setting quad 8-bit unsigned addition. </p>
-<p>This function enables you to perform four unsigned 8-bit integer additions. The GE bits of the APSR are set according to the results.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first four 8-bit summands for each addition. </td></tr>
-    <tr><td class="paramname">val2</td><td>second four 8-bit summands for each addition.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the halved addition of the first bytes from each operand, in the first byte of the return value. </li>
-<li>the halved addition of the second bytes from each operand, in the second byte of the return value. </li>
-<li>the halved addition of the third bytes from each operand, in the third byte of the return value. </li>
-<li>the halved addition of the fourth bytes from each operand, in the fourth byte of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.</dd></dl>
-<dl class="section user"><dt></dt><dd>If <em>res</em> is the return value, then: <ul>
-<li>if res[7:0] &gt;= 0x100 then APSR.GE[0] = 1 else 0 </li>
-<li>if res[15:8] &gt;= 0x100 then APSR.GE[1] = 1 else 0 </li>
-<li>if res[23:16] &gt;= 0x100 then APSR.GE[2] = 1 else 0 </li>
-<li>if res[31:24] &gt;= 0x100 then APSR.GE[3] = 1 else 0</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0]   = val1[7:0]   + val2[7:0]</div>
-<div class="line">res[15:8]  = val1[15:8]  + val2[15:8]</div>
-<div class="line">res[23:16] = val1[23:16] + val2[23:16]</div>
-<div class="line">res[31:24] = val1[31:24] + val2[31:24]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga980353d2c72ebb879282e49f592fddc0"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __UASX </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>GE setting dual 16-bit unsigned addition and subtraction with exchange. </p>
-<p>This function enables you to exchange the two halfwords of the second operand, add the high halfwords and subtract the low halfwords.<br/>
- The GE bits in the APSR are set according to the results.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first operand for the subtraction in the low halfword, and the first operand for the addition in the high halfword. </td></tr>
-    <tr><td class="paramname">val2</td><td>second operand for the subtraction in the high halfword and the second operand for the addition in the low halfword.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the subtraction of the high halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value. </li>
-<li>the addition of the high halfword in the first operand and the low halfword in the second operand, in the high halfword of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.</dd></dl>
-<dl class="section user"><dt>If <em>res</em> is the return value, then:</dt><dd><ul>
-<li>if res[15:0] &gt;= 0 then APSR.GE[1:0] = 11 else 00 </li>
-<li>if res[31:16] &gt;= 0x10000 then APSR.GE[3:2] = 11 else 00</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = val1[15:0]  - val2[31:16]</div>
-<div class="line">res[31:16] = val1[31:16] + val2[15:0]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gabd0b0e2da2e6364e176d051687702b86"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __UHADD16 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Dual 16-bit unsigned addition with halved results. </p>
-<p>This function enables you to perform two unsigned 16-bit integer additions, halving the results.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first two 16-bit summands. </td></tr>
-    <tr><td class="paramname">val2</td><td>second two 16-bit summands.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the halved addition of the low halfwords in each operand, in the low halfword of the return value. </li>
-<li>the halved addition of the high halfwords in each operand, in the high halfword of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = val1[15:0]  + val2[15:0]   &gt;&gt; 1</div>
-<div class="line">res[31:16] = val1[31:16] + val2[31:16]  &gt;&gt; 1</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga3a14e5485e59bf0f23595b7c2a94eb0b"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __UHADD8 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Quad 8-bit unsigned addition with halved results. </p>
-<p>This function enables you to perform four unsigned 8-bit integer additions, halving the results.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first four 8-bit summands. </td></tr>
-    <tr><td class="paramname">val2</td><td>second four 8-bit summands.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the halved addition of the first bytes in each operand, in the first byte of the return value. </li>
-<li>the halved addition of the second bytes in each operand, in the second byte of the return value. </li>
-<li>the halved addition of the third bytes in each operand, in the third byte of the return value. </li>
-<li>the halved addition of the fourth bytes in each operand, in the fourth byte of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0]   = val1[7:0]   + val2[7:0]   &gt;&gt; 1</div>
-<div class="line">res[15:8]  = val1[15:8]  + val2[15:8]  &gt;&gt; 1</div>
-<div class="line">res[23:16] = val1[23:16] + val2[23:16] &gt;&gt; 1</div>
-<div class="line">res[31:24] = val1[31:24] + val2[31:24] &gt;&gt; 1</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga028f0732b961fb6e5209326fb3855261"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __UHASX </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Dual 16-bit unsigned addition and subtraction with halved results and exchange. </p>
-<p>This function enables you to exchange the halfwords of the second operand, add the high halfwords and subtract the low halfwords, halving the results.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first operand for the subtraction in the low halfword, and the first operand for the addition in the high halfword. </td></tr>
-    <tr><td class="paramname">val2</td><td>second operand for the subtraction in the high halfword, and the second operand for the addition in the low halfword.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the halved subtraction of the high halfword in the second operand from the low halfword in the first operand. </li>
-<li>the halved addition of the high halfword in the first operand and the low halfword in the second operand.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = (val1[15:0]  - val2[31:16]) &gt;&gt; 1</div>
-<div class="line">res[31:16] = (val1[31:16] + val2[15:0] ) &gt;&gt; 1</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga09e129e6613329aab87c89f1108b7ed7"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __UHSAX </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Dual 16-bit unsigned subtraction and addition with halved results and exchange. </p>
-<p>This function enables you to exchange the halfwords of the second operand, subtract the high halfwords and add the low halfwords, halving the results.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first operand for the addition in the low halfword, and the first operand for the subtraction in the high halfword. </td></tr>
-    <tr><td class="paramname">val2</td><td>second operand for the addition in the high halfword, and the second operand for the subtraction in the low halfword.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the halved addition of the high halfword in the second operand and the low halfword in the first operand, in the low halfword of the return value. </li>
-<li>the halved subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = (val1[15:0]  + val2[31:16]) &gt;&gt; 1</div>
-<div class="line">res[31:16] = (val1[31:16] - val2[15:0] ) &gt;&gt; 1</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga1f7545b8dc33bb97982731cb9d427a69"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __UHSUB16 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Dual 16-bit unsigned subtraction with halved results. </p>
-<p>This function enables you to perform two unsigned 16-bit integer subtractions, halving the results.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first two 16-bit operands. </td></tr>
-    <tr><td class="paramname">val2</td><td>second two 16-bit operands.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the halved subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value. </li>
-<li>the halved subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = val1[15:0]  - val2[15:0]   &gt;&gt; 1</div>
-<div class="line">res[31:16] = val1[31:16] - val2[31:16]  &gt;&gt; 1</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga48a55df1c3e73923b73819d7c19b392d"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __UHSUB8 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Quad 8-bit unsigned subtraction with halved results. </p>
-<p>This function enables you to perform four unsigned 8-bit integer subtractions, halving the results.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first four 8-bit operands. </td></tr>
-    <tr><td class="paramname">val2</td><td>second four 8-bit operands.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the halved subtraction of the first byte in the second operand from the first byte in the first operand, in the first bytes of the return value. </li>
-<li>the halved subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value. </li>
-<li>the halved subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value. </li>
-<li>the halved subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0]   = val1[7:0]   - val2[7:0]    &gt;&gt; 1</div>
-<div class="line">res[15:8]  = val1[15:8]  - val2[15:8]   &gt;&gt; 1</div>
-<div class="line">res[23:16] = val1[23:16] - val2[23:16]  &gt;&gt; 1</div>
-<div class="line">res[31:24] = val1[31:24] - val2[31:24]  &gt;&gt; 1</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga9e2cc5117e79578a08b25f1e89022966"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __UQADD16 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Dual 16-bit unsigned saturating addition. </p>
-<p>This function enables you to perform two unsigned 16-bit integer additions, saturating the results to the 16-bit unsigned integer range 0 &lt; x &lt; 2<sup>16</sup> - 1.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first two 16-bit summands. </td></tr>
-    <tr><td class="paramname">val2</td><td>second two 16-bit summands.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the addition of the low halfword in the first operand and the low halfword in the second operand, in the low halfword of the return value. </li>
-<li>the addition of the high halfword in the first operand and the high halfword in the second operand, in the high halfword of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>The results are saturated to the 16-bit unsigned integer range 0 &lt; x &lt; 2<sup>16</sup> - 1.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = val1[15:0]  + val2[15:0]</div>
-<div class="line">res[31:16] = val1[31:16] + val2[31:16]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gafa9af218db3934a692fb06fa728d8031"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __UQADD8 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Quad 8-bit unsigned saturating addition. </p>
-<p>This function enables you to perform four unsigned 8-bit integer additions, saturating the results to the 8-bit unsigned integer range 0 &lt; x &lt; 2<sup>8</sup> - 1.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first four 8-bit summands. </td></tr>
-    <tr><td class="paramname">val2</td><td>second four 8-bit summands.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the halved addition of the first bytes in each operand, in the first byte of the return value. </li>
-<li>the halved addition of the second bytes in each operand, in the second byte of the return value. </li>
-<li>the halved addition of the third bytes in each operand, in the third byte of the return value. </li>
-<li>the halved addition of the fourth bytes in each operand, in the fourth byte of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>The results are saturated to the 8-bit unsigned integer range 0 &lt; x &lt; 2<sup>8</sup> - 1.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0]   = val1[7:0]   + val2[7:0]</div>
-<div class="line">res[15:8]  = val1[15:8]  + val2[15:8]</div>
-<div class="line">res[23:16] = val1[23:16] + val2[23:16]</div>
-<div class="line">res[31:24] = val1[31:24] + val2[31:24]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga5eff3ae5eabcd73f3049996ca391becb"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __UQASX </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Dual 16-bit unsigned saturating addition and subtraction with exchange. </p>
-<p>This function enables you to exchange the halfwords of the second operand and perform one unsigned 16-bit integer addition and one unsigned 16-bit subtraction, saturating the results to the 16-bit unsigned integer range 0 &lt;= x &lt;= 2<sup>16</sup> - 1.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first two 16-bit operands. </td></tr>
-    <tr><td class="paramname">val2</td><td>second two 16-bit operands.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the subtraction of the high halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value. </li>
-<li>the subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>The results are saturated to the 16-bit unsigned integer range 0 &lt;= x &lt;= 2<sup>16</sup> - 1.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = val1[15:0]  - val2[31:16]</div>
-<div class="line">res[31:16] = val1[31:16] + val2[15:0]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gadecfdfabc328d8939d49d996f2fd4482"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __UQSAX </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Dual 16-bit unsigned saturating subtraction and addition with exchange. </p>
-<p>This function enables you to exchange the halfwords of the second operand and perform one unsigned 16-bit integer subtraction and one unsigned 16-bit addition, saturating the results to the 16-bit unsigned integer range 0 &lt;= x &lt;= 2<sup>16</sup> - 1.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first 16-bit operand for the addition in the low halfword, and the first 16-bit operand for the subtraction in the high halfword. </td></tr>
-    <tr><td class="paramname">val2</td><td>second 16-bit halfword for the addition in the high halfword, and the second 16-bit halfword for the subtraction in the low halfword.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the addition of the low halfword in the first operand and the high halfword in the second operand, in the low halfword of the return value. </li>
-<li>the subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value. </li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>The results are saturated to the 16-bit unsigned integer range 0 &lt;= x &lt;= 2<sup>16</sup> - 1.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = val1[15:0]  + val2[31:16]</div>
-<div class="line">res[31:16] = val1[31:16] - val2[15:0]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga5ec4e2e231d15e5c692233feb3806187"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __UQSUB16 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Dual 16-bit unsigned saturating subtraction. </p>
-<p>This function enables you to perform two unsigned 16-bit integer subtractions, saturating the results to the 16-bit unsigned integer range 0 &lt; x &lt; 2<sup>16</sup> - 1.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first two 16-bit operands for each subtraction. </td></tr>
-    <tr><td class="paramname">val2</td><td>second two 16-bit operands for each subtraction.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value. </li>
-<li>the subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>The results are saturated to the 16-bit unsigned integer range 0 &lt; x &lt; 2<sup>16</sup> - 1.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = val1[15:0]  - val2[15:0]</div>
-<div class="line">res[31:16] = val1[31:16] - val2[31:16]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga9736fe816aec74fe886e7fb949734eab"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __UQSUB8 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Quad 8-bit unsigned saturating subtraction. </p>
-<p>This function enables you to perform four unsigned 8-bit integer subtractions, saturating the results to the 8-bit unsigned integer range 0 &lt; x &lt; 2<sup>8</sup> - 1.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first four 8-bit operands. </td></tr>
-    <tr><td class="paramname">val2</td><td>second four 8-bit operands.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the subtraction of the first byte in the second operand from the first byte in the first operand, in the first bytes of the return value. </li>
-<li>the subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value. </li>
-<li>the subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value. </li>
-<li>the subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>The results are saturated to the 8-bit unsigned integer range 0 &lt; x &lt; 2<sup>8</sup> - 1.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0]   = val1[7:0]   - val2[7:0]</div>
-<div class="line">res[15:8]  = val1[15:8]  - val2[15:8]</div>
-<div class="line">res[23:16] = val1[23:16] - val2[23:16]</div>
-<div class="line">res[31:24] = val1[31:24] - val2[31:24]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gac8855c07044239ea775c8128013204f0"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __USAD8 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Unsigned sum of quad 8-bit unsigned absolute difference. </p>
-<p>This function enables you to perform four unsigned 8-bit subtractions, and add the absolute values of the differences together, returning the result as a single unsigned integer.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first four 8-bit operands for the subtractions. </td></tr>
-    <tr><td class="paramname">val2</td><td>second four 8-bit operands for the subtractions.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the subtraction of the first byte in the second operand from the first byte in the first operand. </li>
-<li>the subtraction of the second byte in the second operand from the second byte in the first operand. </li>
-<li>the subtraction of the third byte in the second operand from the third byte in the first operand. </li>
-<li>the subtraction of the fourth byte in the second operand from the fourth byte in the first operand. </li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>The sum is returned as a single unsigned integer.</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">absdiff1  = val1[7:0]   - val2[7:0]</div>
-<div class="line">absdiff2  = val1[15:8]  - val2[15:8]</div>
-<div class="line">absdiff3  = val1[23:16] - val2[23:16]</div>
-<div class="line">absdiff4  = val1[31:24] - val2[31:24]</div>
-<div class="line">res[31:0] = absdiff1 + absdiff2 + absdiff3 + absdiff4</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gad032bd21f013c5d29f5fcb6b0f02bc3f"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __USADA8 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val3</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Unsigned sum of quad 8-bit unsigned absolute difference with 32-bit accumulate. </p>
-<p>This function enables you to perform four unsigned 8-bit subtractions, and add the absolute values of the differences to a 32-bit accumulate operand.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first four 8-bit operands for the subtractions. </td></tr>
-    <tr><td class="paramname">val2</td><td>second four 8-bit operands for the subtractions. </td></tr>
-    <tr><td class="paramname">val3</td><td>accumulation value.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the sum of the absolute differences of the following bytes, added to the accumulation value: <ul>
-<li>the subtraction of the first byte in the second operand from the first byte in the first operand. </li>
-<li>the subtraction of the second byte in the second operand from the second byte in the first operand. </li>
-<li>the subtraction of the third byte in the second operand from the third byte in the first operand. </li>
-<li>the subtraction of the fourth byte in the second operand from the fourth byte in the first operand.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">absdiff1  = val1[7:0]   - val2[7:0]</div>
-<div class="line">absdiff2  = val1[15:8]  - val2[15:8]</div>
-<div class="line">absdiff3  = val1[23:16] - val2[23:16]</div>
-<div class="line">absdiff4  = val1[31:24] - val2[31:24]</div>
-<div class="line">sum       = absdiff1 + absdiff2 + absdiff3 + absdiff4</div>
-<div class="line">res[31:0] = sum[31:0] + val3[31:0]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga967f516afff5900cf30f1a81907cdd89"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __USAT16 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">const uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Q setting dual 16-bit unsigned saturate. </p>
-<p>This function enables you to saturate two signed 16-bit values to a selected unsigned range.<br/>
- The Q bit is set if either operation saturates.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>two 16-bit values that are to be saturated. </td></tr>
-    <tr><td class="paramname">val2</td><td>bit position for saturation, and must be an integral constant expression in the range 0 to 15.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>the saturation of the two signed 16-bit values, as non-negative values. <ul>
-<li>the saturation of the low halfword in <em>val1</em>, saturated to the bit position specified in <em>val2</em> and returned in the low halfword of the return value. </li>
-<li>the saturation of the high halfword in <em>val1</em>, saturated to the bit position specified in <em>val2</em> and returned in the high halfword of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">Saturate halfwords in val1 to the <span class="keywordtype">unsigned</span> range specified by the bit position in val2</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga578a082747436772c482c96d7a58e45e"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t __USAX </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>GE setting dual 16-bit unsigned subtract and add with exchange. </p>
-<p>This function enables you to exchange the halfwords of the second operand, subtract the high halfwords and add the low halfwords.<br/>
- The GE bits in the APSR are set according to the results.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first operand for the addition in the low halfword, and the first operand for the subtraction in the high halfword. </td></tr>
-    <tr><td class="paramname">val2</td><td>second operand for the addition in the high halfword, and the second operand for the subtraction in the low halfword.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the addition of the low halfword in the first operand and the high halfword in the second operand, in the low halfword of the return value. </li>
-<li>the subtraction of the low halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value. </li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation. </dd></dl>
-<dl class="section user"><dt></dt><dd>If <em>res</em> is the return value, then: <ul>
-<li>if res[15:0] &gt;= 0x10000 then APSR.GE[1:0] = 11 else 00 </li>
-<li>if res[31:16] &gt;= 0 then APSR.GE[3:2] = 11 else 00</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = val1[15:0]  + val2[31:16]</div>
-<div class="line">res[31:16] = val1[31:16] - val2[15:0]</div>
-</div><!-- fragment --> </dd></dl>
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-</div>
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-          <td class="memname">uint32_t __USUB16 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
-        <tr>
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-          <td>)</td>
-          <td></td><td></td>
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-      </table>
-</div><div class="memdoc">
-
-<p>GE setting dual 16-bit unsigned subtract. </p>
-<p>This function enables you to perform two 16-bit unsigned integer subtractions.<br/>
- The GE bits in the APSR are set according to the results.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first two 16-bit operands. </td></tr>
-    <tr><td class="paramname">val2</td><td>second two 16-bit operands.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the subtraction of the low halfword in the second operand from the low halfword in the first operand, in the low halfword of the return value. </li>
-<li>the subtraction of the high halfword in the second operand from the high halfword in the first operand, in the high halfword of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.</dd></dl>
-<dl class="section user"><dt></dt><dd>If <em>res</em> is the return value, then: <ul>
-<li>if res[15:0] &gt;= 0 then APSR.GE[1:0] = 11 else 00 </li>
-<li>if res[31:16] &gt;= 0 then APSR.GE[3:2] = 11 else 00</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = val1[15:0]  - val2[15:0]</div>
-<div class="line">res[31:16] = val1[31:16] - val2[31:16]</div>
-</div><!-- fragment --> </dd></dl>
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-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
-        </tr>
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-          <td></td><td></td>
-        </tr>
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-</div><div class="memdoc">
-
-<p>GE setting quad 8-bit unsigned subtract. </p>
-<p>This function enables you to perform four 8-bit unsigned integer subtractions. The GE bits in the APSR are set according to the results.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>first four 8-bit operands. </td></tr>
-    <tr><td class="paramname">val2</td><td>second four 8-bit operands.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd><ul>
-<li>the subtraction of the first byte in the second operand from the first byte in the first operand, in the first bytes of the return value. </li>
-<li>the subtraction of the second byte in the second operand from the second byte in the first operand, in the second byte of the return value. </li>
-<li>the subtraction of the third byte in the second operand from the third byte in the first operand, in the third byte of the return value. </li>
-<li>the subtraction of the fourth byte in the second operand from the fourth byte in the first operand, in the fourth byte of the return value.</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt></dt><dd>Each bit in APSR.GE is set or cleared for each byte in the return value, depending on the results of the operation.</dd></dl>
-<dl class="section user"><dt></dt><dd>If <em>res</em> is the return value, then: <ul>
-<li>if res[8:0] &gt;= 0 then APSR.GE[0] = 1 else 0 </li>
-<li>if res[15:8] &gt;= 0 then APSR.GE[1] = 1 else 0 </li>
-<li>if res[23:16] &gt;= 0 then APSR.GE[2] = 1 else 0 </li>
-<li>if res[31:24] &gt;= 0 then APSR.GE[3] = 1 else 0</li>
-</ul>
-</dd></dl>
-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[7:0]   = val1[7:0]   - val2[7:0]</div>
-<div class="line">res[15:8]  = val1[15:8]  - val2[15:8]</div>
-<div class="line">res[23:16] = val1[23:16] - val2[23:16]</div>
-<div class="line">res[31:24] = val1[31:24] - val2[31:24]</div>
-</div><!-- fragment --> </dd></dl>
-
-</div>
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-<a class="anchor" id="gad25ce96db0f17096bbd815f4817faf09"></a>
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-          <td class="memname">uint32_t __UXTAB16 </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val1</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val2</em>&#160;</td>
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-<p>Extracted 16-bit to 32-bit unsigned addition. </p>
-<p>This function enables you to extract two 8-bit values from one operand, zero-extend them to 16 bits each, and add the results to two 16-bit values from another operand.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">val1</td><td>value added to the zero-extended to 16-bit values. </td></tr>
-    <tr><td class="paramname">val2</td><td>two 8-bit values to be extracted and zero-extended.</td></tr>
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-<dl class="section user"><dt>Operation:</dt><dd><div class="fragment"><div class="line">res[15:0]  = ZeroExt(val2[7:0]   to 16 bits) + val1[15:0]</div>
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-</div><!-- fragment --> </dd></dl>
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-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>val</em></td><td>)</td>
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-<p>Dual extract 8-bits and zero-extend to 16-bits. </p>
-<p>This function enables you to extract two 8-bit values from an operand and zero-extend them to 16 bits each.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
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-<p>Functions that relate to the Memory Protection Unit.  
-<a href="#details">More...</a></p>
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-Data Structures</h2></td></tr>
-<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a></td></tr>
-<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Setup information of a single MPU Region.  <a href="structARM__MPU__Region__t.html#details">More...</a><br/></td></tr>
-<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-Macros</h2></td></tr>
-<tr class="memitem:gab4bfac6284dc050dc6fa6aeb8e954c2c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gab4bfac6284dc050dc6fa6aeb8e954c2c">ARM_MPU_ATTR_DEVICE</a>&#160;&#160;&#160;( 0U )</td></tr>
-<tr class="memdesc:gab4bfac6284dc050dc6fa6aeb8e954c2c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Attribute for device memory (outer only)  <a href="#gab4bfac6284dc050dc6fa6aeb8e954c2c">More...</a><br/></td></tr>
-<tr class="separator:gab4bfac6284dc050dc6fa6aeb8e954c2c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga03266f9660485693eb1baec6ba255ab2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga03266f9660485693eb1baec6ba255ab2">ARM_MPU_ATTR_NON_CACHEABLE</a>&#160;&#160;&#160;( 4U )</td></tr>
-<tr class="memdesc:ga03266f9660485693eb1baec6ba255ab2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Attribute for non-cacheable, normal memory.  <a href="#ga03266f9660485693eb1baec6ba255ab2">More...</a><br/></td></tr>
-<tr class="separator:ga03266f9660485693eb1baec6ba255ab2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac2f1c567950e3785d75773362b525390"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac2f1c567950e3785d75773362b525390">ARM_MPU_ATTR_MEMORY_</a>(NT, WB, RA, WA)</td></tr>
-<tr class="memdesc:gac2f1c567950e3785d75773362b525390"><td class="mdescLeft">&#160;</td><td class="mdescRight">Attribute for normal memory (outer and inner)  <a href="#gac2f1c567950e3785d75773362b525390">More...</a><br/></td></tr>
-<tr class="separator:gac2f1c567950e3785d75773362b525390"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gabfa9ae279357044cf5b74e77af22a686"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gabfa9ae279357044cf5b74e77af22a686">ARM_MPU_ATTR_DEVICE_nGnRnE</a></td></tr>
-<tr class="memdesc:gabfa9ae279357044cf5b74e77af22a686"><td class="mdescLeft">&#160;</td><td class="mdescRight">Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement.  <a href="#gabfa9ae279357044cf5b74e77af22a686">More...</a><br/></td></tr>
-<tr class="separator:gabfa9ae279357044cf5b74e77af22a686"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga6e08ae44fab85e03fea96ae6a5fcdfb0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga6e08ae44fab85e03fea96ae6a5fcdfb0">ARM_MPU_ATTR_DEVICE_nGnRE</a></td></tr>
-<tr class="memdesc:ga6e08ae44fab85e03fea96ae6a5fcdfb0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement.  <a href="#ga6e08ae44fab85e03fea96ae6a5fcdfb0">More...</a><br/></td></tr>
-<tr class="separator:ga6e08ae44fab85e03fea96ae6a5fcdfb0"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gadcc9977aabb4dc7177d30cbbac1b53d1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gadcc9977aabb4dc7177d30cbbac1b53d1">ARM_MPU_ATTR_DEVICE_nGRE</a></td></tr>
-<tr class="memdesc:gadcc9977aabb4dc7177d30cbbac1b53d1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Device memory type non Gathering, Re-ordering, Early Write Acknowledgement.  <a href="#gadcc9977aabb4dc7177d30cbbac1b53d1">More...</a><br/></td></tr>
-<tr class="separator:gadcc9977aabb4dc7177d30cbbac1b53d1"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga496bcd6a2bbd038d8935049fec9d0fda"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga496bcd6a2bbd038d8935049fec9d0fda">ARM_MPU_ATTR_DEVICE_GRE</a></td></tr>
-<tr class="memdesc:ga496bcd6a2bbd038d8935049fec9d0fda"><td class="mdescLeft">&#160;</td><td class="mdescRight">Device memory type Gathering, Re-ordering, Early Write Acknowledgement.  <a href="#ga496bcd6a2bbd038d8935049fec9d0fda">More...</a><br/></td></tr>
-<tr class="separator:ga496bcd6a2bbd038d8935049fec9d0fda"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga2c465cc9429b8233bcb9cd7cbef0e54c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga2c465cc9429b8233bcb9cd7cbef0e54c">ARM_MPU_ATTR</a>(O, I)</td></tr>
-<tr class="memdesc:ga2c465cc9429b8233bcb9cd7cbef0e54c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Memory Attribute.  <a href="#ga2c465cc9429b8233bcb9cd7cbef0e54c">More...</a><br/></td></tr>
-<tr class="separator:ga2c465cc9429b8233bcb9cd7cbef0e54c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga3d0f688198289f72264f73cf72a742e8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a></td></tr>
-<tr class="memdesc:ga3d0f688198289f72264f73cf72a742e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory non-shareable.  <a href="#ga3d0f688198289f72264f73cf72a742e8">More...</a><br/></td></tr>
-<tr class="separator:ga3d0f688198289f72264f73cf72a742e8"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac4fddbdb9e1350bce6906de33c1fd500"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac4fddbdb9e1350bce6906de33c1fd500">ARM_MPU_SH_OUTER</a></td></tr>
-<tr class="memdesc:gac4fddbdb9e1350bce6906de33c1fd500"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory outer shareable.  <a href="#gac4fddbdb9e1350bce6906de33c1fd500">More...</a><br/></td></tr>
-<tr class="separator:gac4fddbdb9e1350bce6906de33c1fd500"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga73c70127f24f34781ad463cbe51d8f6b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga73c70127f24f34781ad463cbe51d8f6b">ARM_MPU_SH_INNER</a></td></tr>
-<tr class="memdesc:ga73c70127f24f34781ad463cbe51d8f6b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Normal memory inner shareable.  <a href="#ga73c70127f24f34781ad463cbe51d8f6b">More...</a><br/></td></tr>
-<tr class="separator:ga73c70127f24f34781ad463cbe51d8f6b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga81b2aa3fb55cdd5feadff02da10d391b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga81b2aa3fb55cdd5feadff02da10d391b">ARM_MPU_AP_</a>(RO, NP)</td></tr>
-<tr class="memdesc:ga81b2aa3fb55cdd5feadff02da10d391b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Memory access permissions.  <a href="#ga81b2aa3fb55cdd5feadff02da10d391b">More...</a><br/></td></tr>
-<tr class="separator:ga81b2aa3fb55cdd5feadff02da10d391b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gafe39c2f98058bcac7e7e0501e64e7a9d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gafe39c2f98058bcac7e7e0501e64e7a9d">ARM_MPU_RBAR</a>(BASE, SH, RO, NP, XN)</td></tr>
-<tr class="memdesc:gafe39c2f98058bcac7e7e0501e64e7a9d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Region Base Address Register value.  <a href="#gafe39c2f98058bcac7e7e0501e64e7a9d">More...</a><br/></td></tr>
-<tr class="separator:gafe39c2f98058bcac7e7e0501e64e7a9d"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaeaaa071276ba7956944e6c3dc05d677e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(LIMIT, IDX)</td></tr>
-<tr class="memdesc:gaeaaa071276ba7956944e6c3dc05d677e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Region Limit Address Register value.  <a href="#gaeaaa071276ba7956944e6c3dc05d677e">More...</a><br/></td></tr>
-<tr class="separator:gaeaaa071276ba7956944e6c3dc05d677e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table><table class="memberdecls">
-<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
-Functions</h2></td></tr>
-<tr class="memitem:ga5a3f40314553baccdeea551f86d9a997"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga5a3f40314553baccdeea551f86d9a997">ARM_MPU_Enable</a> (uint32_t MPU_Control)</td></tr>
-<tr class="separator:ga5a3f40314553baccdeea551f86d9a997"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga61814eba4652a0fdfb76bbe222086327"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga61814eba4652a0fdfb76bbe222086327">ARM_MPU_Disable</a> (void)</td></tr>
-<tr class="separator:ga61814eba4652a0fdfb76bbe222086327"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga5866c75d6deb9148a1e9af6337eec50a"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a>&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga5866c75d6deb9148a1e9af6337eec50a">ARM_MPU_Enable_NS</a> (uint32_t MPU_Control)</td></tr>
-<tr class="separator:ga5866c75d6deb9148a1e9af6337eec50a"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga389f9b6049d176bc83f9964d3259b712"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga389f9b6049d176bc83f9964d3259b712">ARM_MPU_Disable_NS</a> (void)</td></tr>
-<tr class="separator:ga389f9b6049d176bc83f9964d3259b712"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga1799413f08a157d636a1491371c15ce2"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga1799413f08a157d636a1491371c15ce2">ARM_MPU_SetMemAttrEx</a> (<a class="el" href="structMPU__Type.html">MPU_Type</a> *mpu, uint8_t idx, uint8_t attr)</td></tr>
-<tr class="separator:ga1799413f08a157d636a1491371c15ce2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab5b3c0a53d19c09a5550f1d9071ae65c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gab5b3c0a53d19c09a5550f1d9071ae65c">ARM_MPU_SetMemAttr</a> (uint8_t idx, uint8_t attr)</td></tr>
-<tr class="separator:gab5b3c0a53d19c09a5550f1d9071ae65c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga5100a150a755902af2455a455a329ef9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga5100a150a755902af2455a455a329ef9">ARM_MPU_SetMemAttr_NS</a> (uint8_t idx, uint8_t attr)</td></tr>
-<tr class="separator:ga5100a150a755902af2455a455a329ef9"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga01fa1151c9ec0ba5de76f908c0999316"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga01fa1151c9ec0ba5de76f908c0999316">ARM_MPU_ClrRegionEx</a> (<a class="el" href="structMPU__Type.html">MPU_Type</a> *mpu, uint32_t rnr)</td></tr>
-<tr class="separator:ga01fa1151c9ec0ba5de76f908c0999316"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga9dcb0afddf4ac351f33f3c7a5169c62c"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga9dcb0afddf4ac351f33f3c7a5169c62c">ARM_MPU_ClrRegion</a> (uint32_t rnr)</td></tr>
-<tr class="separator:ga9dcb0afddf4ac351f33f3c7a5169c62c"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:gac526bc5bfcf048ce57a44c0c0cdadbe4"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:ga3d50ba8546252bea959e45c8fdf16993"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga6d7f220015c070c0e469948c1775ee3d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga6d7f220015c070c0e469948c1775ee3d">ARM_MPU_SetRegion</a> (uint32_t rnr, uint32_t rbar, uint32_t rlar)</td></tr>
-<tr class="separator:ga6d7f220015c070c0e469948c1775ee3d"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga7566931ca9bb9f22d213a67ec5f8c745"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga7566931ca9bb9f22d213a67ec5f8c745">ARM_MPU_SetRegion_NS</a> (uint32_t rnr, uint32_t rbar, uint32_t rlar)</td></tr>
-<tr class="separator:ga7566931ca9bb9f22d213a67ec5f8c745"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac1a949403bf84eecaf407003fb553ae7"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gac1a949403bf84eecaf407003fb553ae7">ARM_MPU_OrderedMemcpy</a> (volatile uint32_t *dst, const uint32_t *<a class="el" href="group__compiler__conntrol__gr.html#ga378ac21329d33f561f90265eef89f564">__RESTRICT</a> src, uint32_t len)</td></tr>
-<tr class="separator:gac1a949403bf84eecaf407003fb553ae7"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab6094419f2abd678f1f3b121cd115049"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#gab6094419f2abd678f1f3b121cd115049">ARM_MPU_LoadEx</a> (<a class="el" href="structMPU__Type.html">MPU_Type</a> *mpu, uint32_t rnr, <a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *table, uint32_t cnt)</td></tr>
-<tr class="separator:gab6094419f2abd678f1f3b121cd115049"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:gaca76614e3091c7324aa9d60e634621bf"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga7f8c6e09be98067d613e4df1832c543d"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu8__functions.html#ga7f8c6e09be98067d613e4df1832c543d">ARM_MPU_Load_NS</a> (uint32_t rnr, <a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *table, uint32_t cnt)</td></tr>
-<tr class="separator:ga7f8c6e09be98067d613e4df1832c543d"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Functions that relate to the Memory Protection Unit. </p>
-<p>The following functions support the optional Memory Protection Unit (MPU) that is available on the Cortex-M23, M33, M35P processor.</p>
-<p>The MPU is used to prevent from illegal memory accesses that are typically caused by errors in an application software.</p>
-<p><b>Example:</b> </p>
-<div class="fragment"><div class="line"><span class="keywordtype">int</span> main() </div>
-<div class="line">{</div>
-<div class="line">  <span class="comment">// Set Region 0 using Attr 0</span></div>
-<div class="line">  <a class="code" href="group__mpu8__functions.html#gab5b3c0a53d19c09a5550f1d9071ae65c">ARM_MPU_SetMemAttr</a>(0UL, <a class="code" href="group__mpu8__functions.html#ga2c465cc9429b8233bcb9cd7cbef0e54c">ARM_MPU_ATTR</a>(       <span class="comment">/* Normal memory */</span></div>
-<div class="line">    <a class="code" href="group__mpu8__functions.html#gac2f1c567950e3785d75773362b525390">ARM_MPU_ATTR_MEMORY_</a>(0UL, 1UL, 1UL, 1UL), <span class="comment">/* Outer Write-Back transient with read and write allocate */</span></div>
-<div class="line">    <a class="code" href="group__mpu8__functions.html#gac2f1c567950e3785d75773362b525390">ARM_MPU_ATTR_MEMORY_</a>(0UL, 0UL, 1UL, 1UL)  <span class="comment">/* Inner Write-Through transient with read and write allocate */</span></div>
-<div class="line">  ));</div>
-<div class="line">  </div>
-<div class="line">  <a class="code" href="group__mpu__functions.html#ga16931f9ad84d7289e8218e169ae6db5d">ARM_MPU_SetRegion</a>(0UL,</div>
-<div class="line">    <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x08000000UL, <a class="code" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, 0UL, 1UL, 1UL),  <span class="comment">/* Non-shareable, read/write, non-privileged, execute-never */</span></div>
-<div class="line">    <a class="code" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x080FFFFFUL, 0UL)                             <span class="comment">/* 1MB memory block using Attr 0 */</span></div>
-<div class="line">  );</div>
-<div class="line">  </div>
-<div class="line">  <a class="code" href="group__mpu__functions.html#ga31406efd492ec9a091a70ffa2d8a42fb">ARM_MPU_Enable</a>(0);</div>
-<div class="line">  </div>
-<div class="line">  <span class="comment">// Execute application code that is access protected by the MPU</span></div>
-<div class="line">  </div>
-<div class="line">  <a class="code" href="group__mpu__functions.html#ga7cbc0a4a066ed90e85c8176228235d57">ARM_MPU_Disable</a>();</div>
-<div class="line">}</div>
-</div><!-- fragment --> <h2 class="groupheader">Macro Definition Documentation</h2>
-<a class="anchor" id="ga81b2aa3fb55cdd5feadff02da10d391b"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_MPU_AP_</td>
-          <td>(</td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">RO, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">NP&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Memory access permissions. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">RO</td><td>Read-Only: Set to 1 for read-only memory. </td></tr>
-    <tr><td class="paramname">NP</td><td>Non-Privileged: Set to 1 for non-privileged memory. </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="ga2c465cc9429b8233bcb9cd7cbef0e54c"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_MPU_ATTR</td>
-          <td>(</td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">O, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">I&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Memory Attribute. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">O</td><td>Outer memory attributes </td></tr>
-    <tr><td class="paramname">I</td><td>O == ARM_MPU_ATTR_DEVICE: Device memory attributes, else: Inner memory attributes </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="gab4bfac6284dc050dc6fa6aeb8e954c2c"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_MPU_ATTR_DEVICE&#160;&#160;&#160;( 0U )</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Attribute for device memory (outer only) </p>
-
-</div>
-</div>
-<a class="anchor" id="ga496bcd6a2bbd038d8935049fec9d0fda"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_MPU_ATTR_DEVICE_GRE</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Device memory type Gathering, Re-ordering, Early Write Acknowledgement. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga6e08ae44fab85e03fea96ae6a5fcdfb0"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_MPU_ATTR_DEVICE_nGnRE</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Device memory type non Gathering, non Re-ordering, Early Write Acknowledgement. </p>
-
-</div>
-</div>
-<a class="anchor" id="gabfa9ae279357044cf5b74e77af22a686"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_MPU_ATTR_DEVICE_nGnRnE</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Device memory type non Gathering, non Re-ordering, non Early Write Acknowledgement. </p>
-
-</div>
-</div>
-<a class="anchor" id="gadcc9977aabb4dc7177d30cbbac1b53d1"></a>
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-<div class="memproto">
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-        <tr>
-          <td class="memname">#define ARM_MPU_ATTR_DEVICE_nGRE</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Device memory type non Gathering, Re-ordering, Early Write Acknowledgement. </p>
-
-</div>
-</div>
-<a class="anchor" id="gac2f1c567950e3785d75773362b525390"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_MPU_ATTR_MEMORY_</td>
-          <td>(</td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">NT, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">WB, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">RA, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">WA&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Attribute for normal memory (outer and inner) </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">NT</td><td>Non-Transient: Set to 1 for non-transient data. </td></tr>
-    <tr><td class="paramname">WB</td><td>Write-Back: Set to 1 to use write-back update policy. </td></tr>
-    <tr><td class="paramname">RA</td><td>Read Allocation: Set to 1 to use cache allocation on read miss. </td></tr>
-    <tr><td class="paramname">WA</td><td>Write Allocation: Set to 1 to use cache allocation on write miss. </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="ga03266f9660485693eb1baec6ba255ab2"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_MPU_ATTR_NON_CACHEABLE&#160;&#160;&#160;( 4U )</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Attribute for non-cacheable, normal memory. </p>
-
-</div>
-</div>
-<a class="anchor" id="gafe39c2f98058bcac7e7e0501e64e7a9d"></a>
-<div class="memitem">
-<div class="memproto">
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-        <tr>
-          <td class="memname">#define ARM_MPU_RBAR</td>
-          <td>(</td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">BASE, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">SH, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">RO, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">NP, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">XN&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Region Base Address Register value. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">BASE</td><td>The base address bits [31:5] of a memory region. The value is zero extended. Effective address gets 32 byte aligned. </td></tr>
-    <tr><td class="paramname">SH</td><td>Defines the Shareability domain for this memory region. </td></tr>
-    <tr><td class="paramname">RO</td><td>Read-Only: Set to 1 for a read-only memory region. </td></tr>
-    <tr><td class="paramname">NP</td><td>Non-Privileged: Set to 1 for a non-privileged memory region. </td></tr>
-    <tr><td class="paramname">XN</td><td>eXecute Never: Set to 1 for a non-executable memory region. </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="gaeaaa071276ba7956944e6c3dc05d677e"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_MPU_RLAR</td>
-          <td>(</td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">LIMIT, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">IDX&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Region Limit Address Register value. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">LIMIT</td><td>The limit address bits [31:5] for this memory region. The value is one extended. </td></tr>
-    <tr><td class="paramname">IDX</td><td>The attribute index to be associated with this memory region. </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="ga73c70127f24f34781ad463cbe51d8f6b"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_MPU_SH_INNER</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Normal memory inner shareable. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga3d0f688198289f72264f73cf72a742e8"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_MPU_SH_NON</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Normal memory non-shareable. </p>
-
-</div>
-</div>
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_MPU_SH_OUTER</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Normal memory outer shareable. </p>
-
-</div>
-</div>
-<h2 class="groupheader">Function Documentation</h2>
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
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-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_ClrRegion </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>rnr</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>Clear and disable the given MPU region. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">rnr</td><td>Region number to be cleared. </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_ClrRegion_NS </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>rnr</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>Clear and disable the given Non-secure MPU region. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">rnr</td><td>Region number to be cleared. </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
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-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_ClrRegionEx </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="structMPU__Type.html">MPU_Type</a> *&#160;</td>
-          <td class="paramname"><em>mpu</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>rnr</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>Clear and disable the given MPU region of the given MPU. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">mpu</td><td>Pointer to MPU to be used. </td></tr>
-    <tr><td class="paramname">rnr</td><td>Region number to be cleared. </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="ga61814eba4652a0fdfb76bbe222086327"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Disable </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
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-</div><div class="memdoc">
-<p>Disable the MPU. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga389f9b6049d176bc83f9964d3259b712"></a>
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-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Disable_NS </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>Disable the Non-secure MPU. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga5a3f40314553baccdeea551f86d9a997"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Enable </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>MPU_Control</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>Enable the MPU. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">MPU_Control</td><td>Default access permissions for unconfigured regions. </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="ga5866c75d6deb9148a1e9af6337eec50a"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> ARM_MPU_Enable_NS </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>MPU_Control</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>Enable the Non-secure MPU. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">MPU_Control</td><td>Default access permissions for unconfigured regions. </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="gaca76614e3091c7324aa9d60e634621bf"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Load </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>rnr</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype"><a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *&#160;</td>
-          <td class="paramname"><em>table</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>cnt</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>Load the given number of MPU regions from a table. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">rnr</td><td>First region number to be configured. </td></tr>
-    <tr><td class="paramname">table</td><td>Pointer to the MPU configuration table. </td></tr>
-    <tr><td class="paramname">cnt</td><td>Amount of regions to be configured.</td></tr>
-  </table>
-  </dd>
-</dl>
-<p><b>Example:</b> </p>
-<div class="fragment"><div class="line"><span class="keyword">const</span> <a class="code" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> mpuTable[1][4] = {</div>
-<div class="line">  {</div>
-<div class="line">    <span class="comment">//                     BASE          SH              RO   NP   XN                         LIMIT         ATTR </span></div>
-<div class="line">    { .<a class="code" href="structARM__MPU__Region__t.html#afe7a7721aa08988d915670efa432cdd2">RBAR</a> = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x08000000UL, <a class="code" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, 0UL, 1UL, 0UL), .RLAR = <a class="code" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x080FFFFFUL, 0UL) },</div>
-<div class="line">    { .RBAR = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x20000000UL, <a class="code" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, 0UL, 1UL, 1UL), .RLAR = <a class="code" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x20007FFFUL, 0UL) },</div>
-<div class="line">    { .RBAR = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x40020000UL, <a class="code" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, 0UL, 1UL, 1UL), .RLAR = <a class="code" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x40021FFFUL, 1UL) },</div>
-<div class="line">    { .RBAR = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0x40022000UL, <a class="code" href="group__mpu8__functions.html#ga3d0f688198289f72264f73cf72a742e8">ARM_MPU_SH_NON</a>, 0UL, 1UL, 1UL), .RLAR = <a class="code" href="group__mpu8__functions.html#gaeaaa071276ba7956944e6c3dc05d677e">ARM_MPU_RLAR</a>(0x40022FFFUL, 1UL) }</div>
-<div class="line">  }</div>
-<div class="line">};</div>
-<div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> UpdateMpu(uint32_t idx)</div>
-<div class="line">{</div>
-<div class="line">   <a class="code" href="group__mpu__functions.html#gafa27b26d5847fa8e465584e376b6078a">ARM_MPU_Load</a>(0, mpuTable[idx], 4);</div>
-<div class="line">}</div>
-</div><!-- fragment --> 
-</div>
-</div>
-<a class="anchor" id="ga7f8c6e09be98067d613e4df1832c543d"></a>
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-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Load_NS </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>rnr</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype"><a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *&#160;</td>
-          <td class="paramname"><em>table</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>cnt</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>Load the given number of MPU regions from a table to the Non-secure MPU. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">rnr</td><td>First region number to be configured. </td></tr>
-    <tr><td class="paramname">table</td><td>Pointer to the MPU configuration table. </td></tr>
-    <tr><td class="paramname">cnt</td><td>Amount of regions to be configured. </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="gab6094419f2abd678f1f3b121cd115049"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_LoadEx </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="structMPU__Type.html">MPU_Type</a> *&#160;</td>
-          <td class="paramname"><em>mpu</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>rnr</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype"><a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> const *&#160;</td>
-          <td class="paramname"><em>table</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>cnt</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>Load the given number of MPU regions from a table to the given MPU. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">mpu</td><td>Pointer to the MPU registers to be used. </td></tr>
-    <tr><td class="paramname">rnr</td><td>First region number to be configured. </td></tr>
-    <tr><td class="paramname">table</td><td>Pointer to the MPU configuration table. </td></tr>
-    <tr><td class="paramname">cnt</td><td>Amount of regions to be configured. </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="gac1a949403bf84eecaf407003fb553ae7"></a>
-<div class="memitem">
-<div class="memproto">
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-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_OrderedMemcpy </td>
-          <td>(</td>
-          <td class="paramtype">volatile uint32_t *&#160;</td>
-          <td class="paramname"><em>dst</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">const uint32_t *<a class="el" href="group__compiler__conntrol__gr.html#ga378ac21329d33f561f90265eef89f564">__RESTRICT</a>&#160;</td>
-          <td class="paramname"><em>src</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>len</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>Memcpy with strictly ordered memory access, e.g. used by code in <a class="el" href="group__mpu8__functions.html#gab6094419f2abd678f1f3b121cd115049">ARM_MPU_LoadEx</a>. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">dst</td><td>Destination data is copied to. </td></tr>
-    <tr><td class="paramname">src</td><td>Source data is copied from. </td></tr>
-    <tr><td class="paramname">len</td><td>Amount of data words to be copied. </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="gab5b3c0a53d19c09a5550f1d9071ae65c"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetMemAttr </td>
-          <td>(</td>
-          <td class="paramtype">uint8_t&#160;</td>
-          <td class="paramname"><em>idx</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint8_t&#160;</td>
-          <td class="paramname"><em>attr</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>Set the memory attribute encoding. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">idx</td><td>The attribute index to be set [0-7] </td></tr>
-    <tr><td class="paramname">attr</td><td>The attribute value to be set. </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="ga5100a150a755902af2455a455a329ef9"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetMemAttr_NS </td>
-          <td>(</td>
-          <td class="paramtype">uint8_t&#160;</td>
-          <td class="paramname"><em>idx</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint8_t&#160;</td>
-          <td class="paramname"><em>attr</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>Set the memory attribute encoding to the Non-secure MPU. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">idx</td><td>The attribute index to be set [0-7] </td></tr>
-    <tr><td class="paramname">attr</td><td>The attribute value to be set. </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="ga1799413f08a157d636a1491371c15ce2"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetMemAttrEx </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="structMPU__Type.html">MPU_Type</a> *&#160;</td>
-          <td class="paramname"><em>mpu</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint8_t&#160;</td>
-          <td class="paramname"><em>idx</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint8_t&#160;</td>
-          <td class="paramname"><em>attr</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>Set the memory attribute encoding to the given MPU. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">mpu</td><td>Pointer to the MPU to be configured. </td></tr>
-    <tr><td class="paramname">idx</td><td>The attribute index to be set [0-7] </td></tr>
-    <tr><td class="paramname">attr</td><td>The attribute value to be set. </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="ga6d7f220015c070c0e469948c1775ee3d"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetRegion </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>rnr</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>rbar</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>rlar</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>Configure the given MPU region. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">rnr</td><td>Region number to be configured. </td></tr>
-    <tr><td class="paramname">rbar</td><td>Value for RBAR register. </td></tr>
-    <tr><td class="paramname">rlar</td><td>Value for RLAR register. </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="ga7566931ca9bb9f22d213a67ec5f8c745"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetRegion_NS </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>rnr</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>rbar</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>rlar</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>Configure the given Non-secure MPU region. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">rnr</td><td>Region number to be configured. </td></tr>
-    <tr><td class="paramname">rbar</td><td>Value for RBAR register. </td></tr>
-    <tr><td class="paramname">rlar</td><td>Value for RLAR register. </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="ga3d50ba8546252bea959e45c8fdf16993"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetRegionEx </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="structMPU__Type.html">MPU_Type</a> *&#160;</td>
-          <td class="paramname"><em>mpu</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>rnr</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>rbar</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>rlar</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>Configure the given MPU region of the given MPU. </p>
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-
-<p>Define values for MPU region setup.  
-<a href="#details">More...</a></p>
-<table class="memberdecls">
-<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
-Macros</h2></td></tr>
-<tr class="memitem:gadb0a92c0928c113120567e85ff1ba05c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu__defines.html#gadb0a92c0928c113120567e85ff1ba05c">ARM_MPU_REGION_SIZE_xxx</a></td></tr>
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-<tr class="separator:gadb0a92c0928c113120567e85ff1ba05c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gabc4788126d7798469cb862a08d3050cc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu__defines.html#gabc4788126d7798469cb862a08d3050cc">ARM_MPU_AP_xxx</a></td></tr>
-<tr class="memdesc:gabc4788126d7798469cb862a08d3050cc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Values for MPU region access permissions (in RASR field)  <a href="#gabc4788126d7798469cb862a08d3050cc">More...</a><br/></td></tr>
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-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Define values for MPU region setup. </p>
-<p>The following define values are used with <a class="el" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a> to setup the <a class="el" href="structMPU__Type.html#a8f00c4a5e31b0a8d103ed3b0732c17a3">RASR</a> value field in the MPU region.</p>
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-<p>Values for MPU region access attributes (in RASR field) </p>
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-
-<p>Functions that relate to the Memory Protection Unit.  
-<a href="#details">More...</a></p>
-<table class="memberdecls">
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-<tr class="memdesc:group__mpu__defines"><td class="mdescLeft">&#160;</td><td class="mdescRight">Define values for MPU region setup. <br/></td></tr>
-<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structMPU__Type.html">MPU_Type</a></td></tr>
-<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Structure type to access the Memory Protection Unit (MPU).  <a href="structMPU__Type.html#details">More...</a><br/></td></tr>
-<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a></td></tr>
-<tr class="memdesc:"><td class="mdescLeft">&#160;</td><td class="mdescRight">Setup information of a single MPU Region.  <a href="structARM__MPU__Region__t.html#details">More...</a><br/></td></tr>
-<tr class="separator:"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-Macros</h2></td></tr>
-<tr class="memitem:ga3fead12dc24a6d00ad53f55a042486ca"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(Region, BaseAddress)</td></tr>
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-<tr class="separator:ga3fead12dc24a6d00ad53f55a042486ca"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga96b93785c92e2dbcb3a2356c25bf2adc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size)</td></tr>
-<tr class="memdesc:ga96b93785c92e2dbcb3a2356c25bf2adc"><td class="mdescLeft">&#160;</td><td class="mdescRight">MPU Region Attribute and Size Register Value.  <a href="#ga96b93785c92e2dbcb3a2356c25bf2adc">More...</a><br/></td></tr>
-<tr class="separator:ga96b93785c92e2dbcb3a2356c25bf2adc"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:ga332ed5f8969dd4df6b61c6ae32ec36dc"><td class="mdescLeft">&#160;</td><td class="mdescRight">MPU Region Attribute and Size Register Value.  <a href="#ga332ed5f8969dd4df6b61c6ae32ec36dc">More...</a><br/></td></tr>
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-<tr class="separator:ga31406efd492ec9a091a70ffa2d8a42fb"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:gafa27b26d5847fa8e465584e376b6078a"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Functions that relate to the Memory Protection Unit. </p>
-<p>The following functions support the optional Memory Protection Unit (MPU) that is available on the Cortex-M0+, M3, M4 and M7 processor.</p>
-<p>The MPU is used to prevent from illegal memory accesses that are typically caused by errors in an application software.</p>
-<p><b>Example:</b> </p>
-<div class="fragment"><div class="line"><span class="keywordtype">int</span> main() </div>
-<div class="line">{</div>
-<div class="line">  <span class="comment">// Set Region 0</span></div>
-<div class="line">  <a class="code" href="group__mpu__functions.html#ga042ba1a6a1a58795231459ac0410b809">ARM_MPU_SetRegionEx</a>(0UL, 0x08000000UL, <a class="code" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(0UL, ARM_MPU_AP_FULL, 0UL, 0UL, 1UL, 1UL, 0x00UL, ARM_MPU_REGION_SIZE_1MB));</div>
-<div class="line">  </div>
-<div class="line">  <a class="code" href="group__mpu__functions.html#ga31406efd492ec9a091a70ffa2d8a42fb">ARM_MPU_Enable</a>(0);</div>
-<div class="line">  </div>
-<div class="line">  <span class="comment">// Execute application code that is access protected by the MPU</span></div>
-<div class="line">  </div>
-<div class="line">  <a class="code" href="group__mpu__functions.html#ga7cbc0a4a066ed90e85c8176228235d57">ARM_MPU_Disable</a>();</div>
-<div class="line">}</div>
-</div><!-- fragment --> <h2 class="groupheader">Macro Definition Documentation</h2>
-<a class="anchor" id="ga96b93785c92e2dbcb3a2356c25bf2adc"></a>
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-          <td class="memname">#define ARM_MPU_RASR</td>
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-          <td class="paramname">DisableExec, </td>
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-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">TypeExtField, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">IsShareable, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">IsCacheable, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">IsBufferable, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">SubRegionDisable, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">Size&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MPU Region Attribute and Size Register Value. </p>
-<p>This macro is used to construct a valid <a class="el" href="structMPU__Type.html#a8f00c4a5e31b0a8d103ed3b0732c17a3">RASR</a> value. The ENABLE bit of the RASR value is implicitly set to 1.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">DisableExec</td><td>Instruction access disable bit. 1 = disable instruction fetches. </td></tr>
-    <tr><td class="paramname">AccessPermission</td><td>Data access permission configures read/write access for User and Privileged mode. Possible values see <a class="el" href="group__mpu__defines.html#gabc4788126d7798469cb862a08d3050cc">ARM_MPU_AP_xxx</a>. </td></tr>
-    <tr><td class="paramname">TypeExtField</td><td>Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral. </td></tr>
-    <tr><td class="paramname">IsShareable</td><td>1 = region is shareable between multiple bus masters. </td></tr>
-    <tr><td class="paramname">IsCacheable</td><td>1 = region is cacheable (values may be kept in cache). </td></tr>
-    <tr><td class="paramname">IsBufferable</td><td>1 = region is bufferable (when using write-back caching). Cacheable but non-bufferable regions use write-through policy. </td></tr>
-    <tr><td class="paramname">SubRegionDisable</td><td>Sub-region disable field (8 bits). </td></tr>
-    <tr><td class="paramname">Size</td><td>Region size with values defined under <a class="el" href="group__mpu__defines.html#gadb0a92c0928c113120567e85ff1ba05c">ARM_MPU_REGION_SIZE_xxx</a>. </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="ga332ed5f8969dd4df6b61c6ae32ec36dc"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_MPU_RASR_EX</td>
-          <td>(</td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">DisableExec, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">AccessPermission, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">AccessAttributes, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">SubRegionDisable, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">Size&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MPU Region Attribute and Size Register Value. </p>
-<p>This macro is used to construct a valid <a class="el" href="structMPU__Type.html#a8f00c4a5e31b0a8d103ed3b0732c17a3">RASR</a> value. The ENABLE bit of the RASR value is implicitly set to 1.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">DisableExec</td><td>Instruction access disable bit, 1= disable instruction fetches. </td></tr>
-    <tr><td class="paramname">AccessPermission</td><td>Data access permission configures read/write access for User and Privileged mode. Possible values see <a class="el" href="group__mpu__defines.html#gabc4788126d7798469cb862a08d3050cc">ARM_MPU_AP_xxx</a>. </td></tr>
-    <tr><td class="paramname">AccessAttributes</td><td>Memory access attribution, see <a class="el" href="group__mpu__defines.html#ga71d41084e984be70a23cb640fd89d1e2">ARM_MPU_ACCESS_xxx</a>. </td></tr>
-    <tr><td class="paramname">SubRegionDisable</td><td>Sub-region disable field (8 bits). </td></tr>
-    <tr><td class="paramname">Size</td><td>Region size with values defined under <a class="el" href="group__mpu__defines.html#gadb0a92c0928c113120567e85ff1ba05c">ARM_MPU_REGION_SIZE_xxx</a>. </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="ga3fead12dc24a6d00ad53f55a042486ca"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_MPU_RBAR</td>
-          <td>(</td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">Region, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">&#160;</td>
-          <td class="paramname">BaseAddress&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MPU Region Base Address Register Value. </p>
-<p>This preprocessor function can be used to construct a valid <a class="el" href="structMPU__Type.html#a990c609b26d990b8ba832b110adfd353">RBAR</a> value. The VALID bit is implicitly set to 1.</p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">Region</td><td>The region to be configured, number 0 to 15. </td></tr>
-    <tr><td class="paramname">BaseAddress</td><td>The base address for the region. </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga9dcb0afddf4ac351f33f3c7a5169c62c"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_ClrRegion </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>rnr</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>Clear and disable the given MPU region. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">rnr</td><td>Region number to be cleared. </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="ga7cbc0a4a066ed90e85c8176228235d57"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Disable </td>
-          <td>(</td>
-          <td class="paramname"></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>Disable the MPU. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga31406efd492ec9a091a70ffa2d8a42fb"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Enable </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>MPU_CTRL</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Enable the memory protection unit (MPU) and. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">MPU_CTRL</td><td>Additional control settings that configure MPU behaviour</td></tr>
-  </table>
-  </dd>
-</dl>
-<p>The function <a class="el" href="group__mpu8__functions.html#ga5a3f40314553baccdeea551f86d9a997">ARM_MPU_Enable</a> writes to the register <a class="el" href="structMPU__Type.html#a769178ef949f0d5d8f18ddbd9e4e926f">MPU-&gt;CTRL</a> and sets bit ENABLE. The parameter <em>MPU_CTRL</em> provides additional bit values (see table below) that configure the MPU behaviour. For processors that implement an <b>MPU Fault Handler</b> the <a class="el" href="group__NVIC__gr.html">MemoryManagement_IRQn</a> exception is enabled by setting the bit MEMFAULTACT in register SBC-&gt;SHCSR.</p>
-<p>The following table contains possible values for the parameter <em>MPU_CTRL</em> that set specific bits in register MPU-&gt;CTRL. </p>
-<table class="doxtable">
-<tr>
-<th align="left">Bit </th><th align="left">MPU_CTRL value </th><th align="left">When applied </th><th align="left">When not applied  </th></tr>
-<tr>
-<td align="left">1 </td><td align="left">MPU_CTRL_HFNMIENA_Msk </td><td align="left">Enable MPU during hard fault, NMI, and FAULTMASK handlers execution </td><td align="left">Disable MPU during hard fault, NMI, and FAULTMASK handler execution </td></tr>
-<tr>
-<td align="left">2 </td><td align="left">MPU_CTRL_PRIVDEFENA_Msk </td><td align="left">Enable default memory map as a background region for privileged access </td><td align="left">Use only MPU region settings </td></tr>
-</table>
-<p><b>Example:</b></p>
-<div class="fragment"><div class="line"><span class="comment">// enable MPU with all region definitions. Exceptions are not protected by MPU.</span></div>
-<div class="line">  MPU_Enable (0);</div>
-<div class="line">  </div>
-<div class="line"><span class="comment">// enable MPU with all region definitions and background regions for privileged access. Exceptions are protected by MPU.</span></div>
-<div class="line">  MPU_Enable (MPU_CTRL_PRIVDEFENA_Msk | MPU_CTRL_HFNMIENA_Msk);</div>
-</div><!-- fragment --> 
-</div>
-</div>
-<a class="anchor" id="gafa27b26d5847fa8e465584e376b6078a"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_Load </td>
-          <td>(</td>
-          <td class="paramtype">MPU_Region_t const *&#160;</td>
-          <td class="paramname"><em>table</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>cnt</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>Load the given number of MPU regions from a table. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">table</td><td>Pointer to the MPU configuration table. </td></tr>
-    <tr><td class="paramname">cnt</td><td>Number of regions to be configured.</td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section note"><dt>Note</dt><dd>only up to 16 regions can be handled as the function <a class="el" href="group__mpu8__functions.html#gaca76614e3091c7324aa9d60e634621bf">ARM_MPU_Load</a> uses the REGION field in <a class="el" href="structMPU__Type.html#a990c609b26d990b8ba832b110adfd353">MPU-&gt;RBAR</a>.</dd></dl>
-<p><b>Example:</b> </p>
-<div class="fragment"><div class="line"><span class="keyword">const</span> <a class="code" href="structARM__MPU__Region__t.html">ARM_MPU_Region_t</a> mpuTable[3][4] = {</div>
-<div class="line">  {</div>
-<div class="line">    { .<a class="code" href="structARM__MPU__Region__t.html#afe7a7721aa08988d915670efa432cdd2">RBAR</a> = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(0UL, 0x08000000UL), .RASR = <a class="code" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(0UL, ARM_MPU_AP_FULL, 0UL, 0UL, 1UL, 1UL, 0x00UL, ARM_MPU_REGION_SIZE_1MB)  },</div>
-<div class="line">    { .RBAR = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(1UL, 0x20000000UL), .RASR = <a class="code" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(1UL, ARM_MPU_AP_FULL, 0UL, 0UL, 1UL, 1UL, 0x00UL, ARM_MPU_REGION_SIZE_32KB) },</div>
-<div class="line">    { .RBAR = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(2UL, 0x40020000UL), .RASR = <a class="code" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(1UL, ARM_MPU_AP_FULL, 2UL, 0UL, 0UL, 0UL, 0x00UL, ARM_MPU_REGION_SIZE_8KB)  }, </div>
-<div class="line">    { .RBAR = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(3UL, 0x40022000UL), .RASR = <a class="code" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(1UL, ARM_MPU_AP_FULL, 2UL, 0UL, 0UL, 0UL, 0xC0UL, ARM_MPU_REGION_SIZE_4KB)  }</div>
-<div class="line">  },</div>
-<div class="line">  {</div>
-<div class="line">    { .RBAR = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(4UL, 0x08000000UL), .RASR = <a class="code" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(0UL, ARM_MPU_AP_FULL, 0UL, 0UL, 1UL, 1UL, 0x00UL, ARM_MPU_REGION_SIZE_1MB)  },</div>
-<div class="line">    { .RBAR = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(5UL, 0x20000000UL), .RASR = <a class="code" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(1UL, ARM_MPU_AP_FULL, 0UL, 0UL, 1UL, 1UL, 0x00UL, ARM_MPU_REGION_SIZE_32KB) },</div>
-<div class="line">    { .RBAR = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(6UL, 0x40020000UL), .RASR = <a class="code" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(1UL, ARM_MPU_AP_FULL, 2UL, 0UL, 0UL, 0UL, 0x00UL, ARM_MPU_REGION_SIZE_8KB)  }, </div>
-<div class="line">    { .RBAR = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(7UL, 0x40022000UL), .RASR = <a class="code" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(1UL, ARM_MPU_AP_FULL, 2UL, 0UL, 0UL, 0UL, 0xC0UL, ARM_MPU_REGION_SIZE_4KB)  }</div>
-<div class="line">  },</div>
-<div class="line">  {</div>
-<div class="line">    { .RBAR = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(4UL, 0x18000000UL), .RASR = <a class="code" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(0UL, ARM_MPU_AP_FULL, 0UL, 0UL, 1UL, 1UL, 0x00UL, ARM_MPU_REGION_SIZE_1MB)  },</div>
-<div class="line">    { .RBAR = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(5UL, 0x30000000UL), .RASR = <a class="code" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(1UL, ARM_MPU_AP_FULL, 0UL, 0UL, 1UL, 1UL, 0x00UL, ARM_MPU_REGION_SIZE_32KB) },</div>
-<div class="line">    { .RBAR = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(6UL, 0x50020000UL), .RASR = <a class="code" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(1UL, ARM_MPU_AP_FULL, 2UL, 0UL, 0UL, 0UL, 0x00UL, ARM_MPU_REGION_SIZE_8KB)  }, </div>
-<div class="line">    { .RBAR = <a class="code" href="group__mpu__functions.html#ga3fead12dc24a6d00ad53f55a042486ca">ARM_MPU_RBAR</a>(7UL, 0x50022000UL), .RASR = <a class="code" href="group__mpu__functions.html#ga96b93785c92e2dbcb3a2356c25bf2adc">ARM_MPU_RASR</a>(1UL, ARM_MPU_AP_FULL, 2UL, 0UL, 0UL, 0UL, 0xC0UL, ARM_MPU_REGION_SIZE_4KB)  }</div>
-<div class="line">  }</div>
-<div class="line">};</div>
-<div class="line"> </div>
-<div class="line"><span class="keywordtype">void</span> UpdateMpu(uint32_t idx)</div>
-<div class="line">{</div>
-<div class="line">   <a class="code" href="group__mpu__functions.html#gafa27b26d5847fa8e465584e376b6078a">ARM_MPU_Load</a>(mpuTable[idx], 4);</div>
-<div class="line">}</div>
-</div><!-- fragment --> 
-</div>
-</div>
-<a class="anchor" id="gac1a949403bf84eecaf407003fb553ae7"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_OrderedMemcpy </td>
-          <td>(</td>
-          <td class="paramtype">volatile uint32_t *&#160;</td>
-          <td class="paramname"><em>dst</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">const uint32_t *<a class="el" href="group__compiler__conntrol__gr.html#ga378ac21329d33f561f90265eef89f564">__RESTRICT</a>&#160;</td>
-          <td class="paramname"><em>src</em>, </td>
-        </tr>
-        <tr>
-          <td class="paramkey"></td>
-          <td></td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>len</em>&#160;</td>
-        </tr>
-        <tr>
-          <td></td>
-          <td>)</td>
-          <td></td><td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-<p>Memcpy with strictly ordered memory access, e.g. used by code in <a class="el" href="group__mpu8__functions.html#gaca76614e3091c7324aa9d60e634621bf">ARM_MPU_Load</a>. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramname">dst</td><td>Destination data is copied to. </td></tr>
-    <tr><td class="paramname">src</td><td>Source data is copied from. </td></tr>
-    <tr><td class="paramname">len</td><td>Amount of data words to be copied. </td></tr>
-  </table>
-  </dd>
-</dl>
-
-</div>
-</div>
-<a class="anchor" id="ga16931f9ad84d7289e8218e169ae6db5d"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_MPU_SetRegion </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>rbar</em>, </td>
-        </tr>
-        <tr>
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-<tr class="memitem:ga0d3b5db0685bd95cc8bd2f7ad0891d39"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nvic__trustzone__functions.html#ga0d3b5db0685bd95cc8bd2f7ad0891d39">TZ_NVIC_SetPriorityGrouping_NS</a> (uint32_t PriorityGroup)</td></tr>
-<tr class="memdesc:ga0d3b5db0685bd95cc8bd2f7ad0891d39"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Priority Grouping (non-secure)  <a href="#ga0d3b5db0685bd95cc8bd2f7ad0891d39">More...</a><br/></td></tr>
-<tr class="separator:ga0d3b5db0685bd95cc8bd2f7ad0891d39"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf5f578628bc8b7154b29577f6f6a87fd"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nvic__trustzone__functions.html#gaf5f578628bc8b7154b29577f6f6a87fd">TZ_NVIC_GetPriorityGrouping_NS</a> (void)</td></tr>
-<tr class="memdesc:gaf5f578628bc8b7154b29577f6f6a87fd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Priority Grouping (non-secure)  <a href="#gaf5f578628bc8b7154b29577f6f6a87fd">More...</a><br/></td></tr>
-<tr class="separator:gaf5f578628bc8b7154b29577f6f6a87fd"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaedea4c16dd4a0b792c7e9d1da4c49295"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nvic__trustzone__functions.html#gaedea4c16dd4a0b792c7e9d1da4c49295">TZ_NVIC_EnableIRQ_NS</a> (<a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
-<tr class="memdesc:gaedea4c16dd4a0b792c7e9d1da4c49295"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable External Interrupt (non-secure)  <a href="#gaedea4c16dd4a0b792c7e9d1da4c49295">More...</a><br/></td></tr>
-<tr class="separator:gaedea4c16dd4a0b792c7e9d1da4c49295"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga57d2a6736704c4a39421ed1a2e7b689b"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nvic__trustzone__functions.html#ga57d2a6736704c4a39421ed1a2e7b689b">TZ_NVIC_GetEnableIRQ_NS</a> (<a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
-<tr class="memdesc:ga57d2a6736704c4a39421ed1a2e7b689b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Interrupt Enable status (non-secure)  <a href="#ga57d2a6736704c4a39421ed1a2e7b689b">More...</a><br/></td></tr>
-<tr class="separator:ga57d2a6736704c4a39421ed1a2e7b689b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gabc58593dea7803c1f1e1ed3b098f497c"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nvic__trustzone__functions.html#gabc58593dea7803c1f1e1ed3b098f497c">TZ_NVIC_DisableIRQ_NS</a> (<a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
-<tr class="memdesc:gabc58593dea7803c1f1e1ed3b098f497c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable External Interrupt (non-secure)  <a href="#gabc58593dea7803c1f1e1ed3b098f497c">More...</a><br/></td></tr>
-<tr class="separator:gabc58593dea7803c1f1e1ed3b098f497c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab85bd0d55d746caf0e414be5284afe24"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nvic__trustzone__functions.html#gab85bd0d55d746caf0e414be5284afe24">TZ_NVIC_GetPendingIRQ_NS</a> (<a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
-<tr class="memdesc:gab85bd0d55d746caf0e414be5284afe24"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Pending Interrupt (non-secure)  <a href="#gab85bd0d55d746caf0e414be5284afe24">More...</a><br/></td></tr>
-<tr class="separator:gab85bd0d55d746caf0e414be5284afe24"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaccbc9aa0eacf4d4c3d3046edb9e02edd"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nvic__trustzone__functions.html#gaccbc9aa0eacf4d4c3d3046edb9e02edd">TZ_NVIC_SetPendingIRQ_NS</a> (<a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
-<tr class="memdesc:gaccbc9aa0eacf4d4c3d3046edb9e02edd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Pending Interrupt (non-secure)  <a href="#gaccbc9aa0eacf4d4c3d3046edb9e02edd">More...</a><br/></td></tr>
-<tr class="separator:gaccbc9aa0eacf4d4c3d3046edb9e02edd"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga3b30f8b602b593a806617b671a50731a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nvic__trustzone__functions.html#ga3b30f8b602b593a806617b671a50731a">TZ_NVIC_ClearPendingIRQ_NS</a> (<a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
-<tr class="memdesc:ga3b30f8b602b593a806617b671a50731a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear Pending Interrupt (non-secure)  <a href="#ga3b30f8b602b593a806617b671a50731a">More...</a><br/></td></tr>
-<tr class="separator:ga3b30f8b602b593a806617b671a50731a"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga1bffd79bd6365d83281883b6c4b0f218"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nvic__trustzone__functions.html#ga1bffd79bd6365d83281883b6c4b0f218">TZ_NVIC_GetActive_NS</a> (<a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
-<tr class="memdesc:ga1bffd79bd6365d83281883b6c4b0f218"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Active Interrupt (non-secure)  <a href="#ga1bffd79bd6365d83281883b6c4b0f218">More...</a><br/></td></tr>
-<tr class="separator:ga1bffd79bd6365d83281883b6c4b0f218"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga2caf0df3603378c436c838138e42059a"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nvic__trustzone__functions.html#ga2caf0df3603378c436c838138e42059a">TZ_NVIC_SetPriority_NS</a> (<a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn, uint32_t priority)</td></tr>
-<tr class="memdesc:ga2caf0df3603378c436c838138e42059a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set Interrupt Priority (non-secure)  <a href="#ga2caf0df3603378c436c838138e42059a">More...</a><br/></td></tr>
-<tr class="separator:ga2caf0df3603378c436c838138e42059a"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gade6a8784339946fdd50575d7e65a3268"><td class="memItemLeft" align="right" valign="top">uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__nvic__trustzone__functions.html#gade6a8784339946fdd50575d7e65a3268">TZ_NVIC_GetPriority_NS</a> (<a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</td></tr>
-<tr class="memdesc:gade6a8784339946fdd50575d7e65a3268"><td class="mdescLeft">&#160;</td><td class="mdescRight">Get Interrupt Priority (non-secure)  <a href="#gade6a8784339946fdd50575d7e65a3268">More...</a><br/></td></tr>
-<tr class="separator:gade6a8784339946fdd50575d7e65a3268"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Nested Vector Interrupt Controller (NVIC) functions related to TrustZone for Armv8-M. </p>
-<h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga3b30f8b602b593a806617b671a50731a"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void TZ_NVIC_ClearPendingIRQ_NS </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
-          <td class="paramname"><em>IRQn</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Clear Pending Interrupt (non-secure) </p>
-<p>Clears the pending bit of an non-secure external interrupt when in secure state. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>External interrupt number. Value cannot be negative. </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#ga382ad6bedd6eecfdabd1b94dd128a01a">NVIC_ClearPendingIRQ</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gabc58593dea7803c1f1e1ed3b098f497c"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void TZ_NVIC_DisableIRQ_NS </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
-          <td class="paramname"><em>IRQn</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
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-
-<p>Disable External Interrupt (non-secure) </p>
-<p>Disables a device-specific interrupt in the non-secure NVIC when in secure state. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>External interrupt number. Value cannot be negative. </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#ga736ba13a76eb37ef6e2c253be8b0331c">NVIC_DisableIRQ</a> </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="gaedea4c16dd4a0b792c7e9d1da4c49295"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">void TZ_NVIC_EnableIRQ_NS </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
-          <td class="paramname"><em>IRQn</em></td><td>)</td>
-          <td></td>
-        </tr>
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-
-<p>Enable External Interrupt (non-secure) </p>
-<p>Enables a device-specific interrupt in the non-secure NVIC when in secure state. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>External interrupt number. Value cannot be negative. </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#ga530ad9fda2ed1c8b70e439ecfe80591f">NVIC_EnableIRQ</a> </li>
-</ul>
-</dd></dl>
-
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-</div>
-<a class="anchor" id="ga1bffd79bd6365d83281883b6c4b0f218"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t TZ_NVIC_GetActive_NS </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
-          <td class="paramname"><em>IRQn</em></td><td>)</td>
-          <td></td>
-        </tr>
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-</div><div class="memdoc">
-
-<p>Get Active Interrupt (non-secure) </p>
-<p>Reads the active register in non-secure NVIC when in secure state and returns the active bit. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt number. </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>0 Interrupt status is not active. </dd>
-<dd>
-1 Interrupt status is active. </dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#gadf4252e600661fd762cfc0d1a9f5b892">NVIC_GetActive</a> </li>
-</ul>
-</dd></dl>
-
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-</div>
-<a class="anchor" id="ga57d2a6736704c4a39421ed1a2e7b689b"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t TZ_NVIC_GetEnableIRQ_NS </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
-          <td class="paramname"><em>IRQn</em></td><td>)</td>
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-
-<p>Get Interrupt Enable status (non-secure) </p>
-<p>Returns a device specific interrupt enable status from the non-secure NVIC interrupt controller when in secure state. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt number. </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>0 Interrupt is not enabled. </dd>
-<dd>
-1 Interrupt is enabled. </dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#ga530ad9fda2ed1c8b70e439ecfe80591f">NVIC_EnableIRQ</a>; <a class="el" href="group__NVIC__gr.html#ga736ba13a76eb37ef6e2c253be8b0331c" title="Disable a device specific interrupt. ">NVIC_DisableIRQ</a>; </li>
-</ul>
-</dd></dl>
-
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-</div>
-<a class="anchor" id="gab85bd0d55d746caf0e414be5284afe24"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t TZ_NVIC_GetPendingIRQ_NS </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
-          <td class="paramname"><em>IRQn</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Get Pending Interrupt (non-secure) </p>
-<p>Reads the pending register in the non-secure NVIC when in secure state and returns the pending bit for the specified interrupt. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt number. </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>0 Interrupt status is not pending. </dd>
-<dd>
-1 Interrupt status is pending. </dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#ga95a8329a680b051ecf3ee8f516acc662">NVIC_GetPendingIRQ</a> </li>
-</ul>
-</dd></dl>
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">uint32_t TZ_NVIC_GetPriority_NS </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
-          <td class="paramname"><em>IRQn</em></td><td>)</td>
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-      </table>
-</div><div class="memdoc">
-
-<p>Get Interrupt Priority (non-secure) </p>
-<p>Reads the priority of an non-secure interrupt when in secure state. The interrupt number can be positive to specify an external (device specific) interrupt, or negative to specify an internal (core) interrupt. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt number. </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section return"><dt>Returns</dt><dd>Interrupt Priority. Value is aligned automatically to the implemented priority bits of the microcontroller. </dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#gab18fb9f6c5f4c70fdd73047f0f7c8395">NVIC_GetPriority</a> </li>
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-<div class="memproto">
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-          <td class="memname">uint32_t TZ_NVIC_GetPriorityGrouping_NS </td>
-          <td>(</td>
-          <td class="paramtype">void&#160;</td>
-          <td class="paramname"></td><td>)</td>
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-        </tr>
-      </table>
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-
-<p>Get Priority Grouping (non-secure) </p>
-<p>Reads the priority grouping field from the non-secure NVIC when in secure state. </p>
-<dl class="section return"><dt>Returns</dt><dd>Priority grouping field (SCB-&gt;AIRCR [10:8] PRIGROUP field). </dd></dl>
-<dl class="section note"><dt>Note</dt><dd>Only available for Armv8-M Mainline. </dd></dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#gaa81b19849367d3cdb95ac108c500fa78">NVIC_GetPriorityGrouping</a> </li>
-</ul>
-</dd></dl>
-
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-      <table class="memname">
-        <tr>
-          <td class="memname">void TZ_NVIC_SetPendingIRQ_NS </td>
-          <td>(</td>
-          <td class="paramtype"><a class="el" href="group__NVIC__gr.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a>&#160;</td>
-          <td class="paramname"><em>IRQn</em></td><td>)</td>
-          <td></td>
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-      </table>
-</div><div class="memdoc">
-
-<p>Set Pending Interrupt (non-secure) </p>
-<p>Sets the pending bit of an non-secure external interrupt when in secure state. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">IRQn</td><td>Interrupt number. Value cannot be negative. </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section see"><dt>See Also</dt><dd><ul>
-<li><a class="el" href="group__NVIC__gr.html#ga3b885147ef9965ecede49614de8df9d2">NVIC_SetPendingIRQ</a> </li>
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-<div class="memproto">
-      <table class="memname">
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-   <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.6.0</span>
-   </div>
-   <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
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-<div class="header">
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-<a href="#define-members">Macros</a>  </div>
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-<div class="title">Peripheral Access</div>  </div>
-</div><!--header-->
-<div class="contents">
-
-<p>Naming conventions and optional features for accessing peripherals.  
-<a href="#details">More...</a></p>
-<table class="memberdecls">
-<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
-Macros</h2></td></tr>
-<tr class="memitem:ga286e3b913dbd236c7f48ea70c8821f4e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__peripheral__gr.html#ga286e3b913dbd236c7f48ea70c8821f4e">_VAL2FLD</a>(field, value)</td></tr>
-<tr class="memdesc:ga286e3b913dbd236c7f48ea70c8821f4e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mask and shift a bit field value for assigning the result to a peripheral register.  <a href="#ga286e3b913dbd236c7f48ea70c8821f4e">More...</a><br/></td></tr>
-<tr class="separator:ga286e3b913dbd236c7f48ea70c8821f4e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga139b6e261c981f014f386927ca4a8444"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__peripheral__gr.html#ga139b6e261c981f014f386927ca4a8444">_FLD2VAL</a>(field, value)</td></tr>
-<tr class="memdesc:ga139b6e261c981f014f386927ca4a8444"><td class="mdescLeft">&#160;</td><td class="mdescRight">Extract from a peripheral register value the a bit field value.  <a href="#ga139b6e261c981f014f386927ca4a8444">More...</a><br/></td></tr>
-<tr class="separator:ga139b6e261c981f014f386927ca4a8444"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Naming conventions and optional features for accessing peripherals. </p>
-<p>The section below describes the naming conventions, requirements, and optional features for accessing device specific peripherals. Most of the rules also apply to the core peripherals. The <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> contains typically these definition and also includes the core specific header files.</p>
-<p>The definitions for <a class="el" href="group__peripheral__gr.html">Peripheral Access</a> can be generated using the <a href="../../SVD/html/index.html"><b>CMSIS-SVD</b></a> System View Description for Peripherals. Refer to <a href="../../SVD/html/svd_SVDConv_pg.html"><b>SVDConv.exe</b></a> for more information.</p>
-<p>Each peripheral provides a data type definition with a name that is composed of:</p>
-<ul>
-<li>an optional prefix <b>&lt;<em>device abbreviation&gt;</em>_</b></li>
-<li><b>&lt;<em>peripheral name</em>&gt;</b></li>
-<li>postfix <b>_Type</b> or <b>_TypeDef</b> to identify a type definition.</li>
-</ul>
-<p>Examples:</p>
-<ul>
-<li><b>UART_TypeDef</b> for the peripheral <b>UART</b>.</li>
-<li><b>LPC_UART_TypeDef</b> for the device family <b>LPC</b> and the peripheral <b>UART</b>.</li>
-</ul>
-<p>The data type definition uses standard C data types defined by the ANSI C header file &lt;stdint.h&gt;.</p>
-<ul>
-<li>IO Type Qualifiers are used to specify the access to peripheral variables. <table class="doxtable">
-<tr>
-<th align="left">IO Type Qualifier </th><th align="left">Type </th><th align="left">Description  </th></tr>
-<tr>
-<td align="left"><b>__IM</b> </td><td align="left">Struct member </td><td align="left">Defines 'read only' permissions </td></tr>
-<tr>
-<td align="left"><b>__OM</b> </td><td align="left">Struct member </td><td align="left">Defines 'write only' permissions </td></tr>
-<tr>
-<td align="left"><b>__IOM</b> </td><td align="left">Struct member </td><td align="left">Defines 'read / write' permissions </td></tr>
-<tr>
-<td align="left"><b>__I</b> </td><td align="left">Scalar variable </td><td align="left">Defines 'read only' permissions </td></tr>
-<tr>
-<td align="left"><b>__O</b> </td><td align="left">Scalar variable </td><td align="left">Defines 'write only' permissions </td></tr>
-<tr>
-<td align="left"><b>__IO</b> </td><td align="left">Scalar variable </td><td align="left">Defines 'read / write' permissions </td></tr>
-</table>
-<dl class="section note"><dt>Note</dt><dd><b>__IM</b>, <b>__OM</b>, <b>__IOM</b> are added in CMSIS-Core V4.20 to enhance support for C++. Prior version used <b>__I</b>, <b>__O</b>, <b>__IO</b> also for struct member definitions.</dd></dl>
-The typedef <b>&lt;<em>device abbreviation</em>&gt;_UART_TypeDef</b> shown below defines the generic register layout for all UART channels in a device.</li>
-</ul>
-<div class="fragment"><div class="line"><span class="keyword">typedef</span> <span class="keyword">struct</span></div>
-<div class="line">{</div>
-<div class="line">  <span class="keyword">union </span>{</div>
-<div class="line">  __IM  uint8_t  RBR;                 <span class="comment">/* Offset: 0x000 (R/ )  Receiver Buffer Register            */</span></div>
-<div class="line">  __OM  uint8_t  THR;                 <span class="comment">/* Offset: 0x000 ( /W)  Transmit Holding Register           */</span></div>
-<div class="line">  __IOM uint8_t  DLL;                 <span class="comment">/* Offset: 0x000 (R/W)  Divisor Latch LSB                   */</span></div>
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-<div class="line">  <span class="keyword">union </span>{</div>
-<div class="line">  __IOM uint8_t  DLM;                 <span class="comment">/* Offset: 0x004 (R/W)  Divisor Latch MSB                   */</span></div>
-<div class="line">  __IOM uint32_t IER;                 <span class="comment">/* Offset: 0x004 (R/W)  Interrupt Enable Register           */</span></div>
-<div class="line">  };</div>
-<div class="line">  <span class="keyword">union </span>{</div>
-<div class="line">  __IM  uint32_t IIR;                 <span class="comment">/* Offset: 0x008 (R/ )  Interrupt ID Register               */</span></div>
-<div class="line">  __OM  uint8_t  FCR;                 <span class="comment">/* Offset: 0x008 ( /W)  FIFO Control Register               */</span></div>
-<div class="line">  };</div>
-<div class="line">  __IOM uint8_t  LCR;                 <span class="comment">/* Offset: 0x00C (R/W)  Line Control Register               */</span></div>
-<div class="line">        uint8_t  RESERVED1[7];</div>
-<div class="line">  __IM  uint8_t  LSR;                 <span class="comment">/* Offset: 0x014 (R/ )  Line Status Register                */</span></div>
-<div class="line">        uint8_t  RESERVED2[7];</div>
-<div class="line">  __IOM uint8_t  SCR;                 <span class="comment">/* Offset: 0x01C (R/W)  Scratch Pad Register                */</span></div>
-<div class="line">        uint8_t  RESERVED3[3];</div>
-<div class="line">  __IOM uint32_t ACR;                 <span class="comment">/* Offset: 0x020 (R/W)  Autobaud Control Register           */</span></div>
-<div class="line">  __IOM uint8_t  ICR;                 <span class="comment">/* Offset: 0x024 (R/W)  IrDA Control Register               */</span></div>
-<div class="line">        uint8_t  RESERVED4[3];</div>
-<div class="line">  __IOM uint8_t  FDR;                 <span class="comment">/* Offset: 0x028 (R/W)  Fractional Divider Register         */</span></div>
-<div class="line">        uint8_t  RESERVED5[7];</div>
-<div class="line">  __IOM uint8_t  TER;                 <span class="comment">/* Offset: 0x030 (R/W)  Transmit Enable Register            */</span></div>
-<div class="line">        uint8_t  RESERVED6[39];</div>
-<div class="line">  __IM  uint8_t  FIFOLVL;             <span class="comment">/* Offset: 0x058 (R/ )  FIFO Level Register                 */</span></div>
-<div class="line">} LPC_UART_TypeDef;</div>
-</div><!-- fragment --><p>To access the registers of the UART defined above, pointers to this register structure are defined. If more instances of a peripheral exist, the variables have a postfix (digit or letter) that identifies the peripheral.</p>
-<p><b>Example:</b> In this example <b>LPC_UART2</b> and <b>LPC_UART3</b> are two pointers to UARTs defined with above register structure. <br/>
-</p>
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-<div class="line"><span class="preprocessor">#define LPC_UART3             ((LPC_UART_TypeDef      *) LPC_UART3_BASE    )</span></div>
-</div><!-- fragment --><dl class="section note"><dt>Note</dt><dd><ul>
-<li>The prefix <b>LPC</b> is optional.</li>
-</ul>
-</dd></dl>
-<p>The registers in the various UARTs can now be referred in the user code as shown below:<br/>
-</p>
-<div class="fragment"><div class="line">val = LPC_UART2-&gt;DR   <span class="comment">// is the data register of UART1.</span></div>
-</div><!-- fragment --><hr/>
-<h1><a class="anchor" id="core_cmsis_pal_min_reqs"></a>
-Minimal Requirements</h1>
-<p>To access the peripheral registers and related function in a device, the files <b><em>device.h</em></b> and <b>core_cm<em>#</em>.h</b> define as a minimum: <br/>
-<br/>
-</p>
-<ul>
-<li>The <b>Register Layout Typedef</b> for each peripheral that defines all register names. RESERVED is used to introduce space into the structure for adjusting the addresses of the peripheral registers. <br/>
-<br/>
-<b>Example:</b> <div class="fragment"><div class="line"><span class="keyword">typedef</span> <span class="keyword">struct</span></div>
-<div class="line">{</div>
-<div class="line">  __IOM uint32_t CTRL;                <span class="comment">/* Offset: 0x000 (R/W)  SysTick Control and Status Register */</span></div>
-<div class="line">  __IOM uint32_t LOAD;                <span class="comment">/* Offset: 0x004 (R/W)  SysTick Reload Value Register       */</span></div>
-<div class="line">  __IOM uint32_t VAL;                 <span class="comment">/* Offset: 0x008 (R/W)  SysTick Current Value Register      */</span></div>
-<div class="line">  __IM  uint32_t CALIB;               <span class="comment">/* Offset: 0x00C (R/ )  SysTick Calibration Register        */</span></div>
-<div class="line">} <a class="code" href="structSysTick__Type.html">SysTick_Type</a>;</div>
-</div><!-- fragment --></li>
-<li><b>Base Address</b> for each peripheral (in case of multiple peripherals that use the same <b>register layout typedef</b> multiple base addresses are defined). <br/>
-<br/>
-<b>Example:</b> <div class="fragment"><div class="line"><span class="preprocessor">#define SysTick_BASE (SCS_BASE + 0x0010)            </span><span class="comment">/* SysTick Base Address     */</span><span class="preprocessor"></span></div>
-</div><!-- fragment --></li>
-<li><b>Access Definitions</b> for each peripheral. In case of multiple peripherals that are using the same <b>register layout typdef</b>, multiple access definitions exist (LPC_UART0, LPC_UART2). <br/>
-<br/>
-<b>Example:</b> <div class="fragment"><div class="line"><span class="preprocessor">#define SysTick ((SysTick_Type *) Systick_BASE)    </span><span class="comment">/* SysTick access definition */</span><span class="preprocessor"></span></div>
-</div><!-- fragment --></li>
-</ul>
-<p>These definitions allow accessing peripheral registers with simple assignments.</p>
-<ul>
-<li><b>Example:</b> <br/>
-<div class="fragment"><div class="line">SysTick-&gt;CTRL = 0;</div>
-</div><!-- fragment --></li>
-</ul>
-<hr/>
-<h1><a class="anchor" id="core_cmsis_pal_opts"></a>
-Optional Features</h1>
-<p>Optionally, the file <b><em>device</em>.h</b> may define:</p>
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-<li><a class="el" href="group__peripheral__gr.html#core_cmsis_pal_bitfields">Register Bit Fields</a> and #define constants that simplify access to peripheral registers. These constants may define bit-positions or other specific patterns that are required for programming peripheral registers. The identifiers should start with <b>&lt;<em>device abbreviation</em>&gt;_</b> and <b>&lt;<em>peripheral name</em>&gt;_</b>. It is recommended to use CAPITAL letters for #define constants.</li>
-<li>More complex functions (i.e. status query before a sending register is accessed). Again, these functions start with <b>&lt;<em>device abbreviation</em>&gt;_</b> and <b>&lt;<em>peripheral name</em>&gt;_</b>.</li>
-</ul>
-<hr/>
-<h1><a class="anchor" id="core_cmsis_pal_bitfields"></a>
-Register Bit Fields</h1>
-<p>For Core Register, macros define the position and the mask value for a bit field. It is recommended to create such definitions also for other peripheral registers.</p>
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-<div class="fragment"><div class="line"><span class="comment">/* SCB CPUID Register Definitions */</span></div>
-<div class="line"><span class="preprocessor">#define SCB_CPUID_IMPLEMENTER_Pos      24U                                       </span></div>
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-</div><!-- fragment --><p>The macros <b><a class="el" href="group__peripheral__gr.html#ga286e3b913dbd236c7f48ea70c8821f4e" title="Mask and shift a bit field value for assigning the result to a peripheral register. ">_VAL2FLD(field, value)</a></b> and <b><a class="el" href="group__peripheral__gr.html#ga139b6e261c981f014f386927ca4a8444" title="Extract from a peripheral register value the a bit field value. ">_FLD2VAL(field, value)</a></b> enable access to bit fields. </p>
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-<title>PMU Events for Cortex-M55</title>
-<title>CMSIS-Core (Cortex-M): PMU Events for Cortex-M55</title>
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-   <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.6.0</span>
-   </div>
-   <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
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-<div class="title">PMU Events for Cortex-M55<div class="ingroups"><a class="el" href="group__pmu8__functions.html">PMU Functions for Armv8.1-M</a></div></div>  </div>
-</div><!--header-->
-<div class="contents">
-
-<p>IDs for additional events defined for Cortex-M55.  
-<a href="#details">More...</a></p>
-<table class="memberdecls">
-<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
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-<tr class="memitem:gab423c79d244d071407afb49dfcfb6e05"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#gab423c79d244d071407afb49dfcfb6e05">ARMCM55_PMU_ECC_ERR</a>&#160;&#160;&#160;0xC000</td></tr>
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-<tr class="memdesc:ga88ab1b9d04cd44c53a92962fad8e3bdc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any fatal ECC error.  <a href="#ga88ab1b9d04cd44c53a92962fad8e3bdc">More...</a><br/></td></tr>
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-<tr class="memdesc:ga45cc9a0330e159e4afbce93e3cb5ef2e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any fatal ECC error in the data cache.  <a href="#ga45cc9a0330e159e4afbce93e3cb5ef2e">More...</a><br/></td></tr>
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-<tr class="memdesc:gafc07c84258939e22cdb3b2e98dee0ac6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any ECC error in the ITCM.  <a href="#gafc07c84258939e22cdb3b2e98dee0ac6">More...</a><br/></td></tr>
-<tr class="separator:gafc07c84258939e22cdb3b2e98dee0ac6"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:gad82225c528aa89689684fe5ddbe3c637"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any fatal ECC error in the DTCM.  <a href="#gad82225c528aa89689684fe5ddbe3c637">More...</a><br/></td></tr>
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-<tr class="memdesc:ga0ed17ac3f8d8865e85d9690cbb51a06b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Any fatal ECC error in the ITCM.  <a href="#ga0ed17ac3f8d8865e85d9690cbb51a06b">More...</a><br/></td></tr>
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-<tr class="separator:gad433a568f1a7ae448807f9e71173e6c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad10f5c84036644353ee2dfb14b8e9f48"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#gad10f5c84036644353ee2dfb14b8e9f48">ARMCM55_PMU_PF_CANCEL</a>&#160;&#160;&#160;0xC101</td></tr>
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-<tr class="separator:gad10f5c84036644353ee2dfb14b8e9f48"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga1fafa33dc3bfb8f717fa04a0b868353c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#ga1fafa33dc3bfb8f717fa04a0b868353c">ARMCM55_PMU_PF_DROP_LINEFILL</a>&#160;&#160;&#160;0xC102</td></tr>
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-<tr class="separator:ga1fafa33dc3bfb8f717fa04a0b868353c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf3fcaa27702154d0739863b6462b8d73"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#gaf3fcaa27702154d0739863b6462b8d73">ARMCM55_PMU_NWAMODE_ENTER</a>&#160;&#160;&#160;0xC200</td></tr>
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-<tr class="separator:gaf3fcaa27702154d0739863b6462b8d73"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab3f4da2771d4ca5edc9822d9a5353994"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#gab3f4da2771d4ca5edc9822d9a5353994">ARMCM55_PMU_NWAMODE</a>&#160;&#160;&#160;0xC201</td></tr>
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-<tr class="separator:gab3f4da2771d4ca5edc9822d9a5353994"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaadf0341d6a67cd30481201e7a3c7e77b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#gaadf0341d6a67cd30481201e7a3c7e77b">ARMCM55_PMU_SAHB_ACCESS</a>&#160;&#160;&#160;0xC300</td></tr>
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-<tr class="separator:gaadf0341d6a67cd30481201e7a3c7e77b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaadf0341d6a67cd30481201e7a3c7e77b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#gaadf0341d6a67cd30481201e7a3c7e77b">ARMCM55_PMU_SAHB_ACCESS</a>&#160;&#160;&#160;0xC300</td></tr>
-<tr class="memdesc:gaadf0341d6a67cd30481201e7a3c7e77b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read or write access on the S-AHB interface to the TCM.  <a href="#gaadf0341d6a67cd30481201e7a3c7e77b">More...</a><br/></td></tr>
-<tr class="separator:gaadf0341d6a67cd30481201e7a3c7e77b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga4b3797dce1999fc331ab03acfd2f135f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#ga4b3797dce1999fc331ab03acfd2f135f">ARMCM55_PMU_PAHB_ACCESS</a>&#160;&#160;&#160;0xC301</td></tr>
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-<tr class="separator:ga4b3797dce1999fc331ab03acfd2f135f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga8e3f50182b0fdacab4b09bb0e4007136"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#ga8e3f50182b0fdacab4b09bb0e4007136">ARMCM55_PMU_AXI_WRITE_ACCESS</a>&#160;&#160;&#160;0xC302</td></tr>
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-<tr class="separator:ga8e3f50182b0fdacab4b09bb0e4007136"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga49e8162cf70ec75017dee7428462f38f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#ga49e8162cf70ec75017dee7428462f38f">ARMCM55_PMU_AXI_READ_ACCESS</a>&#160;&#160;&#160;0xC303</td></tr>
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-<tr class="separator:ga49e8162cf70ec75017dee7428462f38f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga8b005f5e47bc8bf9ee8d84a43b798ca9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#ga8b005f5e47bc8bf9ee8d84a43b798ca9">ARMCM55_PMU_DOSTIMEOUT_DOUBLE</a>&#160;&#160;&#160;0xC400</td></tr>
-<tr class="memdesc:ga8b005f5e47bc8bf9ee8d84a43b798ca9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Denial of Service timeout has fired twice and caused buffers to drain to allow forward progress.  <a href="#ga8b005f5e47bc8bf9ee8d84a43b798ca9">More...</a><br/></td></tr>
-<tr class="separator:ga8b005f5e47bc8bf9ee8d84a43b798ca9"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga6bf0106f269b33afbe3482bab385f152"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armcm55.html#ga6bf0106f269b33afbe3482bab385f152">ARMCM55_PMU_DOSTIMEOUT_TRIPLE</a>&#160;&#160;&#160;0xC401</td></tr>
-<tr class="memdesc:ga6bf0106f269b33afbe3482bab385f152"><td class="mdescLeft">&#160;</td><td class="mdescRight">Denial of Service timeout has fired three times and blocked the LSU to force forward progress.  <a href="#ga6bf0106f269b33afbe3482bab385f152">More...</a><br/></td></tr>
-<tr class="separator:ga6bf0106f269b33afbe3482bab385f152"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>IDs for additional events defined for Cortex-M55. </p>
-<p>These events are available on a Cortex-M55 device including a PMU. </p>
-<h2 class="groupheader">Macro Definition Documentation</h2>
-<a class="anchor" id="ga49e8162cf70ec75017dee7428462f38f"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARMCM55_PMU_AXI_READ_ACCESS&#160;&#160;&#160;0xC303</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Any beat access to M-AXI read interface. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga8e3f50182b0fdacab4b09bb0e4007136"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARMCM55_PMU_AXI_WRITE_ACCESS&#160;&#160;&#160;0xC302</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Any beat access to M-AXI write interface. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga8b005f5e47bc8bf9ee8d84a43b798ca9"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARMCM55_PMU_DOSTIMEOUT_DOUBLE&#160;&#160;&#160;0xC400</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Denial of Service timeout has fired twice and caused buffers to drain to allow forward progress. </p>
-
-</div>
-</div>
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARMCM55_PMU_DOSTIMEOUT_TRIPLE&#160;&#160;&#160;0xC401</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Denial of Service timeout has fired three times and blocked the LSU to force forward progress. </p>
-
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-</div>
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARMCM55_PMU_ECC_ERR&#160;&#160;&#160;0xC000</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Any ECC error. </p>
-
-</div>
-</div>
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARMCM55_PMU_ECC_ERR_DCACHE&#160;&#160;&#160;0xC010</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Any ECC error in the data cache. </p>
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-</div>
-</div>
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARMCM55_PMU_ECC_ERR_DTCM&#160;&#160;&#160;0xC020</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Any ECC error in the DTCM. </p>
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-</div>
-</div>
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARMCM55_PMU_ECC_ERR_FATAL&#160;&#160;&#160;0xC001</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Any fatal ECC error. </p>
-
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-</div>
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARMCM55_PMU_ECC_ERR_FATAL_DCACHE&#160;&#160;&#160;0xC012</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Any fatal ECC error in the data cache. </p>
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARMCM55_PMU_ECC_ERR_FATAL_DTCM&#160;&#160;&#160;0xC022</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Any fatal ECC error in the DTCM. </p>
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARMCM55_PMU_ECC_ERR_FATAL_ICACHE&#160;&#160;&#160;0xC013</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Any fatal ECC error in the instruction cache. </p>
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARMCM55_PMU_ECC_ERR_FATAL_ITCM&#160;&#160;&#160;0xC023</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Any fatal ECC error in the ITCM. </p>
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARMCM55_PMU_ECC_ERR_ICACHE&#160;&#160;&#160;0xC011</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Any ECC error in the instruction cache. </p>
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARMCM55_PMU_ECC_ERR_ITCM&#160;&#160;&#160;0xC021</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Any ECC error in the ITCM. </p>
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-<div class="memitem">
-<div class="memproto">
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-        <tr>
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-      </table>
-</div><div class="memdoc">
-
-<p>Write-allocate store is not allocated into the data cache due to no-write-allocate mode. </p>
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-<div class="memproto">
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-        <tr>
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-      </table>
-</div><div class="memdoc">
-
-<p>No write-allocate mode entry. </p>
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-<div class="memitem">
-<div class="memproto">
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-        <tr>
-          <td class="memname">#define ARMCM55_PMU_PAHB_ACCESS&#160;&#160;&#160;0xC301</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Read or write access on the P-AHB interface. </p>
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-<div class="memproto">
-      <table class="memname">
-        <tr>
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-      </table>
-</div><div class="memdoc">
-
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-<div class="memitem">
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-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARMCM55_PMU_PF_DROP_LINEFILL&#160;&#160;&#160;0xC102</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
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-      <table class="memname">
-        <tr>
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-
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-<div class="memitem">
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-        <tr>
-          <td class="memname">#define ARMCM55_PMU_SAHB_ACCESS&#160;&#160;&#160;0xC300</td>
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-      </table>
-</div><div class="memdoc">
-
-<p>Read or write access on the S-AHB interface to the TCM. </p>
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARMCM55_PMU_SAHB_ACCESS&#160;&#160;&#160;0xC300</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Read or write access on the S-AHB interface to the TCM. </p>
-
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diff --git a/Documentation/Core/html/group__pmu8__events__armcm55.js b/Documentation/Core/html/group__pmu8__events__armcm55.js
deleted file mode 100644
index 6683cfc..0000000
--- a/Documentation/Core/html/group__pmu8__events__armcm55.js
+++ /dev/null

@@ -1,25 +0,0 @@
-var group__pmu8__events__armcm55 =
-[
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-    [ "ARMCM55_PMU_AXI_WRITE_ACCESS", "group__pmu8__events__armcm55.html#ga8e3f50182b0fdacab4b09bb0e4007136", null ],
-    [ "ARMCM55_PMU_DOSTIMEOUT_DOUBLE", "group__pmu8__events__armcm55.html#ga8b005f5e47bc8bf9ee8d84a43b798ca9", null ],
-    [ "ARMCM55_PMU_DOSTIMEOUT_TRIPLE", "group__pmu8__events__armcm55.html#ga6bf0106f269b33afbe3482bab385f152", null ],
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-<tr class="separator:gae3c87b378d4c60d45f856f1d7b40016f"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:ga0da0d8e33124fdad9ddf6e30593984d4"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>IDs for additional events defined for Cortex-M85. </p>
-<p>These events are available on a Cortex-M85 device including a PMU. </p>
-<h2 class="groupheader">Macro Definition Documentation</h2>
-<a class="anchor" id="ga69917e08b8f2f6cba809a715f437f21b"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARMCM85_PMU_AXI_READ_ACCESS&#160;&#160;&#160;0xC303</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Any beat access to M-AXI read interface. </p>
-
-</div>
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-<div class="memitem">
-<div class="memproto">
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-        <tr>
-          <td class="memname">#define ARMCM85_PMU_AXI_WRITE_ACCESS&#160;&#160;&#160;0xC302</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Any beat access to M-AXI write interface. </p>
-
-</div>
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-<div class="memitem">
-<div class="memproto">
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-        <tr>
-          <td class="memname">#define ARMCM85_PMU_DOSTIMEOUT_DOUBLE&#160;&#160;&#160;0xC400</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Denial of Service timeout has fired twice and caused buffers to drain to allow forward progress. </p>
-
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-</div>
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-<div class="memitem">
-<div class="memproto">
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-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Denial of Service timeout has fired three times and blocked the LSU to force forward progress. </p>
-
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-</div>
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-<div class="memitem">
-<div class="memproto">
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-        <tr>
-          <td class="memname">#define ARMCM85_PMU_ECC_ERR&#160;&#160;&#160;0xC000</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Any ECC error. </p>
-
-</div>
-</div>
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-          <td class="memname">#define ARMCM85_PMU_ECC_ERR_DCACHE&#160;&#160;&#160;0xC010</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Any ECC error in the data cache. </p>
-
-</div>
-</div>
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-<div class="memitem">
-<div class="memproto">
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-          <td class="memname">#define ARMCM85_PMU_ECC_ERR_DTCM&#160;&#160;&#160;0xC020</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Any ECC error in the DTCM. </p>
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-
-<p>Any ECC error in the instruction cache. </p>
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-
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-</div><div class="memdoc">
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-<p>Any multi-bit ECC error. </p>
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-<div class="header">
-  <div class="summary">
-<a href="#define-members">Macros</a>  </div>
-  <div class="headertitle">
-<div class="title">PMU Events for Armv8.1-M<div class="ingroups"><a class="el" href="group__pmu8__functions.html">PMU Functions for Armv8.1-M</a></div></div>  </div>
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-<p>IDs for Armv8.1-M architecture defined events.  
-<a href="#details">More...</a></p>
-<table class="memberdecls">
-<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
-Macros</h2></td></tr>
-<tr class="memitem:ga6e02b08550d7e9b273ff7913f1b57bea"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga6e02b08550d7e9b273ff7913f1b57bea">ARM_PMU_SW_INCR</a>&#160;&#160;&#160;0x0000</td></tr>
-<tr class="memdesc:ga6e02b08550d7e9b273ff7913f1b57bea"><td class="mdescLeft">&#160;</td><td class="mdescRight">Software update to the PMU_SWINC register, architecturally executed and condition code check pass.  <a href="#ga6e02b08550d7e9b273ff7913f1b57bea">More...</a><br/></td></tr>
-<tr class="separator:ga6e02b08550d7e9b273ff7913f1b57bea"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac43e0e0f9e385ea66402bdeebf3fea3e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gac43e0e0f9e385ea66402bdeebf3fea3e">ARM_PMU_L1I_CACHE_REFILL</a>&#160;&#160;&#160;0x0001</td></tr>
-<tr class="memdesc:gac43e0e0f9e385ea66402bdeebf3fea3e"><td class="mdescLeft">&#160;</td><td class="mdescRight">L1 I-Cache refill.  <a href="#gac43e0e0f9e385ea66402bdeebf3fea3e">More...</a><br/></td></tr>
-<tr class="separator:gac43e0e0f9e385ea66402bdeebf3fea3e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga64a3d7bfb7ec9d7bdeb073a4fe1bbc38"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga64a3d7bfb7ec9d7bdeb073a4fe1bbc38">ARM_PMU_L1D_CACHE_REFILL</a>&#160;&#160;&#160;0x0003</td></tr>
-<tr class="memdesc:ga64a3d7bfb7ec9d7bdeb073a4fe1bbc38"><td class="mdescLeft">&#160;</td><td class="mdescRight">L1 D-Cache refill.  <a href="#ga64a3d7bfb7ec9d7bdeb073a4fe1bbc38">More...</a><br/></td></tr>
-<tr class="separator:ga64a3d7bfb7ec9d7bdeb073a4fe1bbc38"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga7505ae74c1d905f01b05dd5466c1efc0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga7505ae74c1d905f01b05dd5466c1efc0">ARM_PMU_L1D_CACHE</a>&#160;&#160;&#160;0x0004</td></tr>
-<tr class="memdesc:ga7505ae74c1d905f01b05dd5466c1efc0"><td class="mdescLeft">&#160;</td><td class="mdescRight">L1 D-Cache access.  <a href="#ga7505ae74c1d905f01b05dd5466c1efc0">More...</a><br/></td></tr>
-<tr class="separator:ga7505ae74c1d905f01b05dd5466c1efc0"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:ga2e8725ee07c2b2c75a1b54261bc26cc8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Memory-reading instruction architecturally executed and condition code check pass.  <a href="#ga2e8725ee07c2b2c75a1b54261bc26cc8">More...</a><br/></td></tr>
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-<tr class="separator:ga8179d1144f8ec993bd1343e276d7b49b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga8a5e60eee460addfc66e275a2c4c4800"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga8a5e60eee460addfc66e275a2c4c4800">ARM_PMU_INST_RETIRED</a>&#160;&#160;&#160;0x0008</td></tr>
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-<tr class="separator:ga8a5e60eee460addfc66e275a2c4c4800"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:gac97858bd621eab4592569444f0a5c37f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Exception entry.  <a href="#gac97858bd621eab4592569444f0a5c37f">More...</a><br/></td></tr>
-<tr class="separator:gac97858bd621eab4592569444f0a5c37f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf9424157e9c5dca3a3689d181005c4f8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gaf9424157e9c5dca3a3689d181005c4f8">ARM_PMU_EXC_RETURN</a>&#160;&#160;&#160;0x000A</td></tr>
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-<tr class="separator:gaf9424157e9c5dca3a3689d181005c4f8"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga54fd2c392399221077c67866a395e587"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga54fd2c392399221077c67866a395e587">ARM_PMU_PC_WRITE_RETIRED</a>&#160;&#160;&#160;0x000C</td></tr>
-<tr class="memdesc:ga54fd2c392399221077c67866a395e587"><td class="mdescLeft">&#160;</td><td class="mdescRight">Software change to the Program Counter (PC). Instruction is architecturally executed and condition code check pass.  <a href="#ga54fd2c392399221077c67866a395e587">More...</a><br/></td></tr>
-<tr class="separator:ga54fd2c392399221077c67866a395e587"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga22bfb189fff7c1ea9f81097a543ed756"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga22bfb189fff7c1ea9f81097a543ed756">ARM_PMU_BR_IMMED_RETIRED</a>&#160;&#160;&#160;0x000D</td></tr>
-<tr class="memdesc:ga22bfb189fff7c1ea9f81097a543ed756"><td class="mdescLeft">&#160;</td><td class="mdescRight">Immediate branch architecturally executed.  <a href="#ga22bfb189fff7c1ea9f81097a543ed756">More...</a><br/></td></tr>
-<tr class="separator:ga22bfb189fff7c1ea9f81097a543ed756"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab717347b1c3601cffb9c99b43b2a45c5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gab717347b1c3601cffb9c99b43b2a45c5">ARM_PMU_BR_RETURN_RETIRED</a>&#160;&#160;&#160;0x000E</td></tr>
-<tr class="memdesc:gab717347b1c3601cffb9c99b43b2a45c5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Function return instruction architecturally executed and the condition code check pass.  <a href="#gab717347b1c3601cffb9c99b43b2a45c5">More...</a><br/></td></tr>
-<tr class="separator:gab717347b1c3601cffb9c99b43b2a45c5"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga45d5ea86fdc015f4fc100462150c92da"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga45d5ea86fdc015f4fc100462150c92da">ARM_PMU_UNALIGNED_LDST_RETIRED</a>&#160;&#160;&#160;0x000F</td></tr>
-<tr class="memdesc:ga45d5ea86fdc015f4fc100462150c92da"><td class="mdescLeft">&#160;</td><td class="mdescRight">Unaligned memory memory-reading or memory-writing instruction architecturally executed and condition code check pass.  <a href="#ga45d5ea86fdc015f4fc100462150c92da">More...</a><br/></td></tr>
-<tr class="separator:ga45d5ea86fdc015f4fc100462150c92da"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gabfa921c85a61f0a21c9bee289e63c102"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gabfa921c85a61f0a21c9bee289e63c102">ARM_PMU_BR_MIS_PRED</a>&#160;&#160;&#160;0x0010</td></tr>
-<tr class="memdesc:gabfa921c85a61f0a21c9bee289e63c102"><td class="mdescLeft">&#160;</td><td class="mdescRight">Mispredicted or not predicted branch speculatively executed.  <a href="#gabfa921c85a61f0a21c9bee289e63c102">More...</a><br/></td></tr>
-<tr class="separator:gabfa921c85a61f0a21c9bee289e63c102"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga550d524d435a653b2f46acc1380a5ace"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga550d524d435a653b2f46acc1380a5ace">ARM_PMU_CPU_CYCLES</a>&#160;&#160;&#160;0x0011</td></tr>
-<tr class="memdesc:ga550d524d435a653b2f46acc1380a5ace"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cycle.  <a href="#ga550d524d435a653b2f46acc1380a5ace">More...</a><br/></td></tr>
-<tr class="separator:ga550d524d435a653b2f46acc1380a5ace"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga60ccf42eae576e2fde3b9e17a8defeaa"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga60ccf42eae576e2fde3b9e17a8defeaa">ARM_PMU_BR_PRED</a>&#160;&#160;&#160;0x0012</td></tr>
-<tr class="memdesc:ga60ccf42eae576e2fde3b9e17a8defeaa"><td class="mdescLeft">&#160;</td><td class="mdescRight">Predictable branch speculatively executed.  <a href="#ga60ccf42eae576e2fde3b9e17a8defeaa">More...</a><br/></td></tr>
-<tr class="separator:ga60ccf42eae576e2fde3b9e17a8defeaa"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab3852c2b3d59af106b9db7ea2c20c367"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gab3852c2b3d59af106b9db7ea2c20c367">ARM_PMU_MEM_ACCESS</a>&#160;&#160;&#160;0x0013</td></tr>
-<tr class="memdesc:gab3852c2b3d59af106b9db7ea2c20c367"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data memory access.  <a href="#gab3852c2b3d59af106b9db7ea2c20c367">More...</a><br/></td></tr>
-<tr class="separator:gab3852c2b3d59af106b9db7ea2c20c367"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf8e89b2b098e6bec5916517346925ce2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gaf8e89b2b098e6bec5916517346925ce2">ARM_PMU_L1I_CACHE</a>&#160;&#160;&#160;0x0014</td></tr>
-<tr class="memdesc:gaf8e89b2b098e6bec5916517346925ce2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Level 1 instruction cache access.  <a href="#gaf8e89b2b098e6bec5916517346925ce2">More...</a><br/></td></tr>
-<tr class="separator:gaf8e89b2b098e6bec5916517346925ce2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga27d1b8b2c37ae0ae41781880ed3893d0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga27d1b8b2c37ae0ae41781880ed3893d0">ARM_PMU_L1D_CACHE_WB</a>&#160;&#160;&#160;0x0015</td></tr>
-<tr class="memdesc:ga27d1b8b2c37ae0ae41781880ed3893d0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Level 1 data cache write-back.  <a href="#ga27d1b8b2c37ae0ae41781880ed3893d0">More...</a><br/></td></tr>
-<tr class="separator:ga27d1b8b2c37ae0ae41781880ed3893d0"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gafb1e1f86d091ccb735858769c700e289"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gafb1e1f86d091ccb735858769c700e289">ARM_PMU_L2D_CACHE</a>&#160;&#160;&#160;0x0016</td></tr>
-<tr class="memdesc:gafb1e1f86d091ccb735858769c700e289"><td class="mdescLeft">&#160;</td><td class="mdescRight">Level 2 data cache access.  <a href="#gafb1e1f86d091ccb735858769c700e289">More...</a><br/></td></tr>
-<tr class="separator:gafb1e1f86d091ccb735858769c700e289"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaeb414c1b0375022abc2502ab503a3284"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gaeb414c1b0375022abc2502ab503a3284">ARM_PMU_L2D_CACHE_REFILL</a>&#160;&#160;&#160;0x0017</td></tr>
-<tr class="memdesc:gaeb414c1b0375022abc2502ab503a3284"><td class="mdescLeft">&#160;</td><td class="mdescRight">Level 2 data cache refill.  <a href="#gaeb414c1b0375022abc2502ab503a3284">More...</a><br/></td></tr>
-<tr class="separator:gaeb414c1b0375022abc2502ab503a3284"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga1a0c4a1990eeed88edc3e1e0c4b1aca0"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga1a0c4a1990eeed88edc3e1e0c4b1aca0">ARM_PMU_L2D_CACHE_WB</a>&#160;&#160;&#160;0x0018</td></tr>
-<tr class="memdesc:ga1a0c4a1990eeed88edc3e1e0c4b1aca0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Level 2 data cache write-back.  <a href="#ga1a0c4a1990eeed88edc3e1e0c4b1aca0">More...</a><br/></td></tr>
-<tr class="separator:ga1a0c4a1990eeed88edc3e1e0c4b1aca0"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:gaa681d3db56b42775093869b8fdf1abb9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Bus access.  <a href="#gaa681d3db56b42775093869b8fdf1abb9">More...</a><br/></td></tr>
-<tr class="separator:gaa681d3db56b42775093869b8fdf1abb9"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga2c8d23cc64e87b2044bb39bf8d0bc1b1"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga2c8d23cc64e87b2044bb39bf8d0bc1b1">ARM_PMU_MEMORY_ERROR</a>&#160;&#160;&#160;0x001A</td></tr>
-<tr class="memdesc:ga2c8d23cc64e87b2044bb39bf8d0bc1b1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Local memory error.  <a href="#ga2c8d23cc64e87b2044bb39bf8d0bc1b1">More...</a><br/></td></tr>
-<tr class="separator:ga2c8d23cc64e87b2044bb39bf8d0bc1b1"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:gaf7bad54617ace5c2fb48bc2e8aebf9c7"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gae4c955416707f44f066ffd2560b9ae4c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gae4c955416707f44f066ffd2560b9ae4c">ARM_PMU_BUS_CYCLES</a>&#160;&#160;&#160;0x001D</td></tr>
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-<tr class="separator:gaca14907c5a1e1f9915159bc4cf323cf0"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:gab55334c8510cb30c4c750913f6eb6279"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaad08dcded491bf257d223e4171af41cc"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gaad08dcded491bf257d223e4171af41cc">ARM_PMU_L2D_CACHE_ALLOCATE</a>&#160;&#160;&#160;0x0020</td></tr>
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-<tr class="separator:gaad08dcded491bf257d223e4171af41cc"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab3b505a8bcc2b2885626d2f2cd542b73"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gab3b505a8bcc2b2885626d2f2cd542b73">ARM_PMU_BR_RETIRED</a>&#160;&#160;&#160;0x0021</td></tr>
-<tr class="memdesc:gab3b505a8bcc2b2885626d2f2cd542b73"><td class="mdescLeft">&#160;</td><td class="mdescRight">Branch instruction architecturally executed.  <a href="#gab3b505a8bcc2b2885626d2f2cd542b73">More...</a><br/></td></tr>
-<tr class="separator:gab3b505a8bcc2b2885626d2f2cd542b73"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gae12baa616c5f0cdd081231fcf8cdad68"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gae12baa616c5f0cdd081231fcf8cdad68">ARM_PMU_BR_MIS_PRED_RETIRED</a>&#160;&#160;&#160;0x0022</td></tr>
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-<tr class="separator:gae12baa616c5f0cdd081231fcf8cdad68"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga5b068593baa831348664dfa7d44f5483"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga5b068593baa831348664dfa7d44f5483">ARM_PMU_STALL_FRONTEND</a>&#160;&#160;&#160;0x0023</td></tr>
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-<tr class="separator:ga5b068593baa831348664dfa7d44f5483"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga8737bee352820bd7d1bc8e5e4260143c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga8737bee352820bd7d1bc8e5e4260143c">ARM_PMU_STALL_BACKEND</a>&#160;&#160;&#160;0x0024</td></tr>
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-<tr class="separator:ga8737bee352820bd7d1bc8e5e4260143c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga3406498b2c17ca080ebd68cc40d9630e"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga3406498b2c17ca080ebd68cc40d9630e">ARM_PMU_L2I_CACHE</a>&#160;&#160;&#160;0x0027</td></tr>
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-<tr class="separator:ga3406498b2c17ca080ebd68cc40d9630e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaa18cee03802b46076e9ab66fd0a7c61d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gaa18cee03802b46076e9ab66fd0a7c61d">ARM_PMU_L2I_CACHE_REFILL</a>&#160;&#160;&#160;0x0028</td></tr>
-<tr class="memdesc:gaa18cee03802b46076e9ab66fd0a7c61d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Level 2 instruction cache refill.  <a href="#gaa18cee03802b46076e9ab66fd0a7c61d">More...</a><br/></td></tr>
-<tr class="separator:gaa18cee03802b46076e9ab66fd0a7c61d"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gac11cbc6849dbad7bd8b64ab6e2a3f8d5"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gac11cbc6849dbad7bd8b64ab6e2a3f8d5">ARM_PMU_L3D_CACHE_ALLOCATE</a>&#160;&#160;&#160;0x0029</td></tr>
-<tr class="memdesc:gac11cbc6849dbad7bd8b64ab6e2a3f8d5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Level 3 data cache allocation without refill.  <a href="#gac11cbc6849dbad7bd8b64ab6e2a3f8d5">More...</a><br/></td></tr>
-<tr class="separator:gac11cbc6849dbad7bd8b64ab6e2a3f8d5"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gafe99db0693125100272247c147fb3b02"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gafe99db0693125100272247c147fb3b02">ARM_PMU_L3D_CACHE_REFILL</a>&#160;&#160;&#160;0x002A</td></tr>
-<tr class="memdesc:gafe99db0693125100272247c147fb3b02"><td class="mdescLeft">&#160;</td><td class="mdescRight">Level 3 data cache refill.  <a href="#gafe99db0693125100272247c147fb3b02">More...</a><br/></td></tr>
-<tr class="separator:gafe99db0693125100272247c147fb3b02"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga4e96b5a6fb13c657e78da342a02db200"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga4e96b5a6fb13c657e78da342a02db200">ARM_PMU_L3D_CACHE</a>&#160;&#160;&#160;0x002B</td></tr>
-<tr class="memdesc:ga4e96b5a6fb13c657e78da342a02db200"><td class="mdescLeft">&#160;</td><td class="mdescRight">Level 3 data cache access.  <a href="#ga4e96b5a6fb13c657e78da342a02db200">More...</a><br/></td></tr>
-<tr class="separator:ga4e96b5a6fb13c657e78da342a02db200"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab823f95f7ac8196a208d12381b1b2a11"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gab823f95f7ac8196a208d12381b1b2a11">ARM_PMU_L3D_CACHE_WB</a>&#160;&#160;&#160;0x002C</td></tr>
-<tr class="memdesc:gab823f95f7ac8196a208d12381b1b2a11"><td class="mdescLeft">&#160;</td><td class="mdescRight">Level 3 data cache write-back.  <a href="#gab823f95f7ac8196a208d12381b1b2a11">More...</a><br/></td></tr>
-<tr class="separator:gab823f95f7ac8196a208d12381b1b2a11"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga902562d8161fffd45726dc4cc8727545"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga902562d8161fffd45726dc4cc8727545">ARM_PMU_LL_CACHE_RD</a>&#160;&#160;&#160;0x0036</td></tr>
-<tr class="memdesc:ga902562d8161fffd45726dc4cc8727545"><td class="mdescLeft">&#160;</td><td class="mdescRight">Last level data cache read.  <a href="#ga902562d8161fffd45726dc4cc8727545">More...</a><br/></td></tr>
-<tr class="separator:ga902562d8161fffd45726dc4cc8727545"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga6979efa69af7d0e62cc3e2f88b0155b8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga6979efa69af7d0e62cc3e2f88b0155b8">ARM_PMU_LL_CACHE_MISS_RD</a>&#160;&#160;&#160;0x0037</td></tr>
-<tr class="memdesc:ga6979efa69af7d0e62cc3e2f88b0155b8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Last level data cache read miss.  <a href="#ga6979efa69af7d0e62cc3e2f88b0155b8">More...</a><br/></td></tr>
-<tr class="separator:ga6979efa69af7d0e62cc3e2f88b0155b8"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga4687d5d7efc6f49db2db9acc25b590f6"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga4687d5d7efc6f49db2db9acc25b590f6">ARM_PMU_L1D_CACHE_MISS_RD</a>&#160;&#160;&#160;0x0039</td></tr>
-<tr class="memdesc:ga4687d5d7efc6f49db2db9acc25b590f6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Level 1 data cache read miss.  <a href="#ga4687d5d7efc6f49db2db9acc25b590f6">More...</a><br/></td></tr>
-<tr class="separator:ga4687d5d7efc6f49db2db9acc25b590f6"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga2fe9d3ea67ce833bd6323e4ce1a4e894"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga2fe9d3ea67ce833bd6323e4ce1a4e894">ARM_PMU_OP_COMPLETE</a>&#160;&#160;&#160;0x003A</td></tr>
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-<tr class="separator:ga2fe9d3ea67ce833bd6323e4ce1a4e894"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga6c59149e9b1754987b44b62092bc9f09"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga6c59149e9b1754987b44b62092bc9f09">ARM_PMU_OP_SPEC</a>&#160;&#160;&#160;0x003B</td></tr>
-<tr class="memdesc:ga6c59149e9b1754987b44b62092bc9f09"><td class="mdescLeft">&#160;</td><td class="mdescRight">Operation speculatively executed.  <a href="#ga6c59149e9b1754987b44b62092bc9f09">More...</a><br/></td></tr>
-<tr class="separator:ga6c59149e9b1754987b44b62092bc9f09"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga8bf75efa06a125ee2dfa9a130e7ba9a8"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga8bf75efa06a125ee2dfa9a130e7ba9a8">ARM_PMU_STALL</a>&#160;&#160;&#160;0x003C</td></tr>
-<tr class="memdesc:ga8bf75efa06a125ee2dfa9a130e7ba9a8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stall cycle for instruction or operation not sent for execution.  <a href="#ga8bf75efa06a125ee2dfa9a130e7ba9a8">More...</a><br/></td></tr>
-<tr class="separator:ga8bf75efa06a125ee2dfa9a130e7ba9a8"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga9700ec74727a9fe3cd4cd40736628a23"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga9700ec74727a9fe3cd4cd40736628a23">ARM_PMU_STALL_OP_BACKEND</a>&#160;&#160;&#160;0x003D</td></tr>
-<tr class="memdesc:ga9700ec74727a9fe3cd4cd40736628a23"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stall cycle for instruction or operation not sent for execution due to pipeline backend.  <a href="#ga9700ec74727a9fe3cd4cd40736628a23">More...</a><br/></td></tr>
-<tr class="separator:ga9700ec74727a9fe3cd4cd40736628a23"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga69cfd3558cf6c6f3bb621ee75430427c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga69cfd3558cf6c6f3bb621ee75430427c">ARM_PMU_STALL_OP_FRONTEND</a>&#160;&#160;&#160;0x003E</td></tr>
-<tr class="memdesc:ga69cfd3558cf6c6f3bb621ee75430427c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stall cycle for instruction or operation not sent for execution due to pipeline frontend.  <a href="#ga69cfd3558cf6c6f3bb621ee75430427c">More...</a><br/></td></tr>
-<tr class="separator:ga69cfd3558cf6c6f3bb621ee75430427c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga197b491f691110fb52aef4291782b6ab"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga197b491f691110fb52aef4291782b6ab">ARM_PMU_STALL_OP</a>&#160;&#160;&#160;0x003F</td></tr>
-<tr class="memdesc:ga197b491f691110fb52aef4291782b6ab"><td class="mdescLeft">&#160;</td><td class="mdescRight">Instruction or operation slots not occupied each cycle.  <a href="#ga197b491f691110fb52aef4291782b6ab">More...</a><br/></td></tr>
-<tr class="separator:ga197b491f691110fb52aef4291782b6ab"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf4236dfbcb4550d3cc98caee837e8e77"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gaf4236dfbcb4550d3cc98caee837e8e77">ARM_PMU_L1D_CACHE_RD</a>&#160;&#160;&#160;0x0040</td></tr>
-<tr class="memdesc:gaf4236dfbcb4550d3cc98caee837e8e77"><td class="mdescLeft">&#160;</td><td class="mdescRight">Level 1 data cache read.  <a href="#gaf4236dfbcb4550d3cc98caee837e8e77">More...</a><br/></td></tr>
-<tr class="separator:gaf4236dfbcb4550d3cc98caee837e8e77"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga345461506c990125b1f2cbc62e3be22f"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga345461506c990125b1f2cbc62e3be22f">ARM_PMU_LE_RETIRED</a>&#160;&#160;&#160;0x0100</td></tr>
-<tr class="memdesc:ga345461506c990125b1f2cbc62e3be22f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Loop end instruction executed.  <a href="#ga345461506c990125b1f2cbc62e3be22f">More...</a><br/></td></tr>
-<tr class="separator:ga345461506c990125b1f2cbc62e3be22f"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga6a1d9f84bda091e96843665ff3913b50"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga6a1d9f84bda091e96843665ff3913b50">ARM_PMU_LE_SPEC</a>&#160;&#160;&#160;0x0101</td></tr>
-<tr class="memdesc:ga6a1d9f84bda091e96843665ff3913b50"><td class="mdescLeft">&#160;</td><td class="mdescRight">Loop end instruction speculatively executed.  <a href="#ga6a1d9f84bda091e96843665ff3913b50">More...</a><br/></td></tr>
-<tr class="separator:ga6a1d9f84bda091e96843665ff3913b50"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab8570f46393e3e44bb118591d33723f4"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gab8570f46393e3e44bb118591d33723f4">ARM_PMU_BF_RETIRED</a>&#160;&#160;&#160;0x0104</td></tr>
-<tr class="memdesc:gab8570f46393e3e44bb118591d33723f4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Branch future instruction architecturally executed and condition code check pass.  <a href="#gab8570f46393e3e44bb118591d33723f4">More...</a><br/></td></tr>
-<tr class="separator:gab8570f46393e3e44bb118591d33723f4"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga6b1e4823d8b45678a29a5f54b859d4e3"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga6b1e4823d8b45678a29a5f54b859d4e3">ARM_PMU_BF_SPEC</a>&#160;&#160;&#160;0x0105</td></tr>
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-<tr class="separator:ga6b1e4823d8b45678a29a5f54b859d4e3"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:gadf9cfd45b59acfc314ebc814a1bcdccd"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaa4c408a006a04e95ade26922669b6695"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gaa4c408a006a04e95ade26922669b6695">ARM_PMU_MVE_FP_HP_RETIRED</a>&#160;&#160;&#160;0x0208</td></tr>
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-<tr class="separator:gaa4c408a006a04e95ade26922669b6695"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:gaf01d187b0cbf418d1fac55dd0ddd0827"><td class="mdescLeft">&#160;</td><td class="mdescRight">MVE half-precision floating-point instruction speculatively executed.  <a href="#gaf01d187b0cbf418d1fac55dd0ddd0827">More...</a><br/></td></tr>
-<tr class="separator:gaf01d187b0cbf418d1fac55dd0ddd0827"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:gab21171c50ebd1f304b11260edd015f52"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:gae69e310892661af852ca2d4ec947d18a"><td class="mdescLeft">&#160;</td><td class="mdescRight">MVE single-precision floating-point instruction speculatively executed.  <a href="#gae69e310892661af852ca2d4ec947d18a">More...</a><br/></td></tr>
-<tr class="separator:gae69e310892661af852ca2d4ec947d18a"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:gac2dc7d92627b3caa391725a3f080288c"><td class="mdescLeft">&#160;</td><td class="mdescRight">MVE floating-point multiply or multiply-accumulate instruction architecturally executed.  <a href="#gac2dc7d92627b3caa391725a3f080288c">More...</a><br/></td></tr>
-<tr class="separator:gac2dc7d92627b3caa391725a3f080288c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaf5302b3278a862c9264171955328a59a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gaf5302b3278a862c9264171955328a59a">ARM_PMU_MVE_FP_MAC_SPEC</a>&#160;&#160;&#160;0x0215</td></tr>
-<tr class="memdesc:gaf5302b3278a862c9264171955328a59a"><td class="mdescLeft">&#160;</td><td class="mdescRight">MVE floating-point multiply or multiply-accumulate instruction speculatively executed.  <a href="#gaf5302b3278a862c9264171955328a59a">More...</a><br/></td></tr>
-<tr class="separator:gaf5302b3278a862c9264171955328a59a"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga5e3afafa91ebaeac0469a19ebb54719c"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga5e3afafa91ebaeac0469a19ebb54719c">ARM_PMU_MVE_INT_RETIRED</a>&#160;&#160;&#160;0x0224</td></tr>
-<tr class="memdesc:ga5e3afafa91ebaeac0469a19ebb54719c"><td class="mdescLeft">&#160;</td><td class="mdescRight">MVE integer instruction architecturally executed.  <a href="#ga5e3afafa91ebaeac0469a19ebb54719c">More...</a><br/></td></tr>
-<tr class="separator:ga5e3afafa91ebaeac0469a19ebb54719c"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga16ed0bb1bb4718da93c41238da652d33"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga16ed0bb1bb4718da93c41238da652d33">ARM_PMU_MVE_INT_SPEC</a>&#160;&#160;&#160;0x0225</td></tr>
-<tr class="memdesc:ga16ed0bb1bb4718da93c41238da652d33"><td class="mdescLeft">&#160;</td><td class="mdescRight">MVE integer instruction speculatively executed.  <a href="#ga16ed0bb1bb4718da93c41238da652d33">More...</a><br/></td></tr>
-<tr class="separator:ga16ed0bb1bb4718da93c41238da652d33"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:ga9248c93a3f19fddc93d3804a06f7238a"><td class="mdescLeft">&#160;</td><td class="mdescRight">MVE multiply or multiply-accumulate instruction architecturally executed.  <a href="#ga9248c93a3f19fddc93d3804a06f7238a">More...</a><br/></td></tr>
-<tr class="separator:ga9248c93a3f19fddc93d3804a06f7238a"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:ga7036f00faa9183ae450a3e4d9d6f2bbf"><td class="mdescLeft">&#160;</td><td class="mdescRight">MVE multiply or multiply-accumulate instruction speculatively executed.  <a href="#ga7036f00faa9183ae450a3e4d9d6f2bbf">More...</a><br/></td></tr>
-<tr class="separator:ga7036f00faa9183ae450a3e4d9d6f2bbf"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:ga7d7d465a6c64400c49f93b6c8152296f"><td class="mdescLeft">&#160;</td><td class="mdescRight">MVE load or store instruction architecturally executed.  <a href="#ga7d7d465a6c64400c49f93b6c8152296f">More...</a><br/></td></tr>
-<tr class="separator:ga7d7d465a6c64400c49f93b6c8152296f"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:gaa98a18c06bd13daf2df6f89219ec68d5"><td class="mdescLeft">&#160;</td><td class="mdescRight">MVE load or store instruction speculatively executed.  <a href="#gaa98a18c06bd13daf2df6f89219ec68d5">More...</a><br/></td></tr>
-<tr class="separator:gaa98a18c06bd13daf2df6f89219ec68d5"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaa3379a51350a2fda8d8ab6d7795baa7a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gaa3379a51350a2fda8d8ab6d7795baa7a">ARM_PMU_MVE_LD_RETIRED</a>&#160;&#160;&#160;0x023C</td></tr>
-<tr class="memdesc:gaa3379a51350a2fda8d8ab6d7795baa7a"><td class="mdescLeft">&#160;</td><td class="mdescRight">MVE load instruction architecturally executed.  <a href="#gaa3379a51350a2fda8d8ab6d7795baa7a">More...</a><br/></td></tr>
-<tr class="separator:gaa3379a51350a2fda8d8ab6d7795baa7a"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:ga78a6f89ab30ed01f7d8388eda697b4f8"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad8d0079977fa97de4ee263703f1b2908"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gad8d0079977fa97de4ee263703f1b2908">ARM_PMU_MVE_ST_RETIRED</a>&#160;&#160;&#160;0x0240</td></tr>
-<tr class="memdesc:gad8d0079977fa97de4ee263703f1b2908"><td class="mdescLeft">&#160;</td><td class="mdescRight">MVE store instruction architecturally executed.  <a href="#gad8d0079977fa97de4ee263703f1b2908">More...</a><br/></td></tr>
-<tr class="separator:gad8d0079977fa97de4ee263703f1b2908"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gabd3984d299b5416aac8d630722680c55"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gabd3984d299b5416aac8d630722680c55">ARM_PMU_MVE_ST_SPEC</a>&#160;&#160;&#160;0x0241</td></tr>
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-<tr class="separator:gabd3984d299b5416aac8d630722680c55"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:ga50fb13c874b3f5e2b9ed9c320a36452c"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:ga76057cbda353b4ad6fbc3b6a63c193a5"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:gaf6a14402c79dba8fa765e8663dd0734d"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:gaf358a9ed5c83a10cb695d9b19b1b3bc1"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:gab2264786bed578c89109859b55909c76"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:ga26ed05deaa7b993904300069f0ecfac4"><td class="mdescLeft">&#160;</td><td class="mdescRight">MVE unaligned load instruction architecturally executed.  <a href="#ga26ed05deaa7b993904300069f0ecfac4">More...</a><br/></td></tr>
-<tr class="separator:ga26ed05deaa7b993904300069f0ecfac4"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:gadc3bd0f32e0a08bba2d533479a59bd6e"><td class="mdescLeft">&#160;</td><td class="mdescRight">MVE unaligned load instruction speculatively executed.  <a href="#gadc3bd0f32e0a08bba2d533479a59bd6e">More...</a><br/></td></tr>
-<tr class="separator:gadc3bd0f32e0a08bba2d533479a59bd6e"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:ga391afd8cb92cc65161b13ee3a3256d40"><td class="mdescLeft">&#160;</td><td class="mdescRight">MVE unaligned store instruction architecturally executed.  <a href="#ga391afd8cb92cc65161b13ee3a3256d40">More...</a><br/></td></tr>
-<tr class="separator:ga391afd8cb92cc65161b13ee3a3256d40"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:ga21bf105499df85196b4137cb075a6fbe"><td class="mdescLeft">&#160;</td><td class="mdescRight">MVE unaligned store instruction speculatively executed.  <a href="#ga21bf105499df85196b4137cb075a6fbe">More...</a><br/></td></tr>
-<tr class="separator:ga21bf105499df85196b4137cb075a6fbe"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:ga627920bebd935709655687d844848934"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:gaf9ebeb1f49dba56d8f90f9bd5d3da58e"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:ga77fad5ad424271ed63fec98af071bb79"><td class="mdescLeft">&#160;</td><td class="mdescRight">MVE floating-point vector reduction instruction architecturally executed.  <a href="#ga77fad5ad424271ed63fec98af071bb79">More...</a><br/></td></tr>
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-<tr class="memdesc:gaa07c698f58c622d234a0007249717265"><td class="mdescLeft">&#160;</td><td class="mdescRight">MVE floating-point vector reduction instruction speculatively executed.  <a href="#gaa07c698f58c622d234a0007249717265">More...</a><br/></td></tr>
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-<tr class="memdesc:ga5b6f0bcfd63207c7bab03ea20167dd4b"><td class="mdescLeft">&#160;</td><td class="mdescRight">MVE integer vector reduction instruction speculatively executed.  <a href="#ga5b6f0bcfd63207c7bab03ea20167dd4b">More...</a><br/></td></tr>
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-<tr class="memdesc:ga01b4792990494b8f084ee00933a1adb0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cycles where one or more predicated beats architecturally executed.  <a href="#ga01b4792990494b8f084ee00933a1adb0">More...</a><br/></td></tr>
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-<tr class="memdesc:ga2a45ec75b2011bd8375d89b7562b2de6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stall cycles caused by an MVE instruction.  <a href="#ga2a45ec75b2011bd8375d89b7562b2de6">More...</a><br/></td></tr>
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-<tr class="memdesc:ga8f4949084efce03d09bf5ba74cc91edd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stall cycles caused by an MVE instruction because of resource conflicts.  <a href="#ga8f4949084efce03d09bf5ba74cc91edd">More...</a><br/></td></tr>
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-<tr class="memdesc:ga7e76060791618f9b4d49ad493cfb6ba9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stall cycles caused by an MVE instruction because of floating-point resource conflicts.  <a href="#ga7e76060791618f9b4d49ad493cfb6ba9">More...</a><br/></td></tr>
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-<tr class="memdesc:gaef33b3ff7f12d31238ff4dded5e67a11"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stall cycles caused by an MVE instruction because of integer resource conflicts.  <a href="#gaef33b3ff7f12d31238ff4dded5e67a11">More...</a><br/></td></tr>
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-<tr class="memitem:ga9a1cfef96ec7cd70acf134e368d8826a"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga9a1cfef96ec7cd70acf134e368d8826a">ARM_PMU_MVE_STALL_BREAK</a>&#160;&#160;&#160;0x02D3</td></tr>
-<tr class="memdesc:ga9a1cfef96ec7cd70acf134e368d8826a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stall cycles caused by an MVE chain break.  <a href="#ga9a1cfef96ec7cd70acf134e368d8826a">More...</a><br/></td></tr>
-<tr class="separator:ga9a1cfef96ec7cd70acf134e368d8826a"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga29bc4c2e820914e94e2eb68a6a3352b9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga29bc4c2e820914e94e2eb68a6a3352b9">ARM_PMU_MVE_STALL_DEPENDENCY</a>&#160;&#160;&#160;0x02D4</td></tr>
-<tr class="memdesc:ga29bc4c2e820914e94e2eb68a6a3352b9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Stall cycles caused by MVE register dependency.  <a href="#ga29bc4c2e820914e94e2eb68a6a3352b9">More...</a><br/></td></tr>
-<tr class="separator:ga29bc4c2e820914e94e2eb68a6a3352b9"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="memdesc:gaf23d758fe1a4cfe6f114cb3e78709237"><td class="mdescLeft">&#160;</td><td class="mdescRight">Instruction TCM access.  <a href="#gaf23d758fe1a4cfe6f114cb3e78709237">More...</a><br/></td></tr>
-<tr class="separator:gaf23d758fe1a4cfe6f114cb3e78709237"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga74aaa0fa0571f74168ee9608d5a02403"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga74aaa0fa0571f74168ee9608d5a02403">ARM_PMU_DTCM_ACCESS</a>&#160;&#160;&#160;0x4008</td></tr>
-<tr class="memdesc:ga74aaa0fa0571f74168ee9608d5a02403"><td class="mdescLeft">&#160;</td><td class="mdescRight">Data TCM access.  <a href="#ga74aaa0fa0571f74168ee9608d5a02403">More...</a><br/></td></tr>
-<tr class="separator:ga74aaa0fa0571f74168ee9608d5a02403"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gadaa75dc2ccfbf7a2263da9a9011f1603"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gadaa75dc2ccfbf7a2263da9a9011f1603">ARM_PMU_TRCEXTOUT0</a>&#160;&#160;&#160;0x4010</td></tr>
-<tr class="memdesc:gadaa75dc2ccfbf7a2263da9a9011f1603"><td class="mdescLeft">&#160;</td><td class="mdescRight">ETM external output 0.  <a href="#gadaa75dc2ccfbf7a2263da9a9011f1603">More...</a><br/></td></tr>
-<tr class="separator:gadaa75dc2ccfbf7a2263da9a9011f1603"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga47fe03fe6fe9bfebd98283cb57d94560"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga47fe03fe6fe9bfebd98283cb57d94560">ARM_PMU_TRCEXTOUT1</a>&#160;&#160;&#160;0x4011</td></tr>
-<tr class="memdesc:ga47fe03fe6fe9bfebd98283cb57d94560"><td class="mdescLeft">&#160;</td><td class="mdescRight">ETM external output 1.  <a href="#ga47fe03fe6fe9bfebd98283cb57d94560">More...</a><br/></td></tr>
-<tr class="separator:ga47fe03fe6fe9bfebd98283cb57d94560"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gab80e47ffebc3ae6ed2952756b020dbb9"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gab80e47ffebc3ae6ed2952756b020dbb9">ARM_PMU_TRCEXTOUT2</a>&#160;&#160;&#160;0x4012</td></tr>
-<tr class="memdesc:gab80e47ffebc3ae6ed2952756b020dbb9"><td class="mdescLeft">&#160;</td><td class="mdescRight">ETM external output 2.  <a href="#gab80e47ffebc3ae6ed2952756b020dbb9">More...</a><br/></td></tr>
-<tr class="separator:gab80e47ffebc3ae6ed2952756b020dbb9"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gad70a3b074efd967485ffbfd3e387051d"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gad70a3b074efd967485ffbfd3e387051d">ARM_PMU_TRCEXTOUT3</a>&#160;&#160;&#160;0x4013</td></tr>
-<tr class="memdesc:gad70a3b074efd967485ffbfd3e387051d"><td class="mdescLeft">&#160;</td><td class="mdescRight">ETM external output 3.  <a href="#gad70a3b074efd967485ffbfd3e387051d">More...</a><br/></td></tr>
-<tr class="separator:gad70a3b074efd967485ffbfd3e387051d"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga290974d72b8cac214f4e9a152ca64a56"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga290974d72b8cac214f4e9a152ca64a56">ARM_PMU_CTI_TRIGOUT4</a>&#160;&#160;&#160;0x4018</td></tr>
-<tr class="memdesc:ga290974d72b8cac214f4e9a152ca64a56"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cross-trigger Interface output trigger 4.  <a href="#ga290974d72b8cac214f4e9a152ca64a56">More...</a><br/></td></tr>
-<tr class="separator:ga290974d72b8cac214f4e9a152ca64a56"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga7a05420b7fae6f5c3d35e12a9846c7e2"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga7a05420b7fae6f5c3d35e12a9846c7e2">ARM_PMU_CTI_TRIGOUT5</a>&#160;&#160;&#160;0x4019</td></tr>
-<tr class="memdesc:ga7a05420b7fae6f5c3d35e12a9846c7e2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cross-trigger Interface output trigger 5.  <a href="#ga7a05420b7fae6f5c3d35e12a9846c7e2">More...</a><br/></td></tr>
-<tr class="separator:ga7a05420b7fae6f5c3d35e12a9846c7e2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gade076a5ee512a14f8882d9aec5d3dc0b"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#gade076a5ee512a14f8882d9aec5d3dc0b">ARM_PMU_CTI_TRIGOUT6</a>&#160;&#160;&#160;0x401A</td></tr>
-<tr class="memdesc:gade076a5ee512a14f8882d9aec5d3dc0b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cross-trigger Interface output trigger 6.  <a href="#gade076a5ee512a14f8882d9aec5d3dc0b">More...</a><br/></td></tr>
-<tr class="separator:gade076a5ee512a14f8882d9aec5d3dc0b"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga4388c85b636bd71b4ee1a03b6e96c488"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__events__armv81.html#ga4388c85b636bd71b4ee1a03b6e96c488">ARM_PMU_CTI_TRIGOUT7</a>&#160;&#160;&#160;0x401B</td></tr>
-<tr class="memdesc:ga4388c85b636bd71b4ee1a03b6e96c488"><td class="mdescLeft">&#160;</td><td class="mdescRight">Cross-trigger Interface output trigger 7.  <a href="#ga4388c85b636bd71b4ee1a03b6e96c488">More...</a><br/></td></tr>
-<tr class="separator:ga4388c85b636bd71b4ee1a03b6e96c488"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>IDs for Armv8.1-M architecture defined events. </p>
-<p>These events are available on all Armv8.1-M devices including a PMU. </p>
-<h2 class="groupheader">Macro Definition Documentation</h2>
-<a class="anchor" id="gaf2e0a38b7c0d63d1194f08478781a3f0"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_BF_CANCEL&#160;&#160;&#160;0x0109</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Branch future instruction not taken. </p>
-
-</div>
-</div>
-<a class="anchor" id="gab8570f46393e3e44bb118591d33723f4"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_BF_RETIRED&#160;&#160;&#160;0x0104</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Branch future instruction architecturally executed and condition code check pass. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga6b1e4823d8b45678a29a5f54b859d4e3"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_BF_SPEC&#160;&#160;&#160;0x0105</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Branch future instruction speculatively executed and condition code check pass. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga22bfb189fff7c1ea9f81097a543ed756"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_BR_IMMED_RETIRED&#160;&#160;&#160;0x000D</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Immediate branch architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gabfa921c85a61f0a21c9bee289e63c102"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_BR_MIS_PRED&#160;&#160;&#160;0x0010</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Mispredicted or not predicted branch speculatively executed. </p>
-
-</div>
-</div>
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_BR_MIS_PRED_RETIRED&#160;&#160;&#160;0x0022</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Mispredicted branch instruction architecturally executed. </p>
-
-</div>
-</div>
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_BR_PRED&#160;&#160;&#160;0x0012</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Predictable branch speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gab3b505a8bcc2b2885626d2f2cd542b73"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_BR_RETIRED&#160;&#160;&#160;0x0021</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Branch instruction architecturally executed. </p>
-
-</div>
-</div>
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_BR_RETURN_RETIRED&#160;&#160;&#160;0x000E</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Function return instruction architecturally executed and the condition code check pass. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaa681d3db56b42775093869b8fdf1abb9"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_BUS_ACCESS&#160;&#160;&#160;0x0019</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Bus access. </p>
-
-</div>
-</div>
-<a class="anchor" id="gae4c955416707f44f066ffd2560b9ae4c"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_BUS_CYCLES&#160;&#160;&#160;0x001D</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Bus cycles. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaca14907c5a1e1f9915159bc4cf323cf0"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_CHAIN&#160;&#160;&#160;0x001E</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>For an odd numbered counter, increment when an overflow occurs on the preceding even-numbered counter on the same PE. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga550d524d435a653b2f46acc1380a5ace"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_CPU_CYCLES&#160;&#160;&#160;0x0011</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Cycle. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga290974d72b8cac214f4e9a152ca64a56"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_CTI_TRIGOUT4&#160;&#160;&#160;0x4018</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Cross-trigger Interface output trigger 4. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga7a05420b7fae6f5c3d35e12a9846c7e2"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_CTI_TRIGOUT5&#160;&#160;&#160;0x4019</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Cross-trigger Interface output trigger 5. </p>
-
-</div>
-</div>
-<a class="anchor" id="gade076a5ee512a14f8882d9aec5d3dc0b"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_CTI_TRIGOUT6&#160;&#160;&#160;0x401A</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Cross-trigger Interface output trigger 6. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga4388c85b636bd71b4ee1a03b6e96c488"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_CTI_TRIGOUT7&#160;&#160;&#160;0x401B</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Cross-trigger Interface output trigger 7. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga74aaa0fa0571f74168ee9608d5a02403"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_DTCM_ACCESS&#160;&#160;&#160;0x4008</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Data TCM access. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga18d640aa04b97c7d287e8745f6f2b23d"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_DWT_CMPMATCH0&#160;&#160;&#160;0x0118</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>DWT comparator 0 match. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga5dc6eb2be1ff1afe9cbd59af4f6078ab"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_DWT_CMPMATCH1&#160;&#160;&#160;0x0119</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>DWT comparator 1 match. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga58a4815dba8886088b9cac7b934a332d"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_DWT_CMPMATCH2&#160;&#160;&#160;0x011A</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>DWT comparator 2 match. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga594337c6f3c88d8317203a8cd6f9814a"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_DWT_CMPMATCH3&#160;&#160;&#160;0x011B</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>DWT comparator 3 match. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaf9424157e9c5dca3a3689d181005c4f8"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_EXC_RETURN&#160;&#160;&#160;0x000A</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Exception return instruction architecturally executed and the condition code check pass. </p>
-
-</div>
-</div>
-<a class="anchor" id="gac97858bd621eab4592569444f0a5c37f"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_EXC_TAKEN&#160;&#160;&#160;0x0009</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Exception entry. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga8a5e60eee460addfc66e275a2c4c4800"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_INST_RETIRED&#160;&#160;&#160;0x0008</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaf7bad54617ace5c2fb48bc2e8aebf9c7"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_INST_SPEC&#160;&#160;&#160;0x001B</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaf23d758fe1a4cfe6f114cb3e78709237"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_ITCM_ACCESS&#160;&#160;&#160;0x4007</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Instruction TCM access. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga7505ae74c1d905f01b05dd5466c1efc0"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_L1D_CACHE&#160;&#160;&#160;0x0004</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>L1 D-Cache access. </p>
-
-</div>
-</div>
-<a class="anchor" id="gab55334c8510cb30c4c750913f6eb6279"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_L1D_CACHE_ALLOCATE&#160;&#160;&#160;0x001F</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Level 1 data cache allocation without refill. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga4687d5d7efc6f49db2db9acc25b590f6"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_L1D_CACHE_MISS_RD&#160;&#160;&#160;0x0039</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Level 1 data cache read miss. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaf4236dfbcb4550d3cc98caee837e8e77"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_L1D_CACHE_RD&#160;&#160;&#160;0x0040</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Level 1 data cache read. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga64a3d7bfb7ec9d7bdeb073a4fe1bbc38"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_L1D_CACHE_REFILL&#160;&#160;&#160;0x0003</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>L1 D-Cache refill. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga27d1b8b2c37ae0ae41781880ed3893d0"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_L1D_CACHE_WB&#160;&#160;&#160;0x0015</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Level 1 data cache write-back. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaf8e89b2b098e6bec5916517346925ce2"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_L1I_CACHE&#160;&#160;&#160;0x0014</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Level 1 instruction cache access. </p>
-
-</div>
-</div>
-<a class="anchor" id="gac43e0e0f9e385ea66402bdeebf3fea3e"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_L1I_CACHE_REFILL&#160;&#160;&#160;0x0001</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>L1 I-Cache refill. </p>
-
-</div>
-</div>
-<a class="anchor" id="gafb1e1f86d091ccb735858769c700e289"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_L2D_CACHE&#160;&#160;&#160;0x0016</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Level 2 data cache access. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaad08dcded491bf257d223e4171af41cc"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_L2D_CACHE_ALLOCATE&#160;&#160;&#160;0x0020</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Level 2 data cache allocation without refill. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaeb414c1b0375022abc2502ab503a3284"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_L2D_CACHE_REFILL&#160;&#160;&#160;0x0017</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Level 2 data cache refill. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga1a0c4a1990eeed88edc3e1e0c4b1aca0"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_L2D_CACHE_WB&#160;&#160;&#160;0x0018</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Level 2 data cache write-back. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga3406498b2c17ca080ebd68cc40d9630e"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_L2I_CACHE&#160;&#160;&#160;0x0027</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Level 2 instruction cache access. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaa18cee03802b46076e9ab66fd0a7c61d"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_L2I_CACHE_REFILL&#160;&#160;&#160;0x0028</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Level 2 instruction cache refill. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga4e96b5a6fb13c657e78da342a02db200"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_L3D_CACHE&#160;&#160;&#160;0x002B</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Level 3 data cache access. </p>
-
-</div>
-</div>
-<a class="anchor" id="gac11cbc6849dbad7bd8b64ab6e2a3f8d5"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_L3D_CACHE_ALLOCATE&#160;&#160;&#160;0x0029</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Level 3 data cache allocation without refill. </p>
-
-</div>
-</div>
-<a class="anchor" id="gafe99db0693125100272247c147fb3b02"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_L3D_CACHE_REFILL&#160;&#160;&#160;0x002A</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Level 3 data cache refill. </p>
-
-</div>
-</div>
-<a class="anchor" id="gab823f95f7ac8196a208d12381b1b2a11"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_L3D_CACHE_WB&#160;&#160;&#160;0x002C</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Level 3 data cache write-back. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga2e8725ee07c2b2c75a1b54261bc26cc8"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_LD_RETIRED&#160;&#160;&#160;0x0006</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Memory-reading instruction architecturally executed and condition code check pass. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga8b5641a3cb0e922a2b4e16ec14052861"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_LE_CANCEL&#160;&#160;&#160;0x0108</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Loop end instruction not taken. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga345461506c990125b1f2cbc62e3be22f"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_LE_RETIRED&#160;&#160;&#160;0x0100</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Loop end instruction executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga6a1d9f84bda091e96843665ff3913b50"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_LE_SPEC&#160;&#160;&#160;0x0101</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Loop end instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga6979efa69af7d0e62cc3e2f88b0155b8"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_LL_CACHE_MISS_RD&#160;&#160;&#160;0x0037</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Last level data cache read miss. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga902562d8161fffd45726dc4cc8727545"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_LL_CACHE_RD&#160;&#160;&#160;0x0036</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Last level data cache read. </p>
-
-</div>
-</div>
-<a class="anchor" id="gab3852c2b3d59af106b9db7ea2c20c367"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MEM_ACCESS&#160;&#160;&#160;0x0013</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Data memory access. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga2c8d23cc64e87b2044bb39bf8d0bc1b1"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MEMORY_ERROR&#160;&#160;&#160;0x001A</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Local memory error. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaa4c408a006a04e95ade26922669b6695"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_FP_HP_RETIRED&#160;&#160;&#160;0x0208</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE half-precision floating-point instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaf01d187b0cbf418d1fac55dd0ddd0827"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_FP_HP_SPEC&#160;&#160;&#160;0x0209</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE half-precision floating-point instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gac2dc7d92627b3caa391725a3f080288c"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_FP_MAC_RETIRED&#160;&#160;&#160;0x0214</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE floating-point multiply or multiply-accumulate instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaf5302b3278a862c9264171955328a59a"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_FP_MAC_SPEC&#160;&#160;&#160;0x0215</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE floating-point multiply or multiply-accumulate instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga268b0bcbd30e8a928bd0f331fdf53ccf"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_FP_RETIRED&#160;&#160;&#160;0x0204</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE floating-point instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gab21171c50ebd1f304b11260edd015f52"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_FP_SP_RETIRED&#160;&#160;&#160;0x020C</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE single-precision floating-point instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gae69e310892661af852ca2d4ec947d18a"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_FP_SP_SPEC&#160;&#160;&#160;0x020D</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE single-precision floating-point instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gadf9cfd45b59acfc314ebc814a1bcdccd"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_FP_SPEC&#160;&#160;&#160;0x0205</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE floating-point instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga3c1006bed2fb82b0749386261b397727"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_INST_RETIRED&#160;&#160;&#160;0x0200</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga1e276b6872345eb3b043626a11f235c6"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_INST_SPEC&#160;&#160;&#160;0x0201</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga9248c93a3f19fddc93d3804a06f7238a"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_INT_MAC_RETIRED&#160;&#160;&#160;0x0228</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE multiply or multiply-accumulate instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga7036f00faa9183ae450a3e4d9d6f2bbf"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_INT_MAC_SPEC&#160;&#160;&#160;0x0229</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE multiply or multiply-accumulate instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga5e3afafa91ebaeac0469a19ebb54719c"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_INT_RETIRED&#160;&#160;&#160;0x0224</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE integer instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga16ed0bb1bb4718da93c41238da652d33"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_INT_SPEC&#160;&#160;&#160;0x0225</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE integer instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga8732a737f2b7adc43e3d1da7b3da92e6"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_LD_CONTIG_RETIRED&#160;&#160;&#160;0x0248</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE contiguous load instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga8e58fe07254256fa3bf3d42fa2062141"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_LD_CONTIG_SPEC&#160;&#160;&#160;0x0249</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE contiguous load instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga50fb13c874b3f5e2b9ed9c320a36452c"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_LD_MULTI_RETIRED&#160;&#160;&#160;0x0260</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE memory load instruction targeting multiple registers architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaf2d4e3d1f06d97899de7fa791477d62b"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_LD_MULTI_SPEC&#160;&#160;&#160;0x0261</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE memory load instruction targeting multiple registers speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaaf2ce8c0ea4c03c934aac6afc31fc5ff"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_LD_NONCONTIG_RETIRED&#160;&#160;&#160;0x0254</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE non-contiguous load instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gadbcb82b7924b7bbee5c0d42a3de38572"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_LD_NONCONTIG_SPEC&#160;&#160;&#160;0x0255</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE non-contiguous load instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaa3379a51350a2fda8d8ab6d7795baa7a"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_LD_RETIRED&#160;&#160;&#160;0x023C</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE load instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga78a6f89ab30ed01f7d8388eda697b4f8"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_LD_SPEC&#160;&#160;&#160;0x023D</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE load instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga26ed05deaa7b993904300069f0ecfac4"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_LD_UNALIGNED_RETIRED&#160;&#160;&#160;0x0290</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE unaligned load instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gadc3bd0f32e0a08bba2d533479a59bd6e"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_LD_UNALIGNED_SPEC&#160;&#160;&#160;0x0291</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE unaligned load instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga8acf6a66c63798b76608caf52c96658d"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_LDST_CONTIG_RETIRED&#160;&#160;&#160;0x0244</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE contiguous load or store instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga5a83ef6a52739e1d223be503bbdaaab6"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_LDST_CONTIG_SPEC&#160;&#160;&#160;0x0245</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE contiguous load or store instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga7d669378441408fc21aa551e483866cb"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_LDST_MULTI_RETIRED&#160;&#160;&#160;0x025C</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE memory instruction targeting multiple registers architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga7ea46cde08cb0cc4a46ef23835fb5aac"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_LDST_MULTI_SPEC&#160;&#160;&#160;0x025D</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE memory instruction targeting multiple registers speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga7065b7f0aea461858b72912d22c329f2"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_LDST_NONCONTIG_RETIRED&#160;&#160;&#160;0x0250</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE non-contiguous load or store instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga193605eb52709741d91a64e3ad1a5894"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_LDST_NONCONTIG_SPEC&#160;&#160;&#160;0x0251</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE non-contiguous load or store instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga7d7d465a6c64400c49f93b6c8152296f"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_LDST_RETIRED&#160;&#160;&#160;0x0238</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE load or store instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaa98a18c06bd13daf2df6f89219ec68d5"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_LDST_SPEC&#160;&#160;&#160;0x0239</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE load or store instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga627920bebd935709655687d844848934"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_LDST_UNALIGNED_NONCONTIG_RETIRED&#160;&#160;&#160;0x0298</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE unaligned noncontiguous load or store instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaf9ebeb1f49dba56d8f90f9bd5d3da58e"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_LDST_UNALIGNED_NONCONTIG_SPEC&#160;&#160;&#160;0x0299</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE unaligned noncontiguous load or store instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaf358a9ed5c83a10cb695d9b19b1b3bc1"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_LDST_UNALIGNED_RETIRED&#160;&#160;&#160;0x028C</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE unaligned memory load or store instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gab2264786bed578c89109859b55909c76"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_LDST_UNALIGNED_SPEC&#160;&#160;&#160;0x028D</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE unaligned memory load or store instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga01b4792990494b8f084ee00933a1adb0"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_PRED&#160;&#160;&#160;0x02B8</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Cycles where one or more predicated beats architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gacb3c0b922eae9aac321df97ec889e0ed"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_ST_CONTIG_RETIRED&#160;&#160;&#160;0x024C</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE contiguous store instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga02cd64b9444e4babc7b69e8571d39bdd"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_ST_CONTIG_SPEC&#160;&#160;&#160;0x024D</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE contiguous store instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga76057cbda353b4ad6fbc3b6a63c193a5"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_ST_MULTI_RETIRED&#160;&#160;&#160;0x0261</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE memory store instruction targeting multiple registers architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaf6a14402c79dba8fa765e8663dd0734d"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_ST_MULTI_SPEC&#160;&#160;&#160;0x0265</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE memory store instruction targeting multiple registers speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga8271f415ecc7573b57e82a24aec86ef1"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_ST_NONCONTIG_RETIRED&#160;&#160;&#160;0x0258</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE non-contiguous store instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga059327c80f396918a9f8192bcd0fa4a8"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_ST_NONCONTIG_SPEC&#160;&#160;&#160;0x0259</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE non-contiguous store instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gad8d0079977fa97de4ee263703f1b2908"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_ST_RETIRED&#160;&#160;&#160;0x0240</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE store instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gabd3984d299b5416aac8d630722680c55"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_ST_SPEC&#160;&#160;&#160;0x0241</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE store instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga391afd8cb92cc65161b13ee3a3256d40"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_ST_UNALIGNED_RETIRED&#160;&#160;&#160;0x0294</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE unaligned store instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga21bf105499df85196b4137cb075a6fbe"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_ST_UNALIGNED_SPEC&#160;&#160;&#160;0x0295</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE unaligned store instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga2a45ec75b2011bd8375d89b7562b2de6"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_STALL&#160;&#160;&#160;0x02CC</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Stall cycles caused by an MVE instruction. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga9a1cfef96ec7cd70acf134e368d8826a"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_STALL_BREAK&#160;&#160;&#160;0x02D3</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Stall cycles caused by an MVE chain break. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga29bc4c2e820914e94e2eb68a6a3352b9"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_STALL_DEPENDENCY&#160;&#160;&#160;0x02D4</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Stall cycles caused by MVE register dependency. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga8f4949084efce03d09bf5ba74cc91edd"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_STALL_RESOURCE&#160;&#160;&#160;0x02CD</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Stall cycles caused by an MVE instruction because of resource conflicts. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga7e76060791618f9b4d49ad493cfb6ba9"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_STALL_RESOURCE_FP&#160;&#160;&#160;0x02CF</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Stall cycles caused by an MVE instruction because of floating-point resource conflicts. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaef33b3ff7f12d31238ff4dded5e67a11"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_STALL_RESOURCE_INT&#160;&#160;&#160;0x02D0</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Stall cycles caused by an MVE instruction because of integer resource conflicts. </p>
-
-</div>
-</div>
-<a class="anchor" id="gab486f5753edd9f10b0f100ff78944dd3"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_STALL_RESOURCE_MEM&#160;&#160;&#160;0x02CE</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Stall cycles caused by an MVE instruction because of memory resource conflicts. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga77fad5ad424271ed63fec98af071bb79"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_VREDUCE_FP_RETIRED&#160;&#160;&#160;0x02A4</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE floating-point vector reduction instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaa07c698f58c622d234a0007249717265"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_VREDUCE_FP_SPEC&#160;&#160;&#160;0x02A5</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE floating-point vector reduction instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga649e7e81f0fd04ca6611f6a6c4035c57"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_VREDUCE_INT_RETIRED&#160;&#160;&#160;0x02A8</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE integer vector reduction instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga5b6f0bcfd63207c7bab03ea20167dd4b"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_VREDUCE_INT_SPEC&#160;&#160;&#160;0x02A9</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE integer vector reduction instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga9546b924daa3c62e5f117026de58ad94"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_VREDUCE_RETIRED&#160;&#160;&#160;0x02A0</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE vector reduction instruction architecturally executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="gac714f988ae45871b2865f82c11383b36"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_MVE_VREDUCE_SPEC&#160;&#160;&#160;0x02A1</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>MVE vector reduction instruction speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga2fe9d3ea67ce833bd6323e4ce1a4e894"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_OP_COMPLETE&#160;&#160;&#160;0x003A</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Operation retired. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga6c59149e9b1754987b44b62092bc9f09"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_OP_SPEC&#160;&#160;&#160;0x003B</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Operation speculatively executed. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga54fd2c392399221077c67866a395e587"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_PC_WRITE_RETIRED&#160;&#160;&#160;0x000C</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Software change to the Program Counter (PC). Instruction is architecturally executed and condition code check pass. </p>
-
-</div>
-</div>
-<a class="anchor" id="gaaae2c32a8ecd36b59ac98cf8e23b3cab"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_SE_CALL_NS&#160;&#160;&#160;0x0115</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Call to non-secure function, resulting in Security state change. </p>
-
-</div>
-</div>
-<a class="anchor" id="gad3ba2effbe303ca3fafdbc022fe206c1"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_SE_CALL_S&#160;&#160;&#160;0x0114</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Call to secure function, resulting in Security state change. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga8179d1144f8ec993bd1343e276d7b49b"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_ST_RETIRED&#160;&#160;&#160;0x0007</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Memory-writing instruction architecturally executed and condition code check pass. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga8bf75efa06a125ee2dfa9a130e7ba9a8"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_STALL&#160;&#160;&#160;0x003C</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Stall cycle for instruction or operation not sent for execution. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga8737bee352820bd7d1bc8e5e4260143c"></a>
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-        <tr>
-          <td class="memname">#define ARM_PMU_STALL_BACKEND&#160;&#160;&#160;0x0024</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>No operation issued because of the backend. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga5b068593baa831348664dfa7d44f5483"></a>
-<div class="memitem">
-<div class="memproto">
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-        <tr>
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-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>No operation issued because of the frontend. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga197b491f691110fb52aef4291782b6ab"></a>
-<div class="memitem">
-<div class="memproto">
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-        <tr>
-          <td class="memname">#define ARM_PMU_STALL_OP&#160;&#160;&#160;0x003F</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Instruction or operation slots not occupied each cycle. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga9700ec74727a9fe3cd4cd40736628a23"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_STALL_OP_BACKEND&#160;&#160;&#160;0x003D</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Stall cycle for instruction or operation not sent for execution due to pipeline backend. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga69cfd3558cf6c6f3bb621ee75430427c"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_STALL_OP_FRONTEND&#160;&#160;&#160;0x003E</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Stall cycle for instruction or operation not sent for execution due to pipeline frontend. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga6e02b08550d7e9b273ff7913f1b57bea"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_SW_INCR&#160;&#160;&#160;0x0000</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Software update to the PMU_SWINC register, architecturally executed and condition code check pass. </p>
-
-</div>
-</div>
-<a class="anchor" id="gadaa75dc2ccfbf7a2263da9a9011f1603"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_TRCEXTOUT0&#160;&#160;&#160;0x4010</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>ETM external output 0. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga47fe03fe6fe9bfebd98283cb57d94560"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_TRCEXTOUT1&#160;&#160;&#160;0x4011</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>ETM external output 1. </p>
-
-</div>
-</div>
-<a class="anchor" id="gab80e47ffebc3ae6ed2952756b020dbb9"></a>
-<div class="memitem">
-<div class="memproto">
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-        <tr>
-          <td class="memname">#define ARM_PMU_TRCEXTOUT2&#160;&#160;&#160;0x4012</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>ETM external output 2. </p>
-
-</div>
-</div>
-<a class="anchor" id="gad70a3b074efd967485ffbfd3e387051d"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_TRCEXTOUT3&#160;&#160;&#160;0x4013</td>
-        </tr>
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-</div><div class="memdoc">
-
-<p>ETM external output 3. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga45d5ea86fdc015f4fc100462150c92da"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define ARM_PMU_UNALIGNED_LDST_RETIRED&#160;&#160;&#160;0x000F</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Unaligned memory memory-reading or memory-writing instruction architecturally executed and condition code check pass. </p>
-
-</div>
-</div>
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-</div><!-- doc-content -->
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diff --git a/Documentation/Core/html/group__pmu8__events__armv81.js b/Documentation/Core/html/group__pmu8__events__armv81.js
deleted file mode 100644
index 3d836b1..0000000
--- a/Documentation/Core/html/group__pmu8__events__armv81.js
+++ /dev/null

@@ -1,134 +0,0 @@
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-<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="define-members"></a>
-Macros</h2></td></tr>
-<tr class="memitem:gad19c25be8565f2791aca1a96d1847516"><td class="memItemLeft" align="right" valign="top">#define&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__functions.html#gad19c25be8565f2791aca1a96d1847516">PMU</a></td></tr>
-<tr class="memdesc:gad19c25be8565f2791aca1a96d1847516"><td class="mdescLeft">&#160;</td><td class="mdescRight">PMU configuration struct.  <a href="#gad19c25be8565f2791aca1a96d1847516">More...</a><br/></td></tr>
-<tr class="separator:gad19c25be8565f2791aca1a96d1847516"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table><table class="memberdecls">
-<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
-Functions</h2></td></tr>
-<tr class="memitem:ga618e7140a774ac2a31a59db4b7d13abc"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__functions.html#ga618e7140a774ac2a31a59db4b7d13abc">ARM_PMU_Enable</a> (void)</td></tr>
-<tr class="memdesc:ga618e7140a774ac2a31a59db4b7d13abc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable the PMU.  <a href="#ga618e7140a774ac2a31a59db4b7d13abc">More...</a><br/></td></tr>
-<tr class="separator:ga618e7140a774ac2a31a59db4b7d13abc"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga74273d4a47cf1a5e99d857a3e8896f10"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__functions.html#ga74273d4a47cf1a5e99d857a3e8896f10">ARM_PMU_Disable</a> (void)</td></tr>
-<tr class="memdesc:ga74273d4a47cf1a5e99d857a3e8896f10"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable the PMU.  <a href="#ga74273d4a47cf1a5e99d857a3e8896f10">More...</a><br/></td></tr>
-<tr class="separator:ga74273d4a47cf1a5e99d857a3e8896f10"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga77ee08f0b3e77d4559cb79fde30d89e9"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__functions.html#ga77ee08f0b3e77d4559cb79fde30d89e9">ARM_PMU_Set_EVTYPER</a> (uint32_t num, uint32_t type)</td></tr>
-<tr class="memdesc:ga77ee08f0b3e77d4559cb79fde30d89e9"><td class="mdescLeft">&#160;</td><td class="mdescRight">Set event to count for PMU event counter.  <a href="#ga77ee08f0b3e77d4559cb79fde30d89e9">More...</a><br/></td></tr>
-<tr class="separator:ga77ee08f0b3e77d4559cb79fde30d89e9"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga4288c08039886cd24eb2dd4e743fb97e"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__functions.html#ga4288c08039886cd24eb2dd4e743fb97e">ARM_PMU_CYCCNT_Reset</a> (void)</td></tr>
-<tr class="memdesc:ga4288c08039886cd24eb2dd4e743fb97e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reset cycle counter.  <a href="#ga4288c08039886cd24eb2dd4e743fb97e">More...</a><br/></td></tr>
-<tr class="separator:ga4288c08039886cd24eb2dd4e743fb97e"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga90527859e6f0ef980300c86c2916ee79"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__functions.html#ga90527859e6f0ef980300c86c2916ee79">ARM_PMU_EVCNTR_ALL_Reset</a> (void)</td></tr>
-<tr class="memdesc:ga90527859e6f0ef980300c86c2916ee79"><td class="mdescLeft">&#160;</td><td class="mdescRight">Reset all event counters.  <a href="#ga90527859e6f0ef980300c86c2916ee79">More...</a><br/></td></tr>
-<tr class="separator:ga90527859e6f0ef980300c86c2916ee79"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga22e481855ab257180e24f01a38623887"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__functions.html#ga22e481855ab257180e24f01a38623887">ARM_PMU_CNTR_Enable</a> (uint32_t mask)</td></tr>
-<tr class="memdesc:ga22e481855ab257180e24f01a38623887"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable counters.  <a href="#ga22e481855ab257180e24f01a38623887">More...</a><br/></td></tr>
-<tr class="separator:ga22e481855ab257180e24f01a38623887"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga76c6f266544c53d93801cfb614155420"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__functions.html#ga76c6f266544c53d93801cfb614155420">ARM_PMU_CNTR_Disable</a> (uint32_t mask)</td></tr>
-<tr class="memdesc:ga76c6f266544c53d93801cfb614155420"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable counters.  <a href="#ga76c6f266544c53d93801cfb614155420">More...</a><br/></td></tr>
-<tr class="separator:ga76c6f266544c53d93801cfb614155420"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gaaa18c27d39f5a55c1b621f5296b88112"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__functions.html#gaaa18c27d39f5a55c1b621f5296b88112">ARM_PMU_Get_CCNTR</a> (void)</td></tr>
-<tr class="memdesc:gaaa18c27d39f5a55c1b621f5296b88112"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read cycle counter.  <a href="#gaaa18c27d39f5a55c1b621f5296b88112">More...</a><br/></td></tr>
-<tr class="separator:gaaa18c27d39f5a55c1b621f5296b88112"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga9768cbaffcf2c0b31febe96db91a85d8"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__functions.html#ga9768cbaffcf2c0b31febe96db91a85d8">ARM_PMU_Get_EVCNTR</a> (uint32_t num)</td></tr>
-<tr class="memdesc:ga9768cbaffcf2c0b31febe96db91a85d8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read event counter.  <a href="#ga9768cbaffcf2c0b31febe96db91a85d8">More...</a><br/></td></tr>
-<tr class="separator:ga9768cbaffcf2c0b31febe96db91a85d8"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga70436b378b75bdfe3fcb47697d309a96"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> uint32_t&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__functions.html#ga70436b378b75bdfe3fcb47697d309a96">ARM_PMU_Get_CNTR_OVS</a> (void)</td></tr>
-<tr class="memdesc:ga70436b378b75bdfe3fcb47697d309a96"><td class="mdescLeft">&#160;</td><td class="mdescRight">Read counter overflow status.  <a href="#ga70436b378b75bdfe3fcb47697d309a96">More...</a><br/></td></tr>
-<tr class="separator:ga70436b378b75bdfe3fcb47697d309a96"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga18376f0e3829e93e99149847667e5864"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__functions.html#ga18376f0e3829e93e99149847667e5864">ARM_PMU_Set_CNTR_OVS</a> (uint32_t mask)</td></tr>
-<tr class="memdesc:ga18376f0e3829e93e99149847667e5864"><td class="mdescLeft">&#160;</td><td class="mdescRight">Clear counter overflow status.  <a href="#ga18376f0e3829e93e99149847667e5864">More...</a><br/></td></tr>
-<tr class="separator:ga18376f0e3829e93e99149847667e5864"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga133168437a20566d319c78b751425c44"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__functions.html#ga133168437a20566d319c78b751425c44">ARM_PMU_Set_CNTR_IRQ_Enable</a> (uint32_t mask)</td></tr>
-<tr class="memdesc:ga133168437a20566d319c78b751425c44"><td class="mdescLeft">&#160;</td><td class="mdescRight">Enable counter overflow interrupt request.  <a href="#ga133168437a20566d319c78b751425c44">More...</a><br/></td></tr>
-<tr class="separator:ga133168437a20566d319c78b751425c44"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga731b6cd01c6eaa6f909164602f19d0bc"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__functions.html#ga731b6cd01c6eaa6f909164602f19d0bc">ARM_PMU_Set_CNTR_IRQ_Disable</a> (uint32_t mask)</td></tr>
-<tr class="memdesc:ga731b6cd01c6eaa6f909164602f19d0bc"><td class="mdescLeft">&#160;</td><td class="mdescRight">Disable counter overflow interrupt request.  <a href="#ga731b6cd01c6eaa6f909164602f19d0bc">More...</a><br/></td></tr>
-<tr class="separator:ga731b6cd01c6eaa6f909164602f19d0bc"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:ga27b07d38050a16ce416bfaf151a24944"><td class="memItemLeft" align="right" valign="top"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__pmu8__functions.html#ga27b07d38050a16ce416bfaf151a24944">ARM_PMU_CNTR_Increment</a> (uint32_t mask)</td></tr>
-<tr class="memdesc:ga27b07d38050a16ce416bfaf151a24944"><td class="mdescLeft">&#160;</td><td class="mdescRight">Software increment event counter.  <a href="#ga27b07d38050a16ce416bfaf151a24944">More...</a><br/></td></tr>
-<tr class="separator:ga27b07d38050a16ce416bfaf151a24944"><td class="memSeparator" colspan="2">&#160;</td></tr>
-</table>
-<a name="details" id="details"></a><h2 class="groupheader">Description</h2>
-<p>Functions that relate to the Performance Monitoring Unit. </p>
-<p>The following functions support the Performance Monitoring Unit (PMU) that is available on the Cortex-M55/M85 processors.</p>
-<p>The PMU is used to monitor events that occur during run-time of an application.</p>
-<p><b>Example:</b> </p>
-<div class="fragment"><div class="line"><span class="comment">// Initialize counter variables</span></div>
-<div class="line"> </div>
-<div class="line"><span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> cycle_count = 0;</div>
-<div class="line"><span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> l1_dcache_miss_count = 0;</div>
-<div class="line"><span class="keywordtype">unsigned</span> <span class="keywordtype">int</span> instructions_retired_count = 0;</div>
-<div class="line"> </div>
-<div class="line"><span class="comment">// Enable the PMU</span></div>
-<div class="line"><span class="comment">// Note: Before using the PMU, software needs to ensure </span></div>
-<div class="line"><span class="comment">// that trace is enabled via the Debug Exception Monitor Control Register, DEMCR:</span></div>
-<div class="line"><span class="comment">// CoreDebug-&gt;DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;</span></div>
-<div class="line"> </div>
-<div class="line"><a class="code" href="group__pmu8__functions.html#ga618e7140a774ac2a31a59db4b7d13abc">ARM_PMU_Enable</a>();</div>
-<div class="line"> </div>
-<div class="line"><span class="comment">// Configure Event Counter Register 0 to count instructions retired</span></div>
-<div class="line"><span class="comment">// Configure Event Counter Register 1 to count L1 D-Cache misses</span></div>
-<div class="line"> </div>
-<div class="line"><a class="code" href="group__pmu8__functions.html#ga77ee08f0b3e77d4559cb79fde30d89e9">ARM_PMU_Set_EVTYPER</a>(0, <a class="code" href="group__pmu8__events__armv81.html#ga8a5e60eee460addfc66e275a2c4c4800">ARM_PMU_INST_RETIRED</a>);</div>
-<div class="line"><a class="code" href="group__pmu8__functions.html#ga77ee08f0b3e77d4559cb79fde30d89e9">ARM_PMU_Set_EVTYPER</a>(1, <a class="code" href="group__pmu8__events__armv81.html#ga4687d5d7efc6f49db2db9acc25b590f6">ARM_PMU_L1D_CACHE_MISS_RD</a>);</div>
-<div class="line"> </div>
-<div class="line"><span class="comment">// Reset Event Counters and Cycle Counter</span></div>
-<div class="line"> </div>
-<div class="line"><a class="code" href="group__pmu8__functions.html#ga90527859e6f0ef980300c86c2916ee79">ARM_PMU_EVCNTR_ALL_Reset</a>();</div>
-<div class="line"><a class="code" href="group__pmu8__functions.html#ga4288c08039886cd24eb2dd4e743fb97e">ARM_PMU_CYCCNT_Reset</a>();</div>
-<div class="line"> </div>
-<div class="line"><span class="comment">// Start incrementing Cycle Count Register and Event Counter Registers 0 &amp; 1</span></div>
-<div class="line"> </div>
-<div class="line"><a class="code" href="group__pmu8__functions.html#ga22e481855ab257180e24f01a38623887">ARM_PMU_CNTR_Enable</a>(PMU_CNTENSET_CCNTR_ENABLE_Msk|PMU_CNTENSET_CNT0_ENABLE_Msk|PMU_CNTENSET_CNT1_ENABLE_Msk);</div>
-<div class="line"> </div>
-<div class="line"><span class="comment">// Code you want to measure here</span></div>
-<div class="line"> </div>
-<div class="line"><span class="comment">// Stop incrementing Cycle Count Register and Event Counter Registers 0 &amp; 1</span></div>
-<div class="line"> </div>
-<div class="line"><a class="code" href="group__pmu8__functions.html#ga76c6f266544c53d93801cfb614155420">ARM_PMU_CNTR_Disable</a>(PMU_CNTENCLR_CCNTR_ENABLE_Msk|PMU_CNTENCLR_CNT0_ENABLE_Msk|PMU_CNTENCLR_CNT1_ENABLE_Msk);</div>
-<div class="line"> </div>
-<div class="line"><span class="comment">// Get cycle count, number of instructions retired and number of L1 D-Cache misses (on read)</span></div>
-<div class="line"> </div>
-<div class="line">cycle_count = cycle_count + <a class="code" href="group__pmu8__functions.html#gaaa18c27d39f5a55c1b621f5296b88112">ARM_PMU_Get_CCNTR</a>();</div>
-<div class="line">instructions_retired_count = instructions_retired_count + <a class="code" href="group__pmu8__functions.html#ga9768cbaffcf2c0b31febe96db91a85d8">ARM_PMU_Get_EVCNTR</a>(0);</div>
-<div class="line">l1_dcache_miss_count = l1_dcache_miss_count + <a class="code" href="group__pmu8__functions.html#ga9768cbaffcf2c0b31febe96db91a85d8">ARM_PMU_Get_EVCNTR</a>(1);      <span class="comment">// Note: D-Cache must be enabled using</span></div>
-<div class="line">                                                                          <span class="comment">// SCB_EnableDCache() for meaningful result.</span></div>
-</div><!-- fragment --> <h2 class="groupheader">Macro Definition Documentation</h2>
-<a class="anchor" id="gad19c25be8565f2791aca1a96d1847516"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define PMU</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>PMU configuration struct. </p>
-<p>This macro can be used to access the PMU registers, directly. For the common tasks one should prefer using the control functions.</p>
-<p>Example: <b>Example:</b> </p>
-<div class="fragment"><div class="line"><a class="code" href="group__pmu8__functions.html#gad19c25be8565f2791aca1a96d1847516">PMU</a>-&gt;CTRL |= PMU_CTRL_ENABLE_Msk; <span class="comment">// Enable PMU</span></div>
-</div><!-- fragment --> 
-</div>
-</div>
-<h2 class="groupheader">Function Documentation</h2>
-<a class="anchor" id="ga76c6f266544c53d93801cfb614155420"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_PMU_CNTR_Disable </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>mask</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Disable counters. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">mask</td><td>Counters to enable </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section note"><dt>Note</dt><dd>Disables one or more of the following:<ul>
-<li>event counters (0-30)</li>
-<li>cycle counter </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga22e481855ab257180e24f01a38623887"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_PMU_CNTR_Enable </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>mask</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Enable counters. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">mask</td><td>Counters to enable </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section note"><dt>Note</dt><dd>Enables one or more of the following:<ul>
-<li>event counters (0-30)</li>
-<li>cycle counter </li>
-</ul>
-</dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga27b07d38050a16ce416bfaf151a24944"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_PMU_CNTR_Increment </td>
-          <td>(</td>
-          <td class="paramtype">uint32_t&#160;</td>
-          <td class="paramname"><em>mask</em></td><td>)</td>
-          <td></td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Software increment event counter. </p>
-<dl class="params"><dt>Parameters</dt><dd>
-  <table class="params">
-    <tr><td class="paramdir">[in]</td><td class="paramname">mask</td><td>Counters to increment </td></tr>
-  </table>
-  </dd>
-</dl>
-<dl class="section note"><dt>Note</dt><dd>Software increment bits for one or more event counters (0-30) </dd></dl>
-
-</div>
-</div>
-<a class="anchor" id="ga4288c08039886cd24eb2dd4e743fb97e"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname"><a class="el" href="group__compiler__conntrol__gr.html#gaba87361bfad2ae52cfe2f40c1a1dbf9c">__STATIC_INLINE</a> void ARM_PMU_CYCCNT_Reset </td>
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-<p>Read cycle counter. </p>
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-<p>Read counter overflow status. </p>
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-<div class="title">System and Clock Configuration</div>  </div>
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-<div class="contents">
-
-<p>Functions for system and clock setup available in system_<em>device</em>.c.  
-<a href="#details">More...</a></p>
-<table class="memberdecls">
-<tr class="heading"><td colspan="2"><h2 class="groupheader"><a name="func-members"></a>
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-<tr class="memitem:ga93f514700ccf00d08dbdcff7f1224eb2"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2">SystemInit</a> (void)</td></tr>
-<tr class="memdesc:ga93f514700ccf00d08dbdcff7f1224eb2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Function to Initialize the system.  <a href="#ga93f514700ccf00d08dbdcff7f1224eb2">More...</a><br/></td></tr>
-<tr class="separator:ga93f514700ccf00d08dbdcff7f1224eb2"><td class="memSeparator" colspan="2">&#160;</td></tr>
-<tr class="memitem:gae0c36a9591fe6e9c45ecb21a794f0f0f"><td class="memItemLeft" align="right" valign="top">void&#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__system__init__gr.html#gae0c36a9591fe6e9c45ecb21a794f0f0f">SystemCoreClockUpdate</a> (void)</td></tr>
-<tr class="memdesc:gae0c36a9591fe6e9c45ecb21a794f0f0f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Function to update the variable <a class="el" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6">SystemCoreClock</a>.  <a href="#gae0c36a9591fe6e9c45ecb21a794f0f0f">More...</a><br/></td></tr>
-<tr class="separator:gae0c36a9591fe6e9c45ecb21a794f0f0f"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<tr class="separator:gaa3cd3e43291e81e795d642b79b6088e6"><td class="memSeparator" colspan="2">&#160;</td></tr>
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-<p>Functions for system and clock setup available in system_<em>device</em>.c. </p>
-<p>Arm provides a template file <b>system_<em>device</em>.c</b> that must be adapted by the silicon vendor to match their actual device. As a <b>minimum requirement</b>, this file must provide:</p>
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-<p>The file configures the device and, typically, initializes the oscillator (PLL) that is part of the microcontroller device. This file might export other functions or variables that provide a more flexible configuration of the microcontroller system.</p>
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-<div class="fragment"><div class="line"><span class="preprocessor">#include &quot;LPC17xx.h&quot;</span></div>
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-<div class="line">uint32_t coreClock_1 = 0;                       <span class="comment">/* Variables to store core clock values */</span></div>
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-<div class="line">  <a class="code" href="group__system__init__gr.html#gae0c36a9591fe6e9c45ecb21a794f0f0f">SystemCoreClockUpdate</a>();                      <span class="comment">/* Update SystemCoreClock according to register settings */</span></div>
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-<div class="line">  coreClock_2 = <a class="code" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6">SystemCoreClock</a>;                <span class="comment">/* Store value of calculated SystemCoreClock */</span></div>
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-<div class="line">  <span class="keywordflow">if</span> (coreClock_2 != coreClock_1)  {            <span class="comment">/* Without changing the clock setting both core clock values should be the same */</span> </div>
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-<p>Function to Initialize the system. </p>
-<p>Initializes the microcontroller system. Typically, this function configures the oscillator (PLL) that is part of the microcontroller device. For systems with a variable clock speed, it updates the variable <a class="el" href="group__system__init__gr.html#gaa3cd3e43291e81e795d642b79b6088e6">SystemCoreClock</a>. SystemInit is called from the file <b>startup<em>_device</em></b>. </p>
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-<p>Holds the system core clock, which is the system clock frequency supplied to the SysTick timer and the processor core clock. This variable can be used by debuggers to query the frequency of the debug timer or to configure the trace clock speed.</p>
-<dl class="section attention"><dt>Attention</dt><dd>Compilers must be configured to avoid removing this variable in case the application program is not using it. Debugging systems require the variable to be physically present in memory so that it can be examined to configure the debugger. </dd></dl>
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-<p>SysTick functions related to TrustZone for Armv8-M.  
-<a href="#details">More...</a></p>
-<table class="memberdecls">
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-<li><b>__XXX_CMSIS_VERSION_MAIN</b> which is replaced by <a class="el" href="group__version__control__gr.html#ga85987c5fcc1e012d7ac01369ee6ca2b5">__CM_CMSIS_VERSION_MAIN</a>.</li>
-<li><b>__XXX_CMSIS_VERSION_SUB</b> which is replaced by <a class="el" href="group__version__control__gr.html#ga22083cbe7f0606cfd538ec12b2e41608">__CM_CMSIS_VERSION_SUB</a>.</li>
-<li><b>__XXX_CMSIS_VERSION</b> which is replaced by <a class="el" href="group__version__control__gr.html#ga39f3d64ff95fb58feccc7639e537ff89">__CM_CMSIS_VERSION</a>. </li>
-</ul>
-<h2 class="groupheader">Macro Definition Documentation</h2>
-<a class="anchor" id="ga39f3d64ff95fb58feccc7639e537ff89"></a>
-<div class="memitem">
-<div class="memproto">
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-          <td class="memname">#define __CM_CMSIS_VERSION</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Contains the CMSIS version. </p>
-<p>The CMSIS version is a combination of the <a class="el" href="group__version__control__gr.html#ga85987c5fcc1e012d7ac01369ee6ca2b5">__CM_CMSIS_VERSION_MAIN</a> (bits 31..15) and <a class="el" href="group__version__control__gr.html#ga22083cbe7f0606cfd538ec12b2e41608">__CM_CMSIS_VERSION_SUB</a> (bits 14..0). </p>
-
-</div>
-</div>
-<a class="anchor" id="ga85987c5fcc1e012d7ac01369ee6ca2b5"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define __CM_CMSIS_VERSION_MAIN</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Contains the CMSIS major version. </p>
-<p>The CMSIS major version can be used to differentiate between CMSIS major releases. </p>
-
-</div>
-</div>
-<a class="anchor" id="ga22083cbe7f0606cfd538ec12b2e41608"></a>
-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
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-          <td class="memname">#define __CM_CMSIS_VERSION_SUB</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Contains the CMSIS minor version. </p>
-<p>The CMSIS minor version can be used to query a CMSIS release update level. </p>
-
-</div>
-</div>
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-<div class="memitem">
-<div class="memproto">
-      <table class="memname">
-        <tr>
-          <td class="memname">#define __CORTEX_M</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Contains the core version for a Cortex-M class controller. </p>
-<p>This define can be used to differentiate between the various available Cortex-M controllers. Possible values are:</p>
-<ul>
-<li>0 for a Cortex-M0 or Cortex-M0+</li>
-<li>1 for a Cortex-M1</li>
-<li>3 for a Cortex-M3</li>
-<li>4 for a Cortex-M4</li>
-<li>7 for a Cortex-M7</li>
-<li>23 for a Cortex-M23</li>
-<li>33 for a Cortex-M33</li>
-<li>35 for a Cortex-M35P</li>
-<li>55 for a Cortex-M55</li>
-<li>85 for a Cortex-M85</li>
-<li>2 for a Armv8-M Base Line device</li>
-<li>80 for a Armv8-M Main Line device</li>
-<li>81 for a Armv8.1-M Main Line device</li>
-</ul>
-<p>This define is only available for Cortex-M class controllers. <b>Code Example:</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#if defined(__CORTEX_M) &amp;&amp; (__CORTEX_M == 4)</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#error Yes, we have an Cortex-M4 controller.</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#else</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#error We need a Cortex-M4 controller!</span></div>
-<div class="line"><span class="preprocessor">#endif</span></div>
-</div><!-- fragment --> 
-</div>
-</div>
-<a class="anchor" id="gaeaaf66c86e5ae02a0e1fe542cb7f4d8c"></a>
-<div class="memitem">
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-          <td class="memname">#define __CORTEX_SC</td>
-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Contains the core version for a Cortex Secure Core controller. </p>
-<p>This define can be used to differentiate between the various available Cortex Secure Core controllers. Possible values are:</p>
-<ul>
-<li>000 for a Cortex-SC000</li>
-<li>300 for a Cortex-SC300</li>
-</ul>
-<p>This define is only available for Cortex Secure Core controllers. <b>Code Example:</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#if defined(__CORTEX_SC) &amp;&amp; (__CORTEX_SC == 300U)</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#error Yes, we have an Cortex SC300 controller.</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#else</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#error We need a Cortex SC300 controller!</span></div>
-<div class="line"><span class="preprocessor">#endif</span></div>
-</div><!-- fragment --> 
-</div>
-</div>
-<a class="anchor" id="ga9db417c20fe833187e2f2b8aeb14e94e"></a>
-<div class="memitem">
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-        </tr>
-      </table>
-</div><div class="memdoc">
-
-<p>Contains the core version for a STAR-MC controller. </p>
-<p>This define can be used to differentiate between the various available STAR-MC controllers. Possible values are:</p>
-<ul>
-<li>1 for a STAR-MC1</li>
-</ul>
-<p>This define is only available for STAR-MC controllers. <b>Code Example:</b> </p>
-<div class="fragment"><div class="line"><span class="preprocessor">#if defined(__STAR_MC) &amp;&amp; (__STAR_MC == 1U)</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#error Yes, we have a STAR-MC1 controller.</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#else</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#error We need a STAR-MC1 controller!</span></div>
-<div class="line"><span class="preprocessor">#endif</span></div>
-</div><!-- fragment --> 
-</div>
-</div>
-</div><!-- contents -->
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-<!-- start footer part -->
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diff --git a/Documentation/Core/html/group__version__control__gr.js b/Documentation/Core/html/group__version__control__gr.js
deleted file mode 100644
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-    [ "__CM_CMSIS_VERSION_SUB", "group__version__control__gr.html#ga22083cbe7f0606cfd538ec12b2e41608", null ],
-    [ "__CORTEX_M", "group__version__control__gr.html#ga63ea62503c88acab19fcf3d5743009e3", null ],
-    [ "__CORTEX_SC", "group__version__control__gr.html#gaeaaf66c86e5ae02a0e1fe542cb7f4d8c", null ],
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-<head>
-<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
-<meta http-equiv="X-UA-Compatible" content="IE=9"/>
-<title>Overview</title>
-<title>CMSIS-Core (Cortex-M): Overview</title>
-<link href="tabs.css" rel="stylesheet" type="text/css"/>
-<link href="cmsis.css" rel="stylesheet" type="text/css" />
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- <tr style="height: 46px;">
-  <td id="projectlogo"><img alt="Logo" src="CMSIS_Logo_Final.png"/></td>
-  <td style="padding-left: 0.5em;">
-   <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.6.0</span>
-   </div>
-   <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
-  </td>
- </tr>
- </tbody>
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-<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Pages</a></div>
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-<div class="header">
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-<div class="title">Overview </div>  </div>
-</div><!--header-->
-<div class="contents">
-<div class="textblock"><p>CMSIS-Core (Cortex-M) implements the basic run-time system for a Cortex-M device and gives the user access to the processor core and the device peripherals. In detail it defines:</p>
-<ul>
-<li><b>Hardware Abstraction Layer (HAL)</b> for Cortex-M processor registers with standardized definitions for the SysTick, NVIC, System Control Block registers, MPU registers, FPU registers, and core access functions.</li>
-<li><b>System exception names</b> to interface to system exceptions without having compatibility issues.</li>
-<li><b>Methods to organize header files</b> that makes it easy to learn new Cortex-M microcontroller products and improve software portability. This includes naming conventions for device-specific interrupts.</li>
-<li><b>Methods for system initialization</b> to be used by each MCU vendor. For example, the standardized <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2" title="Function to Initialize the system. ">SystemInit()</a> function is essential for configuring the clock system of the device.</li>
-<li><b>Intrinsic functions</b> used to generate CPU instructions that are not supported by standard C functions.</li>
-<li>A variable to determine the <b>system clock frequency</b> which simplifies the setup the SysTick timer.</li>
-</ul>
-<p>The following sections provide details about the CMSIS-Core (Cortex-M):</p>
-<ul>
-<li><a class="el" href="using_pg.html">Using CMSIS in Embedded Applications</a> describes the project setup and shows a simple program example.</li>
-<li><a class="el" href="using_TrustZone_pg.html">Using TrustZone&reg; for Armv8-M</a> describes how to use the security extensions available in the Armv8-M architecture.</li>
-<li><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a> describes the files of the CMSIS-Core (Cortex-M) in detail and explains how to adapt template files provided by Arm to silicon vendor devices.</li>
-<li><a class="el" href="coreMISRA_Exceptions_pg.html">MISRA-C Deviations</a> describes the violations to the MISRA standard.</li>
-<li><a href="modules.html"><b>Reference</b> </a> describe the features and functions of the <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> in detail.</li>
-<li><a href="annotated.html"><b>Data</b> <b>Structures</b> </a> describe the data structures of the <a class="el" href="device_h_pg.html">Device Header File &lt;device.h&gt;</a> in detail.</li>
-</ul>
-<hr/>
-<h2>CMSIS-Core (Cortex-M) in ARM::CMSIS Pack </h2>
-<p>Files relevant to CMSIS-Core (Cortex-M) are present in the following <b>ARM::CMSIS</b> directories: </p>
-<table class="doxtable">
-<tr>
-<th>File/Folder </th><th>Content  </th></tr>
-<tr>
-<td><b>CMSIS\Documentation\Core</b> </td><td>This documentation </td></tr>
-<tr>
-<td><b>CMSIS\Core\Include</b> </td><td>CMSIS-Core (Cortex-M) header files (for example core_cm3.h, core_cmInstr.h, etc.) </td></tr>
-<tr>
-<td><b>Device</b> </td><td><a class="el" href="using_ARM_pg.html">Arm reference implementations</a> of Cortex-M devices </td></tr>
-<tr>
-<td><b>Device\_Template_Vendor</b> </td><td><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a> for extension by silicon vendors </td></tr>
-</table>
-<hr/>
-<h1><a class="anchor" id="ref_v6-v8M"></a>
-Processor Support</h1>
-<p>CMSIS supports the complete range of <a href="https://developer.arm.com/products/processors/cortex-m" target="_blank"><b>Cortex-M processors</b></a> and the <a href="https://developer.arm.com/architectures/cpu-architecture/m-profile" target="_blank"><b>Armv8-M/v8.1-M architecture</b></a> including security extensions.</p>
-<h2><a class="anchor" id="ref_man_sec"></a>
-Cortex-M Generic User Guides</h2>
-<p>The Cortex-M Device Generic User Guides contain the programmers model and detailed information about the core peripherals and are available for:</p>
-<ul>
-<li><a href="https://developer.arm.com/documentation/dui0497a/latest/" target="_blank"><b>Cortex-M0 Devices Generic User Guide</b></a> (Armv6-M architecture)</li>
-<li><a href="https://developer.arm.com/documentation/dui0662/latest/" target="_blank"><b>Cortex-M0+ Devices Generic User Guide</b></a> (Armv6-M architecture)</li>
-<li><a href="https://developer.arm.com/documentation/dui0552/latest/" target="_blank"><b>Cortex-M3 Devices Generic User Guide</b></a> (Armv7-M architecture)</li>
-<li><a href="https://developer.arm.com/documentation/dui0553/latest/" target="_blank"><b>Cortex-M4 Devices Generic User Guide</b></a> (Armv7-M architecture)</li>
-<li><a href="https://developer.arm.com/documentation/dui0646/latest/" target="_blank"><b>Cortex-M7 Devices Generic User Guide</b></a> (Armv7-M architecture)</li>
-<li><a href="https://developer.arm.com/documentation/dui1095/latest/" target="_blank"><b>Cortex-M23 Devices Generic User Guide</b></a> (Armv8-M architecture)</li>
-<li><a href="https://developer.arm.com/documentation/100235/latest/" target="_blank"><b>Cortex-M33 Devices Generic User Guide</b></a> (Armv8-M architecture)</li>
-<li><a href="https://developer.arm.com/documentation/101273/latest/" target="_blank"><b>Cortex-M55 Devices Generic User Guide</b></a> (Armv8.1-M architecture)</li>
-<li><a href="https://developer.arm.com/documentation/101928/latest" target="_blank"><b>Cortex-M85 Devices Generic User Guide</b></a> (Armv8.1-M architecture)</li>
-</ul>
-<p>CMSIS also supports the following Cortex-M processor variants:</p>
-<ul>
-<li><a href="https://developer.arm.com/products/processors/cortex-m/cortex-m1" target="_blank"><b>Cortex-M1</b></a> is a processor designed specifically for implementation in FPGAs (Armv6-M architecture).</li>
-<li><a href="https://developer.arm.com/products/processors/cortex-m/sc000-processor" target="_blank"><b>SecurCore SC000</b></a> is designed specifically for smartcard and security applications (Armv6-M architecture).</li>
-<li><a href="https://developer.arm.com/products/processors/cortex-m/sc300-processor" target="_blank"><b>SecurCore SC300</b></a> is designed specifically for smartcard and security applications (Armv7-M architecture).</li>
-<li><a href="https://developer.arm.com/products/processors/cortex-m/cortex-m35p" target="_blank"><b>Cortex-M35P</b></a> is a temper resistant Cortex-M processor with optional software isolation using TrustZone for Armv8-M.</li>
-<li><a href="https://www.armchina.com/mountain?infoId=160" target="_blank"><b>STAR-MC1</b></a> is a variant of Armv8-M with TrustZone designed by Arm China.</li>
-</ul>
-<h2><a class="anchor" id="ARMv8M"></a>
-Armv8-M and Armv8.1-M Architecture</h2>
-<p>Armv8-M introduces two profiles <b>baseline</b> (for power and area constrained applications) and <b>mainline</b> (full-featured with optional SIMD, floating-point, and co-processor extensions). Both Armv8-M profiles and Armv8.1-M are supported by CMSIS.</p>
-<p>The Armv8-M architecture is described in the <a href="https://developer.arm.com/documentation/ddi0553/latest/" target="_blank"><b>Armv8-M Architecture Reference Manual</b></a>.</p>
-<p>The Armv8.1-M architecture further extends Armv8-M with Helium (the so called M-Profile Vector Extension (MVE)), as well as further instruction set and debug extensions. More information about Armv8.1-M architecture is available under <a href="https://developer.arm.com/technologies/helium" target="_blank"><b>Arm Helium technology</b></a>.</p>
-<hr/>
-<h1><a class="anchor" id="tested_tools_sec"></a>
-Tested and Verified Toolchains</h1>
-<p>The <a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a> supplied by Arm have been tested and verified with the following toolchains:</p>
-<ul>
-<li>Arm: Arm Compiler 5.06 update 7 (not for Cortex-M23/33/35P/55/85, Armv8-M, Armv8.1-M)</li>
-<li>Arm: Arm Compiler 6.16</li>
-<li>Arm: Arm Compiler 6.6.4 (not for Cortex-M0/23/33/35P/55/85, Armv8-M, Armv8.1-M)</li>
-<li>GNU: GNU Arm Embedded Toolchain 10-2020-q4-major (10.2.1 20201103)</li>
-<li>IAR: IAR ANSI C/C++ Compiler for Arm 8.20.1.14183 </li>
-</ul>
-</div></div><!-- contents -->
-</div><!-- doc-content -->
-<!-- start footer part -->
-<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
-  <ul>
-    <li class="footer">
-      <script type="text/javascript">
-        <!--
-        writeFooter.call(this);
-        //-->
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-    </li>
-  </ul>
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- * http://jquery.org/license
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- * Includes Sizzle.js
- * http://sizzlejs.com/
- * Copyright 2011, The Dojo Foundation
- * Released under the MIT, BSD, and GPL Licenses.
- *
- * Date: Mon Nov 21 21:11:03 2011 -0500
- */
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-/*!
- * jQuery UI 1.8.18
- *
- * Copyright 2011, AUTHORS.txt (http://jqueryui.com/about)
- * Dual licensed under the MIT or GPL Version 2 licenses.
- * http://jquery.org/license
- *
- * http://docs.jquery.com/UI
- */
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- * jQuery UI Widget 1.8.18
- *
- * Copyright 2011, AUTHORS.txt (http://jqueryui.com/about)
- * Dual licensed under the MIT or GPL Version 2 licenses.
- * http://jquery.org/license
- *
- * http://docs.jquery.com/UI/Widget
- */
-(function(b,d){if(b.cleanData){var c=b.cleanData;b.cleanData=function(f){for(var g=0,h;(h=f[g])!=null;g++){try{b(h).triggerHandler("remove")}catch(j){}}c(f)}}else{var a=b.fn.remove;b.fn.remove=function(e,f){return this.each(function(){if(!f){if(!e||b.filter(e,[this]).length){b("*",this).add([this]).each(function(){try{b(this).triggerHandler("remove")}catch(g){}})}}return a.call(b(this),e,f)})}}b.widget=function(f,h,e){var g=f.split(".")[0],j;f=f.split(".")[1];j=g+"-"+f;if(!e){e=h;h=b.Widget}b.expr[":"][j]=function(k){return !!b.data(k,f)};b[g]=b[g]||{};b[g][f]=function(k,l){if(arguments.length){this._createWidget(k,l)}};var i=new h();i.options=b.extend(true,{},i.options);b[g][f].prototype=b.extend(true,i,{namespace:g,widgetName:f,widgetEventPrefix:b[g][f].prototype.widgetEventPrefix||f,widgetBaseClass:j},e);b.widget.bridge(f,b[g][f])};b.widget.bridge=function(f,e){b.fn[f]=function(i){var g=typeof i==="string",h=Array.prototype.slice.call(arguments,1),j=this;i=!g&&h.length?b.extend.apply(null,[true,i].concat(h)):i;if(g&&i.charAt(0)==="_"){return j}if(g){this.each(function(){var k=b.data(this,f),l=k&&b.isFunction(k[i])?k[i].apply(k,h):k;if(l!==k&&l!==d){j=l;return false}})}else{this.each(function(){var k=b.data(this,f);if(k){k.option(i||{})._init()}else{b.data(this,f,new e(i,this))}})}return j}};b.Widget=function(e,f){if(arguments.length){this._createWidget(e,f)}};b.Widget.prototype={widgetName:"widget",widgetEventPrefix:"",options:{disabled:false},_createWidget:function(f,g){b.data(g,this.widgetName,this);this.element=b(g);this.options=b.extend(true,{},this.options,this._getCreateOptions(),f);var e=this;this.element.bind("remove."+this.widgetName,function(){e.destroy()});this._create();this._trigger("create");this._init()},_getCreateOptions:function(){return b.metadata&&b.metadata.get(this.element[0])[this.widgetName]},_create:function(){},_init:function(){},destroy:function(){this.element.unbind("."+this.widgetName).removeData(this.widgetName);this.widget().unbind("."+this.widgetName).removeAttr("aria-disabled").removeClass(this.widgetBaseClass+"-disabled ui-state-disabled")},widget:function(){return this.element},option:function(f,g){var e=f;if(arguments.length===0){return b.extend({},this.options)}if(typeof f==="string"){if(g===d){return this.options[f]}e={};e[f]=g}this._setOptions(e);return this},_setOptions:function(f){var e=this;b.each(f,function(g,h){e._setOption(g,h)});return this},_setOption:function(e,f){this.options[e]=f;if(e==="disabled"){this.widget()[f?"addClass":"removeClass"](this.widgetBaseClass+"-disabled ui-state-disabled").attr("aria-disabled",f)}return this},enable:function(){return this._setOption("disabled",false)},disable:function(){return this._setOption("disabled",true)},_trigger:function(e,f,g){var j,i,h=this.options[e];g=g||{};f=b.Event(f);f.type=(e===this.widgetEventPrefix?e:this.widgetEventPrefix+e).toLowerCase();f.target=this.element[0];i=f.originalEvent;if(i){for(j in i){if(!(j in f)){f[j]=i[j]}}}this.element.trigger(f,g);return !(b.isFunction(h)&&h.call(this.element[0],f,g)===false||f.isDefaultPrevented())}}})(jQuery);/*!
- * jQuery UI Mouse 1.8.18
- *
- * Copyright 2011, AUTHORS.txt (http://jqueryui.com/about)
- * Dual licensed under the MIT or GPL Version 2 licenses.
- * http://jquery.org/license
- *
- * http://docs.jquery.com/UI/Mouse
- *
- * Depends:
- *	jquery.ui.widget.js
- */
-(function(b,c){var a=false;b(document).mouseup(function(d){a=false});b.widget("ui.mouse",{options:{cancel:":input,option",distance:1,delay:0},_mouseInit:function(){var d=this;this.element.bind("mousedown."+this.widgetName,function(e){return d._mouseDown(e)}).bind("click."+this.widgetName,function(e){if(true===b.data(e.target,d.widgetName+".preventClickEvent")){b.removeData(e.target,d.widgetName+".preventClickEvent");e.stopImmediatePropagation();return false}});this.started=false},_mouseDestroy:function(){this.element.unbind("."+this.widgetName)},_mouseDown:function(f){if(a){return}(this._mouseStarted&&this._mouseUp(f));this._mouseDownEvent=f;var e=this,g=(f.which==1),d=(typeof this.options.cancel=="string"&&f.target.nodeName?b(f.target).closest(this.options.cancel).length:false);if(!g||d||!this._mouseCapture(f)){return true}this.mouseDelayMet=!this.options.delay;if(!this.mouseDelayMet){this._mouseDelayTimer=setTimeout(function(){e.mouseDelayMet=true},this.options.delay)}if(this._mouseDistanceMet(f)&&this._mouseDelayMet(f)){this._mouseStarted=(this._mouseStart(f)!==false);if(!this._mouseStarted){f.preventDefault();return true}}if(true===b.data(f.target,this.widgetName+".preventClickEvent")){b.removeData(f.target,this.widgetName+".preventClickEvent")}this._mouseMoveDelegate=function(h){return e._mouseMove(h)};this._mouseUpDelegate=function(h){return e._mouseUp(h)};b(document).bind("mousemove."+this.widgetName,this._mouseMoveDelegate).bind("mouseup."+this.widgetName,this._mouseUpDelegate);f.preventDefault();a=true;return true},_mouseMove:function(d){if(b.browser.msie&&!(document.documentMode>=9)&&!d.button){return this._mouseUp(d)}if(this._mouseStarted){this._mouseDrag(d);return d.preventDefault()}if(this._mouseDistanceMet(d)&&this._mouseDelayMet(d)){this._mouseStarted=(this._mouseStart(this._mouseDownEvent,d)!==false);(this._mouseStarted?this._mouseDrag(d):this._mouseUp(d))}return !this._mouseStarted},_mouseUp:function(d){b(document).unbind("mousemove."+this.widgetName,this._mouseMoveDelegate).unbind("mouseup."+this.widgetName,this._mouseUpDelegate);if(this._mouseStarted){this._mouseStarted=false;if(d.target==this._mouseDownEvent.target){b.data(d.target,this.widgetName+".preventClickEvent",true)}this._mouseStop(d)}return false},_mouseDistanceMet:function(d){return(Math.max(Math.abs(this._mouseDownEvent.pageX-d.pageX),Math.abs(this._mouseDownEvent.pageY-d.pageY))>=this.options.distance)},_mouseDelayMet:function(d){return this.mouseDelayMet},_mouseStart:function(d){},_mouseDrag:function(d){},_mouseStop:function(d){},_mouseCapture:function(d){return true}})})(jQuery);(function(c,d){c.widget("ui.resizable",c.ui.mouse,{widgetEventPrefix:"resize",options:{alsoResize:false,animate:false,animateDuration:"slow",animateEasing:"swing",aspectRatio:false,autoHide:false,containment:false,ghost:false,grid:false,handles:"e,s,se",helper:false,maxHeight:null,maxWidth:null,minHeight:10,minWidth:10,zIndex:1000},_create:function(){var f=this,k=this.options;this.element.addClass("ui-resizable");c.extend(this,{_aspectRatio:!!(k.aspectRatio),aspectRatio:k.aspectRatio,originalElement:this.element,_proportionallyResizeElements:[],_helper:k.helper||k.ghost||k.animate?k.helper||"ui-resizable-helper":null});if(this.element[0].nodeName.match(/canvas|textarea|input|select|button|img/i)){this.element.wrap(c('<div class="ui-wrapper" style="overflow: hidden;"></div>').css({position:this.element.css("position"),width:this.element.outerWidth(),height:this.element.outerHeight(),top:this.element.css("top"),left:this.element.css("left")}));this.element=this.element.parent().data("resizable",this.element.data("resizable"));this.elementIsWrapper=true;this.element.css({marginLeft:this.originalElement.css("marginLeft"),marginTop:this.originalElement.css("marginTop"),marginRight:this.originalElement.css("marginRight"),marginBottom:this.originalElement.css("marginBottom")});this.originalElement.css({marginLeft:0,marginTop:0,marginRight:0,marginBottom:0});this.originalResizeStyle=this.originalElement.css("resize");this.originalElement.css("resize","none");this._proportionallyResizeElements.push(this.originalElement.css({position:"static",zoom:1,display:"block"}));this.originalElement.css({margin:this.originalElement.css("margin")});this._proportionallyResize()}this.handles=k.handles||(!c(".ui-resizable-handle",this.element).length?"e,s,se":{n:".ui-resizable-n",e:".ui-resizable-e",s:".ui-resizable-s",w:".ui-resizable-w",se:".ui-resizable-se",sw:".ui-resizable-sw",ne:".ui-resizable-ne",nw:".ui-resizable-nw"});if(this.handles.constructor==String){if(this.handles=="all"){this.handles="n,e,s,w,se,sw,ne,nw"}var l=this.handles.split(",");this.handles={};for(var g=0;g<l.length;g++){var j=c.trim(l[g]),e="ui-resizable-"+j;var h=c('<div class="ui-resizable-handle '+e+'"></div>');if(/sw|se|ne|nw/.test(j)){h.css({zIndex:++k.zIndex})}if("se"==j){h.addClass("ui-icon ui-icon-gripsmall-diagonal-se")}this.handles[j]=".ui-resizable-"+j;this.element.append(h)}}this._renderAxis=function(q){q=q||this.element;for(var n in this.handles){if(this.handles[n].constructor==String){this.handles[n]=c(this.handles[n],this.element).show()}if(this.elementIsWrapper&&this.originalElement[0].nodeName.match(/textarea|input|select|button/i)){var o=c(this.handles[n],this.element),p=0;p=/sw|ne|nw|se|n|s/.test(n)?o.outerHeight():o.outerWidth();var m=["padding",/ne|nw|n/.test(n)?"Top":/se|sw|s/.test(n)?"Bottom":/^e$/.test(n)?"Right":"Left"].join("");q.css(m,p);this._proportionallyResize()}if(!c(this.handles[n]).length){continue}}};this._renderAxis(this.element);this._handles=c(".ui-resizable-handle",this.element).disableSelection();this._handles.mouseover(function(){if(!f.resizing){if(this.className){var i=this.className.match(/ui-resizable-(se|sw|ne|nw|n|e|s|w)/i)}f.axis=i&&i[1]?i[1]:"se"}});if(k.autoHide){this._handles.hide();c(this.element).addClass("ui-resizable-autohide").hover(function(){if(k.disabled){return}c(this).removeClass("ui-resizable-autohide");f._handles.show()},function(){if(k.disabled){return}if(!f.resizing){c(this).addClass("ui-resizable-autohide");f._handles.hide()}})}this._mouseInit()},destroy:function(){this._mouseDestroy();var e=function(g){c(g).removeClass("ui-resizable ui-resizable-disabled ui-resizable-resizing").removeData("resizable").unbind(".resizable").find(".ui-resizable-handle").remove()};if(this.elementIsWrapper){e(this.element);var f=this.element;f.after(this.originalElement.css({position:f.css("position"),width:f.outerWidth(),height:f.outerHeight(),top:f.css("top"),left:f.css("left")})).remove()}this.originalElement.css("resize",this.originalResizeStyle);e(this.originalElement);return this},_mouseCapture:function(f){var g=false;for(var e in this.handles){if(c(this.handles[e])[0]==f.target){g=true}}return !this.options.disabled&&g},_mouseStart:function(g){var j=this.options,f=this.element.position(),e=this.element;this.resizing=true;this.documentScroll={top:c(document).scrollTop(),left:c(document).scrollLeft()};if(e.is(".ui-draggable")||(/absolute/).test(e.css("position"))){e.css({position:"absolute",top:f.top,left:f.left})}this._renderProxy();var k=b(this.helper.css("left")),h=b(this.helper.css("top"));if(j.containment){k+=c(j.containment).scrollLeft()||0;h+=c(j.containment).scrollTop()||0}this.offset=this.helper.offset();this.position={left:k,top:h};this.size=this._helper?{width:e.outerWidth(),height:e.outerHeight()}:{width:e.width(),height:e.height()};this.originalSize=this._helper?{width:e.outerWidth(),height:e.outerHeight()}:{width:e.width(),height:e.height()};this.originalPosition={left:k,top:h};this.sizeDiff={width:e.outerWidth()-e.width(),height:e.outerHeight()-e.height()};this.originalMousePosition={left:g.pageX,top:g.pageY};this.aspectRatio=(typeof j.aspectRatio=="number")?j.aspectRatio:((this.originalSize.width/this.originalSize.height)||1);var i=c(".ui-resizable-"+this.axis).css("cursor");c("body").css("cursor",i=="auto"?this.axis+"-resize":i);e.addClass("ui-resizable-resizing");this._propagate("start",g);return true},_mouseDrag:function(e){var h=this.helper,g=this.options,m={},q=this,j=this.originalMousePosition,n=this.axis;var r=(e.pageX-j.left)||0,p=(e.pageY-j.top)||0;var i=this._change[n];if(!i){return false}var l=i.apply(this,[e,r,p]),k=c.browser.msie&&c.browser.version<7,f=this.sizeDiff;this._updateVirtualBoundaries(e.shiftKey);if(this._aspectRatio||e.shiftKey){l=this._updateRatio(l,e)}l=this._respectSize(l,e);this._propagate("resize",e);h.css({top:this.position.top+"px",left:this.position.left+"px",width:this.size.width+"px",height:this.size.height+"px"});if(!this._helper&&this._proportionallyResizeElements.length){this._proportionallyResize()}this._updateCache(l);this._trigger("resize",e,this.ui());return false},_mouseStop:function(h){this.resizing=false;var i=this.options,m=this;if(this._helper){var g=this._proportionallyResizeElements,e=g.length&&(/textarea/i).test(g[0].nodeName),f=e&&c.ui.hasScroll(g[0],"left")?0:m.sizeDiff.height,k=e?0:m.sizeDiff.width;var n={width:(m.helper.width()-k),height:(m.helper.height()-f)},j=(parseInt(m.element.css("left"),10)+(m.position.left-m.originalPosition.left))||null,l=(parseInt(m.element.css("top"),10)+(m.position.top-m.originalPosition.top))||null;if(!i.animate){this.element.css(c.extend(n,{top:l,left:j}))}m.helper.height(m.size.height);m.helper.width(m.size.width);if(this._helper&&!i.animate){this._proportionallyResize()}}c("body").css("cursor","auto");this.element.removeClass("ui-resizable-resizing");this._propagate("stop",h);if(this._helper){this.helper.remove()}return false},_updateVirtualBoundaries:function(g){var j=this.options,i,h,f,k,e;e={minWidth:a(j.minWidth)?j.minWidth:0,maxWidth:a(j.maxWidth)?j.maxWidth:Infinity,minHeight:a(j.minHeight)?j.minHeight:0,maxHeight:a(j.maxHeight)?j.maxHeight:Infinity};if(this._aspectRatio||g){i=e.minHeight*this.aspectRatio;f=e.minWidth/this.aspectRatio;h=e.maxHeight*this.aspectRatio;k=e.maxWidth/this.aspectRatio;if(i>e.minWidth){e.minWidth=i}if(f>e.minHeight){e.minHeight=f}if(h<e.maxWidth){e.maxWidth=h}if(k<e.maxHeight){e.maxHeight=k}}this._vBoundaries=e},_updateCache:function(e){var f=this.options;this.offset=this.helper.offset();if(a(e.left)){this.position.left=e.left}if(a(e.top)){this.position.top=e.top}if(a(e.height)){this.size.height=e.height}if(a(e.width)){this.size.width=e.width}},_updateRatio:function(h,g){var i=this.options,j=this.position,f=this.size,e=this.axis;if(a(h.height)){h.width=(h.height*this.aspectRatio)}else{if(a(h.width)){h.height=(h.width/this.aspectRatio)}}if(e=="sw"){h.left=j.left+(f.width-h.width);h.top=null}if(e=="nw"){h.top=j.top+(f.height-h.height);h.left=j.left+(f.width-h.width)}return h},_respectSize:function(l,g){var j=this.helper,i=this._vBoundaries,r=this._aspectRatio||g.shiftKey,q=this.axis,t=a(l.width)&&i.maxWidth&&(i.maxWidth<l.width),m=a(l.height)&&i.maxHeight&&(i.maxHeight<l.height),h=a(l.width)&&i.minWidth&&(i.minWidth>l.width),s=a(l.height)&&i.minHeight&&(i.minHeight>l.height);if(h){l.width=i.minWidth}if(s){l.height=i.minHeight}if(t){l.width=i.maxWidth}if(m){l.height=i.maxHeight}var f=this.originalPosition.left+this.originalSize.width,p=this.position.top+this.size.height;var k=/sw|nw|w/.test(q),e=/nw|ne|n/.test(q);if(h&&k){l.left=f-i.minWidth}if(t&&k){l.left=f-i.maxWidth}if(s&&e){l.top=p-i.minHeight}if(m&&e){l.top=p-i.maxHeight}var n=!l.width&&!l.height;if(n&&!l.left&&l.top){l.top=null}else{if(n&&!l.top&&l.left){l.left=null}}return l},_proportionallyResize:function(){var k=this.options;if(!this._proportionallyResizeElements.length){return}var g=this.helper||this.element;for(var f=0;f<this._proportionallyResizeElements.length;f++){var h=this._proportionallyResizeElements[f];if(!this.borderDif){var e=[h.css("borderTopWidth"),h.css("borderRightWidth"),h.css("borderBottomWidth"),h.css("borderLeftWidth")],j=[h.css("paddingTop"),h.css("paddingRight"),h.css("paddingBottom"),h.css("paddingLeft")];this.borderDif=c.map(e,function(l,n){var m=parseInt(l,10)||0,o=parseInt(j[n],10)||0;return m+o})}if(c.browser.msie&&!(!(c(g).is(":hidden")||c(g).parents(":hidden").length))){continue}h.css({height:(g.height()-this.borderDif[0]-this.borderDif[2])||0,width:(g.width()-this.borderDif[1]-this.borderDif[3])||0})}},_renderProxy:function(){var f=this.element,i=this.options;this.elementOffset=f.offset();if(this._helper){this.helper=this.helper||c('<div style="overflow:hidden;"></div>');var e=c.browser.msie&&c.browser.version<7,g=(e?1:0),h=(e?2:-1);this.helper.addClass(this._helper).css({width:this.element.outerWidth()+h,height:this.element.outerHeight()+h,position:"absolute",left:this.elementOffset.left-g+"px",top:this.elementOffset.top-g+"px",zIndex:++i.zIndex});this.helper.appendTo("body").disableSelection()}else{this.helper=this.element}},_change:{e:function(g,f,e){return{width:this.originalSize.width+f}},w:function(h,f,e){var j=this.options,g=this.originalSize,i=this.originalPosition;return{left:i.left+f,width:g.width-f}},n:function(h,f,e){var j=this.options,g=this.originalSize,i=this.originalPosition;return{top:i.top+e,height:g.height-e}},s:function(g,f,e){return{height:this.originalSize.height+e}},se:function(g,f,e){return c.extend(this._change.s.apply(this,arguments),this._change.e.apply(this,[g,f,e]))},sw:function(g,f,e){return c.extend(this._change.s.apply(this,arguments),this._change.w.apply(this,[g,f,e]))},ne:function(g,f,e){return c.extend(this._change.n.apply(this,arguments),this._change.e.apply(this,[g,f,e]))},nw:function(g,f,e){return c.extend(this._change.n.apply(this,arguments),this._change.w.apply(this,[g,f,e]))}},_propagate:function(f,e){c.ui.plugin.call(this,f,[e,this.ui()]);(f!="resize"&&this._trigger(f,e,this.ui()))},plugins:{},ui:function(){return{originalElement:this.originalElement,element:this.element,helper:this.helper,position:this.position,size:this.size,originalSize:this.originalSize,originalPosition:this.originalPosition}}});c.extend(c.ui.resizable,{version:"1.8.18"});c.ui.plugin.add("resizable","alsoResize",{start:function(f,g){var e=c(this).data("resizable"),i=e.options;var h=function(j){c(j).each(function(){var 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diff --git a/Documentation/Core/html/linker_sct_pg.html b/Documentation/Core/html/linker_sct_pg.html
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-<head>
-<meta http-equiv="Content-Type" content="text/xhtml;charset=UTF-8"/>
-<meta http-equiv="X-UA-Compatible" content="IE=9"/>
-<title>Scatter-Loading description file \&lt;device\&gt;_ac&lt;5|6&gt;.sct</title>
-<title>CMSIS-Core (Cortex-M): Scatter-Loading description file \&lt;device\&gt;_ac&lt;5|6&gt;.sct</title>
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-  <td style="padding-left: 0.5em;">
-   <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.6.0</span>
-   </div>
-   <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
-  </td>
- </tr>
- </tbody>
-</table>
-</div>
-<!-- end header part -->
-<div id="CMSISnav" class="tabs1">
-    <ul class="tablist">
-      <script type="text/javascript">
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-      <li><a href="index.html"><span>Main&#160;Page</span></a></li>
-      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
-      <li><a href="modules.html"><span>Reference</span></a></li>
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-<a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(0)"><span class="SelectionMark">&#160;</span>All</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(1)"><span class="SelectionMark">&#160;</span>Data Structures</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(2)"><span class="SelectionMark">&#160;</span>Files</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(3)"><span class="SelectionMark">&#160;</span>Functions</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(4)"><span class="SelectionMark">&#160;</span>Variables</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(5)"><span class="SelectionMark">&#160;</span>Enumerations</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(6)"><span class="SelectionMark">&#160;</span>Enumerator</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(7)"><span class="SelectionMark">&#160;</span>Groups</a><a class="SelectItem" href="javascript:void(0)" onclick="searchBox.OnSelectItem(8)"><span class="SelectionMark">&#160;</span>Pages</a></div>
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-<div class="title">Scatter-Loading description file &lt;device&gt;_ac&lt;5|6&gt;.sct </div>  </div>
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-<div class="contents">
-<div class="textblock"><p>A scatter file for linking is required when using a <a class="el" href="startup_c_pg.html">C startup file</a>.</p>
-<p>The <a class="el" href="linker_sct_pg.html">Scatter-Loading description file &lt;device&gt;_ac&lt;5|6&gt;.sct</a> contains regions for:</p>
-<ul>
-<li>Code (read-only data, execute-only data)</li>
-<li>RAM (read/write data, zero-initialized data)</li>
-<li>Stack</li>
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-<li>Stack seal (Armv8-M/v8.1-M)</li>
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-<p>Within the scatter file, the user needs to specify a set of macros. The scatter file is passed through the C preprocessor which uses these macros to calculate the start address and the size of the different regions.</p>
-<div class="fragment"><div class="line"><span class="comment">/*--------------------- Flash Configuration ----------------------------------</span></div>
-<div class="line"><span class="comment">; &lt;h&gt; Flash Configuration</span></div>
-<div class="line"><span class="comment">;   &lt;o0&gt; Flash Base Address &lt;0x0-0xFFFFFFFF:8&gt;</span></div>
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-<div class="line"><span class="comment"> *----------------------------------------------------------------------------*/</span></div>
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-<div class="line"><span class="comment"> *----------------------------------------------------------------------------*/</span></div>
-<div class="line"><span class="preprocessor">#define __STACK_SIZE    0x00000200</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define __HEAP_SIZE     0x00000C00</span></div>
-<div class="line"><span class="preprocessor"></span></div>
-<div class="line"><span class="comment">/*--------------------- CMSE Veneer Configuration ---------------------------</span></div>
-<div class="line"><span class="comment">; &lt;h&gt; CMSE Veneer Configuration</span></div>
-<div class="line"><span class="comment">;   &lt;o0&gt;  CMSE Veneer Size (in Bytes) &lt;0x0-0xFFFFFFFF:32&gt;</span></div>
-<div class="line"><span class="comment">; &lt;/h&gt;</span></div>
-<div class="line"><span class="comment"> *----------------------------------------------------------------------------*/</span></div>
-<div class="line"><span class="preprocessor">#define __CMSEVENEER_SIZE    0x200</span></div>
-</div><!-- fragment --><dl class="section note"><dt>Note</dt><dd>The stack is placed at the end of the available RAM and is growing downwards whereas the Heap is placed after the application data and growing upwards.</dd></dl>
-<h1><a class="anchor" id="linker_sct_preproc_sec"></a>
-Preprocessor command</h1>
-<p>The scatter file uses different preprocessor commands for Arm Compiler V6 and Arm Compiler V5</p>
-<ul>
-<li><b>AC6:</b> #! armclang -E &ndash;target=arm-arm-none-eabi -mcpu=&lt;mcpu&gt; -xc</li>
-<li><b>AC5:</b> #! armcc -E </li>
-</ul>
-</div></div><!-- contents -->
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-<!-- start footer part -->
-<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
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diff --git a/Documentation/Core/html/modules.html b/Documentation/Core/html/modules.html
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-    [ "Revision History of CMSIS-Core (Cortex-M)", "core_revisionHistory.html", null ],
-    [ "Using CMSIS in Embedded Applications", "using_pg.html", "using_pg" ],
-    [ "Using TrustZone for Armv8-M", "using_TrustZone_pg.html", [
-      [ "Simplified Use Case with TrustZone", "using_TrustZone_pg.html#useCase_TrustZone", [
-        [ "Program Examples", "using_TrustZone_pg.html#Example_TrustZone", null ]
-      ] ],
-      [ "Programmers Model with TrustZone", "using_TrustZone_pg.html#Model_TrustZone", [
-        [ "Stack Sealing", "using_TrustZone_pg.html#RTOS_TrustZone_stacksealing", null ]
-      ] ],
-      [ "CMSIS Files for TrustZone", "using_TrustZone_pg.html#CMSIS_Files_TrustZone", [
-        [ "RTOS Thread Context Management", "using_TrustZone_pg.html#RTOS_TrustZone", null ]
-      ] ]
-    ] ],
-    [ "CMSIS-Core Device Templates", "templates_pg.html", "templates_pg" ],
-    [ "MISRA-C Deviations", "coreMISRA_Exceptions_pg.html", null ],
-    [ "Register Mapping", "regMap_pg.html", null ],
-    [ "Deprecated List", "deprecated.html", null ],
-    [ "Reference", "modules.html", "modules" ],
-    [ "Data Structures", "annotated.html", "annotated" ],
-    [ "Data Fields", "functions.html", [
-      [ "All", "functions.html", null ],
-      [ "Variables", "functions_vars.html", null ]
-    ] ]
-  ] ]
-];
-
-var NAVTREEINDEX =
-[
-"annotated.html",
-"group__intrinsic__SIMD__gr.html#ga980353d2c72ebb879282e49f592fddc0",
-"group__pmu8__events__armv81.html#gac714f988ae45871b2865f82c11383b36",
-"structTPI__Type.html"
-];
-
-var SYNCONMSG = 'click to disable panel synchronisation';
-var SYNCOFFMSG = 'click to enable panel synchronisation';
-var SYNCONMSG = 'click to disable panel synchronisation';
-var SYNCOFFMSG = 'click to enable panel synchronisation';
-var navTreeSubIndices = new Array();
-
-function getData(varName)
-{
-  var i = varName.lastIndexOf('/');
-  var n = i>=0 ? varName.substring(i+1) : varName;
-  return eval(n.replace(/\-/g,'_'));
-}
-
-function stripPath(uri)
-{
-  return uri.substring(uri.lastIndexOf('/')+1);
-}
-
-function stripPath2(uri)
-{
-  var i = uri.lastIndexOf('/');
-  var s = uri.substring(i+1);
-  var m = uri.substring(0,i+1).match(/\/d\w\/d\w\w\/$/);
-  return m ? uri.substring(i-6) : s;
-}
-
-function localStorageSupported()
-{
-  try {
-    return 'localStorage' in window && window['localStorage'] !== null && window.localStorage.getItem;
-  }
-  catch(e) {
-    return false;
-  }
-}
-
-
-function storeLink(link)
-{
-  if (!$("#nav-sync").hasClass('sync') && localStorageSupported()) {
-      window.localStorage.setItem('navpath',link);
-  }
-}
-
-function deleteLink()
-{
-  if (localStorageSupported()) {
-    window.localStorage.setItem('navpath','');
-  } 
-}
-
-function cachedLink()
-{
-  if (localStorageSupported()) {
-    return window.localStorage.getItem('navpath');
-  } else {
-    return '';
-  }
-}
-
-function getScript(scriptName,func,show)
-{
-  var head = document.getElementsByTagName("head")[0]; 
-  var script = document.createElement('script');
-  script.id = scriptName;
-  script.type = 'text/javascript';
-  script.onload = func; 
-  script.src = scriptName+'.js'; 
-  if ($.browser.msie && $.browser.version<=8) { 
-    // script.onload does not work with older versions of IE
-    script.onreadystatechange = function() {
-      if (script.readyState=='complete' || script.readyState=='loaded') { 
-        func(); if (show) showRoot(); 
-      }
-    }
-  }
-  head.appendChild(script); 
-}
-
-function createIndent(o,domNode,node,level)
-{
-  var level=-1;
-  var n = node;
-  while (n.parentNode) { level++; n=n.parentNode; }
-  if (node.childrenData) {
-    var imgNode = document.createElement("img");
-    imgNode.style.paddingLeft=(16*level).toString()+'px';
-    imgNode.width  = 16;
-    imgNode.height = 22;
-    imgNode.border = 0;
-    node.plus_img = imgNode;
-    node.expandToggle = document.createElement("a");
-    node.expandToggle.href = "javascript:void(0)";
-    node.expandToggle.onclick = function() {
-      if (node.expanded) {
-        $(node.getChildrenUL()).slideUp("fast");
-        node.plus_img.src = node.relpath+"ftv2pnode.png";
-        node.expanded = false;
-      } else {
-        expandNode(o, node, false, false);
-      }
-    }
-    node.expandToggle.appendChild(imgNode);
-    domNode.appendChild(node.expandToggle);
-    imgNode.src = node.relpath+"ftv2pnode.png";
-  } else {
-    var span = document.createElement("span");
-    span.style.display = 'inline-block';
-    span.style.width   = 16*(level+1)+'px';
-    span.style.height  = '22px';
-    span.innerHTML = '&#160;';
-    domNode.appendChild(span);
-  } 
-}
-
-var animationInProgress = false;
-
-function gotoAnchor(anchor,aname,updateLocation)
-{
-  var pos, docContent = $('#doc-content');
-  if (anchor.parent().attr('class')=='memItemLeft' ||
-      anchor.parent().attr('class')=='fieldtype' ||
-      anchor.parent().is(':header')) 
-  {
-    pos = anchor.parent().position().top;
-  } else if (anchor.position()) {
-    pos = anchor.position().top;
-  }
-  if (pos) {
-    var dist = Math.abs(Math.min(
-               pos-docContent.offset().top,
-               docContent[0].scrollHeight-
-               docContent.height()-docContent.scrollTop()));
-    animationInProgress=true;
-    docContent.animate({
-      scrollTop: pos + docContent.scrollTop() - docContent.offset().top
-    },Math.max(50,Math.min(500,dist)),function(){
-      if (updateLocation) window.location.href=aname;
-      animationInProgress=false;
-    });
-  }
-}
-
-function newNode(o, po, text, link, childrenData, lastNode)
-{
-  var node = new Object();
-  node.children = Array();
-  node.childrenData = childrenData;
-  node.depth = po.depth + 1;
-  node.relpath = po.relpath;
-  node.isLast = lastNode;
-
-  node.li = document.createElement("li");
-  po.getChildrenUL().appendChild(node.li);
-  node.parentNode = po;
-
-  node.itemDiv = document.createElement("div");
-  node.itemDiv.className = "item";
-
-  node.labelSpan = document.createElement("span");
-  node.labelSpan.className = "label";
-
-  createIndent(o,node.itemDiv,node,0);
-  node.itemDiv.appendChild(node.labelSpan);
-  node.li.appendChild(node.itemDiv);
-
-  var a = document.createElement("a");
-  node.labelSpan.appendChild(a);
-  node.label = document.createTextNode(text);
-  node.expanded = false;
-  a.appendChild(node.label);
-  if (link) {
-    var url;
-    if (link.substring(0,1)=='^') {
-      url = link.substring(1);
-      link = url;
-    } else {
-      url = node.relpath+link;
-    }
-    a.className = stripPath(link.replace('#',':'));
-    if (link.indexOf('#')!=-1) {
-      var aname = '#'+link.split('#')[1];
-      var srcPage = stripPath($(location).attr('pathname'));
-      var targetPage = stripPath(link.split('#')[0]);
-      a.href = srcPage!=targetPage ? url : "javascript:void(0)"; 
-      a.onclick = function(){
-        storeLink(link);
-        if (!$(a).parent().parent().hasClass('selected'))
-        {
-          $('.item').removeClass('selected');
-          $('.item').removeAttr('id');
-          $(a).parent().parent().addClass('selected');
-          $(a).parent().parent().attr('id','selected');
-        }
-        var anchor = $(aname);
-        gotoAnchor(anchor,aname,true);
-      };
-    } else {
-      a.href = url;
-      a.onclick = function() { storeLink(link); }
-    }
-  } else {
-    if (childrenData != null) 
-    {
-      a.className = "nolink";
-      a.href = "javascript:void(0)";
-      a.onclick = node.expandToggle.onclick;
-    }
-  }
-
-  node.childrenUL = null;
-  node.getChildrenUL = function() {
-    if (!node.childrenUL) {
-      node.childrenUL = document.createElement("ul");
-      node.childrenUL.className = "children_ul";
-      node.childrenUL.style.display = "none";
-      node.li.appendChild(node.childrenUL);
-    }
-    return node.childrenUL;
-  };
-
-  return node;
-}
-
-function showRoot()
-{
-  var headerHeight = $("#top").height();
-  var footerHeight = $("#nav-path").height();
-  var windowHeight = $(window).height() - headerHeight - footerHeight;
-  (function (){ // retry until we can scroll to the selected item
-    try {
-      var navtree=$('#nav-tree');
-      navtree.scrollTo('#selected',0,{offset:-windowHeight/2});
-    } catch (err) {
-      setTimeout(arguments.callee, 0);
-    }
-  })();
-}
-
-function expandNode(o, node, imm, showRoot)
-{
-  if (node.childrenData && !node.expanded) {
-    if (typeof(node.childrenData)==='string') {
-      var varName    = node.childrenData;
-      getScript(node.relpath+varName,function(){
-        node.childrenData = getData(varName);
-        expandNode(o, node, imm, showRoot);
-      }, showRoot);
-    } else {
-      if (!node.childrenVisited) {
-        getNode(o, node);
-      } if (imm || ($.browser.msie && $.browser.version>8)) { 
-        // somehow slideDown jumps to the start of tree for IE9 :-(
-        $(node.getChildrenUL()).show();
-      } else {
-        $(node.getChildrenUL()).slideDown("fast");
-      }
-      if (node.isLast) {
-        node.plus_img.src = node.relpath+"ftv2mlastnode.png";
-      } else {
-        node.plus_img.src = node.relpath+"ftv2mnode.png";
-      }
-      node.expanded = true;
-    }
-  }
-}
-
-function glowEffect(n,duration)
-{
-  n.addClass('glow').delay(duration).queue(function(next){
-    $(this).removeClass('glow');next();
-  });
-}
-
-function highlightAnchor()
-{
-  var aname = $(location).attr('hash');
-  var anchor = $(aname);
-  if (anchor.parent().attr('class')=='memItemLeft'){
-    var rows = $('.memberdecls tr[class$="'+
-               window.location.hash.substring(1)+'"]');
-    glowEffect(rows.children(),300); // member without details
-  } else if (anchor.parents().slice(2).prop('tagName')=='TR') {
-    glowEffect(anchor.parents('div.memitem'),1000); // enum value
-  } else if (anchor.parent().attr('class')=='fieldtype'){
-    glowEffect(anchor.parent().parent(),1000); // struct field
-  } else if (anchor.parent().is(":header")) {
-    glowEffect(anchor.parent(),1000); // section header
-  } else {
-    glowEffect(anchor.next(),1000); // normal member
-  }
-  gotoAnchor(anchor,aname,false);
-}
-
-function selectAndHighlight(hash,n)
-{
-  var a;
-  if (hash) {
-    var link=stripPath($(location).attr('pathname'))+':'+hash.substring(1);
-    a=$('.item a[class$="'+link+'"]');
-  }
-  if (a && a.length) {
-    a.parent().parent().addClass('selected');
-    a.parent().parent().attr('id','selected');
-    highlightAnchor();
-  } else if (n) {
-    $(n.itemDiv).addClass('selected');
-    $(n.itemDiv).attr('id','selected');
-  }
-  if ($('#nav-tree-contents .item:first').hasClass('selected')) {
-    $('#nav-sync').css('top','30px');
-  } else {
-    $('#nav-sync').css('top','5px');
-  }
-  showRoot();
-}
-
-function showNode(o, node, index, hash)
-{
-  if (node && node.childrenData) {
-    if (typeof(node.childrenData)==='string') {
-      var varName    = node.childrenData;
-      getScript(node.relpath+varName,function(){
-        node.childrenData = getData(varName);
-        showNode(o,node,index,hash);
-      },true);
-    } else {
-      if (!node.childrenVisited) {
-        getNode(o, node);
-      }
-      $(node.getChildrenUL()).css({'display':'block'});
-      if (node.isLast) {
-        node.plus_img.src = node.relpath+"ftv2mlastnode.png";
-      } else {
-        node.plus_img.src = node.relpath+"ftv2mnode.png";
-      }
-      node.expanded = true;
-      var n = node.children[o.breadcrumbs[index]];
-      if (index+1<o.breadcrumbs.length) {
-        showNode(o,n,index+1,hash);
-      } else {
-        if (typeof(n.childrenData)==='string') {
-          var varName = n.childrenData;
-          getScript(n.relpath+varName,function(){
-            n.childrenData = getData(varName);
-            node.expanded=false;
-            showNode(o,node,index,hash); // retry with child node expanded
-          },true);
-        } else {
-          var rootBase = stripPath(o.toroot.replace(/\..+$/, ''));
-          if (rootBase=="index" || rootBase=="pages" || rootBase=="search") {
-            expandNode(o, n, true, true);
-          }
-          selectAndHighlight(hash,n);
-        }
-      }
-    }
-  } else {
-    selectAndHighlight(hash);
-  }
-}
-
-function removeToInsertLater(element) {
-  var parentNode = element.parentNode;
-  var nextSibling = element.nextSibling;
-  parentNode.removeChild(element);
-  return function() {
-    if (nextSibling) {
-      parentNode.insertBefore(element, nextSibling);
-    } else {
-      parentNode.appendChild(element);
-    }
-  };
-}
-
-function getNode(o, po)
-{
-  var insertFunction = removeToInsertLater(po.li);
-  po.childrenVisited = true;
-  var l = po.childrenData.length-1;
-  for (var i in po.childrenData) {
-    var nodeData = po.childrenData[i];
-    po.children[i] = newNode(o, po, nodeData[0], nodeData[1], nodeData[2],
-      i==l);
-  }
-  insertFunction();
-}
-
-function gotoNode(o,subIndex,root,hash,relpath)
-{
-  var nti = navTreeSubIndices[subIndex][root+hash];
-  o.breadcrumbs = $.extend(true, [], nti ? nti : navTreeSubIndices[subIndex][root]);
-  if (!o.breadcrumbs && root!=NAVTREE[0][1]) { // fallback: show index
-    navTo(o,NAVTREE[0][1],"",relpath);
-    $('.item').removeClass('selected');
-    $('.item').removeAttr('id');
-  }
-  if (o.breadcrumbs) {
-    o.breadcrumbs.unshift(0); // add 0 for root node
-    showNode(o, o.node, 0, hash);
-  }
-}
-
-function navTo(o,root,hash,relpath)
-{
-  var link = cachedLink();
-  if (link) {
-    var parts = link.split('#');
-    root = parts[0];
-    if (parts.length>1) hash = '#'+parts[1];
-    else hash='';
-  }
-  if (hash.match(/^#l\d+$/)) {
-    var anchor=$('a[name='+hash.substring(1)+']');
-    glowEffect(anchor.parent(),1000); // line number
-    hash=''; // strip line number anchors
-    //root=root.replace(/_source\./,'.'); // source link to doc link
-  }
-  var url=root+hash;
-  var i=-1;
-  while (NAVTREEINDEX[i+1]<=url) i++;
-  if (i==-1) { i=0; root=NAVTREE[0][1]; } // fallback: show index
-  if (navTreeSubIndices[i]) {
-    gotoNode(o,i,root,hash,relpath)
-  } else {
-    getScript(relpath+'navtreeindex'+i,function(){
-      navTreeSubIndices[i] = eval('NAVTREEINDEX'+i);
-      if (navTreeSubIndices[i]) {
-        gotoNode(o,i,root,hash,relpath);
-      }
-    },true);
-  }
-}
-
-function showSyncOff(n,relpath)
-{
-    n.html('<img src="'+relpath+'sync_off.png" title="'+SYNCOFFMSG+'"/>');
-}
-
-function showSyncOn(n,relpath)
-{
-    n.html('<img src="'+relpath+'sync_on.png" title="'+SYNCONMSG+'"/>');
-}
-
-function toggleSyncButton(relpath)
-{
-  var navSync = $('#nav-sync');
-  if (navSync.hasClass('sync')) {
-    navSync.removeClass('sync');
-    showSyncOff(navSync,relpath);
-    storeLink(stripPath2($(location).attr('pathname'))+$(location).attr('hash'));
-  } else {
-    navSync.addClass('sync');
-    showSyncOn(navSync,relpath);
-    deleteLink();
-  }
-}
-
-function initNavTree(toroot,relpath)
-{
-  var o = new Object();
-  o.toroot = toroot;
-  o.node = new Object();
-  o.node.li = document.getElementById("nav-tree-contents");
-  o.node.childrenData = NAVTREE;
-  o.node.children = new Array();
-  o.node.childrenUL = document.createElement("ul");
-  o.node.getChildrenUL = function() { return o.node.childrenUL; };
-  o.node.li.appendChild(o.node.childrenUL);
-  o.node.depth = 0;
-  o.node.relpath = relpath;
-  o.node.expanded = false;
-  o.node.isLast = true;
-  o.node.plus_img = document.createElement("img");
-  o.node.plus_img.src = relpath+"ftv2pnode.png";
-  o.node.plus_img.width = 16;
-  o.node.plus_img.height = 22;
-
-  if (localStorageSupported()) {
-    var navSync = $('#nav-sync');
-    if (cachedLink()) {
-      showSyncOff(navSync,relpath);
-      navSync.removeClass('sync');
-    } else {
-      showSyncOn(navSync,relpath);
-    }
-    navSync.click(function(){ toggleSyncButton(relpath); });
-  }
-
-  $(window).load(function(){
-    navTo(o,toroot,window.location.hash,relpath);
-    showRoot();
-  });
-
-  $(window).bind('hashchange', function(){
-     if (window.location.hash && window.location.hash.length>1){
-       var a;
-       if ($(location).attr('hash')){
-         var clslink=stripPath($(location).attr('pathname'))+':'+
-                               $(location).attr('hash').substring(1);
-         a=$('.item a[class$="'+clslink+'"]');
-       }
-       if (a==null || !$(a).parent().parent().hasClass('selected')){
-         $('.item').removeClass('selected');
-         $('.item').removeAttr('id');
-       }
-       var link=stripPath2($(location).attr('pathname'));
-       navTo(o,link,$(location).attr('hash'),relpath);
-     } else if (!animationInProgress) {
-       $('#doc-content').scrollTop(0);
-       $('.item').removeClass('selected');
-       $('.item').removeAttr('id');
-       navTo(o,toroot,window.location.hash,relpath);
-     }
-  })
-}
-

diff --git a/Documentation/Core/html/navtreeindex0.js b/Documentation/Core/html/navtreeindex0.js
deleted file mode 100644
index 23c2047..0000000
--- a/Documentation/Core/html/navtreeindex0.js
+++ /dev/null

@@ -1,253 +0,0 @@
-var NAVTREEINDEX0 =
-{
-"annotated.html":[9],
-"coreMISRA_Exceptions_pg.html":[5],
-"core_revisionHistory.html":[1],
-"deprecated.html":[7],
-"device_h_pg.html":[4,7],
-"device_h_pg.html#core_config_sect":[4,7,1],
-"device_h_pg.html#core_version_sect":[4,7,2],
-"device_h_pg.html#device_access":[4,7,3],
-"device_h_pg.html#device_h_sec":[4,7,4],
-"device_h_pg.html#interrupt_number_sec":[4,7,0],
-"functions.html":[10,0],
-"functions_vars.html":[10,1],
-"group__Core__Register__gr.html":[8,6],
-"group__Core__Register__gr.html#ga0bf9564ebc1613a8faba014275dac2a4":[8,6,21],
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-"group__Core__Register__gr.html#ga2c32fc5c7f8f07fb3d436c6f6fe4e8c8":[8,6,9],
-"group__Core__Register__gr.html#ga32da759f46e52c95bcfbde5012260667":[8,6,5],
-"group__Core__Register__gr.html#ga360c73eb7ffb16088556f9278953b882":[8,6,16],
-"group__Core__Register__gr.html#ga4348d14fc5eefbfd34ab8c51be44a81b":[8,6,25],
-"group__Core__Register__gr.html#ga48e5853f417e17a8a65080f6a605b743":[8,6,24],
-"group__Core__Register__gr.html#ga62fa63d39cf22df348857d5f44ab64d9":[8,6,17],
-"group__Core__Register__gr.html#ga6575d37863cec5d334864f93b5b783bf":[8,6,2],
-"group__Core__Register__gr.html#ga6809a07c5cb7410e361f3fba57f72172":[8,6,22],
-"group__Core__Register__gr.html#ga6f26bd75ca7e3247f27b272acc10536b":[8,6,20],
-"group__Core__Register__gr.html#ga70b4e1a6c1c86eb913fb9d6e8400156f":[8,6,23],
-"group__Core__Register__gr.html#ga732e08184154f44a617963cc65ff95bd":[8,6,15],
-"group__Core__Register__gr.html#ga799b5d9a2ae75e459264c8512c7c0e02":[8,6,12],
-"group__Core__Register__gr.html#ga811c0012221ee918a75111ca84c4d5e7":[8,6,4],
-"group__Core__Register__gr.html#ga8b226929264e903c7019e326b42bef47":[8,6,14],
-"group__Core__Register__gr.html#ga914dfa8eff7ca53380dd54cf1d8bebd9":[8,6,13],
-"group__Core__Register__gr.html#ga963cf236b73219ce78e965deb01b81a7":[8,6,6],
-"group__Core__Register__gr.html#ga9d174f979b2f76fdb3228a9b338fd939":[8,6,0],
-"group__Core__Register__gr.html#gaa5587cc09031053a40a35c14ec36078a":[8,6,19],
-"group__Core__Register__gr.html#gaa78e4e6bf619a65e9f01b4af13fed3a8":[8,6,7],
-"group__Core__Register__gr.html#gab898559392ba027814e5bbb5a98b38d2":[8,6,10],
-"group__Core__Register__gr.html#gac64d37e7ff9de06437f9fb94bbab8b6c":[8,6,18],
-"group__Core__Register__gr.html#gad6d7eca9ddd1d9072dd7b020cfe64905":[8,6,8],
-"group__Core__Register__gr.html#gaeb8e5f7564a8ea23678fe3c987b04013":[8,6,1],
-"group__Core__Register__gr.html#gaf39856ca50fc88cf459031b44eb2521c":[8,6,11],
-"group__Dcache__functions__m7.html":[8,17,1],
-"group__Dcache__functions__m7.html#ga31c2439722ab4dbd0c67b196e3377ca7":[8,17,1,7],
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-<div class="title">TrustZone setup: partition_&lt;device&gt;.h </div>  </div>
-</div><!--header-->
-<div class="contents">
-<div class="textblock"><p>The <a class="el" href="partition_h_pg.html">TrustZone setup: partition_&lt;device&gt;.h</a> header file contains the initial setup of the TrustZone hardware in an Armv8-M system.</p>
-<p>This file implements the function <a class="el" href="group__sau__trustzone__functions.html#ga6093bc5939ea8924fbcfdffb8f0553f1">TZ_SAU_Setup</a> that is call from <a class="el" href="group__system__init__gr.html#ga93f514700ccf00d08dbdcff7f1224eb2">SystemInit</a>. It uses settings in these files:</p>
-<ul>
-<li><a class="el" href="partition_h_pg.html">partition_&lt;device&gt;.h</a> that defines the initial system configuration and during SystemInit in Secure state.</li>
-<li><a class="el" href="partition_h_pg.html#partition_gen_h_pg">partition_gen.h</a> that contains SAU region and interrupt target assignments. This file may be generated using <a href="../../Zone/html/index.html"><b>CMSIS-Zone</b></a>.</li>
-</ul>
-<dl class="section note"><dt>Note</dt><dd><a class="el" href="partition_h_pg.html#partition_gen_h_pg">partition_gen.h</a> is optional and can be generated using <a href="../../Zone/html/index.html"><b>CMSIS-Zone</b></a>. In previous versions of CMSIS-Core(M) this settings were part of <a class="el" href="partition_h_pg.html">partition_&lt;device&gt;.h</a>.</dd></dl>
-<p>&#160;</p>
-<p>The <a class="el" href="partition_h_pg.html">partition_&lt;device&gt;.h</a> file contains the following configuration settings for:</p>
-<ul>
-<li><a class="el" href="partition_h_pg.html#sau_ctrlregister_sec">SAU CTRL register settings</a> provides settings for the SAU CTRL register.</li>
-<li><a class="el" href="partition_h_pg.html#sau_sleepexception_sec">Configuration of Sleep and Exception behaviour</a> provides device-specific deep-sleep and exception settings.</li>
-<li><a class="el" href="partition_h_pg.html#sau_fpu_sec">Configuration of Floating Point Unit</a> defines the usage of the Floating Point Unit in secure and non-secure state.</li>
-</ul>
-<p>The <a class="el" href="partition_h_pg.html">partition_&lt;device&gt;.h</a> file includes the <a class="el" href="partition_h_pg.html#partition_gen_h_pg">partition_gen.h</a> file with configuration settings for:</p>
-<ul>
-<li><a class="el" href="partition_h_pg.html#sau_regions_sect">Configuration of the SAU Address Regions</a> provides configuration of the SAU Address Regions.</li>
-<li><a class="el" href="partition_h_pg.html#sau_interrupttarget_sec">Configuration of Interrupt Target settings</a> provides device-specific interrupt target settings.</li>
-</ul>
-<h1><a class="anchor" id="sau_ctrlregister_sec"></a>
-SAU CTRL register settings</h1>
-<table  class="cmtable">
-<tr>
-<th>#define </th><th>Value Range </th><th>Default </th><th>Description  </th></tr>
-<tr>
-<td>SAU_INIT_CTRL </td><td>0 .. 1 </td><td>0 </td><td>Initialize SAU CTRL register or not<ul>
-<li>0: do not initialize SAU CTRL register</li>
-<li>1: initialize SAU CTRL register  </li>
-</ul>
-</td></tr>
-<tr>
-<td>SAU_INIT_CTRL_ENABLE </td><td>0 .. 1 </td><td>0 </td><td>enable/disable the SAU<ul>
-<li>0: disable SAU</li>
-<li>1: enable SAU  </li>
-</ul>
-</td></tr>
-<tr>
-<td>SAU_INIT_CTRL_ALLNS </td><td>0 .. 1 </td><td>0 </td><td>value for SAU_CTRL register bit ALLNS<ul>
-<li>0: all Memory is Secure</li>
-<li>1: all Memory is Non-Secure  </li>
-</ul>
-</td></tr>
-</table>
-<h1><a class="anchor" id="sau_sleepexception_sec"></a>
-Configuration of Sleep and Exception behaviour</h1>
-<table  class="cmtable">
-<tr>
-<th>#define </th><th>Value Range </th><th>Default </th><th>Description  </th></tr>
-<tr>
-<td>SCB_CSR_AIRCR_INIT </td><td>0 .. 1 </td><td>1 </td><td>Setup behaviour of Sleep and Exception Handling<ul>
-<li>0: not setup of CSR and AIRCR registers; the values below are not relevant</li>
-<li>1: setup of CSR and AIRCR registers with values below  </li>
-</ul>
-</td></tr>
-<tr>
-<td>CSR_INIT_DEEPSLEEPS_VAL </td><td>0 .. 1 </td><td>1 </td><td>value for SCB_CSR register bit DEEPSLEEPS<ul>
-<li>0: Deep Sleep can be enabled by Secure and Non-Secure state</li>
-<li>1: Deep Sleep can be enabled by Secure state only  </li>
-</ul>
-</td></tr>
-<tr>
-<td>AIRCR_INIT_SYSRESETREQS_VAL </td><td>0 .. 1 </td><td>1 </td><td>value for SCB_AIRCR register bit SYSRESETREQS<ul>
-<li>0: System reset request accessible from Secure and Non-Secure state</li>
-<li>1: System reset request accessible from Secure state only  </li>
-</ul>
-</td></tr>
-<tr>
-<td>AIRCR_INIT_PRIS_VAL </td><td>0 .. 1 </td><td>1 </td><td>value for SCB_AIRCR register bit PRIS<ul>
-<li>0: Priority of Non-Secure exceptions is Not altered</li>
-<li>1: Priority of Non-Secure exceptions is Lowered to 0x80-0xFF  </li>
-</ul>
-</td></tr>
-<tr>
-<td>AIRCR_INIT_BFHFNMINS_VAL </td><td>0 .. 1 </td><td>0 </td><td>value for SCB_AIRCR register bit BFHFNMINS<ul>
-<li>0: BusFault, HardFault, and NMI target are Secure state</li>
-<li>1: BusFault, HardFault, and NMI target are Non-Secure state  </li>
-</ul>
-</td></tr>
-</table>
-<h1><a class="anchor" id="sau_fpu_sec"></a>
-Configuration of Floating Point Unit</h1>
-<table  class="cmtable">
-<tr>
-<th>#define </th><th>Value Range </th><th>Default </th><th>Description  </th></tr>
-<tr>
-<td>TZ_FPU_NS_USAGE </td><td>0 .. 1 </td><td>1 </td><td>Setup behaviour of Floating Point Unit<ul>
-<li>0: not setup of NSACR and FPCCR registers; the values below are not relevant</li>
-<li>1: setup of NSACR and FPCCR registers with values below  </li>
-</ul>
-</td></tr>
-<tr>
-<td>SCB_NSACR_CP10_11_VAL </td><td>0 or 3 </td><td>3 </td><td>Floating Point Unit usage (Value for SCB-&gt;NSACR register bits CP10, CP11)<ul>
-<li>0: Secure state only</li>
-<li>3: Secure and Non-Secure state  </li>
-</ul>
-</td></tr>
-<tr>
-<td>FPU_FPCCR_TS_VAL </td><td>0 .. 1 </td><td>0 </td><td>Treat floating-point registers as Secure (value for FPU-&gt;FPCCR register bit TS)<ul>
-<li>0: Disable</li>
-<li>1: Enabled  </li>
-</ul>
-</td></tr>
-<tr>
-<td>FPU_FPCCR_CLRONRETS_VAL </td><td>0 .. 1 </td><td>0 </td><td>Clear on return (CLRONRET) accessibility (Value for FPU-&gt;FPCCR register bit CLRONRETS)<ul>
-<li>0: Secure and Non-Secure state</li>
-<li>1: Secure state only  </li>
-</ul>
-</td></tr>
-<tr>
-<td>FPU_FPCCR_CLRONRET_VAL </td><td>0 .. 1 </td><td>1 </td><td>Clear floating-point caller saved registers on exception return (Value for FPU-&gt;FPCCR register bit CLRONRET)<ul>
-<li>0: Disabled</li>
-<li>1: Enabled  </li>
-</ul>
-</td></tr>
-</table>
-<p>&#160; </p>
-<hr/>
-<h1><a class="anchor" id="partition_gen_h_pg"></a>
-Region/ISR setup: partition_gen.h</h1>
-<p>The <a class="el" href="partition_h_pg.html#partition_gen_h_pg">partition_gen.h</a> header file can be generated using <a href="../../Zone/html/index.html"><b>CMSIS-Zone</b></a>.</p>
-<p>The <a class="el" href="partition_h_pg.html">partition_&lt;device&gt;.h</a> file includes the <a class="el" href="partition_h_pg.html">partition_gen.h</a> file with configuration settings for:</p>
-<ul>
-<li><a class="el" href="partition_h_pg.html#sau_regions_sect">Configuration of the SAU Address Regions</a> provides configuration of the SAU Address Regions.</li>
-<li><a class="el" href="partition_h_pg.html#sau_interrupttarget_sec">Configuration of Interrupt Target settings</a> provides device-specific interrupt target settings.</li>
-</ul>
-<dl class="section note"><dt>Note</dt><dd>In previous versions of CMSIS-Core(M) the above settings were part of <a class="el" href="partition_h_pg.html">partition_&lt;device&gt;.h</a></dd></dl>
-<h2><a class="anchor" id="sau_regions_sect"></a>
-Configuration of the SAU Address Regions</h2>
-<table  class="cmtable">
-<tr>
-<th>#define </th><th>Value Range </th><th>Default </th><th>Description  </th></tr>
-<tr>
-<td>SAU_REGIONS_MAX </td><td>0 .. tbd </td><td>8 </td><td>maximum number of SAU regions  </td></tr>
-<tr>
-<td>SAU_INIT_REGION&lt;number&gt; </td><td>0 .. 1 </td><td>0 </td><td>initialize SAU region or not<ul>
-<li>0: do not initialize SAU region</li>
-<li>1: initialize SAU region  </li>
-</ul>
-</td></tr>
-<tr>
-<td>SAU_INIT_START&lt;number&gt; </td><td>0x00000000 .. 0xFFFFFFE0<br/>
- [in steps of 32] </td><td>0x00000000 </td><td>region start address  </td></tr>
-<tr>
-<td>SAU_INIT_END&lt;number&gt; </td><td>0x00000000 .. 0xFFFFFFE0<br/>
- [in steps of 32] </td><td>0x00000000 </td><td>region start address  </td></tr>
-<tr>
-<td>SAU_INIT_NSC&lt;number&gt; </td><td>0 .. 1 </td><td>0 </td><td>SAU region attribute<ul>
-<li>0: Non-Secure</li>
-<li>1: Secure, Non-Secure callable  </li>
-</ul>
-</td></tr>
-</table>
-<p>The range of &lt;number&gt; is from 0 .. SAU_REGIONS_MAX. A set of these macros must exist for each &lt;number&gt;.</p>
-<p>The following example shows a set of SAU region macros.</p>
-<div class="fragment"><div class="line"><span class="preprocessor">#define SAU_REGIONS_MAX   8                 </span><span class="comment">/* Max. number of SAU regions */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor">#define SAU_INIT_REGION0    1</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define SAU_INIT_START0     0x00000000      </span><span class="comment">/* start address of SAU region 0 */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define SAU_INIT_END0       0x001FFFE0      </span><span class="comment">/* end address of SAU region 0 */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define SAU_INIT_NSC0       1</span></div>
-<div class="line"><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor">#define SAU_INIT_REGION1    1</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define SAU_INIT_START1     0x00200000      </span><span class="comment">/* start address of SAU region 1 */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define SAU_INIT_END1       0x003FFFE0      </span><span class="comment">/* end address of SAU region 1 */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define SAU_INIT_NSC1       0</span></div>
-<div class="line"><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor">#define SAU_INIT_REGION2    1</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define SAU_INIT_START2     0x20200000      </span><span class="comment">/* start address of SAU region 2 */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define SAU_INIT_END2       0x203FFFE0      </span><span class="comment">/* end address of SAU region 2 */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define SAU_INIT_NSC2       0</span></div>
-<div class="line"><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor">#define SAU_INIT_REGION3    1</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define SAU_INIT_START3     0x40000000      </span><span class="comment">/* start address of SAU region 3 */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define SAU_INIT_END3       0x40040000      </span><span class="comment">/* end address of SAU region 3 */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define SAU_INIT_NSC3       0</span></div>
-<div class="line"><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor">#define SAU_INIT_REGION4    0</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define SAU_INIT_START4     0x00000000      </span><span class="comment">/* start address of SAU region 4 */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define SAU_INIT_END4       0x00000000      </span><span class="comment">/* end address of SAU region 4 */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define SAU_INIT_NSC4       0</span></div>
-<div class="line"><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor">#define SAU_INIT_REGION5    0</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define SAU_INIT_START5     0x00000000      </span><span class="comment">/* start address of SAU region 5 */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define SAU_INIT_END5       0x00000000      </span><span class="comment">/* end address of SAU region 5 */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define SAU_INIT_NSC5       0</span></div>
-<div class="line"><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor">#define SAU_INIT_REGION6    0</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define SAU_INIT_START6     0x00000000      </span><span class="comment">/* start address of SAU region 6 */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define SAU_INIT_END6       0x00000000      </span><span class="comment">/* end address of SAU region 6 */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define SAU_INIT_NSC6       0</span></div>
-<div class="line"><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor">#define SAU_INIT_REGION7    0</span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define SAU_INIT_START7     0x00000000      </span><span class="comment">/* start address of SAU region 7 */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor"></span><span class="preprocessor">#define SAU_INIT_END7       0x00000000      </span><span class="comment">/* end address of SAU region 7 */</span><span class="preprocessor"></span></div>
-<div class="line"><span class="preprocessor">#define SAU_INIT_NSC7       0</span></div>
-</div><!-- fragment --><h2><a class="anchor" id="sau_interrupttarget_sec"></a>
-Configuration of Interrupt Target settings</h2>
-<p>Each interrupt has a configuration bit that defines the execution in Secure or Non-secure state. The Non-Secure interrupts have a separate vector table. Refer to <a class="el" href="using_TrustZone_pg.html#Model_TrustZone">Programmers Model with TrustZone</a> for more information.</p>
-<table  class="cmtable">
-<tr>
-<th>#define </th><th>Value Range </th><th>Default </th><th>Description  </th></tr>
-<tr>
-<td>NVIC_INIT_ITNS&lt;number&gt; </td><td>0x00000000 .. 0xFFFFFFFF<br/>
- [each bit represents an interrupt] </td><td>0x00000000 </td><td>Interrupt vector target<ul>
-<li>0: Secure state</li>
-<li>1: Non-Secure state  </li>
-</ul>
-</td></tr>
-</table>
-<p>The range of &lt;number&gt; is 0 .. (&lt;number of external interrupts&gt; + 31) / 32.</p>
-<p>The following example shows the configuration for a maximum of 64 external interrupts.</p>
-<div class="fragment"><div class="line"><span class="preprocessor">#define NVIC_INIT_ITNS0      0x0000122B</span></div>
-<div class="line"><span class="preprocessor">#define NVIC_INIT_ITNS1      0x0000003A</span></div>
-</div><!-- fragment --> </div></div><!-- contents -->
-</div><!-- doc-content -->
-<!-- start footer part -->
-<div id="nav-path" class="navpath"><!-- id is needed for treeview function! -->
-  <ul>
-    <li class="navelem"><a class="el" href="templates_pg.html">CMSIS-Core Device Templates</a></li>
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-<title>CMSIS-Core (Cortex-M): Register Mapping</title>
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-  <td style="padding-left: 0.5em;">
-   <div id="projectname">CMSIS-Core (Cortex-M)
-   &#160;<span id="projectnumber">Version 5.6.0</span>
-   </div>
-   <div id="projectbrief">CMSIS-Core support for Cortex-M processor-based devices</div>
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-      <li class="current"><a href="pages.html"><span>Usage&#160;and&#160;Description</span></a></li>
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-<div class="title">Register Mapping </div>  </div>
-</div><!--header-->
-<div class="contents">
-<div class="textblock"><p>The table below associates some common register names used in CMSIS to the register names used in Technical Reference Manuals.</p>
-<table  class="cmtable" summary="Register Mapping">
-<tr>
-<th>CMSIS Register Name </th><th>Cortex-M3, Cortex-M4, and Cortex-M7 </th><th>Cortex-M0 and Cortex-M0+ </th><th>Register Name  </th></tr>
-<tr>
-<th colspan="4">Nested Vectored Interrupt Controller (NVIC) Register Access  </th></tr>
-<tr>
-<td>NVIC-&gt;ISER[] </td><td>NVIC_ISER0..7 </td><td>ISER </td><td>Interrupt Set-Enable Registers  </td></tr>
-<tr>
-<td>NVIC-&gt;ICER[] </td><td>NVIC_ICER0..7 </td><td>ICER </td><td>Interrupt Clear-Enable Registers  </td></tr>
-<tr>
-<td>NVIC-&gt;ISPR[] </td><td>NVIC_ISPR0..7 </td><td>ISPR </td><td>Interrupt Set-Pending Registers  </td></tr>
-<tr>
-<td>NVIC-&gt;ICPR[] </td><td>NVIC_ICPR0..7 </td><td>ICPR </td><td>Interrupt Clear-Pending Registers  </td></tr>
-<tr>
-<td>NVIC-&gt;IABR[] </td><td>NVIC_IABR0..7 </td><td>- </td><td>Interrupt Active Bit Register  </td></tr>
-<tr>
-<td>NVIC-&gt;IP[] </td><td>NVIC_IPR0..59 </td><td>IPR0..7 </td><td>Interrupt Priority Register  </td></tr>
-<tr>
-<td>NVIC-&gt;STIR </td><td>STIR </td><td>- </td><td>Software Triggered Interrupt Register  </td></tr>
-<tr>
-<th colspan="4">System Control Block (SCB) Register Access  </th></tr>
-<tr>
-<td>SCB-&gt;CPUID </td><td>CPUID </td><td>CPUID </td><td>CPUID Base Register  </td></tr>
-<tr>
-<td>SCB-&gt;ICSR </td><td>ICSR </td><td>ICSR </td><td>Interrupt Control and State Register  </td></tr>
-<tr>
-<td>SCB-&gt;VTOR </td><td>VTOR </td><td>- </td><td>Vector Table Offset Register  </td></tr>
-<tr>
-<td>SCB-&gt;AIRCR </td><td>AIRCR </td><td>AIRCR </td><td>Application Interrupt and Reset Control Register  </td></tr>
-<tr>
-<td>SCB-&gt;SCR </td><td>SCR </td><td>SCR </td><td>System Control Register  </td></tr>
-<tr>
-<td>SCB-&gt;CCR </td><td>CCR </td><td>CCR </td><td>Configuration and Control Register  </td></tr>
-<tr>
-<td>SCB-&gt;SHP[] </td><td>SHPR1..3 </td><td>SHPR2..3 </td><td>System Handler Priority Registers  </td></tr>
-<tr>
-<td>SCB-&gt;SHCSR </td><td>SHCSR </td><td>SHCSR </td><td>System Handler Control and State Register  </td></tr>
-<tr>
-<td>SCB-&gt;CFSR </td><td>CFSR </td><td>- </td><td>Configurable Fault Status Registers  </td></tr>
-<tr>
-<td>SCB-&gt;HFSR </td><td>HFSR </td><td>- </td><td>HardFault Status Register  </td></tr>
-<tr>
-<td>SCB-&gt;DFSR </td><td>DFSR </td><td>- </td><td>Debug Fault Status Register  </td></tr>
-<tr>
-<td>SCB-&gt;MMFAR </td><td>MMFAR </td><td>- </td><td>MemManage Fault Address Register  </td></tr>
-<tr>
-<td>SCB-&gt;BFAR </td><td>BFAR </td><td>- </td><td>BusFault Address Register  </td></tr>
-<tr>
-<td>SCB-&gt;AFSR </td><td>AFSR </td><td>- </td><td>Auxiliary Fault Status Register  </td></tr>
-<tr>
-<td>SCB-&gt;PFR[] </td><td>ID_PFR0..1 </td><td>- </td><td>Processor Feature Registers  </td></tr>
-<tr>
-<td>SCB-&gt;DFR </td><td>ID_DFR0 </td><td>- </td><td>Debug Feature Register  </td></tr>
-<tr>
-<td>SCB-&gt;ADR </td><td>ID_AFR0 </td><td>- </td><td>Auxiliary Feature Register  </td></tr>
-<tr>
-<td>SCB-&gt;MMFR[] </td><td>ID_MMFR0..3 </td><td>- </td><td>Memory Model Feature Registers  </td></tr>
-<tr>
-<td>SCB-&gt;ISAR[] </td><td>ID_ISAR0..4 </td><td>- </td><td>Instruction Set Attributes Registers  </td></tr>
-<tr>
-<td>SCB-&gt;CPACR </td><td>CPACR </td><td>- </td><td>Coprocessor Access Control Register  </td></tr>
-<tr>
-<th colspan="4">System Control and ID Registers not in the SCB (SCnSCB) Register Access  </th></tr>
-<tr>
-<td>SCnSCB-&gt;ICTR </td><td>ICTR </td><td>- </td><td>Interrupt Controller Type Register  </td></tr>
-<tr>
-<td>SCnSCB-&gt;ACTLR </td><td>ACTLR </td><td>- </td><td>Auxiliary Control Register  </td></tr>
-<tr>
-<th colspan="4">System Timer (SysTick) Control and Status Register Access  </th></tr>
-<tr>
-<td>SysTick-&gt;CTRL </td><td>STCSR </td><td>SYST_CSR </td><td>SysTick Control and Status Register  </td></tr>
-<tr>
-<td>SysTick-&gt;LOAD </td><td>STRVR </td><td>SYST_RVR </td><td>SysTick Reload Value Register  </td></tr>
-<tr>
-<td>SysTick-&gt;VAL </td><td>STCVR </td><td>SYST_CVR </td><td>SysTick Current Value Register  </td></tr>
-<tr>
-<td>SysTick-&gt;CALIB </td><td>STCR </td><td>SYST_CALIB </td><td>SysTick Calibaration Value Register  </td></tr>
-<tr>
-<th colspan="4">Data Watchpoint and Trace (DWT) Register Access  </th></tr>
-<tr>
-<td>DWT-&gt;CTRL </td><td>DWT_CTRL </td><td>- </td><td>Control Register  </td></tr>
-<tr>
-<td>DWT-&gt;CYCCNT </td><td>DWT_CYCCNT </td><td>- </td><td>Cycle Count Register  </td></tr>
-<tr>
-<td>DWT-&gt;CPICNT </td><td>DWT_CPICNT </td><td>- </td><td>CPI Count Register  </td></tr>
-<tr>
-<td>DWT-&gt;EXCCNT </td><td>DWT_EXCCNT </td><td>- </td><td>Exception Overhead Count Register  </td></tr>
-<tr>
-<td>DWT-&gt;SLEEPCNT </td><td>DWT_SLEEPCNT </td><td>- </td><td>Sleep Count Register  </td></tr>
-<tr>
-<td>DWT-&gt;LSUCNT </td><td>DWT_LSUCNT </td><td>- </td><td>LSU Count Register  </td></tr>
-<tr>
-<td>DWT-&gt;FOLDCNT </td><td>DWT_FOLDCNT </td><td>- </td><td>Folded-instruction Count Register  </td></tr>
-<tr>
-<td>DWT-&gt;PCSR </td><td>DWT_PCSR </td><td>- </td><td>Program Counter Sample Register  </td></tr>
-<tr>
-<td>DWT-&gt;COMP0..3 </td><td>DWT_COMP0..3 </td><td>- </td><td>Comparator Register 0..3  </td></tr>
-<tr>
-<td>DWT-&gt;MASK0..3 </td><td>DWT_MASK0..3 </td><td>- </td><td>Mask Register 0..3  </td></tr>
-<tr>
-<td>DWT-&gt;FUNCTION0..3 </td><td>DWT_FUNCTION0..3 </td><td>- </td><td>Function Register 0..3  </td></tr>
-<tr>
-<th colspan="4">Instrumentation Trace Macrocell (ITM) Register Access  </th></tr>
-<tr>
-<td>ITM-&gt;PORT[] </td><td>ITM_STIM0..31 </td><td>- </td><td>Stimulus Port Registers  </td></tr>
-<tr>
-<td>ITM-&gt;TER </td><td>ITM_TER </td><td>- </td><td>Trace Enable Register  </td></tr>
-<tr>
-<td>ITM-&gt;TPR </td><td>ITM_TPR </td><td>- </td><td>ITM Trace Privilege Register  </td></tr>
-<tr>
-<td>ITM-&gt;TCR </td><td>ITM_TCR </td><td>- </td><td>Trace Control Register  </td></tr>
-<tr>
-<th colspan="4">Trace Port Interface (TPIU) Register Access  </th></tr>
-<tr>
-<td>TPI-&gt;SSPSR </td><td>TPIU_SSPR </td><td>- </td><td>Supported Parallel Port Size Register  </td></tr>
-<tr>
-<td>TPI-&gt;CSPSR </td><td>TPIU_CSPSR </td><td>- </td><td>Current Parallel Port Size Register  </td></tr>
-<tr>
-<td>TPI-&gt;ACPR </td><td>TPIU_ACPR </td><td>- </td><td>Asynchronous Clock Prescaler Register  </td></tr>
-<tr>
-<td>TPI-&gt;SPPR </td><td>TPIU_SPPR </td><td>- </td><td>Selected Pin Protocol Register  </td></tr>
-<tr>
-<td>TPI-&gt;FFSR </td><td>TPIU_FFSR </td><td>- </td><td>Formatter and Flush Status Register  </td></tr>
-<tr>
-<td>TPI-&gt;FFCR </td><td>TPIU_FFCR </td><td>- </td><td>Formatter and Flush Control Register  </td></tr>
-<tr>
-<td>TPI-&gt;FSCR </td><td>TPIU_FSCR </td><td>- </td><td>Formatter Synchronization Counter Register  </td></tr>
-<tr>
-<td>TPI-&gt;TRIGGER </td><td>TRIGGER </td><td>- </td><td>TRIGGER  </td></tr>
-<tr>
-<td>TPI-&gt;FIFO0 </td><td>FIFO data 0 </td><td>- </td><td>Integration ETM Data  </td></tr>
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-<tr>
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-<tr>
-<td>TPI-&gt;FIFO1 </td><td>FIFO data 1 </td><td>- </td><td>Integration ITM Data  </td></tr>
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-<td>TPI-&gt;ITCTRL </td><td>TPIU_ITCTRL </td><td>- </td><td>Integration Mode Control  </td></tr>
-<tr>
-<td>TPI-&gt;CLAIMSET </td><td>CLAIMSET </td><td>- </td><td>Claim tag set  </td></tr>
-<tr>
-<td>TPI-&gt;CLAIMCLR </td><td>CLAIMCLR </td><td>- </td><td>Claim tag clear  </td></tr>
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-<td>TPI-&gt;DEVID </td><td>TPIU_DEVID </td><td>- </td><td>TPIU_DEVID  </td></tr>
-<tr>
-<td>TPI-&gt;DEVTYPE </td><td>TPIU_DEVTYPE </td><td>- </td><td>TPIU_DEVTYPE  </td></tr>
-<tr>
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-<tr>
-<td>MPU-&gt;TYPE </td><td>MPU_TYPE </td><td>- </td><td>MPU Type Register  </td></tr>
-<tr>
-<td>MPU-&gt;CTRL </td><td>MPU_CTRL </td><td>- </td><td>MPU Control Register  </td></tr>
-<tr>
-<td>MPU-&gt;RNR </td><td>MPU_RNR </td><td>- </td><td>MPU Region Number Register  </td></tr>
-<tr>
-<td>MPU-&gt;RBAR </td><td>MPU_RBAR </td><td>- </td><td>MPU Region Base Address Register  </td></tr>
-<tr>
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-<tr>
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-<tr>
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-<tr>
-<td>FPU-&gt;FPDSCR </td><td>FPDSCR </td><td>- </td><td>FP Default Status Control Register  </td></tr>
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diff --git a/Documentation/Core/html/resize.js b/Documentation/Core/html/resize.js
deleted file mode 100644
index 304fcb6..0000000
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deleted file mode 100644
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deleted file mode 100644
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deleted file mode 100644
index 927e837..0000000
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deleted file mode 100644
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deleted file mode 100644
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deleted file mode 100644
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