Release v2.3.5
diff --git a/Include/stm32f030xc.h b/Include/stm32f030xc.h
index 1527da4..39cd541 100644
--- a/Include/stm32f030xc.h
+++ b/Include/stm32f030xc.h
@@ -3131,8 +3131,8 @@
#define RCC_CFGR_PPRE_DIV16_Msk (0x7UL << RCC_CFGR_PPRE_DIV16_Pos) /*!< 0x00000700 */
#define RCC_CFGR_PPRE_DIV16 RCC_CFGR_PPRE_DIV16_Msk /*!< HCLK divided by 16 */
-#define RCC_CFGR_PLLSRC_Pos (15U)
-#define RCC_CFGR_PLLSRC_Msk (0x3UL << RCC_CFGR_PLLSRC_Pos) /*!< 0x00018000 */
+#define RCC_CFGR_PLLSRC_Pos (16U)
+#define RCC_CFGR_PLLSRC_Msk (0x1UL << RCC_CFGR_PLLSRC_Pos) /*!< 0x00010000 */
#define RCC_CFGR_PLLSRC RCC_CFGR_PLLSRC_Msk /*!< PLL entry clock source */
#define RCC_CFGR_PLLSRC_HSI_DIV2 (0x00000000U) /*!< HSI clock divided by 2 selected as PLL entry clock source */
#define RCC_CFGR_PLLSRC_HSI_PREDIV (0x00008000U) /*!< HSI/PREDIV clock selected as PLL entry clock source */
diff --git a/Include/stm32f0xx.h b/Include/stm32f0xx.h
index 621a5fa..3361e76 100644
--- a/Include/stm32f0xx.h
+++ b/Include/stm32f0xx.h
@@ -53,8 +53,14 @@
#define STM32F0
#endif /* STM32F0 */
-/* Uncomment the line below according to the target STM32 device used in your
- application
+/** Uncomment the line below according to the target STM32 device used in your application.
+ * stm32f0xxxx.h file contains:
+ * - All the peripheral register's definitions, bits definitions and memory mapping for STM32F0xxxx devices
+ * - IRQ channel definition
+ * - Peripheral memory mapping and physical registers address definition
+ * - Peripheral pointer declaration and driver header file inclusion
+ * - Product miscellaneous configuration: assert macros
+ * Note: These CMSIS drivers (stm32f0xxxx.h) are always supporting features of the sub-familys superset.
*/
#if !defined (STM32F030x6) && !defined (STM32F030x8) && \
@@ -68,7 +74,7 @@
/* #define STM32F031x6 */ /*!< STM32F031x4, STM32F031x6 Devices (STM32F031xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */
/* #define STM32F038xx */ /*!< STM32F038xx Devices (STM32F038xx microcontrollers where the Flash memory is 32 Kbytes) */
/* #define STM32F042x6 */ /*!< STM32F042x4, STM32F042x6 Devices (STM32F042xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */
- /* #define STM32F048x6 */ /*!< STM32F048xx Devices (STM32F042xx microcontrollers where the Flash memory is 32 Kbytes) */
+ /* #define STM32F048xx */ /*!< STM32F048xx Devices (STM32F048xx microcontrollers where the Flash memory is 32 Kbytes) */
/* #define STM32F051x8 */ /*!< STM32F051x4, STM32F051x6, STM32F051x8 Devices (STM32F051xx microcontrollers where the Flash memory ranges between 16 and 64 Kbytes) */
/* #define STM32F058xx */ /*!< STM32F058xx Devices (STM32F058xx microcontrollers where the Flash memory is 64 Kbytes) */
/* #define STM32F070x6 */ /*!< STM32F070x6 Devices (STM32F070x6 microcontrollers where the Flash memory ranges between 16 and 32 Kbytes) */
@@ -80,7 +86,11 @@
/* #define STM32F091xC */ /*!< STM32F091xB, STM32F091xC Devices (STM32F091xx microcontrollers where the Flash memory ranges between 128 and 256 Kbytes) */
/* #define STM32F098xx */ /*!< STM32F098xx Devices (STM32F098xx microcontrollers where the Flash memory is 256 Kbytes) */
#endif
-
+/* Legacy aliases */
+#if defined (STM32F048x6)
+ #define STM32F048xx
+#endif /* STM32F048x6 */
+
/* Tip: To avoid modifying this file each time you need to switch between these
devices, you can define the device in your toolchain compiler preprocessor.
*/
@@ -94,11 +104,11 @@
#endif /* USE_HAL_DRIVER */
/**
- * @brief CMSIS Device version number V2.3.4
+ * @brief CMSIS Device version number V2.3.5
*/
#define __STM32F0_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */
#define __STM32F0_DEVICE_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
-#define __STM32F0_DEVICE_VERSION_SUB2 (0x04) /*!< [15:8] sub2 version */
+#define __STM32F0_DEVICE_VERSION_SUB2 (0x05) /*!< [15:8] sub2 version */
#define __STM32F0_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F0_DEVICE_VERSION ((__STM32F0_DEVICE_VERSION_MAIN << 24)\
|(__STM32F0_DEVICE_VERSION_SUB1 << 16)\
diff --git a/License.md b/License.md
index 64783f9..e0d829b 100644
--- a/License.md
+++ b/License.md
@@ -81,4 +81,3 @@
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
-
diff --git a/README.md b/README.md
index 738e38f..1a09ff9 100644
--- a/README.md
+++ b/README.md
@@ -19,18 +19,23 @@
This **cmsis_device_f0** MCU component repo is one element of the STM32CubeF0 MCU embedded software package, providing the **cmsis device** part.
+## Release note
+
+Details about the content of this release are available in the release note [here](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/cmsis_device_f0/blob/master/Release_Notes.html).
+
## Compatibility information
In this table, you can find the successive versions of this CMSIS Device component, in-line with the corresponding versions of the full MCU package:
CMSIS Device F0 | CMSIS Core | Was delivered in the full MCU package
--------------- | ---------- | -------------------------------------
-Tag v2.3.3 | Tag v4.5_cm0 | Tag v1.10.1
-Tag v2.3.4 | Tag v5.4.0_cm0 | Tag v1.11.0
+Tag v2.3.4 | Tag v5.4.0_cm3 | Tag v1.11.0 (and following, if any, till next new tag)
+Tag v2.3.4 | Tag v5.4.0_cm3 | Tag v1.11.1 (and following, if any, till next new tag)
+Tag v2.3.5 | Tag v5.4.0_cm3 | Tag v1.11.2 (and following, if any, till next new tag)
The full **STM32CubeF0** MCU package is available [here](https://github.com/STMicroelectronics/STM32CubeF0).
## Troubleshooting
If you have any issue with the **Software content** of this repo, you can [file an issue on Github](https://github.com/STMicroelectronics/cmsis_device_f0/issues/new).
-For any other question related to the product, the tools, the environment, you can submit a topic on the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus).
+For any other question related to the product, the tools, the environment, you can submit a topic on the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus).
\ No newline at end of file
diff --git a/Release_Notes.html b/Release_Notes.html
index 774eeb7..db6f5ba 100644
--- a/Release_Notes.html
+++ b/Release_Notes.html
@@ -38,12 +38,26 @@
<div class="col-sm-12 col-lg-8">
<h1 id="update-history"><strong>Update History</strong></h1>
<div class="collapse">
-<input type="checkbox" id="collapse-section2_3_4" aria-hidden="true"> <label for="collapse-section2_3_4" aria-hidden="true"><strong>V2.3.4 / 12-September-2019</strong></label>
+<input type="checkbox" id="collapse-section2_3_5" aria-hidden="true"> <label for="collapse-section2_3_5" aria-hidden="true"><strong>V2.3.5 / 06-November-2020</strong></label>
<div>
<h2 id="main-changes">Main Changes</h2>
<ul>
<li>General updates
<ul>
+<li>Update stm32f030xc.h header file to be aligned with RCC_CFGR bit definition.</li>
+<li>Rename the defined STM32 sub-family “STM32F048x6” to “STM32F048xx”</li>
+<li>Add License.md and Readme.md files required for GitHub publication.</li>
+</ul></li>
+</ul>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section2_3_4" aria-hidden="true"> <label for="collapse-section2_3_4" aria-hidden="true"><strong>V2.3.4 / 12-September-2019</strong></label>
+<div>
+<h2 id="main-changes-1">Main Changes</h2>
+<ul>
+<li>General updates
+<ul>
<li>Align ErrorStatus typedef to common error handling (stm32f0xx.h)</li>
<li>SystemInit(): update to don’t reset RCC registers to its reset values.</li>
<li>USE UL postfix for _Msk definitions and momory/peripheral base addresses for MISRA C 2012 Compliance</li>
@@ -56,7 +70,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section2_3_3" aria-hidden="true"> <label for="collapse-section2_3_3" aria-hidden="true"><strong>V2.3.3 / 25-August-2017</strong></label>
<div>
-<h2 id="main-changes-1">Main Changes</h2>
+<h2 id="main-changes-2">Main Changes</h2>
<ul>
<li>Remove support of Atollic TrueSTUDIO STM32 (TrueSTUDIO) toolchain.</li>
<li>Performance improvement of the startup code for GCC.</li>
@@ -66,7 +80,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section2_3_2" aria-hidden="true"> <label for="collapse-section2_3_2" aria-hidden="true"><strong>V2.3.2 / 07-April-2017</strong></label>
<div>
-<h2 id="main-changes-2">Main Changes</h2>
+<h2 id="main-changes-3">Main Changes</h2>
<ul>
<li>Rename GPIO_AFRH and GPIO_AFRL bitfields for alignment with all STM32 series.</li>
<li>Add macro definition : IS_TIM_ADVANCED.</li>
@@ -77,7 +91,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section2_3_1" aria-hidden="true"> <label for="collapse-section2_3_1" aria-hidden="true"><strong>V2.3.1 / 04-November-2016</strong></label>
<div>
-<h2 id="main-changes-3">Main Changes</h2>
+<h2 id="main-changes-4">Main Changes</h2>
<ul>
<li>Add TIM6_IRQHandler in vectors table for STM32F030x8 devices</li>
</ul>
@@ -86,7 +100,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section2_3_0" aria-hidden="true"> <label for="collapse-section2_3_0" aria-hidden="true"><strong>V2.3.0 / 27-May-2016</strong></label>
<div>
-<h2 id="main-changes-4">Main Changes</h2>
+<h2 id="main-changes-5">Main Changes</h2>
<ul>
<li>General updates
<ul>
@@ -105,21 +119,46 @@
<ul>
<li>Added definitions of bit 31 in EXTI registers for STM32F04x, STM32F078xx and STM32F098xx devices.</li>
</ul></li>
-<li>I2C updates - Added IS_I2C_WAKEUP_FROMSTOP_INSTANCE definition for I2C instances supporting Wakeup from Stop mode.</li>
-<li>I2S updates - Removed SPI_I2S prescaler register not supported by STM32F030x6 and STM32F030x8 devices.</li>
-<li>RCC updates - Added missing RCC_CFGR_PLLNODIV definition for STM32F030x4/6 devices.</li>
-<li>RTC updates - Removed cast from RTC_BKP_NUMBER definition.</li>
-<li>SYSCFG updates - Renamed SYSCFG_CFGR1_IRDA_ENV_SEL bit definitions to SYSCFG_CFGR1_IR_MOD for SYSCFG_CFGR1 register.</li>
-<li>TIM updates - Added IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE definition. - Added IS_TIM_ETR_INSTANCE definition.</li>
-<li>UART updates - Renamed IS_UART_WAKEUP_INSTANCE to IS_UART_WAKEUP_FROMSTOP_INSTANCE.</li>
-<li>USART updates - Defined USART_ISR_RWU bit for all STM32F0xx devices.</li>
+<li>I2C updates
+<ul>
+<li>Added IS_I2C_WAKEUP_FROMSTOP_INSTANCE definition for I2C instances supporting Wakeup from Stop mode.</li>
+</ul></li>
+<li>I2S updates
+<ul>
+<li>Removed SPI_I2S prescaler register not supported by STM32F030x6 and STM32F030x8 devices.</li>
+</ul></li>
+<li>RCC updates
+<ul>
+<li>Added missing RCC_CFGR_PLLNODIV definition for STM32F030x4/6 devices.</li>
+</ul></li>
+<li>RTC updates
+<ul>
+<li>Removed cast from RTC_BKP_NUMBER definition.</li>
+</ul></li>
+<li>SYSCFG updates
+<ul>
+<li>Renamed SYSCFG_CFGR1_IRDA_ENV_SEL bit definitions to SYSCFG_CFGR1_IR_MOD for SYSCFG_CFGR1 register.</li>
+</ul></li>
+<li>TIM updates
+<ul>
+<li>Added IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE definition.</li>
+<li>Added IS_TIM_ETR_INSTANCE definition.</li>
+</ul></li>
+<li>UART updates
+<ul>
+<li>Renamed IS_UART_WAKEUP_INSTANCE to IS_UART_WAKEUP_FROMSTOP_INSTANCE.</li>
+</ul></li>
+<li>USART updates
+<ul>
+<li>Defined USART_ISR_RWU bit for all STM32F0xx devices.</li>
+</ul></li>
</ul>
</div>
</div>
<div class="collapse">
<input type="checkbox" id="collapse-section2_2_3" aria-hidden="true"> <label for="collapse-section2_2_3" aria-hidden="true"><strong>V2.2.3 / 29-January-2016</strong></label>
<div>
-<h2 id="main-changes-5">Main Changes</h2>
+<h2 id="main-changes-6">Main Changes</h2>
<ul>
<li>Added mention to STM32F091xB mcus missing in the list of mcus of stm32f0xx.h.</li>
<li>Updated CMSIS Device compliancy with MISRA C 2004 rule 10.6.</li>
@@ -158,7 +197,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section2_2_2" aria-hidden="true"> <label for="collapse-section2_2_2" aria-hidden="true"><strong>V2.2.2 / 26-June-2015</strong></label>
<div>
-<h2 id="main-changes-6">Main Changes</h2>
+<h2 id="main-changes-7">Main Changes</h2>
<ul>
<li>Add missing WUT bits in EXTI_IMR/EMR/RTSR/FTSR/PR/SWIER for different IT lines.</li>
<li>Add preprocessor compilation switch #define STM32F0 in stm32f0xx.h.</li>
@@ -175,7 +214,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section2_2_1" aria-hidden="true"> <label for="collapse-section2_2_1" aria-hidden="true"><strong>V2.2.1 / 09-January-2015</strong></label>
<div>
-<h2 id="main-changes-7">Main Changes</h2>
+<h2 id="main-changes-8">Main Changes</h2>
<ul>
<li>system_stm32f0xx.c: replace wrong compilation switch STM32F078xB by STM32F078xx.</li>
<li>stm32F070xb.h: correct wrong DMA remap mask value for STM32f070xB.</li>
@@ -187,7 +226,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section2_2_0" aria-hidden="true"> <label for="collapse-section2_2_0" aria-hidden="true"><strong>V2.2.0 / 05-December-2014</strong></label>
<div>
-<h2 id="main-changes-8">Main Changes</h2>
+<h2 id="main-changes-9">Main Changes</h2>
<ul>
<li>Add CMSIS files for new STM32F0 value line devices: STM32F030xC and STM32F070x6/xB.</li>
<li>Add macro to check AF capability of gpio instance</li>
@@ -200,7 +239,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section2_1_0" aria-hidden="true"> <label for="collapse-section2_1_0" aria-hidden="true"><strong>V2.1.0 / 03-October-2014</strong></label>
<div>
-<h2 id="main-changes-9">Main Changes</h2>
+<h2 id="main-changes-10">Main Changes</h2>
<ul>
<li>Add new CMSIS files for STM32F091xc and STM32F098xx products</li>
<li>VDDIO2 IRQ missing in F07xx/F09xx/F04xx product</li>
@@ -216,7 +255,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section2_0_1" aria-hidden="true"> <label for="collapse-section2_0_1" aria-hidden="true"><strong>V2.0.1 / 18-June-2014</strong></label>
<div>
-<h2 id="main-changes-10">Main Changes</h2>
+<h2 id="main-changes-11">Main Changes</h2>
<ul>
<li>General
<ul>
@@ -251,7 +290,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section2_0_0" aria-hidden="true"> <label for="collapse-section2_0_0" aria-hidden="true"><strong>V2.0.0 / 28-May-2014</strong></label>
<div>
-<h2 id="main-changes-11">Main Changes</h2>
+<h2 id="main-changes-12">Main Changes</h2>
<ul>
<li>Major update based on STM32Cube specification: new CMSIS device files release dedicated to <strong>STM32F030x4/x6, STM32F030x8, STM32F031x4/x6, STM32F051x4/x6/x8, STM32F071x8/xB, STM32F042x4/x6, STM32F072x8/xB, STM32F038xx, STM32F048xx, STM32F058xx and STM32F078xx devices</strong>.</li>
<li><strong>This version has to be used for STM32CubeF0 based development although files can be used independently too</strong>.</li>
@@ -261,7 +300,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section1_2_1" aria-hidden="true"> <label for="collapse-section1_2_1" aria-hidden="true"><strong>V1.2.1 / 22-November-2013</strong></label>
<div>
-<h2 id="main-changes-12">Main Changes</h2>
+<h2 id="main-changes-13">Main Changes</h2>
<ul>
<li>stm32f0xx.h
<ul>
@@ -282,7 +321,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section1_2_0" aria-hidden="true"> <label for="collapse-section1_2_0" aria-hidden="true"><strong>V1.2.0 / 01-August-2013</strong></label>
<div>
-<h2 id="main-changes-13">Main Changes</h2>
+<h2 id="main-changes-14">Main Changes</h2>
<ul>
<li>Add support of STM32F030 devices (STM32F030x8 and STM32F030x6 microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)</li>
<li>stm32f0xx.h
@@ -299,7 +338,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section1_1_1" aria-hidden="true"> <label for="collapse-section1_1_1" aria-hidden="true"><strong>V1.1.1 / 31-July-2013</strong></label>
<div>
-<h2 id="main-changes-14">Main Changes</h2>
+<h2 id="main-changes-15">Main Changes</h2>
<ul>
<li>stm32f0xx.h
<ul>
@@ -311,7 +350,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section1_1_0" aria-hidden="true"> <label for="collapse-section1_1_0" aria-hidden="true"><strong>V1.1.0 / 10-May-2013</strong></label>
<div>
-<h2 id="main-changes-15">Main Changes</h2>
+<h2 id="main-changes-16">Main Changes</h2>
<ul>
<li>Add support of STM32F0xx Low-density devices (STM32F050xx and STM32F060xx microcontrollers where the Flash memory ranges between 16 and 32 Kbytes)</li>
<li>stm32f0xx.h
@@ -339,7 +378,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section1_0_2" aria-hidden="true"> <label for="collapse-section1_0_2" aria-hidden="true"><strong>V1.0.2 / 13-July-2012</strong></label>
<div>
-<h2 id="main-changes-16">Main Changes</h2>
+<h2 id="main-changes-17">Main Changes</h2>
<ul>
<li>stm32f0xx.h
<ul>
@@ -351,7 +390,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section1_0_1" aria-hidden="true"> <label for="collapse-section1_0_1" aria-hidden="true"><strong>V1.0.1 / 20-April-2012</strong></label>
<div>
-<h2 id="main-changes-17">Main Changes</h2>
+<h2 id="main-changes-18">Main Changes</h2>
<ul>
<li>stm32f0xx.h
<ul>
@@ -364,7 +403,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section1_0_0" aria-hidden="true"> <label for="collapse-section1_0_0" aria-hidden="true"><strong>V1.0.0 / 04-September-2012</strong></label>
<div>
-<h2 id="main-changes-18">Main Changes</h2>
+<h2 id="main-changes-19">Main Changes</h2>
<ul>
<li>First official release for <strong>STM32F30x</strong> devices (Standard Library)</li>
</ul>
diff --git a/Source/Templates/system_stm32f0xx.c b/Source/Templates/system_stm32f0xx.c
index 8c4123c..4761a85 100644
--- a/Source/Templates/system_stm32f0xx.c
+++ b/Source/Templates/system_stm32f0xx.c
@@ -18,25 +18,7 @@
* be called whenever the core clock is changed
* during program execution.
*
- * 2. After each device reset the HSI (8 MHz) is used as system clock source.
- * Then SystemInit() function is called, in "startup_stm32f0xx.s" file, to
- * configure the system clock before to branch to main program.
*
- * 3. This file configures the system clock as follows:
- *=============================================================================
- * Supported STM32F0xx device
- *-----------------------------------------------------------------------------
- * System Clock source | HSI
- *-----------------------------------------------------------------------------
- * SYSCLK(Hz) | 8000000
- *-----------------------------------------------------------------------------
- * HCLK(Hz) | 8000000
- *-----------------------------------------------------------------------------
- * AHB Prescaler | 1
- *-----------------------------------------------------------------------------
- * APB1 Prescaler | 1
- *-----------------------------------------------------------------------------
- *=============================================================================
******************************************************************************
* @attention
*
@@ -113,9 +95,9 @@
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
- Note: If you use this function to configure the system clock there is no need to
- call the 2 first functions listed above, since SystemCoreClock variable is
- updated automatically.
+ Note: If you use this function to configure the system clock; then there
+ is no need to call the 2 first functions listed above, since SystemCoreClock
+ variable is updated automatically.
*/
uint32_t SystemCoreClock = 8000000;
@@ -139,7 +121,7 @@
*/
/**
- * @brief Setup the microcontroller system.
+ * @brief Setup the microcontroller system
* @param None
* @retval None
*/
@@ -174,14 +156,14 @@
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied/divided by the PLL factors.
*
- * (*) HSI_VALUE is a constant defined in stm32f0xx_hal.h file (default value
+ * (*) HSI_VALUE is a constant defined in stm32f0xx_hal_conf.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
- * (**) HSE_VALUE is a constant defined in stm32f0xx_hal.h file (default value
- * 8 MHz), user has to ensure that HSE_VALUE is same as the real
- * frequency of the crystal used. Otherwise, this function may
- * have wrong result.
+ * (**) HSE_VALUE is a constant defined in stm32f0xx_hal_conf.h file (its value
+ * depends on the application requirements), user has to ensure that HSE_VALUE
+ * is same as the real frequency of the crystal used. Otherwise, this function
+ * may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
