Release v4.3.3
diff --git a/Include/stm32f100xb.h b/Include/stm32f100xb.h
index ab78980..e98e4c4 100644
--- a/Include/stm32f100xb.h
+++ b/Include/stm32f100xb.h
@@ -640,7 +640,15 @@
/** @addtogroup Exported_constants
* @{
*/
-
+
+ /** @addtogroup Hardware_Constant_Definition
+ * @{
+ */
+#define LSI_STARTUP_TIME 85U /*!< LSI Maximum startup time in us */
+ /**
+ * @}
+ */
+
/** @addtogroup Peripheral_Registers_Bits_Definition
* @{
*/
diff --git a/Include/stm32f100xe.h b/Include/stm32f100xe.h
index 334c4dc..abe71ee 100644
--- a/Include/stm32f100xe.h
+++ b/Include/stm32f100xe.h
@@ -749,7 +749,15 @@
/** @addtogroup Exported_constants
* @{
*/
-
+
+ /** @addtogroup Hardware_Constant_Definition
+ * @{
+ */
+#define LSI_STARTUP_TIME 85U /*!< LSI Maximum startup time in us */
+ /**
+ * @}
+ */
+
/** @addtogroup Peripheral_Registers_Bits_Definition
* @{
*/
diff --git a/Include/stm32f101x6.h b/Include/stm32f101x6.h
index 250962d..dd80728 100644
--- a/Include/stm32f101x6.h
+++ b/Include/stm32f101x6.h
@@ -565,7 +565,15 @@
/** @addtogroup Exported_constants
* @{
*/
-
+
+ /** @addtogroup Hardware_Constant_Definition
+ * @{
+ */
+#define LSI_STARTUP_TIME 85U /*!< LSI Maximum startup time in us */
+ /**
+ * @}
+ */
+
/** @addtogroup Peripheral_Registers_Bits_Definition
* @{
*/
diff --git a/Include/stm32f101xb.h b/Include/stm32f101xb.h
index aa524a9..c9128f0 100644
--- a/Include/stm32f101xb.h
+++ b/Include/stm32f101xb.h
@@ -580,7 +580,15 @@
/** @addtogroup Exported_constants
* @{
*/
-
+
+ /** @addtogroup Hardware_Constant_Definition
+ * @{
+ */
+#define LSI_STARTUP_TIME 85U /*!< LSI Maximum startup time in us */
+ /**
+ * @}
+ */
+
/** @addtogroup Peripheral_Registers_Bits_Definition
* @{
*/
diff --git a/Include/stm32f101xe.h b/Include/stm32f101xe.h
index bde6d7a..3e9c2f6 100644
--- a/Include/stm32f101xe.h
+++ b/Include/stm32f101xe.h
@@ -749,7 +749,15 @@
/** @addtogroup Exported_constants
* @{
*/
-
+
+ /** @addtogroup Hardware_Constant_Definition
+ * @{
+ */
+#define LSI_STARTUP_TIME 85U /*!< LSI Maximum startup time in us */
+ /**
+ * @}
+ */
+
/** @addtogroup Peripheral_Registers_Bits_Definition
* @{
*/
diff --git a/Include/stm32f101xg.h b/Include/stm32f101xg.h
index 35a142d..a0bfda1 100644
--- a/Include/stm32f101xg.h
+++ b/Include/stm32f101xg.h
@@ -774,7 +774,15 @@
/** @addtogroup Exported_constants
* @{
*/
-
+
+ /** @addtogroup Hardware_Constant_Definition
+ * @{
+ */
+#define LSI_STARTUP_TIME 85U /*!< LSI Maximum startup time in us */
+ /**
+ * @}
+ */
+
/** @addtogroup Peripheral_Registers_Bits_Definition
* @{
*/
diff --git a/Include/stm32f102x6.h b/Include/stm32f102x6.h
index 9917ec3..bd5aceb 100644
--- a/Include/stm32f102x6.h
+++ b/Include/stm32f102x6.h
@@ -605,7 +605,15 @@
/** @addtogroup Exported_constants
* @{
*/
-
+
+ /** @addtogroup Hardware_Constant_Definition
+ * @{
+ */
+#define LSI_STARTUP_TIME 85U /*!< LSI Maximum startup time in us */
+ /**
+ * @}
+ */
+
/** @addtogroup Peripheral_Registers_Bits_Definition
* @{
*/
diff --git a/Include/stm32f102xb.h b/Include/stm32f102xb.h
index f5d0042..d43ebe7 100644
--- a/Include/stm32f102xb.h
+++ b/Include/stm32f102xb.h
@@ -618,7 +618,15 @@
/** @addtogroup Exported_constants
* @{
*/
-
+
+ /** @addtogroup Hardware_Constant_Definition
+ * @{
+ */
+#define LSI_STARTUP_TIME 85U /*!< LSI Maximum startup time in us */
+ /**
+ * @}
+ */
+
/** @addtogroup Peripheral_Registers_Bits_Definition
* @{
*/
diff --git a/Include/stm32f103x6.h b/Include/stm32f103x6.h
index a484645..d88068a 100644
--- a/Include/stm32f103x6.h
+++ b/Include/stm32f103x6.h
@@ -680,7 +680,15 @@
/** @addtogroup Exported_constants
* @{
*/
-
+
+ /** @addtogroup Hardware_Constant_Definition
+ * @{
+ */
+#define LSI_STARTUP_TIME 85U /*!< LSI Maximum startup time in us */
+ /**
+ * @}
+ */
+
/** @addtogroup Peripheral_Registers_Bits_Definition
* @{
*/
diff --git a/Include/stm32f103xb.h b/Include/stm32f103xb.h
index 4bd7e5d..8171849 100644
--- a/Include/stm32f103xb.h
+++ b/Include/stm32f103xb.h
@@ -695,7 +695,15 @@
/** @addtogroup Exported_constants
* @{
*/
-
+
+ /** @addtogroup Hardware_Constant_Definition
+ * @{
+ */
+#define LSI_STARTUP_TIME 85U /*!< LSI Maximum startup time in us */
+ /**
+ * @}
+ */
+
/** @addtogroup Peripheral_Registers_Bits_Definition
* @{
*/
diff --git a/Include/stm32f103xe.h b/Include/stm32f103xe.h
index 1001fd8..9725d78 100644
--- a/Include/stm32f103xe.h
+++ b/Include/stm32f103xe.h
@@ -904,7 +904,15 @@
/** @addtogroup Exported_constants
* @{
*/
-
+
+ /** @addtogroup Hardware_Constant_Definition
+ * @{
+ */
+#define LSI_STARTUP_TIME 85U /*!< LSI Maximum startup time in us */
+ /**
+ * @}
+ */
+
/** @addtogroup Peripheral_Registers_Bits_Definition
* @{
*/
diff --git a/Include/stm32f103xg.h b/Include/stm32f103xg.h
index f74beff..6e6c7f0 100644
--- a/Include/stm32f103xg.h
+++ b/Include/stm32f103xg.h
@@ -923,7 +923,15 @@
/** @addtogroup Exported_constants
* @{
*/
-
+
+ /** @addtogroup Hardware_Constant_Definition
+ * @{
+ */
+#define LSI_STARTUP_TIME 85U /*!< LSI Maximum startup time in us */
+ /**
+ * @}
+ */
+
/** @addtogroup Peripheral_Registers_Bits_Definition
* @{
*/
diff --git a/Include/stm32f105xc.h b/Include/stm32f105xc.h
index 7421593..ffe062d 100644
--- a/Include/stm32f105xc.h
+++ b/Include/stm32f105xc.h
@@ -889,7 +889,15 @@
/** @addtogroup Exported_constants
* @{
*/
-
+
+ /** @addtogroup Hardware_Constant_Definition
+ * @{
+ */
+#define LSI_STARTUP_TIME 85U /*!< LSI Maximum startup time in us */
+ /**
+ * @}
+ */
+
/** @addtogroup Peripheral_Registers_Bits_Definition
* @{
*/
diff --git a/Include/stm32f107xc.h b/Include/stm32f107xc.h
index 5c40b46..c80d6a1 100644
--- a/Include/stm32f107xc.h
+++ b/Include/stm32f107xc.h
@@ -969,7 +969,15 @@
/** @addtogroup Exported_constants
* @{
*/
-
+
+ /** @addtogroup Hardware_Constant_Definition
+ * @{
+ */
+#define LSI_STARTUP_TIME 85U /*!< LSI Maximum startup time in us */
+ /**
+ * @}
+ */
+
/** @addtogroup Peripheral_Registers_Bits_Definition
* @{
*/
diff --git a/Include/stm32f1xx.h b/Include/stm32f1xx.h
index e34cc48..6817f52 100644
--- a/Include/stm32f1xx.h
+++ b/Include/stm32f1xx.h
@@ -90,11 +90,11 @@
#endif /* USE_HAL_DRIVER */
/**
- * @brief CMSIS Device version number V4.3.2
+ * @brief CMSIS Device version number V4.3.3
*/
#define __STM32F1_CMSIS_VERSION_MAIN (0x04) /*!< [31:24] main version */
#define __STM32F1_CMSIS_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
-#define __STM32F1_CMSIS_VERSION_SUB2 (0x02) /*!< [15:8] sub2 version */
+#define __STM32F1_CMSIS_VERSION_SUB2 (0x03) /*!< [15:8] sub2 version */
#define __STM32F1_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */
#define __STM32F1_CMSIS_VERSION ((__STM32F1_CMSIS_VERSION_MAIN << 24)\
|(__STM32F1_CMSIS_VERSION_SUB1 << 16)\
@@ -191,6 +191,61 @@
#define POSITION_VAL(VAL) (__CLZ(__RBIT(VAL)))
+/* Use of CMSIS compiler intrinsics for register exclusive access */
+/* Atomic 32-bit register access macro to set one or several bits */
+#define ATOMIC_SET_BIT(REG, BIT) \
+ do { \
+ uint32_t val; \
+ do { \
+ val = __LDREXW((__IO uint32_t *)&(REG)) | (BIT); \
+ } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
+ } while(0)
+
+/* Atomic 32-bit register access macro to clear one or several bits */
+#define ATOMIC_CLEAR_BIT(REG, BIT) \
+ do { \
+ uint32_t val; \
+ do { \
+ val = __LDREXW((__IO uint32_t *)&(REG)) & ~(BIT); \
+ } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
+ } while(0)
+
+/* Atomic 32-bit register access macro to clear and set one or several bits */
+#define ATOMIC_MODIFY_REG(REG, CLEARMSK, SETMASK) \
+ do { \
+ uint32_t val; \
+ do { \
+ val = (__LDREXW((__IO uint32_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
+ } while ((__STREXW(val,(__IO uint32_t *)&(REG))) != 0U); \
+ } while(0)
+
+/* Atomic 16-bit register access macro to set one or several bits */
+#define ATOMIC_SETH_BIT(REG, BIT) \
+ do { \
+ uint16_t val; \
+ do { \
+ val = __LDREXH((__IO uint16_t *)&(REG)) | (BIT); \
+ } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
+ } while(0)
+
+/* Atomic 16-bit register access macro to clear one or several bits */
+#define ATOMIC_CLEARH_BIT(REG, BIT) \
+ do { \
+ uint16_t val; \
+ do { \
+ val = __LDREXH((__IO uint16_t *)&(REG)) & ~(BIT); \
+ } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
+ } while(0)
+
+/* Atomic 16-bit register access macro to clear and set one or several bits */
+#define ATOMIC_MODIFYH_REG(REG, CLEARMSK, SETMASK) \
+ do { \
+ uint16_t val; \
+ do { \
+ val = (__LDREXH((__IO uint16_t *)&(REG)) & ~(CLEARMSK)) | (SETMASK); \
+ } while ((__STREXH(val,(__IO uint16_t *)&(REG))) != 0U); \
+ } while(0)
+
/**
* @}
diff --git a/README.md b/README.md
index 294bcb8..9f892fc 100644
--- a/README.md
+++ b/README.md
@@ -32,6 +32,7 @@
Tag v4.3.1 | Tag v5.4.0_cm3 | Tag v1.8.0
Tag v4.3.1 | Tag v5.4.0_cm3 | Tag v1.8.1
Tag v4.3.2 | Tag v5.4.0_cm3 | Tag v1.8.2
+Tag v4.3.3 | Tag v5.4.0_cm3 | Tag v1.8.4
The full **STM32CubeF1** MCU package is available [here](https://github.com/STMicroelectronics/STM32CubeF1).
diff --git a/Release_Notes.html b/Release_Notes.html
index 38ec2ab..06d61db 100644
--- a/Release_Notes.html
+++ b/Release_Notes.html
@@ -5,7 +5,7 @@
<meta name="generator" content="pandoc" />
<meta name="viewport" content="width=device-width, initial-scale=1.0, user-scalable=yes" />
<title>Release Notes for STM32F1xx CMSIS</title>
- <style>
+ <style type="text/css">
code{white-space: pre-wrap;}
span.smallcaps{font-variant: small-caps;}
span.underline{text-decoration: underline;}
@@ -38,10 +38,22 @@
<div class="col-sm-12 col-lg-8">
<h1 id="update-history"><strong>Update History</strong></h1>
<div class="collapse">
-<input type="checkbox" id="collapse-section4_3_2" checked aria-hidden="true"> <label for="collapse-section4_3_2" aria-hidden="true"><strong>V4.3.2 / 07-September-2020</strong></label>
+<input type="checkbox" id="collapse-section4_3_3" checked aria-hidden="true"> <label for="collapse-section4_3_3" aria-hidden="true"><strong>V4.3.3 / 21-May-2021</strong></label>
<div>
<h2 id="main-changes">Main Changes</h2>
<ul>
+<li>Improve GCC startup files robustness.</li>
+<li>Add LSI maximum startup time datasheet value: LSI_STARTUP_TIME.</li>
+<li>Add atomic register access macros.</li>
+<li>File “startup_stm32f105xc.s” updated to call static constructors.</li>
+</ul>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section4_3_2" aria-hidden="true"> <label for="collapse-section4_3_2" aria-hidden="true"><strong>V4.3.2 / 07-September-2020</strong></label>
+<div>
+<h2 id="main-changes-1">Main Changes</h2>
+<ul>
<li>Protect Vector table modification following SRAM or FLASH preprocessor directive by a generic preprocessor directive : USER_VECT_TAB_ADDRESS</li>
<li>SystemInit(): update to don’t reset RCC registers to its reset values.</li>
<li>TIM:
@@ -58,7 +70,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section4_3_1" aria-hidden="true"> <label for="collapse-section4_3_1" aria-hidden="true"><strong>V4.3.1 / 26-June-2019</strong></label>
<div>
-<h2 id="main-changes-1">Main Changes</h2>
+<h2 id="main-changes-2">Main Changes</h2>
<ul>
<li>Fix MISRA C 2012 Compilation errors: update to use “UL” postfix for bits mask definitions(_Msk) and memory/peripheral base addresses</li>
<li>Fix wrong initialization value for “SystemCoreClock” in System_stm32f1xx.c file</li>
@@ -93,7 +105,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section4_3_0" aria-hidden="true"> <label for="collapse-section4_3_0" aria-hidden="true"><strong>V4.3.0 / 09-October-2018</strong></label>
<div>
-<h2 id="main-changes-2">Main Changes</h2>
+<h2 id="main-changes-3">Main Changes</h2>
<ul>
<li>Add missing IS_TIM_SYNCHRO_INSTANCE macro definition to check TIM SYNCHRO feature instance support.</li>
</ul>
@@ -102,7 +114,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section4_2_0" aria-hidden="true"> <label for="collapse-section4_2_0" aria-hidden="true"><strong>V4.2.0 / 31-March-2017</strong></label>
<div>
-<h2 id="main-changes-3">Main Changes</h2>
+<h2 id="main-changes-4">Main Changes</h2>
<ul>
<li>Use _Pos and _Mask macros for all Bit Definitions</li>
<li>Remove Core-CM3 bit definitions from CMSIS devices drivers: duplicated with bit definitions in core_cm3.h.</li>
@@ -142,7 +154,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section4_1_0" aria-hidden="true"> <label for="collapse-section4_1_0" aria-hidden="true"><strong>V4.1.0 / 29-April-2016</strong></label>
<div>
-<h2 id="main-changes-4">Main Changes</h2>
+<h2 id="main-changes-5">Main Changes</h2>
<ul>
<li>Add _Pos and _Msk defines to be used with _VAL2FLD(field, value) and _FLD2VAL(field, value).
<ul>
@@ -161,7 +173,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section4_0_2" aria-hidden="true"> <label for="collapse-section4_0_2" aria-hidden="true"><strong>V4.0.2 / 18-December-2016</strong></label>
<div>
-<h2 id="main-changes-5">Main Changes</h2>
+<h2 id="main-changes-6">Main Changes</h2>
<ul>
<li>FLASH: Add FLASH_OBR_DATA0 and FLASH_OBR_DATA1 for FLASH_OBR register.</li>
<li>WWDG: Align bit name across all STM32 families.
@@ -191,7 +203,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section4_0_1" aria-hidden="true"> <label for="collapse-section4_0_1" aria-hidden="true"><strong>V4.0.1 / 31-July-2015</strong></label>
<div>
-<h2 id="main-changes-6">Main Changes</h2>
+<h2 id="main-changes-7">Main Changes</h2>
<ul>
<li>Remove __IO or __I on constant table declaration (AHBPrescTable in system_stm32f1xx.c) due to issue with mbed C++ code. The table content was filled with random value at initialization phase.</li>
<li>uint8_t alignment done on CMSIS CRC registers structure.</li>
@@ -202,7 +214,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section4_0_0" aria-hidden="true"> <label for="collapse-section4_0_0" aria-hidden="true"><strong>V4.0.0 / 16-December-2014</strong></label>
<div>
-<h2 id="main-changes-7">Main Changes</h2>
+<h2 id="main-changes-8">Main Changes</h2>
<ul>
<li>Update based on STM32Cube specification</li>
<li><strong>This version has to be used only with STM32CubeF1 based development</strong></li>
@@ -212,7 +224,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section3_6_3" aria-hidden="true"> <label for="collapse-section3_6_3" aria-hidden="true"><strong>V3.6.3 / 10-April-2014</strong></label>
<div>
-<h2 id="main-changes-8">Main Changes</h2>
+<h2 id="main-changes-9">Main Changes</h2>
<ul>
<li>Update startup files for EWARM toolchain to cope with compiler enhancement of the V7.10 version.</li>
</ul>
@@ -221,7 +233,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section3_6_2" aria-hidden="true"> <label for="collapse-section3_6_2" aria-hidden="true"><strong>V3.6.2 / 28-February-2013</strong></label>
<div>
-<h2 id="main-changes-9">Main Changes</h2>
+<h2 id="main-changes-10">Main Changes</h2>
<ul>
<li>stm32f10x.h
<ul>
@@ -234,7 +246,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section3_6_1" aria-hidden="true"> <label for="collapse-section3_6_1" aria-hidden="true"><strong>V3.6.1 / 09-March-2012</strong></label>
<div>
-<h2 id="main-changes-10">Main Changes</h2>
+<h2 id="main-changes-11">Main Changes</h2>
<ul>
<li>All source files: license disclaimer text update and add link to the License file on ST Internet.</li>
</ul>
@@ -243,7 +255,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section3_6_0" aria-hidden="true"> <label for="collapse-section3_6_0" aria-hidden="true"><strong>V3.6.0 / 27-January-2012</strong></label>
<div>
-<h2 id="main-changes-11">Main Changes</h2>
+<h2 id="main-changes-12">Main Changes</h2>
<ul>
<li>Update directory structure to be compliant with CMSIS V2.1</li>
<li>All source files: update disclaimer to add reference to the new license agreement</li>
@@ -272,7 +284,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section3_5_0" aria-hidden="true"> <label for="collapse-section3_5_0" aria-hidden="true"><strong>V3.5.0 / 11-March-2011</strong></label>
<div>
-<h2 id="main-changes-12">Main Changes</h2>
+<h2 id="main-changes-13">Main Changes</h2>
<ul>
<li><em>stm32f10x.h</em> and <em>startup_stm32f10x_hd_vl.s</em> files: remove the FSMC interrupt definition for STM32F10x High-density Value line devices.</li>
<li>system_stm32f10x.c file provided within the CMSIS folder.</li>
@@ -282,7 +294,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section3_4_0" aria-hidden="true"> <label for="collapse-section3_4_0" aria-hidden="true"><strong>V3.4.0 / 15-October-2010</strong></label>
<div>
-<h2 id="main-changes-13">Main Changes</h2>
+<h2 id="main-changes-14">Main Changes</h2>
<ul>
<li>General
<ul>
@@ -318,7 +330,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section3_3_0" aria-hidden="true"> <label for="collapse-section3_3_0" aria-hidden="true"><strong>V3.3.0 / 16-April-2010</strong></label>
<div>
-<h2 id="main-changes-14">Main Changes</h2>
+<h2 id="main-changes-15">Main Changes</h2>
<ul>
<li>General
<ul>
@@ -357,7 +369,7 @@
<div class="collapse">
<input type="checkbox" id="collapse-section3_2_0" aria-hidden="true"> <label for="collapse-section3_2_0" aria-hidden="true"><strong>V3.2.0 / 01-March-2010</strong></label>
<div>
-<h2 id="main-changes-15">Main Changes</h2>
+<h2 id="main-changes-16">Main Changes</h2>
<ul>
<li>General
<ul>
diff --git a/Source/Templates/arm/startup_stm32f101xg.s b/Source/Templates/arm/startup_stm32f101xg.s
index f8e7500..309ac0e 100644
--- a/Source/Templates/arm/startup_stm32f101xg.s
+++ b/Source/Templates/arm/startup_stm32f101xg.s
@@ -93,7 +93,7 @@
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
- DCD ADC1_2_IRQHandler ; ADC1_2
+ DCD ADC1_IRQHandler ; ADC1
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
@@ -216,7 +216,7 @@
EXPORT DMA1_Channel5_IRQHandler [WEAK]
EXPORT DMA1_Channel6_IRQHandler [WEAK]
EXPORT DMA1_Channel7_IRQHandler [WEAK]
- EXPORT ADC1_2_IRQHandler [WEAK]
+ EXPORT ADC1_IRQHandler [WEAK]
EXPORT EXTI9_5_IRQHandler [WEAK]
EXPORT TIM9_IRQHandler [WEAK]
EXPORT TIM10_IRQHandler [WEAK]
@@ -268,7 +268,7 @@
DMA1_Channel5_IRQHandler
DMA1_Channel6_IRQHandler
DMA1_Channel7_IRQHandler
-ADC1_2_IRQHandler
+ADC1_IRQHandler
EXTI9_5_IRQHandler
TIM9_IRQHandler
TIM10_IRQHandler
diff --git a/Source/Templates/gcc/startup_stm32f100xb.s b/Source/Templates/gcc/startup_stm32f100xb.s
index 1d166fd..0d8575b 100644
--- a/Source/Templates/gcc/startup_stm32f100xb.s
+++ b/Source/Templates/gcc/startup_stm32f100xb.s
@@ -62,31 +62,34 @@
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
+ adds r4, r0, r3
+ cmp r4, r1
bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
+
/* Zero fill the bss segment. */
-FillZerobss:
+ ldr r2, =_sbss
+ ldr r4, =_ebss
movs r3, #0
- str r3, [r2], #4
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
+ cmp r2, r4
bcc FillZerobss
/* Call the clock system intitialization function.*/
diff --git a/Source/Templates/gcc/startup_stm32f100xe.s b/Source/Templates/gcc/startup_stm32f100xe.s
index 62d9fc7..a430da4 100644
--- a/Source/Templates/gcc/startup_stm32f100xe.s
+++ b/Source/Templates/gcc/startup_stm32f100xe.s
@@ -62,31 +62,34 @@
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
+ adds r4, r0, r3
+ cmp r4, r1
bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
+
/* Zero fill the bss segment. */
-FillZerobss:
+ ldr r2, =_sbss
+ ldr r4, =_ebss
movs r3, #0
- str r3, [r2], #4
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
+ cmp r2, r4
bcc FillZerobss
/* Call the clock system intitialization function.*/
diff --git a/Source/Templates/gcc/startup_stm32f101x6.s b/Source/Templates/gcc/startup_stm32f101x6.s
index 9c1f473..2f3df08 100644
--- a/Source/Templates/gcc/startup_stm32f101x6.s
+++ b/Source/Templates/gcc/startup_stm32f101x6.s
@@ -62,31 +62,34 @@
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
+ adds r4, r0, r3
+ cmp r4, r1
bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
+
/* Zero fill the bss segment. */
-FillZerobss:
+ ldr r2, =_sbss
+ ldr r4, =_ebss
movs r3, #0
- str r3, [r2], #4
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
+ cmp r2, r4
bcc FillZerobss
/* Call the clock system intitialization function.*/
diff --git a/Source/Templates/gcc/startup_stm32f101xb.s b/Source/Templates/gcc/startup_stm32f101xb.s
index 5f41f59..abec1e4 100644
--- a/Source/Templates/gcc/startup_stm32f101xb.s
+++ b/Source/Templates/gcc/startup_stm32f101xb.s
@@ -62,31 +62,34 @@
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
+ adds r4, r0, r3
+ cmp r4, r1
bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
+
/* Zero fill the bss segment. */
-FillZerobss:
+ ldr r2, =_sbss
+ ldr r4, =_ebss
movs r3, #0
- str r3, [r2], #4
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
+ cmp r2, r4
bcc FillZerobss
/* Call the clock system intitialization function.*/
diff --git a/Source/Templates/gcc/startup_stm32f101xe.s b/Source/Templates/gcc/startup_stm32f101xe.s
index e18a210..0af2f20 100644
--- a/Source/Templates/gcc/startup_stm32f101xe.s
+++ b/Source/Templates/gcc/startup_stm32f101xe.s
@@ -62,31 +62,34 @@
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
+ adds r4, r0, r3
+ cmp r4, r1
bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
+
/* Zero fill the bss segment. */
-FillZerobss:
+ ldr r2, =_sbss
+ ldr r4, =_ebss
movs r3, #0
- str r3, [r2], #4
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
+ cmp r2, r4
bcc FillZerobss
/* Call the clock system intitialization function.*/
diff --git a/Source/Templates/gcc/startup_stm32f101xg.s b/Source/Templates/gcc/startup_stm32f101xg.s
index 3d7f007..4e8a95f 100644
--- a/Source/Templates/gcc/startup_stm32f101xg.s
+++ b/Source/Templates/gcc/startup_stm32f101xg.s
@@ -62,31 +62,34 @@
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
+ adds r4, r0, r3
+ cmp r4, r1
bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
+
/* Zero fill the bss segment. */
-FillZerobss:
+ ldr r2, =_sbss
+ ldr r4, =_ebss
movs r3, #0
- str r3, [r2], #4
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
+ cmp r2, r4
bcc FillZerobss
/* Call the clock system intitialization function.*/
@@ -158,7 +161,7 @@
.word DMA1_Channel5_IRQHandler
.word DMA1_Channel6_IRQHandler
.word DMA1_Channel7_IRQHandler
- .word ADC1_2_IRQHandler
+ .word ADC1_IRQHandler
.word 0
.word 0
.word 0
@@ -335,8 +338,8 @@
.weak DMA1_Channel7_IRQHandler
.thumb_set DMA1_Channel7_IRQHandler,Default_Handler
- .weak ADC1_2_IRQHandler
- .thumb_set ADC1_2_IRQHandler,Default_Handler
+ .weak ADC1_IRQHandler
+ .thumb_set ADC1_IRQHandler,Default_Handler
.weak EXTI9_5_IRQHandler
.thumb_set EXTI9_5_IRQHandler,Default_Handler
diff --git a/Source/Templates/gcc/startup_stm32f102x6.s b/Source/Templates/gcc/startup_stm32f102x6.s
index 569eddb..97437a1 100644
--- a/Source/Templates/gcc/startup_stm32f102x6.s
+++ b/Source/Templates/gcc/startup_stm32f102x6.s
@@ -62,31 +62,34 @@
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
+ adds r4, r0, r3
+ cmp r4, r1
bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
+
/* Zero fill the bss segment. */
-FillZerobss:
+ ldr r2, =_sbss
+ ldr r4, =_ebss
movs r3, #0
- str r3, [r2], #4
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
+ cmp r2, r4
bcc FillZerobss
/* Call the clock system intitialization function.*/
diff --git a/Source/Templates/gcc/startup_stm32f102xb.s b/Source/Templates/gcc/startup_stm32f102xb.s
index 3427546..914cc31 100644
--- a/Source/Templates/gcc/startup_stm32f102xb.s
+++ b/Source/Templates/gcc/startup_stm32f102xb.s
@@ -62,31 +62,34 @@
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
+ adds r4, r0, r3
+ cmp r4, r1
bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
+
/* Zero fill the bss segment. */
-FillZerobss:
+ ldr r2, =_sbss
+ ldr r4, =_ebss
movs r3, #0
- str r3, [r2], #4
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
+ cmp r2, r4
bcc FillZerobss
/* Call the clock system intitialization function.*/
diff --git a/Source/Templates/gcc/startup_stm32f103x6.s b/Source/Templates/gcc/startup_stm32f103x6.s
index a0ffda6..ac5cb81 100644
--- a/Source/Templates/gcc/startup_stm32f103x6.s
+++ b/Source/Templates/gcc/startup_stm32f103x6.s
@@ -62,31 +62,34 @@
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
+ adds r4, r0, r3
+ cmp r4, r1
bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
+
/* Zero fill the bss segment. */
-FillZerobss:
+ ldr r2, =_sbss
+ ldr r4, =_ebss
movs r3, #0
- str r3, [r2], #4
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
+ cmp r2, r4
bcc FillZerobss
/* Call the clock system intitialization function.*/
diff --git a/Source/Templates/gcc/startup_stm32f103xb.s b/Source/Templates/gcc/startup_stm32f103xb.s
index a463e88..f2b7fbe 100644
--- a/Source/Templates/gcc/startup_stm32f103xb.s
+++ b/Source/Templates/gcc/startup_stm32f103xb.s
@@ -62,31 +62,34 @@
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
+ adds r4, r0, r3
+ cmp r4, r1
bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
+
/* Zero fill the bss segment. */
-FillZerobss:
+ ldr r2, =_sbss
+ ldr r4, =_ebss
movs r3, #0
- str r3, [r2], #4
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
+ cmp r2, r4
bcc FillZerobss
/* Call the clock system intitialization function.*/
diff --git a/Source/Templates/gcc/startup_stm32f103xe.s b/Source/Templates/gcc/startup_stm32f103xe.s
index 11d37f3..ef23cee 100644
--- a/Source/Templates/gcc/startup_stm32f103xe.s
+++ b/Source/Templates/gcc/startup_stm32f103xe.s
@@ -64,31 +64,34 @@
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
+ adds r4, r0, r3
+ cmp r4, r1
bcc CopyDataInit
- ldr r2, =_sbss
- b LoopFillZerobss
+
/* Zero fill the bss segment. */
-FillZerobss:
+ ldr r2, =_sbss
+ ldr r4, =_ebss
movs r3, #0
- str r3, [r2], #4
+ b LoopFillZerobss
+
+FillZerobss:
+ str r3, [r2]
+ adds r2, r2, #4
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
+ cmp r2, r4
bcc FillZerobss
/* Call the clock system intitialization function.*/
diff --git a/Source/Templates/gcc/startup_stm32f103xg.s b/Source/Templates/gcc/startup_stm32f103xg.s
index c102b95..514b2a3 100644
--- a/Source/Templates/gcc/startup_stm32f103xg.s
+++ b/Source/Templates/gcc/startup_stm32f103xg.s
@@ -62,32 +62,34 @@
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
+ adds r4, r0, r3
+ cmp r4, r1
bcc CopyDataInit
+
+/* Zero fill the bss segment. */
ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
b LoopFillZerobss
-/* Zero fill the bss segment. */
FillZerobss:
- movs r3, #0
- str r3, [r2], #4
+ str r3, [r2]
+ adds r2, r2, #4
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
+ cmp r2, r4
bcc FillZerobss
/* Call the clock system intitialization function.*/
diff --git a/Source/Templates/gcc/startup_stm32f105xc.s b/Source/Templates/gcc/startup_stm32f105xc.s
index 6fa3814..9ca591a 100644
--- a/Source/Templates/gcc/startup_stm32f105xc.s
+++ b/Source/Templates/gcc/startup_stm32f105xc.s
@@ -62,35 +62,39 @@
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
+ adds r4, r0, r3
+ cmp r4, r1
bcc CopyDataInit
+
+/* Zero fill the bss segment. */
ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
b LoopFillZerobss
-/* Zero fill the bss segment. */
FillZerobss:
- movs r3, #0
- str r3, [r2], #4
+ str r3, [r2]
+ adds r2, r2, #4
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
+ cmp r2, r4
bcc FillZerobss
/* Call the clock system intitialization function.*/
bl SystemInit
+/* Call static constructors */
+ bl __libc_init_array
/* Call the application's entry point.*/
bl main
bx lr
diff --git a/Source/Templates/gcc/startup_stm32f107xc.s b/Source/Templates/gcc/startup_stm32f107xc.s
index b54cc4b..d28b3fd 100644
--- a/Source/Templates/gcc/startup_stm32f107xc.s
+++ b/Source/Templates/gcc/startup_stm32f107xc.s
@@ -62,32 +62,34 @@
Reset_Handler:
/* Copy the data segment initializers from flash to SRAM */
- movs r1, #0
+ ldr r0, =_sdata
+ ldr r1, =_edata
+ ldr r2, =_sidata
+ movs r3, #0
b LoopCopyDataInit
CopyDataInit:
- ldr r3, =_sidata
- ldr r3, [r3, r1]
- str r3, [r0, r1]
- adds r1, r1, #4
+ ldr r4, [r2, r3]
+ str r4, [r0, r3]
+ adds r3, r3, #4
LoopCopyDataInit:
- ldr r0, =_sdata
- ldr r3, =_edata
- adds r2, r0, r1
- cmp r2, r3
+ adds r4, r0, r3
+ cmp r4, r1
bcc CopyDataInit
+
+/* Zero fill the bss segment. */
ldr r2, =_sbss
+ ldr r4, =_ebss
+ movs r3, #0
b LoopFillZerobss
-/* Zero fill the bss segment. */
FillZerobss:
- movs r3, #0
- str r3, [r2], #4
+ str r3, [r2]
+ adds r2, r2, #4
LoopFillZerobss:
- ldr r3, = _ebss
- cmp r2, r3
+ cmp r2, r4
bcc FillZerobss
/* Call the clock system intitialization function.*/
diff --git a/Source/Templates/iar/startup_stm32f101xg.s b/Source/Templates/iar/startup_stm32f101xg.s
index ca57f93..21ab456 100644
--- a/Source/Templates/iar/startup_stm32f101xg.s
+++ b/Source/Templates/iar/startup_stm32f101xg.s
@@ -92,7 +92,7 @@
DCD DMA1_Channel5_IRQHandler ; DMA1 Channel 5
DCD DMA1_Channel6_IRQHandler ; DMA1 Channel 6
DCD DMA1_Channel7_IRQHandler ; DMA1 Channel 7
- DCD ADC1_2_IRQHandler ; ADC1 & ADC2
+ DCD ADC1_IRQHandler ; ADC1
DCD 0 ; Reserved
DCD 0 ; Reserved
DCD 0 ; Reserved
@@ -283,10 +283,10 @@
DMA1_Channel7_IRQHandler
B DMA1_Channel7_IRQHandler
- PUBWEAK ADC1_2_IRQHandler
+ PUBWEAK ADC1_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
-ADC1_2_IRQHandler
- B ADC1_2_IRQHandler
+ADC1_IRQHandler
+ B ADC1_IRQHandler
PUBWEAK EXTI9_5_IRQHandler
SECTION .text:CODE:REORDER:NOROOT(1)
