Release v4.3.4
diff --git a/Include/stm32f100xb.h b/Include/stm32f100xb.h
index e98e4c4..f3da55c 100644
--- a/Include/stm32f100xb.h
+++ b/Include/stm32f100xb.h
@@ -9,18 +9,17 @@
   *          This file contains:
   *           - Data structures and the address mapping for all peripherals
   *           - Peripheral's registers declarations and bits definition
-  *           - Macros to access peripheral’s registers hardware
+  *           - Macros to access peripheral's registers hardware
   *  
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -1350,7 +1349,7 @@
 #define RCC_BDCR_RTCSEL_0                    (0x1UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000100 */
 #define RCC_BDCR_RTCSEL_1                    (0x2UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000200 */
 
-/*!< RTC congiguration */
+/*!< RTC configuration */
 #define RCC_BDCR_RTCSEL_NOCLOCK              0x00000000U                       /*!< No clock */
 #define RCC_BDCR_RTCSEL_LSE                  0x00000100U                       /*!< LSE oscillator clock used as RTC clock */
 #define RCC_BDCR_RTCSEL_LSI                  0x00000200U                       /*!< LSI oscillator clock used as RTC clock */
@@ -3380,7 +3379,7 @@
 #define ADC_CR2_DMA                         ADC_CR2_DMA_Msk                    /*!< ADC DMA transfer enable */
 #define ADC_CR2_ALIGN_Pos                   (11U)                              
 #define ADC_CR2_ALIGN_Msk                   (0x1UL << ADC_CR2_ALIGN_Pos)        /*!< 0x00000800 */
-#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignement */
+#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignment */
 
 #define ADC_CR2_JEXTSEL_Pos                 (12U)                              
 #define ADC_CR2_JEXTSEL_Msk                 (0x7UL << ADC_CR2_JEXTSEL_Pos)      /*!< 0x00007000 */
@@ -5927,14 +5926,14 @@
 #define USBWakeUp_IRQn          CEC_IRQn
 #define OTG_FS_WKUP_IRQn        CEC_IRQn
 #define TIM1_BRK_TIM9_IRQn      TIM1_BRK_TIM15_IRQn
-#define TIM1_BRK_IRQn           TIM1_BRK_TIM15_IRQn
 #define TIM9_IRQn               TIM1_BRK_TIM15_IRQn
-#define TIM1_TRG_COM_IRQn       TIM1_TRG_COM_TIM17_IRQn
+#define TIM1_BRK_IRQn           TIM1_BRK_TIM15_IRQn
 #define TIM11_IRQn              TIM1_TRG_COM_TIM17_IRQn
+#define TIM1_TRG_COM_IRQn       TIM1_TRG_COM_TIM17_IRQn
 #define TIM1_TRG_COM_TIM11_IRQn TIM1_TRG_COM_TIM17_IRQn
 #define TIM1_UP_IRQn            TIM1_UP_TIM16_IRQn
-#define TIM1_UP_TIM10_IRQn      TIM1_UP_TIM16_IRQn
 #define TIM10_IRQn              TIM1_UP_TIM16_IRQn
+#define TIM1_UP_TIM10_IRQn      TIM1_UP_TIM16_IRQn
 #define TIM6_IRQn               TIM6_DAC_IRQn
 
 
@@ -5943,14 +5942,14 @@
 #define USBWakeUp_IRQHandler          CEC_IRQHandler
 #define OTG_FS_WKUP_IRQHandler        CEC_IRQHandler
 #define TIM1_BRK_TIM9_IRQHandler      TIM1_BRK_TIM15_IRQHandler
-#define TIM1_BRK_IRQHandler           TIM1_BRK_TIM15_IRQHandler
 #define TIM9_IRQHandler               TIM1_BRK_TIM15_IRQHandler
-#define TIM1_TRG_COM_IRQHandler       TIM1_TRG_COM_TIM17_IRQHandler
+#define TIM1_BRK_IRQHandler           TIM1_BRK_TIM15_IRQHandler
 #define TIM11_IRQHandler              TIM1_TRG_COM_TIM17_IRQHandler
+#define TIM1_TRG_COM_IRQHandler       TIM1_TRG_COM_TIM17_IRQHandler
 #define TIM1_TRG_COM_TIM11_IRQHandler TIM1_TRG_COM_TIM17_IRQHandler
 #define TIM1_UP_IRQHandler            TIM1_UP_TIM16_IRQHandler
-#define TIM1_UP_TIM10_IRQHandler      TIM1_UP_TIM16_IRQHandler
 #define TIM10_IRQHandler              TIM1_UP_TIM16_IRQHandler
+#define TIM1_UP_TIM10_IRQHandler      TIM1_UP_TIM16_IRQHandler
 #define TIM6_IRQHandler               TIM6_DAC_IRQHandler
 
 
@@ -5970,5 +5969,4 @@
 #endif /* __STM32F100xB_H */
   
   
-  
-  /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/Include/stm32f100xe.h b/Include/stm32f100xe.h
index abe71ee..a8758bf 100644
--- a/Include/stm32f100xe.h
+++ b/Include/stm32f100xe.h
@@ -9,18 +9,17 @@
   *          This file contains:
   *           - Data structures and the address mapping for all peripherals
   *           - Peripheral's registers declarations and bits definition
-  *           - Macros to access peripheral’s registers hardware
+  *           - Macros to access peripheral's registers hardware
   *  
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -1679,7 +1678,7 @@
 #define RCC_BDCR_RTCSEL_0                    (0x1UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000100 */
 #define RCC_BDCR_RTCSEL_1                    (0x2UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000200 */
 
-/*!< RTC congiguration */
+/*!< RTC configuration */
 #define RCC_BDCR_RTCSEL_NOCLOCK              0x00000000U                       /*!< No clock */
 #define RCC_BDCR_RTCSEL_LSE                  0x00000100U                       /*!< LSE oscillator clock used as RTC clock */
 #define RCC_BDCR_RTCSEL_LSI                  0x00000200U                       /*!< LSI oscillator clock used as RTC clock */
@@ -3727,7 +3726,7 @@
 #define ADC_CR2_DMA                         ADC_CR2_DMA_Msk                    /*!< ADC DMA transfer enable */
 #define ADC_CR2_ALIGN_Pos                   (11U)                              
 #define ADC_CR2_ALIGN_Msk                   (0x1UL << ADC_CR2_ALIGN_Pos)        /*!< 0x00000800 */
-#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignement */
+#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignment */
 
 #define ADC_CR2_JEXTSEL_Pos                 (12U)                              
 #define ADC_CR2_JEXTSEL_Msk                 (0x7UL << ADC_CR2_JEXTSEL_Pos)      /*!< 0x00007000 */
@@ -6529,20 +6528,20 @@
 #define ADC1_2_IRQn             ADC1_IRQn
 #define OTG_FS_WKUP_IRQn        CEC_IRQn
 #define USBWakeUp_IRQn          CEC_IRQn
-#define TIM8_BRK_IRQn           TIM12_IRQn
 #define TIM8_BRK_TIM12_IRQn     TIM12_IRQn
+#define TIM8_BRK_IRQn           TIM12_IRQn
 #define TIM8_UP_IRQn            TIM13_IRQn
 #define TIM8_UP_TIM13_IRQn      TIM13_IRQn
 #define TIM8_TRG_COM_TIM14_IRQn TIM14_IRQn
 #define TIM8_TRG_COM_IRQn       TIM14_IRQn
-#define TIM9_IRQn               TIM1_BRK_TIM15_IRQn
 #define TIM1_BRK_IRQn           TIM1_BRK_TIM15_IRQn
 #define TIM1_BRK_TIM9_IRQn      TIM1_BRK_TIM15_IRQn
-#define TIM1_TRG_COM_TIM11_IRQn TIM1_TRG_COM_TIM17_IRQn
+#define TIM9_IRQn               TIM1_BRK_TIM15_IRQn
 #define TIM1_TRG_COM_IRQn       TIM1_TRG_COM_TIM17_IRQn
+#define TIM1_TRG_COM_TIM11_IRQn TIM1_TRG_COM_TIM17_IRQn
 #define TIM11_IRQn              TIM1_TRG_COM_TIM17_IRQn
-#define TIM10_IRQn              TIM1_UP_TIM16_IRQn
 #define TIM1_UP_TIM10_IRQn      TIM1_UP_TIM16_IRQn
+#define TIM10_IRQn              TIM1_UP_TIM16_IRQn
 #define TIM1_UP_IRQn            TIM1_UP_TIM16_IRQn
 #define TIM6_IRQn               TIM6_DAC_IRQn
 
@@ -6551,20 +6550,20 @@
 #define ADC1_2_IRQHandler             ADC1_IRQHandler
 #define OTG_FS_WKUP_IRQHandler        CEC_IRQHandler
 #define USBWakeUp_IRQHandler          CEC_IRQHandler
-#define TIM8_BRK_IRQHandler           TIM12_IRQHandler
 #define TIM8_BRK_TIM12_IRQHandler     TIM12_IRQHandler
+#define TIM8_BRK_IRQHandler           TIM12_IRQHandler
 #define TIM8_UP_IRQHandler            TIM13_IRQHandler
 #define TIM8_UP_TIM13_IRQHandler      TIM13_IRQHandler
 #define TIM8_TRG_COM_TIM14_IRQHandler TIM14_IRQHandler
 #define TIM8_TRG_COM_IRQHandler       TIM14_IRQHandler
-#define TIM9_IRQHandler               TIM1_BRK_TIM15_IRQHandler
 #define TIM1_BRK_IRQHandler           TIM1_BRK_TIM15_IRQHandler
 #define TIM1_BRK_TIM9_IRQHandler      TIM1_BRK_TIM15_IRQHandler
-#define TIM1_TRG_COM_TIM11_IRQHandler TIM1_TRG_COM_TIM17_IRQHandler
+#define TIM9_IRQHandler               TIM1_BRK_TIM15_IRQHandler
 #define TIM1_TRG_COM_IRQHandler       TIM1_TRG_COM_TIM17_IRQHandler
+#define TIM1_TRG_COM_TIM11_IRQHandler TIM1_TRG_COM_TIM17_IRQHandler
 #define TIM11_IRQHandler              TIM1_TRG_COM_TIM17_IRQHandler
-#define TIM10_IRQHandler              TIM1_UP_TIM16_IRQHandler
 #define TIM1_UP_TIM10_IRQHandler      TIM1_UP_TIM16_IRQHandler
+#define TIM10_IRQHandler              TIM1_UP_TIM16_IRQHandler
 #define TIM1_UP_IRQHandler            TIM1_UP_TIM16_IRQHandler
 #define TIM6_IRQHandler               TIM6_DAC_IRQHandler
 
@@ -6585,5 +6584,4 @@
 #endif /* __STM32F100xE_H */
   
   
-  
-  /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/Include/stm32f101x6.h b/Include/stm32f101x6.h
index dd80728..83199c3 100644
--- a/Include/stm32f101x6.h
+++ b/Include/stm32f101x6.h
@@ -9,18 +9,17 @@
   *          This file contains:
   *           - Data structures and the address mapping for all peripherals
   *           - Peripheral's registers declarations and bits definition
-  *           - Macros to access peripheral’s registers hardware
+  *           - Macros to access peripheral's registers hardware
   *  
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -1203,7 +1202,7 @@
 #define RCC_BDCR_RTCSEL_0                    (0x1UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000100 */
 #define RCC_BDCR_RTCSEL_1                    (0x2UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000200 */
 
-/*!< RTC congiguration */
+/*!< RTC configuration */
 #define RCC_BDCR_RTCSEL_NOCLOCK              0x00000000U                       /*!< No clock */
 #define RCC_BDCR_RTCSEL_LSE                  0x00000100U                       /*!< LSE oscillator clock used as RTC clock */
 #define RCC_BDCR_RTCSEL_LSI                  0x00000200U                       /*!< LSI oscillator clock used as RTC clock */
@@ -3166,7 +3165,7 @@
 #define ADC_CR2_DMA                         ADC_CR2_DMA_Msk                    /*!< ADC DMA transfer enable */
 #define ADC_CR2_ALIGN_Pos                   (11U)                              
 #define ADC_CR2_ALIGN_Msk                   (0x1UL << ADC_CR2_ALIGN_Pos)        /*!< 0x00000800 */
-#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignement */
+#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignment */
 
 #define ADC_CR2_JEXTSEL_Pos                 (12U)                              
 #define ADC_CR2_JEXTSEL_Msk                 (0x7UL << ADC_CR2_JEXTSEL_Pos)      /*!< 0x00007000 */
@@ -5313,5 +5312,4 @@
 #endif /* __STM32F101x6_H */
   
   
-  
-  /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/Include/stm32f101xb.h b/Include/stm32f101xb.h
index c9128f0..76efd09 100644
--- a/Include/stm32f101xb.h
+++ b/Include/stm32f101xb.h
@@ -9,18 +9,17 @@
   *          This file contains:
   *           - Data structures and the address mapping for all peripherals
   *           - Peripheral's registers declarations and bits definition
-  *           - Macros to access peripheral’s registers hardware
+  *           - Macros to access peripheral's registers hardware
   *  
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -1248,7 +1247,7 @@
 #define RCC_BDCR_RTCSEL_0                    (0x1UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000100 */
 #define RCC_BDCR_RTCSEL_1                    (0x2UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000200 */
 
-/*!< RTC congiguration */
+/*!< RTC configuration */
 #define RCC_BDCR_RTCSEL_NOCLOCK              0x00000000U                       /*!< No clock */
 #define RCC_BDCR_RTCSEL_LSE                  0x00000100U                       /*!< LSE oscillator clock used as RTC clock */
 #define RCC_BDCR_RTCSEL_LSI                  0x00000200U                       /*!< LSI oscillator clock used as RTC clock */
@@ -3228,7 +3227,7 @@
 #define ADC_CR2_DMA                         ADC_CR2_DMA_Msk                    /*!< ADC DMA transfer enable */
 #define ADC_CR2_ALIGN_Pos                   (11U)                              
 #define ADC_CR2_ALIGN_Msk                   (0x1UL << ADC_CR2_ALIGN_Pos)        /*!< 0x00000800 */
-#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignement */
+#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignment */
 
 #define ADC_CR2_JEXTSEL_Pos                 (12U)                              
 #define ADC_CR2_JEXTSEL_Msk                 (0x7UL << ADC_CR2_JEXTSEL_Pos)      /*!< 0x00007000 */
@@ -5444,5 +5443,4 @@
 #endif /* __STM32F101xB_H */
   
   
-  
-  /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/Include/stm32f101xe.h b/Include/stm32f101xe.h
index 3e9c2f6..418fec7 100644
--- a/Include/stm32f101xe.h
+++ b/Include/stm32f101xe.h
@@ -9,18 +9,17 @@
   *          This file contains:
   *           - Data structures and the address mapping for all peripherals
   *           - Peripheral's registers declarations and bits definition
-  *           - Macros to access peripheral’s registers hardware
+  *           - Macros to access peripheral's registers hardware
   *  
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -1637,7 +1636,7 @@
 #define RCC_BDCR_RTCSEL_0                    (0x1UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000100 */
 #define RCC_BDCR_RTCSEL_1                    (0x2UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000200 */
 
-/*!< RTC congiguration */
+/*!< RTC configuration */
 #define RCC_BDCR_RTCSEL_NOCLOCK              0x00000000U                       /*!< No clock */
 #define RCC_BDCR_RTCSEL_LSE                  0x00000100U                       /*!< LSE oscillator clock used as RTC clock */
 #define RCC_BDCR_RTCSEL_LSI                  0x00000200U                       /*!< LSI oscillator clock used as RTC clock */
@@ -3623,7 +3622,7 @@
 #define ADC_CR2_DMA                         ADC_CR2_DMA_Msk                    /*!< ADC DMA transfer enable */
 #define ADC_CR2_ALIGN_Pos                   (11U)                              
 #define ADC_CR2_ALIGN_Msk                   (0x1UL << ADC_CR2_ALIGN_Pos)        /*!< 0x00000800 */
-#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignement */
+#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignment */
 
 #define ADC_CR2_JEXTSEL_Pos                 (12U)                              
 #define ADC_CR2_JEXTSEL_Msk                 (0x7UL << ADC_CR2_JEXTSEL_Pos)      /*!< 0x00007000 */
@@ -5293,7 +5292,7 @@
 /*                                                                            */
 /******************************************************************************/
 /*
- * @brief Specific device feature definitions (not present on all devices in the STM32F1 serie)
+ * @brief Specific device feature definitions (not present on all devices in the STM32F1 series)
  */
 #define SPI_I2S_SUPPORT       /*!< I2S support */
 #define SPI_CRC_ERROR_WORKAROUND_FEATURE
@@ -6501,5 +6500,4 @@
 #endif /* __STM32F101xE_H */
   
   
-  
-  /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/Include/stm32f101xg.h b/Include/stm32f101xg.h
index a0bfda1..5471a61 100644
--- a/Include/stm32f101xg.h
+++ b/Include/stm32f101xg.h
@@ -9,18 +9,17 @@
   *          This file contains:
   *           - Data structures and the address mapping for all peripherals
   *           - Peripheral's registers declarations and bits definition
-  *           - Macros to access peripheral’s registers hardware
+  *           - Macros to access peripheral's registers hardware
   *  
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -1698,7 +1697,7 @@
 #define RCC_BDCR_RTCSEL_0                    (0x1UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000100 */
 #define RCC_BDCR_RTCSEL_1                    (0x2UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000200 */
 
-/*!< RTC congiguration */
+/*!< RTC configuration */
 #define RCC_BDCR_RTCSEL_NOCLOCK              0x00000000U                       /*!< No clock */
 #define RCC_BDCR_RTCSEL_LSE                  0x00000100U                       /*!< LSE oscillator clock used as RTC clock */
 #define RCC_BDCR_RTCSEL_LSI                  0x00000200U                       /*!< LSI oscillator clock used as RTC clock */
@@ -3698,7 +3697,7 @@
 #define ADC_CR2_DMA                         ADC_CR2_DMA_Msk                    /*!< ADC DMA transfer enable */
 #define ADC_CR2_ALIGN_Pos                   (11U)                              
 #define ADC_CR2_ALIGN_Msk                   (0x1UL << ADC_CR2_ALIGN_Pos)        /*!< 0x00000800 */
-#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignement */
+#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignment */
 
 #define ADC_CR2_JEXTSEL_Pos                 (12U)                              
 #define ADC_CR2_JEXTSEL_Msk                 (0x7UL << ADC_CR2_JEXTSEL_Pos)      /*!< 0x00007000 */
@@ -5368,7 +5367,7 @@
 /*                                                                            */
 /******************************************************************************/
 /*
- * @brief Specific device feature definitions (not present on all devices in the STM32F1 serie)
+ * @brief Specific device feature definitions (not present on all devices in the STM32F1 series)
  */
 #define SPI_I2S_SUPPORT       /*!< I2S support */
 
@@ -6657,42 +6656,42 @@
 #define ADC1_2_IRQn             ADC1_IRQn
 #define DMA2_Channel4_IRQn      DMA2_Channel4_5_IRQn
 #define TIM1_UP_TIM16_IRQn      TIM10_IRQn
-#define TIM1_UP_IRQn            TIM10_IRQn
 #define TIM1_UP_TIM10_IRQn      TIM10_IRQn
+#define TIM1_UP_IRQn            TIM10_IRQn
 #define TIM1_TRG_COM_IRQn       TIM11_IRQn
-#define TIM1_TRG_COM_TIM17_IRQn TIM11_IRQn
 #define TIM1_TRG_COM_TIM11_IRQn TIM11_IRQn
+#define TIM1_TRG_COM_TIM17_IRQn TIM11_IRQn
 #define TIM8_BRK_IRQn           TIM12_IRQn
 #define TIM8_BRK_TIM12_IRQn     TIM12_IRQn
-#define TIM8_UP_TIM13_IRQn      TIM13_IRQn
 #define TIM8_UP_IRQn            TIM13_IRQn
+#define TIM8_UP_TIM13_IRQn      TIM13_IRQn
 #define TIM8_TRG_COM_IRQn       TIM14_IRQn
 #define TIM8_TRG_COM_TIM14_IRQn TIM14_IRQn
 #define TIM6_DAC_IRQn           TIM6_IRQn
 #define TIM1_BRK_TIM15_IRQn     TIM9_IRQn
-#define TIM1_BRK_IRQn           TIM9_IRQn
 #define TIM1_BRK_TIM9_IRQn      TIM9_IRQn
+#define TIM1_BRK_IRQn           TIM9_IRQn
 
 
 /* Aliases for __IRQHandler */
 #define ADC1_2_IRQHandler             ADC1_IRQHandler
 #define DMA2_Channel4_IRQHandler      DMA2_Channel4_5_IRQHandler
 #define TIM1_UP_TIM16_IRQHandler      TIM10_IRQHandler
-#define TIM1_UP_IRQHandler            TIM10_IRQHandler
 #define TIM1_UP_TIM10_IRQHandler      TIM10_IRQHandler
+#define TIM1_UP_IRQHandler            TIM10_IRQHandler
 #define TIM1_TRG_COM_IRQHandler       TIM11_IRQHandler
-#define TIM1_TRG_COM_TIM17_IRQHandler TIM11_IRQHandler
 #define TIM1_TRG_COM_TIM11_IRQHandler TIM11_IRQHandler
+#define TIM1_TRG_COM_TIM17_IRQHandler TIM11_IRQHandler
 #define TIM8_BRK_IRQHandler           TIM12_IRQHandler
 #define TIM8_BRK_TIM12_IRQHandler     TIM12_IRQHandler
-#define TIM8_UP_TIM13_IRQHandler      TIM13_IRQHandler
 #define TIM8_UP_IRQHandler            TIM13_IRQHandler
+#define TIM8_UP_TIM13_IRQHandler      TIM13_IRQHandler
 #define TIM8_TRG_COM_IRQHandler       TIM14_IRQHandler
 #define TIM8_TRG_COM_TIM14_IRQHandler TIM14_IRQHandler
 #define TIM6_DAC_IRQHandler           TIM6_IRQHandler
 #define TIM1_BRK_TIM15_IRQHandler     TIM9_IRQHandler
-#define TIM1_BRK_IRQHandler           TIM9_IRQHandler
 #define TIM1_BRK_TIM9_IRQHandler      TIM9_IRQHandler
+#define TIM1_BRK_IRQHandler           TIM9_IRQHandler
 
 
 /**
@@ -6711,5 +6710,4 @@
 #endif /* __STM32F101xG_H */
   
   
-  
-  /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/Include/stm32f102x6.h b/Include/stm32f102x6.h
index bd5aceb..c1793fa 100644
--- a/Include/stm32f102x6.h
+++ b/Include/stm32f102x6.h
@@ -9,18 +9,17 @@
   *          This file contains:
   *           - Data structures and the address mapping for all peripherals
   *           - Peripheral's registers declarations and bits definition
-  *           - Macros to access peripheral’s registers hardware
+  *           - Macros to access peripheral's registers hardware
   *  
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -1252,7 +1251,7 @@
 #define RCC_BDCR_RTCSEL_0                    (0x1UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000100 */
 #define RCC_BDCR_RTCSEL_1                    (0x2UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000200 */
 
-/*!< RTC congiguration */
+/*!< RTC configuration */
 #define RCC_BDCR_RTCSEL_NOCLOCK              0x00000000U                       /*!< No clock */
 #define RCC_BDCR_RTCSEL_LSE                  0x00000100U                       /*!< LSE oscillator clock used as RTC clock */
 #define RCC_BDCR_RTCSEL_LSI                  0x00000200U                       /*!< LSI oscillator clock used as RTC clock */
@@ -3215,7 +3214,7 @@
 #define ADC_CR2_DMA                         ADC_CR2_DMA_Msk                    /*!< ADC DMA transfer enable */
 #define ADC_CR2_ALIGN_Pos                   (11U)                              
 #define ADC_CR2_ALIGN_Msk                   (0x1UL << ADC_CR2_ALIGN_Pos)        /*!< 0x00000800 */
-#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignement */
+#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignment */
 
 #define ADC_CR2_JEXTSEL_Pos                 (12U)                              
 #define ADC_CR2_JEXTSEL_Msk                 (0x7UL << ADC_CR2_JEXTSEL_Pos)      /*!< 0x00007000 */
@@ -6414,8 +6413,8 @@
 #define ADC1_2_IRQn          ADC1_IRQn
 #define CEC_IRQn             USBWakeUp_IRQn
 #define OTG_FS_WKUP_IRQn     USBWakeUp_IRQn
-#define USB_HP_CAN1_TX_IRQn  USB_HP_IRQn
 #define CAN1_TX_IRQn         USB_HP_IRQn
+#define USB_HP_CAN1_TX_IRQn  USB_HP_IRQn
 #define CAN1_RX0_IRQn        USB_LP_IRQn
 #define USB_LP_CAN1_RX0_IRQn USB_LP_IRQn
 
@@ -6424,8 +6423,8 @@
 #define ADC1_2_IRQHandler          ADC1_IRQHandler
 #define CEC_IRQHandler             USBWakeUp_IRQHandler
 #define OTG_FS_WKUP_IRQHandler     USBWakeUp_IRQHandler
-#define USB_HP_CAN1_TX_IRQHandler  USB_HP_IRQHandler
 #define CAN1_TX_IRQHandler         USB_HP_IRQHandler
+#define USB_HP_CAN1_TX_IRQHandler  USB_HP_IRQHandler
 #define CAN1_RX0_IRQHandler        USB_LP_IRQHandler
 #define USB_LP_CAN1_RX0_IRQHandler USB_LP_IRQHandler
 
@@ -6446,5 +6445,4 @@
 #endif /* __STM32F102x6_H */
   
   
-  
-  /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/Include/stm32f102xb.h b/Include/stm32f102xb.h
index d43ebe7..dcbb361 100644
--- a/Include/stm32f102xb.h
+++ b/Include/stm32f102xb.h
@@ -9,18 +9,17 @@
   *          This file contains:
   *           - Data structures and the address mapping for all peripherals
   *           - Peripheral's registers declarations and bits definition
-  *           - Macros to access peripheral’s registers hardware
+  *           - Macros to access peripheral's registers hardware
   *  
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -1289,7 +1288,7 @@
 #define RCC_BDCR_RTCSEL_0                    (0x1UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000100 */
 #define RCC_BDCR_RTCSEL_1                    (0x2UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000200 */
 
-/*!< RTC congiguration */
+/*!< RTC configuration */
 #define RCC_BDCR_RTCSEL_NOCLOCK              0x00000000U                       /*!< No clock */
 #define RCC_BDCR_RTCSEL_LSE                  0x00000100U                       /*!< LSE oscillator clock used as RTC clock */
 #define RCC_BDCR_RTCSEL_LSI                  0x00000200U                       /*!< LSI oscillator clock used as RTC clock */
@@ -3269,7 +3268,7 @@
 #define ADC_CR2_DMA                         ADC_CR2_DMA_Msk                    /*!< ADC DMA transfer enable */
 #define ADC_CR2_ALIGN_Pos                   (11U)                              
 #define ADC_CR2_ALIGN_Msk                   (0x1UL << ADC_CR2_ALIGN_Pos)        /*!< 0x00000800 */
-#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignement */
+#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignment */
 
 #define ADC_CR2_JEXTSEL_Pos                 (12U)                              
 #define ADC_CR2_JEXTSEL_Msk                 (0x7UL << ADC_CR2_JEXTSEL_Pos)      /*!< 0x00007000 */
@@ -6568,5 +6567,4 @@
 #endif /* __STM32F102xB_H */
   
   
-  
-  /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/Include/stm32f103x6.h b/Include/stm32f103x6.h
index d88068a..13694b7 100644
--- a/Include/stm32f103x6.h
+++ b/Include/stm32f103x6.h
@@ -9,18 +9,17 @@
   *          This file contains:
   *           - Data structures and the address mapping for all peripherals
   *           - Peripheral's registers declarations and bits definition
-  *           - Macros to access peripheral’s registers hardware
+  *           - Macros to access peripheral's registers hardware
   *  
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -1339,7 +1338,7 @@
 #define RCC_BDCR_RTCSEL_0                    (0x1UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000100 */
 #define RCC_BDCR_RTCSEL_1                    (0x2UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000200 */
 
-/*!< RTC congiguration */
+/*!< RTC configuration */
 #define RCC_BDCR_RTCSEL_NOCLOCK              0x00000000U                       /*!< No clock */
 #define RCC_BDCR_RTCSEL_LSE                  0x00000100U                       /*!< LSE oscillator clock used as RTC clock */
 #define RCC_BDCR_RTCSEL_LSI                  0x00000200U                       /*!< LSI oscillator clock used as RTC clock */
@@ -3324,7 +3323,7 @@
 #define ADC_CR2_DMA                         ADC_CR2_DMA_Msk                    /*!< ADC DMA transfer enable */
 #define ADC_CR2_ALIGN_Pos                   (11U)                              
 #define ADC_CR2_ALIGN_Msk                   (0x1UL << ADC_CR2_ALIGN_Pos)        /*!< 0x00000800 */
-#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignement */
+#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignment */
 
 #define ADC_CR2_JEXTSEL_Pos                 (12U)                              
 #define ADC_CR2_JEXTSEL_Msk                 (0x7UL << ADC_CR2_JEXTSEL_Pos)      /*!< 0x00007000 */
@@ -10058,14 +10057,14 @@
 #define TIM1_BRK_TIM9_IRQn      TIM1_BRK_IRQn
 #define TIM1_BRK_TIM15_IRQn     TIM1_BRK_IRQn
 #define TIM9_IRQn               TIM1_BRK_IRQn
-#define TIM11_IRQn              TIM1_TRG_COM_IRQn
-#define TIM1_TRG_COM_TIM17_IRQn TIM1_TRG_COM_IRQn
 #define TIM1_TRG_COM_TIM11_IRQn TIM1_TRG_COM_IRQn
-#define TIM1_UP_TIM16_IRQn      TIM1_UP_IRQn
+#define TIM1_TRG_COM_TIM17_IRQn TIM1_TRG_COM_IRQn
+#define TIM11_IRQn              TIM1_TRG_COM_IRQn
 #define TIM1_UP_TIM10_IRQn      TIM1_UP_IRQn
 #define TIM10_IRQn              TIM1_UP_IRQn
-#define OTG_FS_WKUP_IRQn        USBWakeUp_IRQn
+#define TIM1_UP_TIM16_IRQn      TIM1_UP_IRQn
 #define CEC_IRQn                USBWakeUp_IRQn
+#define OTG_FS_WKUP_IRQn        USBWakeUp_IRQn
 #define USB_HP_IRQn             USB_HP_CAN1_TX_IRQn
 #define CAN1_TX_IRQn            USB_HP_CAN1_TX_IRQn
 #define USB_LP_IRQn             USB_LP_CAN1_RX0_IRQn
@@ -10077,14 +10076,14 @@
 #define TIM1_BRK_TIM9_IRQHandler      TIM1_BRK_IRQHandler
 #define TIM1_BRK_TIM15_IRQHandler     TIM1_BRK_IRQHandler
 #define TIM9_IRQHandler               TIM1_BRK_IRQHandler
-#define TIM11_IRQHandler              TIM1_TRG_COM_IRQHandler
-#define TIM1_TRG_COM_TIM17_IRQHandler TIM1_TRG_COM_IRQHandler
 #define TIM1_TRG_COM_TIM11_IRQHandler TIM1_TRG_COM_IRQHandler
-#define TIM1_UP_TIM16_IRQHandler      TIM1_UP_IRQHandler
+#define TIM1_TRG_COM_TIM17_IRQHandler TIM1_TRG_COM_IRQHandler
+#define TIM11_IRQHandler              TIM1_TRG_COM_IRQHandler
 #define TIM1_UP_TIM10_IRQHandler      TIM1_UP_IRQHandler
 #define TIM10_IRQHandler              TIM1_UP_IRQHandler
-#define OTG_FS_WKUP_IRQHandler        USBWakeUp_IRQHandler
+#define TIM1_UP_TIM16_IRQHandler      TIM1_UP_IRQHandler
 #define CEC_IRQHandler                USBWakeUp_IRQHandler
+#define OTG_FS_WKUP_IRQHandler        USBWakeUp_IRQHandler
 #define USB_HP_IRQHandler             USB_HP_CAN1_TX_IRQHandler
 #define CAN1_TX_IRQHandler            USB_HP_CAN1_TX_IRQHandler
 #define USB_LP_IRQHandler             USB_LP_CAN1_RX0_IRQHandler
@@ -10107,5 +10106,4 @@
 #endif /* __STM32F103x6_H */
   
   
-  
-  /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/Include/stm32f103xb.h b/Include/stm32f103xb.h
index 8171849..82df4b0 100644
--- a/Include/stm32f103xb.h
+++ b/Include/stm32f103xb.h
@@ -9,18 +9,17 @@
   *          This file contains:
   *           - Data structures and the address mapping for all peripherals
   *           - Peripheral's registers declarations and bits definition
-  *           - Macros to access peripheral’s registers hardware
+  *           - Macros to access peripheral's registers hardware
   *  
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -1384,7 +1383,7 @@
 #define RCC_BDCR_RTCSEL_0                    (0x1UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000100 */
 #define RCC_BDCR_RTCSEL_1                    (0x2UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000200 */
 
-/*!< RTC congiguration */
+/*!< RTC configuration */
 #define RCC_BDCR_RTCSEL_NOCLOCK              0x00000000U                       /*!< No clock */
 #define RCC_BDCR_RTCSEL_LSE                  0x00000100U                       /*!< LSE oscillator clock used as RTC clock */
 #define RCC_BDCR_RTCSEL_LSI                  0x00000200U                       /*!< LSI oscillator clock used as RTC clock */
@@ -3386,7 +3385,7 @@
 #define ADC_CR2_DMA                         ADC_CR2_DMA_Msk                    /*!< ADC DMA transfer enable */
 #define ADC_CR2_ALIGN_Pos                   (11U)                              
 #define ADC_CR2_ALIGN_Msk                   (0x1UL << ADC_CR2_ALIGN_Pos)        /*!< 0x00000800 */
-#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignement */
+#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignment */
 
 #define ADC_CR2_JEXTSEL_Pos                 (12U)                              
 #define ADC_CR2_JEXTSEL_Msk                 (0x7UL << ADC_CR2_JEXTSEL_Pos)      /*!< 0x00007000 */
@@ -10186,38 +10185,38 @@
 
 /* Aliases for __IRQn */
 #define ADC1_IRQn               ADC1_2_IRQn
-#define TIM1_BRK_TIM15_IRQn     TIM1_BRK_IRQn
 #define TIM9_IRQn               TIM1_BRK_IRQn
 #define TIM1_BRK_TIM9_IRQn      TIM1_BRK_IRQn
+#define TIM1_BRK_TIM15_IRQn     TIM1_BRK_IRQn
 #define TIM1_TRG_COM_TIM17_IRQn TIM1_TRG_COM_IRQn
 #define TIM1_TRG_COM_TIM11_IRQn TIM1_TRG_COM_IRQn
 #define TIM11_IRQn              TIM1_TRG_COM_IRQn
 #define TIM10_IRQn              TIM1_UP_IRQn
-#define TIM1_UP_TIM16_IRQn      TIM1_UP_IRQn
 #define TIM1_UP_TIM10_IRQn      TIM1_UP_IRQn
+#define TIM1_UP_TIM16_IRQn      TIM1_UP_IRQn
 #define OTG_FS_WKUP_IRQn        USBWakeUp_IRQn
 #define CEC_IRQn                USBWakeUp_IRQn
-#define CAN1_TX_IRQn            USB_HP_CAN1_TX_IRQn
 #define USB_HP_IRQn             USB_HP_CAN1_TX_IRQn
+#define CAN1_TX_IRQn            USB_HP_CAN1_TX_IRQn
 #define CAN1_RX0_IRQn           USB_LP_CAN1_RX0_IRQn
 #define USB_LP_IRQn             USB_LP_CAN1_RX0_IRQn
 
 
 /* Aliases for __IRQHandler */
 #define ADC1_IRQHandler               ADC1_2_IRQHandler
-#define TIM1_BRK_TIM15_IRQHandler     TIM1_BRK_IRQHandler
 #define TIM9_IRQHandler               TIM1_BRK_IRQHandler
 #define TIM1_BRK_TIM9_IRQHandler      TIM1_BRK_IRQHandler
+#define TIM1_BRK_TIM15_IRQHandler     TIM1_BRK_IRQHandler
 #define TIM1_TRG_COM_TIM17_IRQHandler TIM1_TRG_COM_IRQHandler
 #define TIM1_TRG_COM_TIM11_IRQHandler TIM1_TRG_COM_IRQHandler
 #define TIM11_IRQHandler              TIM1_TRG_COM_IRQHandler
 #define TIM10_IRQHandler              TIM1_UP_IRQHandler
-#define TIM1_UP_TIM16_IRQHandler      TIM1_UP_IRQHandler
 #define TIM1_UP_TIM10_IRQHandler      TIM1_UP_IRQHandler
+#define TIM1_UP_TIM16_IRQHandler      TIM1_UP_IRQHandler
 #define OTG_FS_WKUP_IRQHandler        USBWakeUp_IRQHandler
 #define CEC_IRQHandler                USBWakeUp_IRQHandler
-#define CAN1_TX_IRQHandler            USB_HP_CAN1_TX_IRQHandler
 #define USB_HP_IRQHandler             USB_HP_CAN1_TX_IRQHandler
+#define CAN1_TX_IRQHandler            USB_HP_CAN1_TX_IRQHandler
 #define CAN1_RX0_IRQHandler           USB_LP_CAN1_RX0_IRQHandler
 #define USB_LP_IRQHandler             USB_LP_CAN1_RX0_IRQHandler
 
@@ -10238,5 +10237,4 @@
 #endif /* __STM32F103xB_H */
   
   
-  
-  /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/Include/stm32f103xe.h b/Include/stm32f103xe.h
index 9725d78..8f4fedc 100644
--- a/Include/stm32f103xe.h
+++ b/Include/stm32f103xe.h
@@ -9,18 +9,17 @@
   *          This file contains:
   *           - Data structures and the address mapping for all peripherals
   *           - Peripheral's registers declarations and bits definition
-  *           - Macros to access peripheral’s registers hardware
+  *           - Macros to access peripheral's registers hardware
   *  
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -1828,7 +1827,7 @@
 #define RCC_BDCR_RTCSEL_0                    (0x1UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000100 */
 #define RCC_BDCR_RTCSEL_1                    (0x2UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000200 */
 
-/*!< RTC congiguration */
+/*!< RTC configuration */
 #define RCC_BDCR_RTCSEL_NOCLOCK              0x00000000U                       /*!< No clock */
 #define RCC_BDCR_RTCSEL_LSE                  0x00000100U                       /*!< LSE oscillator clock used as RTC clock */
 #define RCC_BDCR_RTCSEL_LSI                  0x00000200U                       /*!< LSI oscillator clock used as RTC clock */
@@ -3848,7 +3847,7 @@
 #define ADC_CR2_DMA                         ADC_CR2_DMA_Msk                    /*!< ADC DMA transfer enable */
 #define ADC_CR2_ALIGN_Pos                   (11U)                              
 #define ADC_CR2_ALIGN_Msk                   (0x1UL << ADC_CR2_ALIGN_Pos)        /*!< 0x00000800 */
-#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignement */
+#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignment */
 
 #define ADC_CR2_JEXTSEL_Pos                 (12U)                              
 #define ADC_CR2_JEXTSEL_Msk                 (0x7UL << ADC_CR2_JEXTSEL_Pos)      /*!< 0x00007000 */
@@ -10434,7 +10433,7 @@
 /*                                                                            */
 /******************************************************************************/
 /*
- * @brief Specific device feature definitions (not present on all devices in the STM32F1 serie)
+ * @brief Specific device feature definitions (not present on all devices in the STM32F1 series)
  */
 #define SPI_I2S_SUPPORT       /*!< I2S support */
 #define SPI_CRC_ERROR_WORKAROUND_FEATURE
@@ -11702,22 +11701,22 @@
 #define TIM9_IRQn               TIM1_BRK_IRQn
 #define TIM1_BRK_TIM15_IRQn     TIM1_BRK_IRQn
 #define TIM11_IRQn              TIM1_TRG_COM_IRQn
-#define TIM1_TRG_COM_TIM11_IRQn TIM1_TRG_COM_IRQn
 #define TIM1_TRG_COM_TIM17_IRQn TIM1_TRG_COM_IRQn
-#define TIM1_UP_TIM10_IRQn      TIM1_UP_IRQn
+#define TIM1_TRG_COM_TIM11_IRQn TIM1_TRG_COM_IRQn
 #define TIM1_UP_TIM16_IRQn      TIM1_UP_IRQn
+#define TIM1_UP_TIM10_IRQn      TIM1_UP_IRQn
 #define TIM10_IRQn              TIM1_UP_IRQn
 #define TIM6_DAC_IRQn           TIM6_IRQn
-#define TIM8_BRK_TIM12_IRQn     TIM8_BRK_IRQn
 #define TIM12_IRQn              TIM8_BRK_IRQn
-#define TIM14_IRQn              TIM8_TRG_COM_IRQn
+#define TIM8_BRK_TIM12_IRQn     TIM8_BRK_IRQn
 #define TIM8_TRG_COM_TIM14_IRQn TIM8_TRG_COM_IRQn
+#define TIM14_IRQn              TIM8_TRG_COM_IRQn
 #define TIM8_UP_TIM13_IRQn      TIM8_UP_IRQn
 #define TIM13_IRQn              TIM8_UP_IRQn
 #define CEC_IRQn                USBWakeUp_IRQn
 #define OTG_FS_WKUP_IRQn        USBWakeUp_IRQn
-#define USB_HP_IRQn             USB_HP_CAN1_TX_IRQn
 #define CAN1_TX_IRQn            USB_HP_CAN1_TX_IRQn
+#define USB_HP_IRQn             USB_HP_CAN1_TX_IRQn
 #define USB_LP_IRQn             USB_LP_CAN1_RX0_IRQn
 #define CAN1_RX0_IRQn           USB_LP_CAN1_RX0_IRQn
 
@@ -11729,22 +11728,22 @@
 #define TIM9_IRQHandler               TIM1_BRK_IRQHandler
 #define TIM1_BRK_TIM15_IRQHandler     TIM1_BRK_IRQHandler
 #define TIM11_IRQHandler              TIM1_TRG_COM_IRQHandler
-#define TIM1_TRG_COM_TIM11_IRQHandler TIM1_TRG_COM_IRQHandler
 #define TIM1_TRG_COM_TIM17_IRQHandler TIM1_TRG_COM_IRQHandler
-#define TIM1_UP_TIM10_IRQHandler      TIM1_UP_IRQHandler
+#define TIM1_TRG_COM_TIM11_IRQHandler TIM1_TRG_COM_IRQHandler
 #define TIM1_UP_TIM16_IRQHandler      TIM1_UP_IRQHandler
+#define TIM1_UP_TIM10_IRQHandler      TIM1_UP_IRQHandler
 #define TIM10_IRQHandler              TIM1_UP_IRQHandler
 #define TIM6_DAC_IRQHandler           TIM6_IRQHandler
-#define TIM8_BRK_TIM12_IRQHandler     TIM8_BRK_IRQHandler
 #define TIM12_IRQHandler              TIM8_BRK_IRQHandler
-#define TIM14_IRQHandler              TIM8_TRG_COM_IRQHandler
+#define TIM8_BRK_TIM12_IRQHandler     TIM8_BRK_IRQHandler
 #define TIM8_TRG_COM_TIM14_IRQHandler TIM8_TRG_COM_IRQHandler
+#define TIM14_IRQHandler              TIM8_TRG_COM_IRQHandler
 #define TIM8_UP_TIM13_IRQHandler      TIM8_UP_IRQHandler
 #define TIM13_IRQHandler              TIM8_UP_IRQHandler
 #define CEC_IRQHandler                USBWakeUp_IRQHandler
 #define OTG_FS_WKUP_IRQHandler        USBWakeUp_IRQHandler
-#define USB_HP_IRQHandler             USB_HP_CAN1_TX_IRQHandler
 #define CAN1_TX_IRQHandler            USB_HP_CAN1_TX_IRQHandler
+#define USB_HP_IRQHandler             USB_HP_CAN1_TX_IRQHandler
 #define USB_LP_IRQHandler             USB_LP_CAN1_RX0_IRQHandler
 #define CAN1_RX0_IRQHandler           USB_LP_CAN1_RX0_IRQHandler
 
@@ -11765,5 +11764,4 @@
 #endif /* __STM32F103xE_H */
   
   
-  
-  /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/Include/stm32f103xg.h b/Include/stm32f103xg.h
index 6e6c7f0..99b93f5 100644
--- a/Include/stm32f103xg.h
+++ b/Include/stm32f103xg.h
@@ -9,18 +9,17 @@
   *          This file contains:
   *           - Data structures and the address mapping for all peripherals
   *           - Peripheral's registers declarations and bits definition
-  *           - Macros to access peripheral’s registers hardware
+  *           - Macros to access peripheral's registers hardware
   *  
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -1883,7 +1882,7 @@
 #define RCC_BDCR_RTCSEL_0                    (0x1UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000100 */
 #define RCC_BDCR_RTCSEL_1                    (0x2UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000200 */
 
-/*!< RTC congiguration */
+/*!< RTC configuration */
 #define RCC_BDCR_RTCSEL_NOCLOCK              0x00000000U                       /*!< No clock */
 #define RCC_BDCR_RTCSEL_LSE                  0x00000100U                       /*!< LSE oscillator clock used as RTC clock */
 #define RCC_BDCR_RTCSEL_LSI                  0x00000200U                       /*!< LSI oscillator clock used as RTC clock */
@@ -3918,7 +3917,7 @@
 #define ADC_CR2_DMA                         ADC_CR2_DMA_Msk                    /*!< ADC DMA transfer enable */
 #define ADC_CR2_ALIGN_Pos                   (11U)                              
 #define ADC_CR2_ALIGN_Msk                   (0x1UL << ADC_CR2_ALIGN_Pos)        /*!< 0x00000800 */
-#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignement */
+#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignment */
 
 #define ADC_CR2_JEXTSEL_Pos                 (12U)                              
 #define ADC_CR2_JEXTSEL_Msk                 (0x7UL << ADC_CR2_JEXTSEL_Pos)      /*!< 0x00007000 */
@@ -10504,7 +10503,7 @@
 /*                                                                            */
 /******************************************************************************/
 /*
- * @brief Specific device feature definitions (not present on all devices in the STM32F1 serie)
+ * @brief Specific device feature definitions (not present on all devices in the STM32F1 series)
  */
 #define SPI_I2S_SUPPORT       /*!< I2S support */
 
@@ -11882,55 +11881,55 @@
 /* Aliases for __IRQn */
 #define ADC1_IRQn               ADC1_2_IRQn
 #define DMA2_Channel4_IRQn      DMA2_Channel4_5_IRQn
-#define TIM9_IRQn               TIM1_BRK_TIM9_IRQn
 #define TIM1_BRK_IRQn           TIM1_BRK_TIM9_IRQn
 #define TIM1_BRK_TIM15_IRQn     TIM1_BRK_TIM9_IRQn
+#define TIM9_IRQn               TIM1_BRK_TIM9_IRQn
 #define TIM1_TRG_COM_TIM17_IRQn TIM1_TRG_COM_TIM11_IRQn
-#define TIM1_TRG_COM_IRQn       TIM1_TRG_COM_TIM11_IRQn
 #define TIM11_IRQn              TIM1_TRG_COM_TIM11_IRQn
-#define TIM10_IRQn              TIM1_UP_TIM10_IRQn
+#define TIM1_TRG_COM_IRQn       TIM1_TRG_COM_TIM11_IRQn
 #define TIM1_UP_IRQn            TIM1_UP_TIM10_IRQn
+#define TIM10_IRQn              TIM1_UP_TIM10_IRQn
 #define TIM1_UP_TIM16_IRQn      TIM1_UP_TIM10_IRQn
 #define TIM6_DAC_IRQn           TIM6_IRQn
-#define TIM12_IRQn              TIM8_BRK_TIM12_IRQn
 #define TIM8_BRK_IRQn           TIM8_BRK_TIM12_IRQn
-#define TIM14_IRQn              TIM8_TRG_COM_TIM14_IRQn
+#define TIM12_IRQn              TIM8_BRK_TIM12_IRQn
 #define TIM8_TRG_COM_IRQn       TIM8_TRG_COM_TIM14_IRQn
-#define TIM13_IRQn              TIM8_UP_TIM13_IRQn
+#define TIM14_IRQn              TIM8_TRG_COM_TIM14_IRQn
 #define TIM8_UP_IRQn            TIM8_UP_TIM13_IRQn
+#define TIM13_IRQn              TIM8_UP_TIM13_IRQn
 #define CEC_IRQn                USBWakeUp_IRQn
 #define OTG_FS_WKUP_IRQn        USBWakeUp_IRQn
-#define CAN1_TX_IRQn            USB_HP_CAN1_TX_IRQn
 #define USB_HP_IRQn             USB_HP_CAN1_TX_IRQn
-#define CAN1_RX0_IRQn           USB_LP_CAN1_RX0_IRQn
+#define CAN1_TX_IRQn            USB_HP_CAN1_TX_IRQn
 #define USB_LP_IRQn             USB_LP_CAN1_RX0_IRQn
+#define CAN1_RX0_IRQn           USB_LP_CAN1_RX0_IRQn
 
 
 /* Aliases for __IRQHandler */
 #define ADC1_IRQHandler               ADC1_2_IRQHandler
 #define DMA2_Channel4_IRQHandler      DMA2_Channel4_5_IRQHandler
-#define TIM9_IRQHandler               TIM1_BRK_TIM9_IRQHandler
 #define TIM1_BRK_IRQHandler           TIM1_BRK_TIM9_IRQHandler
 #define TIM1_BRK_TIM15_IRQHandler     TIM1_BRK_TIM9_IRQHandler
+#define TIM9_IRQHandler               TIM1_BRK_TIM9_IRQHandler
 #define TIM1_TRG_COM_TIM17_IRQHandler TIM1_TRG_COM_TIM11_IRQHandler
-#define TIM1_TRG_COM_IRQHandler       TIM1_TRG_COM_TIM11_IRQHandler
 #define TIM11_IRQHandler              TIM1_TRG_COM_TIM11_IRQHandler
-#define TIM10_IRQHandler              TIM1_UP_TIM10_IRQHandler
+#define TIM1_TRG_COM_IRQHandler       TIM1_TRG_COM_TIM11_IRQHandler
 #define TIM1_UP_IRQHandler            TIM1_UP_TIM10_IRQHandler
+#define TIM10_IRQHandler              TIM1_UP_TIM10_IRQHandler
 #define TIM1_UP_TIM16_IRQHandler      TIM1_UP_TIM10_IRQHandler
 #define TIM6_DAC_IRQHandler           TIM6_IRQHandler
-#define TIM12_IRQHandler              TIM8_BRK_TIM12_IRQHandler
 #define TIM8_BRK_IRQHandler           TIM8_BRK_TIM12_IRQHandler
-#define TIM14_IRQHandler              TIM8_TRG_COM_TIM14_IRQHandler
+#define TIM12_IRQHandler              TIM8_BRK_TIM12_IRQHandler
 #define TIM8_TRG_COM_IRQHandler       TIM8_TRG_COM_TIM14_IRQHandler
-#define TIM13_IRQHandler              TIM8_UP_TIM13_IRQHandler
+#define TIM14_IRQHandler              TIM8_TRG_COM_TIM14_IRQHandler
 #define TIM8_UP_IRQHandler            TIM8_UP_TIM13_IRQHandler
+#define TIM13_IRQHandler              TIM8_UP_TIM13_IRQHandler
 #define CEC_IRQHandler                USBWakeUp_IRQHandler
 #define OTG_FS_WKUP_IRQHandler        USBWakeUp_IRQHandler
-#define CAN1_TX_IRQHandler            USB_HP_CAN1_TX_IRQHandler
 #define USB_HP_IRQHandler             USB_HP_CAN1_TX_IRQHandler
-#define CAN1_RX0_IRQHandler           USB_LP_CAN1_RX0_IRQHandler
+#define CAN1_TX_IRQHandler            USB_HP_CAN1_TX_IRQHandler
 #define USB_LP_IRQHandler             USB_LP_CAN1_RX0_IRQHandler
+#define CAN1_RX0_IRQHandler           USB_LP_CAN1_RX0_IRQHandler
 
 
 /**
@@ -11949,5 +11948,4 @@
 #endif /* __STM32F103xG_H */
   
   
-  
-  /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/Include/stm32f105xc.h b/Include/stm32f105xc.h
index ffe062d..889db80 100644
--- a/Include/stm32f105xc.h
+++ b/Include/stm32f105xc.h
@@ -9,18 +9,17 @@
   *          This file contains:
   *           - Data structures and the address mapping for all peripherals
   *           - Peripheral's registers declarations and bits definition
-  *           - Macros to access peripheral’s registers hardware
+  *           - Macros to access peripheral's registers hardware
   *  
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -1259,7 +1258,7 @@
 /*                                                                            */
 /******************************************************************************/
 /*
- * @brief Specific device feature definitions (not present on all devices in the STM32F1 serie)
+ * @brief Specific device feature definitions (not present on all devices in the STM32F1 series)
  */
 #define RCC_PLL2_SUPPORT                                                       /*!< Support PLL2 */
 #define RCC_PLLI2S_SUPPORT 
@@ -1809,7 +1808,7 @@
 #define RCC_BDCR_RTCSEL_0                    (0x1UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000100 */
 #define RCC_BDCR_RTCSEL_1                    (0x2UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000200 */
 
-/*!< RTC congiguration */
+/*!< RTC configuration */
 #define RCC_BDCR_RTCSEL_NOCLOCK              0x00000000U                       /*!< No clock */
 #define RCC_BDCR_RTCSEL_LSE                  0x00000100U                       /*!< LSE oscillator clock used as RTC clock */
 #define RCC_BDCR_RTCSEL_LSI                  0x00000200U                       /*!< LSI oscillator clock used as RTC clock */
@@ -4072,7 +4071,7 @@
 #define ADC_CR2_DMA                         ADC_CR2_DMA_Msk                    /*!< ADC DMA transfer enable */
 #define ADC_CR2_ALIGN_Pos                   (11U)                              
 #define ADC_CR2_ALIGN_Msk                   (0x1UL << ADC_CR2_ALIGN_Pos)        /*!< 0x00000800 */
-#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignement */
+#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignment */
 
 #define ADC_CR2_JEXTSEL_Pos                 (12U)                              
 #define ADC_CR2_JEXTSEL_Msk                 (0x7UL << ADC_CR2_JEXTSEL_Pos)      /*!< 0x00007000 */
@@ -11760,7 +11759,7 @@
 /*                                                                            */
 /******************************************************************************/
 /*
- * @brief Specific device feature definitions (not present on all devices in the STM32F1 serie)
+ * @brief Specific device feature definitions (not present on all devices in the STM32F1 series)
  */
 #define SPI_I2S_SUPPORT       /*!< I2S support */
 #define I2S2_I2S3_CLOCK_FEATURE
@@ -14289,15 +14288,15 @@
 #define DMA2_Channel4_5_IRQn    DMA2_Channel4_IRQn
 #define USBWakeUp_IRQn          OTG_FS_WKUP_IRQn
 #define CEC_IRQn                OTG_FS_WKUP_IRQn
-#define TIM1_BRK_TIM9_IRQn      TIM1_BRK_IRQn
 #define TIM1_BRK_TIM15_IRQn     TIM1_BRK_IRQn
+#define TIM1_BRK_TIM9_IRQn      TIM1_BRK_IRQn
 #define TIM9_IRQn               TIM1_BRK_IRQn
-#define TIM11_IRQn              TIM1_TRG_COM_IRQn
 #define TIM1_TRG_COM_TIM17_IRQn TIM1_TRG_COM_IRQn
 #define TIM1_TRG_COM_TIM11_IRQn TIM1_TRG_COM_IRQn
-#define TIM1_UP_TIM16_IRQn      TIM1_UP_IRQn
-#define TIM1_UP_TIM10_IRQn      TIM1_UP_IRQn
+#define TIM11_IRQn              TIM1_TRG_COM_IRQn
 #define TIM10_IRQn              TIM1_UP_IRQn
+#define TIM1_UP_TIM10_IRQn      TIM1_UP_IRQn
+#define TIM1_UP_TIM16_IRQn      TIM1_UP_IRQn
 #define TIM6_DAC_IRQn           TIM6_IRQn
 
 
@@ -14310,15 +14309,15 @@
 #define DMA2_Channel4_5_IRQHandler    DMA2_Channel4_IRQHandler
 #define USBWakeUp_IRQHandler          OTG_FS_WKUP_IRQHandler
 #define CEC_IRQHandler                OTG_FS_WKUP_IRQHandler
-#define TIM1_BRK_TIM9_IRQHandler      TIM1_BRK_IRQHandler
 #define TIM1_BRK_TIM15_IRQHandler     TIM1_BRK_IRQHandler
+#define TIM1_BRK_TIM9_IRQHandler      TIM1_BRK_IRQHandler
 #define TIM9_IRQHandler               TIM1_BRK_IRQHandler
-#define TIM11_IRQHandler              TIM1_TRG_COM_IRQHandler
 #define TIM1_TRG_COM_TIM17_IRQHandler TIM1_TRG_COM_IRQHandler
 #define TIM1_TRG_COM_TIM11_IRQHandler TIM1_TRG_COM_IRQHandler
-#define TIM1_UP_TIM16_IRQHandler      TIM1_UP_IRQHandler
-#define TIM1_UP_TIM10_IRQHandler      TIM1_UP_IRQHandler
+#define TIM11_IRQHandler              TIM1_TRG_COM_IRQHandler
 #define TIM10_IRQHandler              TIM1_UP_IRQHandler
+#define TIM1_UP_TIM10_IRQHandler      TIM1_UP_IRQHandler
+#define TIM1_UP_TIM16_IRQHandler      TIM1_UP_IRQHandler
 #define TIM6_DAC_IRQHandler           TIM6_IRQHandler
 
 
@@ -14338,5 +14337,4 @@
 #endif /* __STM32F105xC_H */
   
   
-  
-  /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/Include/stm32f107xc.h b/Include/stm32f107xc.h
index c80d6a1..6efdf72 100644
--- a/Include/stm32f107xc.h
+++ b/Include/stm32f107xc.h
@@ -9,18 +9,17 @@
   *          This file contains:
   *           - Data structures and the address mapping for all peripherals
   *           - Peripheral's registers declarations and bits definition
-  *           - Macros to access peripheral’s registers hardware
+  *           - Macros to access peripheral's registers hardware
   *  
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -1339,7 +1338,7 @@
 /*                                                                            */
 /******************************************************************************/
 /*
- * @brief Specific device feature definitions (not present on all devices in the STM32F1 serie)
+ * @brief Specific device feature definitions (not present on all devices in the STM32F1 series)
  */
 #define RCC_PLL2_SUPPORT                                                       /*!< Support PLL2 */
 #define RCC_PLLI2S_SUPPORT 
@@ -1898,7 +1897,7 @@
 #define RCC_BDCR_RTCSEL_0                    (0x1UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000100 */
 #define RCC_BDCR_RTCSEL_1                    (0x2UL << RCC_BDCR_RTCSEL_Pos)     /*!< 0x00000200 */
 
-/*!< RTC congiguration */
+/*!< RTC configuration */
 #define RCC_BDCR_RTCSEL_NOCLOCK              0x00000000U                       /*!< No clock */
 #define RCC_BDCR_RTCSEL_LSE                  0x00000100U                       /*!< LSE oscillator clock used as RTC clock */
 #define RCC_BDCR_RTCSEL_LSI                  0x00000200U                       /*!< LSI oscillator clock used as RTC clock */
@@ -4164,7 +4163,7 @@
 #define ADC_CR2_DMA                         ADC_CR2_DMA_Msk                    /*!< ADC DMA transfer enable */
 #define ADC_CR2_ALIGN_Pos                   (11U)                              
 #define ADC_CR2_ALIGN_Msk                   (0x1UL << ADC_CR2_ALIGN_Pos)        /*!< 0x00000800 */
-#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignement */
+#define ADC_CR2_ALIGN                       ADC_CR2_ALIGN_Msk                  /*!< ADC data alignment */
 
 #define ADC_CR2_JEXTSEL_Pos                 (12U)                              
 #define ADC_CR2_JEXTSEL_Msk                 (0x7UL << ADC_CR2_JEXTSEL_Pos)      /*!< 0x00007000 */
@@ -11852,7 +11851,7 @@
 /*                                                                            */
 /******************************************************************************/
 /*
- * @brief Specific device feature definitions (not present on all devices in the STM32F1 serie)
+ * @brief Specific device feature definitions (not present on all devices in the STM32F1 series)
  */
 #define SPI_I2S_SUPPORT       /*!< I2S support */
 #define I2S2_I2S3_CLOCK_FEATURE
@@ -13050,7 +13049,7 @@
 /*                Ethernet MMC Registers bits definition                      */
 /******************************************************************************/
 
-/* Bit definition for Ethernet MMC Contol Register */
+/* Bit definition for Ethernet MMC Control Register */
 #define ETH_MMCCR_MCF_Pos                      (3U)                            
 #define ETH_MMCCR_MCF_Msk                      (0x1UL << ETH_MMCCR_MCF_Pos)     /*!< 0x00000008 */
 #define ETH_MMCCR_MCF                          ETH_MMCCR_MCF_Msk               /* MMC Counter Freeze */
@@ -13128,7 +13127,7 @@
 #define ETH_MMCRFCECR_RFCEC_Msk                (0xFFFFFFFFUL << ETH_MMCRFCECR_RFCEC_Pos) /*!< 0xFFFFFFFF */
 #define ETH_MMCRFCECR_RFCEC                    ETH_MMCRFCECR_RFCEC_Msk         /* Number of frames received with CRC error. */
 
-/* Bit definition for Ethernet MMC Received Frames with Alignement Error Counter Register */
+/* Bit definition for Ethernet MMC Received Frames with Alignment Error Counter Register */
 #define ETH_MMCRFAECR_RFAEC_Pos                (0U)                            
 #define ETH_MMCRFAECR_RFAEC_Msk                (0xFFFFFFFFUL << ETH_MMCRFAECR_RFAEC_Pos) /*!< 0xFFFFFFFF */
 #define ETH_MMCRFAECR_RFAEC                    ETH_MMCRFAECR_RFAEC_Msk         /* Number of frames received with alignment (dribble) error */
@@ -13142,7 +13141,7 @@
 /*               Ethernet PTP Registers bits definition                       */
 /******************************************************************************/
 
-/* Bit definition for Ethernet PTP Time Stamp Contol Register */
+/* Bit definition for Ethernet PTP Time Stamp Control Register */
 #define ETH_PTPTSCR_TSARU_Pos                  (5U)                            
 #define ETH_PTPTSCR_TSARU_Msk                  (0x1UL << ETH_PTPTSCR_TSARU_Pos) /*!< 0x00000020 */
 #define ETH_PTPTSCR_TSARU                      ETH_PTPTSCR_TSARU_Msk           /* Addend register update */
@@ -13352,7 +13351,7 @@
 #define ETH_DMASR_RPS_Closing                  ETH_DMASR_RPS_Closing_Msk       /* Running - closing descriptor */
 #define ETH_DMASR_RPS_Queuing_Pos              (17U)                           
 #define ETH_DMASR_RPS_Queuing_Msk              (0x7UL << ETH_DMASR_RPS_Queuing_Pos) /*!< 0x000E0000 */
-#define ETH_DMASR_RPS_Queuing                  ETH_DMASR_RPS_Queuing_Msk       /* Running - queuing the recieve frame into host memory */
+#define ETH_DMASR_RPS_Queuing                  ETH_DMASR_RPS_Queuing_Msk       /* Running - queuing the receive frame into host memory */
 #define ETH_DMASR_NIS_Pos                      (16U)                           
 #define ETH_DMASR_NIS_Msk                      (0x1UL << ETH_DMASR_NIS_Pos)     /*!< 0x00010000 */
 #define ETH_DMASR_NIS                          ETH_DMASR_NIS_Msk               /* Normal interrupt summary */
@@ -15197,20 +15196,20 @@
 #define ADC1_IRQn               ADC1_2_IRQn
 #define USB_LP_IRQn             CAN1_RX0_IRQn
 #define USB_LP_CAN1_RX0_IRQn    CAN1_RX0_IRQn
-#define USB_HP_IRQn             CAN1_TX_IRQn
 #define USB_HP_CAN1_TX_IRQn     CAN1_TX_IRQn
+#define USB_HP_IRQn             CAN1_TX_IRQn
 #define DMA2_Channel4_5_IRQn    DMA2_Channel4_IRQn
 #define USBWakeUp_IRQn          OTG_FS_WKUP_IRQn
 #define CEC_IRQn                OTG_FS_WKUP_IRQn
+#define TIM9_IRQn               TIM1_BRK_IRQn
 #define TIM1_BRK_TIM9_IRQn      TIM1_BRK_IRQn
 #define TIM1_BRK_TIM15_IRQn     TIM1_BRK_IRQn
-#define TIM9_IRQn               TIM1_BRK_IRQn
-#define TIM11_IRQn              TIM1_TRG_COM_IRQn
-#define TIM1_TRG_COM_TIM17_IRQn TIM1_TRG_COM_IRQn
 #define TIM1_TRG_COM_TIM11_IRQn TIM1_TRG_COM_IRQn
-#define TIM1_UP_TIM16_IRQn      TIM1_UP_IRQn
-#define TIM1_UP_TIM10_IRQn      TIM1_UP_IRQn
+#define TIM1_TRG_COM_TIM17_IRQn TIM1_TRG_COM_IRQn
+#define TIM11_IRQn              TIM1_TRG_COM_IRQn
 #define TIM10_IRQn              TIM1_UP_IRQn
+#define TIM1_UP_TIM10_IRQn      TIM1_UP_IRQn
+#define TIM1_UP_TIM16_IRQn      TIM1_UP_IRQn
 #define TIM6_DAC_IRQn           TIM6_IRQn
 
 
@@ -15218,20 +15217,20 @@
 #define ADC1_IRQHandler               ADC1_2_IRQHandler
 #define USB_LP_IRQHandler             CAN1_RX0_IRQHandler
 #define USB_LP_CAN1_RX0_IRQHandler    CAN1_RX0_IRQHandler
-#define USB_HP_IRQHandler             CAN1_TX_IRQHandler
 #define USB_HP_CAN1_TX_IRQHandler     CAN1_TX_IRQHandler
+#define USB_HP_IRQHandler             CAN1_TX_IRQHandler
 #define DMA2_Channel4_5_IRQHandler    DMA2_Channel4_IRQHandler
 #define USBWakeUp_IRQHandler          OTG_FS_WKUP_IRQHandler
 #define CEC_IRQHandler                OTG_FS_WKUP_IRQHandler
+#define TIM9_IRQHandler               TIM1_BRK_IRQHandler
 #define TIM1_BRK_TIM9_IRQHandler      TIM1_BRK_IRQHandler
 #define TIM1_BRK_TIM15_IRQHandler     TIM1_BRK_IRQHandler
-#define TIM9_IRQHandler               TIM1_BRK_IRQHandler
-#define TIM11_IRQHandler              TIM1_TRG_COM_IRQHandler
-#define TIM1_TRG_COM_TIM17_IRQHandler TIM1_TRG_COM_IRQHandler
 #define TIM1_TRG_COM_TIM11_IRQHandler TIM1_TRG_COM_IRQHandler
-#define TIM1_UP_TIM16_IRQHandler      TIM1_UP_IRQHandler
-#define TIM1_UP_TIM10_IRQHandler      TIM1_UP_IRQHandler
+#define TIM1_TRG_COM_TIM17_IRQHandler TIM1_TRG_COM_IRQHandler
+#define TIM11_IRQHandler              TIM1_TRG_COM_IRQHandler
 #define TIM10_IRQHandler              TIM1_UP_IRQHandler
+#define TIM1_UP_TIM10_IRQHandler      TIM1_UP_IRQHandler
+#define TIM1_UP_TIM16_IRQHandler      TIM1_UP_IRQHandler
 #define TIM6_DAC_IRQHandler           TIM6_IRQHandler
 
 
@@ -15251,5 +15250,4 @@
 #endif /* __STM32F107xC_H */
   
   
-  
-  /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
diff --git a/Include/stm32f1xx.h b/Include/stm32f1xx.h
index 6817f52..bc1c89b 100644
--- a/Include/stm32f1xx.h
+++ b/Include/stm32f1xx.h
@@ -8,21 +8,20 @@
   *          is using in the C source code, usually in main.c. This file contains:
   *            - Configuration section that allows to select:
   *              - The STM32F1xx device used in the target application
-  *              - To use or not the peripheral’s drivers in application code(i.e. 
-  *                code will be based on direct access to peripheral’s registers 
+  *              - To use or not the peripheral's drivers in application code(i.e. 
+  *                code will be based on direct access to peripheral's registers 
   *                rather than drivers API), this option is controlled by 
   *                "#define USE_HAL_DRIVER"
   *  
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -90,11 +89,11 @@
 #endif /* USE_HAL_DRIVER */
 
 /**
-  * @brief CMSIS Device version number V4.3.3
+  * @brief CMSIS Device version number
   */
 #define __STM32F1_CMSIS_VERSION_MAIN   (0x04) /*!< [31:24] main version */
 #define __STM32F1_CMSIS_VERSION_SUB1   (0x03) /*!< [23:16] sub1 version */
-#define __STM32F1_CMSIS_VERSION_SUB2   (0x03) /*!< [15:8]  sub2 version */
+#define __STM32F1_CMSIS_VERSION_SUB2   (0x04) /*!< [15:8]  sub2 version */
 #define __STM32F1_CMSIS_VERSION_RC     (0x00) /*!< [7:0]  release candidate */ 
 #define __STM32F1_CMSIS_VERSION        ((__STM32F1_CMSIS_VERSION_MAIN << 24)\
                                        |(__STM32F1_CMSIS_VERSION_SUB1 << 16)\
@@ -272,4 +271,3 @@
 
 
 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Include/system_stm32f1xx.h b/Include/system_stm32f1xx.h
index 187fdde..f8c5304 100644
--- a/Include/system_stm32f1xx.h
+++ b/Include/system_stm32f1xx.h
@@ -1,18 +1,17 @@
 /**
   ******************************************************************************
-  * @file    system_stm32f10x.h
+  * @file    system_stm32f1xx.h
   * @author  MCD Application Team
   * @brief   CMSIS Cortex-M3 Device Peripheral Access Layer System Header File.
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -94,5 +93,4 @@
   
 /**
   * @}
-  */  
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+  */
diff --git a/License.md b/License.md
index 72fbf79..7733a49 100644
--- a/License.md
+++ b/License.md
@@ -1,83 +1,201 @@
-Apache License
- Version 2.0, January 2004
- http://www.apache.org/licenses/
+                                 Apache License
+                           Version 2.0, January 2004
+                        http://www.apache.org/licenses/
 
-TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+   TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
 
-1. Definitions.
+   1. Definitions.
 
-"License" shall mean the terms and conditions for use, reproduction, and distribution as defined by Sections 1 through 9 of this document.
+      "License" shall mean the terms and conditions for use, reproduction,
+      and distribution as defined by Sections 1 through 9 of this document.
 
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-
-END OF TERMS AND CONDITIONS
-
-APPENDIX:
-
-   Copyright [2019] [STMicroelectronics]
+   Copyright [2019] [name of copyright owner]
 
    Licensed under the Apache License, Version 2.0 (the "License");
    you may not use this file except in compliance with the License.
    You may obtain a copy of the License at
 
-     http://www.apache.org/licenses/LICENSE-2.0
+       http://www.apache.org/licenses/LICENSE-2.0
 
    Unless required by applicable law or agreed to in writing, software
    distributed under the License is distributed on an "AS IS" BASIS,
    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
    See the License for the specific language governing permissions and
-   limitations under the License.
\ No newline at end of file
+   limitations under the License.
diff --git a/Release_Notes.html b/Release_Notes.html
index 06d61db..dad0400 100644
--- a/Release_Notes.html
+++ b/Release_Notes.html
@@ -11,37 +11,40 @@
       span.underline{text-decoration: underline;}
       div.column{display: inline-block; vertical-align: top; width: 50%;}
   </style>
-  <link rel="stylesheet" href="_htmresc/mini-st.css" />
+  <style type="text/css">@charset "UTF-8";:root {--fore-color: #03234b;--secondary-fore-color: #03234b;--back-color: #ffffff;--secondary-back-color: #ffffff;--blockquote-color: #e6007e;--pre-color: #e6007e;--border-color: #3cb4e6;--secondary-border-color: #3cb4e6;--heading-ratio: 1.2;--universal-margin: 0.5rem;--universal-padding: 0.25rem;--universal-border-radius: 0.075rem;--background-margin: 1.5%;--a-link-color: #3cb4e6;--a-visited-color: #8c0078; }html {font-size: 13.5px; }a, b, del, em, i, ins, q, span, strong, u {font-size: 1em; }html, * {font-family: -apple-system, BlinkMacSystemFont, Helvetica, arial, sans-serif;line-height: 1.25;-webkit-text-size-adjust: 100%; }* {font-size: 1rem; }body {margin: 0;color: var(--fore-color);@background: var(--back-color);background: var(--back-color) linear-gradient(#ffd200, #ffd200) repeat-y left top;background-size: var(--background-margin);}details {display: block; }summary {display: list-item; }abbr[title] {border-bottom: none;text-decoration: underline dotted; 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}.col-md-2,.row.cols-md-2 > * {max-width: 16.6666666667%;flex-basis: 16.6666666667%; }.col-md-offset-1 {margin-left: 8.3333333333%; }.col-md-3,.row.cols-md-3 > * {max-width: 25%;flex-basis: 25%; }.col-md-offset-2 {margin-left: 16.6666666667%; }.col-md-4,.row.cols-md-4 > * {max-width: 33.3333333333%;flex-basis: 33.3333333333%; }.col-md-offset-3 {margin-left: 25%; }.col-md-5,.row.cols-md-5 > * {max-width: 41.6666666667%;flex-basis: 41.6666666667%; }.col-md-offset-4 {margin-left: 33.3333333333%; }.col-md-6,.row.cols-md-6 > * {max-width: 50%;flex-basis: 50%; }.col-md-offset-5 {margin-left: 41.6666666667%; }.col-md-7,.row.cols-md-7 > * {max-width: 58.3333333333%;flex-basis: 58.3333333333%; }.col-md-offset-6 {margin-left: 50%; }.col-md-8,.row.cols-md-8 > * {max-width: 66.6666666667%;flex-basis: 66.6666666667%; }.col-md-offset-7 {margin-left: 58.3333333333%; }.col-md-9,.row.cols-md-9 > * {max-width: 75%;flex-basis: 75%; }.col-md-offset-8 {margin-left: 66.6666666667%; }.col-md-10,.row.cols-md-10 > * {max-width: 83.3333333333%;flex-basis: 83.3333333333%; }.col-md-offset-9 {margin-left: 75%; }.col-md-11,.row.cols-md-11 > * {max-width: 91.6666666667%;flex-basis: 91.6666666667%; }.col-md-offset-10 {margin-left: 83.3333333333%; }.col-md-12,.row.cols-md-12 > * {max-width: 100%;flex-basis: 100%; }.col-md-offset-11 {margin-left: 91.6666666667%; }.col-md-normal {order: initial; }.col-md-first {order: -999; }.col-md-last {order: 999; } }@media screen and (min-width: 1280px) {.col-lg,[class^='col-lg-'],[class^='col-lg-offset-'],.row[class*='cols-lg-'] > * {box-sizing: border-box;flex: 0 0 auto;padding: 0 calc(var(--universal-padding) / 2); }.col-lg,.row.cols-lg > * {max-width: 100%;flex-grow: 1;flex-basis: 0; }.col-lg-1,.row.cols-lg-1 > * {max-width: 8.3333333333%;flex-basis: 8.3333333333%; }.col-lg-offset-0 {margin-left: 0; }.col-lg-2,.row.cols-lg-2 > * {max-width: 16.6666666667%;flex-basis: 16.6666666667%; }.col-lg-offset-1 {margin-left: 8.3333333333%; }.col-lg-3,.row.cols-lg-3 > * {max-width: 25%;flex-basis: 25%; }.col-lg-offset-2 {margin-left: 16.6666666667%; }.col-lg-4,.row.cols-lg-4 > * {max-width: 33.3333333333%;flex-basis: 33.3333333333%; }.col-lg-offset-3 {margin-left: 25%; }.col-lg-5,.row.cols-lg-5 > * {max-width: 41.6666666667%;flex-basis: 41.6666666667%; }.col-lg-offset-4 {margin-left: 33.3333333333%; }.col-lg-6,.row.cols-lg-6 > * {max-width: 50%;flex-basis: 50%; }.col-lg-offset-5 {margin-left: 41.6666666667%; }.col-lg-7,.row.cols-lg-7 > * {max-width: 58.3333333333%;flex-basis: 58.3333333333%; }.col-lg-offset-6 {margin-left: 50%; }.col-lg-8,.row.cols-lg-8 > * {max-width: 66.6666666667%;flex-basis: 66.6666666667%; }.col-lg-offset-7 {margin-left: 58.3333333333%; }.col-lg-9,.row.cols-lg-9 > * {max-width: 75%;flex-basis: 75%; }.col-lg-offset-8 {margin-left: 66.6666666667%; }.col-lg-10,.row.cols-lg-10 > * {max-width: 83.3333333333%;flex-basis: 83.3333333333%; }.col-lg-offset-9 {margin-left: 75%; }.col-lg-11,.row.cols-lg-11 > * {max-width: 91.6666666667%;flex-basis: 91.6666666667%; }.col-lg-offset-10 {margin-left: 83.3333333333%; }.col-lg-12,.row.cols-lg-12 > * {max-width: 100%;flex-basis: 100%; }.col-lg-offset-11 {margin-left: 91.6666666667%; }.col-lg-normal {order: initial; }.col-lg-first {order: -999; }.col-lg-last {order: 999; } }:root {--card-back-color: #3cb4e6;--card-fore-color: #03234b;--card-border-color: #03234b; }.card {display: flex;flex-direction: column;justify-content: space-between;align-self: center;position: relative;width: 100%;background: var(--card-back-color);color: var(--card-fore-color);border: 0.0714285714rem solid var(--card-border-color);border-radius: var(--universal-border-radius);margin: var(--universal-margin);overflow: hidden; }@media screen and (min-width: 320px) {.card {max-width: 320px; } }.card > .sectione {background: var(--card-back-color);color: var(--card-fore-color);box-sizing: border-box;margin: 0;border: 0;border-radius: 0;border-bottom: 0.0714285714rem solid var(--card-border-color);padding: var(--universal-padding);width: 100%; }.card > .sectione.media {height: 200px;padding: 0;-o-object-fit: cover;object-fit: cover; }.card > .sectione:last-child {border-bottom: 0; }@media screen and (min-width: 240px) {.card.small {max-width: 240px; } }@media screen and (min-width: 480px) {.card.large {max-width: 480px; } }.card.fluid {max-width: 100%;width: auto; }.card.warning {--card-back-color: #e5b8b7;--card-fore-color: #3b234b;--card-border-color: #8c0078; }.card.error {--card-back-color: #464650;--card-fore-color: #ffffff;--card-border-color: #8c0078; }.card > .sectione.dark {--card-back-color: #3b234b;--card-fore-color: #ffffff; }.card > .sectione.double-padded {padding: calc(1.5 * var(--universal-padding)); }:root {--form-back-color: #ffe97f;--form-fore-color: #03234b;--form-border-color: #3cb4e6;--input-back-color: #ffffff;--input-fore-color: #03234b;--input-border-color: #3cb4e6;--input-focus-color: #0288d1;--input-invalid-color: #d32f2f;--button-back-color: #e2e2e2;--button-hover-back-color: #dcdcdc;--button-fore-color: #212121;--button-border-color: transparent;--button-hover-border-color: transparent;--button-group-border-color: rgba(124, 124, 124, 0.54); }form {background: var(--form-back-color);color: var(--form-fore-color);border: 0.0714285714rem solid var(--form-border-color);border-radius: var(--universal-border-radius);margin: var(--universal-margin);padding: calc(2 * var(--universal-padding)) var(--universal-padding); }fieldset {border: 0.0714285714rem solid var(--form-border-color);border-radius: var(--universal-border-radius);margin: calc(var(--universal-margin) / 4);padding: var(--universal-padding); }legend {box-sizing: border-box;display: table;max-width: 100%;white-space: normal;font-weight: 500;padding: calc(var(--universal-padding) / 2); }label {padding: calc(var(--universal-padding) / 2) var(--universal-padding); }.input-group {display: inline-block; }.input-group.fluid {display: flex;align-items: center;justify-content: center; }.input-group.fluid > input {max-width: 100%;flex-grow: 1;flex-basis: 0px; }@media screen and (max-width: 499px) {.input-group.fluid {align-items: stretch;flex-direction: column; } }.input-group.vertical {display: flex;align-items: stretch;flex-direction: column; }.input-group.vertical > input {max-width: 100%;flex-grow: 1;flex-basis: 0px; }[type="number"]::-webkit-inner-spin-button, [type="number"]::-webkit-outer-spin-button {height: auto; }[type="search"] {-webkit-appearance: textfield;outline-offset: -2px; }[type="search"]::-webkit-search-cancel-button,[type="search"]::-webkit-search-decoration {-webkit-appearance: none; }input:not([type]), [type="text"], [type="email"], [type="number"], [type="search"],[type="password"], [type="url"], [type="tel"], [type="checkbox"], [type="radio"], textarea, select {box-sizing: border-box;background: var(--input-back-color);color: var(--input-fore-color);border: 0.0714285714rem solid var(--input-border-color);border-radius: var(--universal-border-radius);margin: calc(var(--universal-margin) / 2);padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); }input:not([type="button"]):not([type="submit"]):not([type="reset"]):hover, input:not([type="button"]):not([type="submit"]):not([type="reset"]):focus, textarea:hover, textarea:focus, select:hover, select:focus {border-color: var(--input-focus-color);box-shadow: none; }input:not([type="button"]):not([type="submit"]):not([type="reset"]):invalid, input:not([type="button"]):not([type="submit"]):not([type="reset"]):focus:invalid, textarea:invalid, textarea:focus:invalid, select:invalid, select:focus:invalid {border-color: var(--input-invalid-color);box-shadow: none; }input:not([type="button"]):not([type="submit"]):not([type="reset"])[readonly], textarea[readonly], select[readonly] {background: var(--secondary-back-color); }select {max-width: 100%; }option {overflow: hidden;text-overflow: ellipsis; }[type="checkbox"], [type="radio"] {-webkit-appearance: none;-moz-appearance: none;appearance: none;position: relative;height: calc(1rem + var(--universal-padding) / 2);width: calc(1rem + var(--universal-padding) / 2);vertical-align: text-bottom;padding: 0;flex-basis: calc(1rem + var(--universal-padding) / 2) !important;flex-grow: 0 !important; }[type="checkbox"]:checked:before, [type="radio"]:checked:before {position: absolute; }[type="checkbox"]:checked:before {content: '\2713';font-family: sans-serif;font-size: calc(1rem + var(--universal-padding) / 2);top: calc(0rem - var(--universal-padding));left: calc(var(--universal-padding) / 4); }[type="radio"] {border-radius: 100%; }[type="radio"]:checked:before {border-radius: 100%;content: '';top: calc(0.0714285714rem + var(--universal-padding) / 2);left: calc(0.0714285714rem + var(--universal-padding) / 2);background: var(--input-fore-color);width: 0.5rem;height: 0.5rem; }:placeholder-shown {color: var(--input-fore-color); }::-ms-placeholder {color: var(--input-fore-color);opacity: 0.54; }button::-moz-focus-inner, [type="button"]::-moz-focus-inner, [type="reset"]::-moz-focus-inner, [type="submit"]::-moz-focus-inner {border-style: none;padding: 0; }button, html [type="button"], [type="reset"], [type="submit"] {-webkit-appearance: button; }button {overflow: visible;text-transform: none; }button, [type="button"], [type="submit"], [type="reset"],a.button, label.button, .button,a[role="button"], label[role="button"], [role="button"] {display: inline-block;background: var(--button-back-color);color: var(--button-fore-color);border: 0.0714285714rem solid var(--button-border-color);border-radius: var(--universal-border-radius);padding: var(--universal-padding) calc(1.5 * var(--universal-padding));margin: var(--universal-margin);text-decoration: none;cursor: pointer;transition: background 0.3s; }button:hover, button:focus, [type="button"]:hover, [type="button"]:focus, [type="submit"]:hover, [type="submit"]:focus, [type="reset"]:hover, [type="reset"]:focus,a.button:hover,a.button:focus, label.button:hover, label.button:focus, .button:hover, .button:focus,a[role="button"]:hover,a[role="button"]:focus, label[role="button"]:hover, label[role="button"]:focus, [role="button"]:hover, [role="button"]:focus {background: var(--button-hover-back-color);border-color: var(--button-hover-border-color); }input:disabled, input[disabled], textarea:disabled, textarea[disabled], select:disabled, select[disabled], button:disabled, button[disabled], .button:disabled, .button[disabled], [role="button"]:disabled, [role="button"][disabled] {cursor: not-allowed;opacity: 0.75; }.button-group {display: flex;border: 0.0714285714rem solid var(--button-group-border-color);border-radius: var(--universal-border-radius);margin: var(--universal-margin); }.button-group > button, .button-group [type="button"], .button-group > [type="submit"], .button-group > [type="reset"], .button-group > .button, .button-group > [role="button"] {margin: 0;max-width: 100%;flex: 1 1 auto;text-align: center;border: 0;border-radius: 0;box-shadow: none; }.button-group > :not(:first-child) {border-left: 0.0714285714rem solid var(--button-group-border-color); }@media screen and (max-width: 499px) {.button-group {flex-direction: column; }.button-group > :not(:first-child) {border: 0;border-top: 0.0714285714rem solid var(--button-group-border-color); } }button.primary, [type="button"].primary, [type="submit"].primary, [type="reset"].primary, .button.primary, [role="button"].primary {--button-back-color: #1976d2;--button-fore-color: #f8f8f8; }button.primary:hover, button.primary:focus, [type="button"].primary:hover, [type="button"].primary:focus, [type="submit"].primary:hover, [type="submit"].primary:focus, [type="reset"].primary:hover, [type="reset"].primary:focus, .button.primary:hover, .button.primary:focus, [role="button"].primary:hover, [role="button"].primary:focus {--button-hover-back-color: #1565c0; }button.secondary, [type="button"].secondary, [type="submit"].secondary, [type="reset"].secondary, .button.secondary, [role="button"].secondary {--button-back-color: #d32f2f;--button-fore-color: #f8f8f8; }button.secondary:hover, button.secondary:focus, [type="button"].secondary:hover, [type="button"].secondary:focus, [type="submit"].secondary:hover, [type="submit"].secondary:focus, [type="reset"].secondary:hover, [type="reset"].secondary:focus, .button.secondary:hover, .button.secondary:focus, [role="button"].secondary:hover, [role="button"].secondary:focus {--button-hover-back-color: #c62828; }button.tertiary, [type="button"].tertiary, [type="submit"].tertiary, [type="reset"].tertiary, .button.tertiary, [role="button"].tertiary {--button-back-color: #308732;--button-fore-color: #f8f8f8; }button.tertiary:hover, button.tertiary:focus, [type="button"].tertiary:hover, [type="button"].tertiary:focus, [type="submit"].tertiary:hover, [type="submit"].tertiary:focus, [type="reset"].tertiary:hover, [type="reset"].tertiary:focus, .button.tertiary:hover, .button.tertiary:focus, [role="button"].tertiary:hover, [role="button"].tertiary:focus {--button-hover-back-color: #277529; }button.inverse, [type="button"].inverse, [type="submit"].inverse, [type="reset"].inverse, .button.inverse, [role="button"].inverse {--button-back-color: #212121;--button-fore-color: #f8f8f8; }button.inverse:hover, button.inverse:focus, [type="button"].inverse:hover, [type="button"].inverse:focus, [type="submit"].inverse:hover, [type="submit"].inverse:focus, [type="reset"].inverse:hover, [type="reset"].inverse:focus, .button.inverse:hover, .button.inverse:focus, [role="button"].inverse:hover, [role="button"].inverse:focus {--button-hover-back-color: #111; }button.small, [type="button"].small, [type="submit"].small, [type="reset"].small, .button.small, [role="button"].small {padding: calc(0.5 * var(--universal-padding)) calc(0.75 * var(--universal-padding));margin: var(--universal-margin); }button.large, [type="button"].large, [type="submit"].large, [type="reset"].large, .button.large, [role="button"].large {padding: calc(1.5 * var(--universal-padding)) calc(2 * var(--universal-padding));margin: var(--universal-margin); }:root {--header-back-color: #03234b;--header-hover-back-color: #ffd200;--header-fore-color: #ffffff;--header-border-color: #3cb4e6;--nav-back-color: #ffffff;--nav-hover-back-color: #ffe97f;--nav-fore-color: #e6007e;--nav-border-color: #3cb4e6;--nav-link-color: #3cb4e6;--footer-fore-color: #ffffff;--footer-back-color: #03234b;--footer-border-color: #3cb4e6;--footer-link-color: #3cb4e6;--drawer-back-color: #ffffff;--drawer-hover-back-color: #ffe97f;--drawer-border-color: #3cb4e6;--drawer-close-color: #e6007e; }header {height: 2.75rem;background: var(--header-back-color);color: var(--header-fore-color);border-bottom: 0.0714285714rem solid var(--header-border-color);padding: calc(var(--universal-padding) / 4) 0;white-space: nowrap;overflow-x: auto;overflow-y: hidden; }header.row {box-sizing: content-box; }header .logo {color: var(--header-fore-color);font-size: 1.75rem;padding: var(--universal-padding) calc(2 * var(--universal-padding));text-decoration: none; }header button, header [type="button"], header .button, header [role="button"] {box-sizing: border-box;position: relative;top: calc(0rem - var(--universal-padding) / 4);height: calc(3.1875rem + var(--universal-padding) / 2);background: var(--header-back-color);line-height: calc(3.1875rem - var(--universal-padding) * 1.5);text-align: center;color: var(--header-fore-color);border: 0;border-radius: 0;margin: 0;text-transform: uppercase; }header button:hover, header button:focus, header [type="button"]:hover, header [type="button"]:focus, header .button:hover, header .button:focus, header [role="button"]:hover, header [role="button"]:focus {background: var(--header-hover-back-color); }nav {background: var(--nav-back-color);color: var(--nav-fore-color);border: 0.0714285714rem solid var(--nav-border-color);border-radius: var(--universal-border-radius);margin: var(--universal-margin); }nav * {padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); }nav a, nav a:visited {display: block;color: var(--nav-link-color);border-radius: var(--universal-border-radius);transition: background 0.3s; }nav a:hover, nav a:focus, nav a:visited:hover, nav a:visited:focus {text-decoration: none;background: var(--nav-hover-back-color); }nav .sublink-1 {position: relative;margin-left: calc(2 * var(--universal-padding)); }nav .sublink-1:before {position: absolute;left: calc(var(--universal-padding) - 1 * var(--universal-padding));top: -0.0714285714rem;content: '';height: 100%;border: 0.0714285714rem solid var(--nav-border-color);border-left: 0; }nav .sublink-2 {position: relative;margin-left: calc(4 * var(--universal-padding)); }nav .sublink-2:before {position: absolute;left: calc(var(--universal-padding) - 3 * var(--universal-padding));top: -0.0714285714rem;content: '';height: 100%;border: 0.0714285714rem solid var(--nav-border-color);border-left: 0; }footer {background: var(--footer-back-color);color: var(--footer-fore-color);border-top: 0.0714285714rem solid var(--footer-border-color);padding: calc(2 * var(--universal-padding)) var(--universal-padding);font-size: 0.875rem; }footer a, footer a:visited {color: var(--footer-link-color); }header.sticky {position: -webkit-sticky;position: sticky;z-index: 1101;top: 0; }footer.sticky {position: -webkit-sticky;position: sticky;z-index: 1101;bottom: 0; }.drawer-toggle:before {display: inline-block;position: relative;vertical-align: bottom;content: '\00a0\2261\00a0';font-family: sans-serif;font-size: 1.5em; }@media screen and (min-width: 500px) {.drawer-toggle:not(.persistent) {display: none; } }[type="checkbox"].drawer {height: 1px;width: 1px;margin: -1px;overflow: hidden;position: absolute;clip: rect(0 0 0 0);-webkit-clip-path: inset(100%);clip-path: inset(100%); }[type="checkbox"].drawer + * {display: block;box-sizing: border-box;position: fixed;top: 0;width: 320px;height: 100vh;overflow-y: auto;background: var(--drawer-back-color);border: 0.0714285714rem solid var(--drawer-border-color);border-radius: 0;margin: 0;z-index: 1110;right: -320px;transition: right 0.3s; }[type="checkbox"].drawer + * .drawer-close {position: absolute;top: var(--universal-margin);right: var(--universal-margin);z-index: 1111;width: 2rem;height: 2rem;border-radius: var(--universal-border-radius);padding: var(--universal-padding);margin: 0;cursor: pointer;transition: background 0.3s; }[type="checkbox"].drawer + * .drawer-close:before {display: block;content: '\00D7';color: var(--drawer-close-color);position: relative;font-family: sans-serif;font-size: 2rem;line-height: 1;text-align: center; }[type="checkbox"].drawer + * .drawer-close:hover, [type="checkbox"].drawer + * .drawer-close:focus {background: var(--drawer-hover-back-color); }@media screen and (max-width: 320px) {[type="checkbox"].drawer + * {width: 100%; } }[type="checkbox"].drawer:checked + * {right: 0; }@media screen and (min-width: 500px) {[type="checkbox"].drawer:not(.persistent) + * {position: static;height: 100%;z-index: 1100; }[type="checkbox"].drawer:not(.persistent) + * .drawer-close {display: none; } }:root {--table-border-color: #03234b;--table-border-separator-color: #03234b;--table-head-back-color: #03234b;--table-head-fore-color: #ffffff;--table-body-back-color: #ffffff;--table-body-fore-color: #03234b;--table-body-alt-back-color: #f4f4f4; }table {border-collapse: separate;border-spacing: 0;margin: 0;display: flex;flex: 0 1 auto;flex-flow: row wrap;padding: var(--universal-padding);padding-top: 0; }table caption {font-size: 1rem;margin: calc(2 * var(--universal-margin)) 0;max-width: 100%;flex: 0 0 100%; }table thead, table tbody {display: flex;flex-flow: row wrap;border: 0.0714285714rem solid var(--table-border-color); }table thead {z-index: 999;border-radius: var(--universal-border-radius) var(--universal-border-radius) 0 0;border-bottom: 0.0714285714rem solid var(--table-border-separator-color); }table tbody {border-top: 0;margin-top: calc(0 - var(--universal-margin));border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }table tr {display: flex;padding: 0; }table th, table td {padding: calc(0.5 * var(--universal-padding));font-size: 0.9rem; }table th {text-align: left;background: var(--table-head-back-color);color: var(--table-head-fore-color); }table td {background: var(--table-body-back-color);color: var(--table-body-fore-color);border-top: 0.0714285714rem solid var(--table-border-color); }table:not(.horizontal) {overflow: auto;max-height: 100%; }table:not(.horizontal) thead, table:not(.horizontal) tbody {max-width: 100%;flex: 0 0 100%; }table:not(.horizontal) tr {flex-flow: row wrap;flex: 0 0 100%; }table:not(.horizontal) th, table:not(.horizontal) td {flex: 1 0 0%;overflow: hidden;text-overflow: ellipsis; }table:not(.horizontal) thead {position: sticky;top: 0; }table:not(.horizontal) tbody tr:first-child td {border-top: 0; }table.horizontal {border: 0; }table.horizontal thead, table.horizontal tbody {border: 0;flex: .2 0 0;flex-flow: row nowrap; }table.horizontal tbody {overflow: auto;justify-content: space-between;flex: .8 0 0;margin-left: 0;padding-bottom: calc(var(--universal-padding) / 4); }table.horizontal tr {flex-direction: column;flex: 1 0 auto; }table.horizontal th, table.horizontal td {width: auto;border: 0;border-bottom: 0.0714285714rem solid var(--table-border-color); }table.horizontal th:not(:first-child), table.horizontal td:not(:first-child) {border-top: 0; }table.horizontal th {text-align: right;border-left: 0.0714285714rem solid var(--table-border-color);border-right: 0.0714285714rem solid var(--table-border-separator-color); }table.horizontal thead tr:first-child {padding-left: 0; }table.horizontal th:first-child, table.horizontal td:first-child {border-top: 0.0714285714rem solid var(--table-border-color); }table.horizontal tbody tr:last-child td {border-right: 0.0714285714rem solid var(--table-border-color); }table.horizontal tbody tr:last-child td:first-child {border-top-right-radius: 0.25rem; }table.horizontal tbody tr:last-child td:last-child {border-bottom-right-radius: 0.25rem; }table.horizontal thead tr:first-child th:first-child {border-top-left-radius: 0.25rem; }table.horizontal thead tr:first-child th:last-child {border-bottom-left-radius: 0.25rem; }@media screen and (max-width: 499px) {table, table.horizontal {border-collapse: collapse;border: 0;width: 100%;display: table; }table thead, table th, table.horizontal thead, table.horizontal th {border: 0;height: 1px;width: 1px;margin: -1px;overflow: hidden;padding: 0;position: absolute;clip: rect(0 0 0 0);-webkit-clip-path: inset(100%);clip-path: inset(100%); }table tbody, table.horizontal tbody {border: 0;display: table-row-group; }table tr, table.horizontal tr {display: block;border: 0.0714285714rem solid var(--table-border-color);border-radius: var(--universal-border-radius);background: #ffffff;padding: var(--universal-padding);margin: var(--universal-margin);margin-bottom: calc(1 * var(--universal-margin)); }table th, table td, table.horizontal th, table.horizontal td {width: auto; }table td, table.horizontal td {display: block;border: 0;text-align: right; }table td:before, table.horizontal td:before {content: attr(data-label);float: left;font-weight: 600; }table th:first-child, table td:first-child, table.horizontal th:first-child, table.horizontal td:first-child {border-top: 0; }table tbody tr:last-child td, table.horizontal tbody tr:last-child td {border-right: 0; } }table tr:nth-of-type(2n) > td {background: var(--table-body-alt-back-color); }@media screen and (max-width: 500px) {table tr:nth-of-type(2n) {background: var(--table-body-alt-back-color); } }:root {--table-body-hover-back-color: #90caf9; }table.hoverable tr:hover, table.hoverable tr:hover > td, table.hoverable tr:focus, table.hoverable tr:focus > td {background: var(--table-body-hover-back-color); }@media screen and (max-width: 500px) {table.hoverable tr:hover, table.hoverable tr:hover > td, table.hoverable tr:focus, table.hoverable tr:focus > td {background: var(--table-body-hover-back-color); } }:root {--mark-back-color: #3cb4e6;--mark-fore-color: #ffffff; }mark {background: var(--mark-back-color);color: var(--mark-fore-color);font-size: 0.95em;line-height: 1em;border-radius: var(--universal-border-radius);padding: calc(var(--universal-padding) / 4) var(--universal-padding); }mark.inline-block {display: inline-block;font-size: 1em;line-height: 1.4;padding: calc(var(--universal-padding) / 2) var(--universal-padding); }:root {--toast-back-color: #424242;--toast-fore-color: #fafafa; }.toast {position: fixed;bottom: calc(var(--universal-margin) * 3);left: 50%;transform: translate(-50%, -50%);z-index: 1111;color: var(--toast-fore-color);background: var(--toast-back-color);border-radius: calc(var(--universal-border-radius) * 16);padding: var(--universal-padding) calc(var(--universal-padding) * 3); }:root {--tooltip-back-color: #212121;--tooltip-fore-color: #fafafa; }.tooltip {position: relative;display: inline-block; }.tooltip:before, .tooltip:after {position: absolute;opacity: 0;clip: rect(0 0 0 0);-webkit-clip-path: inset(100%);clip-path: inset(100%);transition: all 0.3s;z-index: 1010;left: 50%; }.tooltip:not(.bottom):before, .tooltip:not(.bottom):after {bottom: 75%; }.tooltip.bottom:before, .tooltip.bottom:after {top: 75%; }.tooltip:hover:before, .tooltip:hover:after, .tooltip:focus:before, .tooltip:focus:after {opacity: 1;clip: auto;-webkit-clip-path: inset(0%);clip-path: inset(0%); }.tooltip:before {content: '';background: transparent;border: var(--universal-margin) solid transparent;left: calc(50% - var(--universal-margin)); }.tooltip:not(.bottom):before {border-top-color: #212121; }.tooltip.bottom:before {border-bottom-color: #212121; }.tooltip:after {content: attr(aria-label);color: var(--tooltip-fore-color);background: var(--tooltip-back-color);border-radius: var(--universal-border-radius);padding: var(--universal-padding);white-space: nowrap;transform: translateX(-50%); }.tooltip:not(.bottom):after {margin-bottom: calc(2 * var(--universal-margin)); }.tooltip.bottom:after {margin-top: calc(2 * var(--universal-margin)); }:root {--modal-overlay-color: rgba(0, 0, 0, 0.45);--modal-close-color: #e6007e;--modal-close-hover-color: #ffe97f; }[type="checkbox"].modal {height: 1px;width: 1px;margin: -1px;overflow: hidden;position: absolute;clip: rect(0 0 0 0);-webkit-clip-path: inset(100%);clip-path: inset(100%); }[type="checkbox"].modal + div {position: fixed;top: 0;left: 0;display: none;width: 100vw;height: 100vh;background: var(--modal-overlay-color); }[type="checkbox"].modal + div .card {margin: 0 auto;max-height: 50vh;overflow: auto; }[type="checkbox"].modal + div .card .modal-close {position: absolute;top: 0;right: 0;width: 1.75rem;height: 1.75rem;border-radius: var(--universal-border-radius);padding: var(--universal-padding);margin: 0;cursor: pointer;transition: background 0.3s; }[type="checkbox"].modal + div .card .modal-close:before {display: block;content: '\00D7';color: var(--modal-close-color);position: relative;font-family: sans-serif;font-size: 1.75rem;line-height: 1;text-align: center; }[type="checkbox"].modal + div .card .modal-close:hover, [type="checkbox"].modal + div .card .modal-close:focus {background: var(--modal-close-hover-color); }[type="checkbox"].modal:checked + div {display: flex;flex: 0 1 auto;z-index: 1200; }[type="checkbox"].modal:checked + div .card .modal-close {z-index: 1211; }:root {--collapse-label-back-color: #03234b;--collapse-label-fore-color: #ffffff;--collapse-label-hover-back-color: #3cb4e6;--collapse-selected-label-back-color: #3cb4e6;--collapse-border-color: var(--collapse-label-back-color);--collapse-selected-border-color: #ceecf8;--collapse-content-back-color: #ffffff;--collapse-selected-label-border-color: #3cb4e6; }.collapse {width: calc(100% - 2 * var(--universal-margin));opacity: 1;display: flex;flex-direction: column;margin: var(--universal-margin);border-radius: var(--universal-border-radius); }.collapse > [type="radio"], .collapse > [type="checkbox"] {height: 1px;width: 1px;margin: -1px;overflow: hidden;position: absolute;clip: rect(0 0 0 0);-webkit-clip-path: inset(100%);clip-path: inset(100%); }.collapse > label {flex-grow: 1;display: inline-block;height: 1.25rem;cursor: pointer;transition: background 0.2s;color: var(--collapse-label-fore-color);background: var(--collapse-label-back-color);border: 0.0714285714rem solid var(--collapse-selected-border-color);padding: calc(1.25 * var(--universal-padding)); }.collapse > label:hover, .collapse > label:focus {background: var(--collapse-label-hover-back-color); }.collapse > label + div {flex-basis: auto;height: 1px;width: 1px;margin: -1px;overflow: hidden;position: absolute;clip: rect(0 0 0 0);-webkit-clip-path: inset(100%);clip-path: inset(100%);transition: max-height 0.3s;max-height: 1px; }.collapse > :checked + label {background: var(--collapse-selected-label-back-color);border-color: var(--collapse-selected-label-border-color); }.collapse > :checked + label + div {box-sizing: border-box;position: relative;width: 100%;height: auto;overflow: auto;margin: 0;background: var(--collapse-content-back-color);border: 0.0714285714rem solid var(--collapse-selected-border-color);border-top: 0;padding: var(--universal-padding);clip: auto;-webkit-clip-path: inset(0%);clip-path: inset(0%);max-height: 100%; }.collapse > label:not(:first-of-type) {border-top: 0; }.collapse > label:first-of-type {border-radius: var(--universal-border-radius) var(--universal-border-radius) 0 0; }.collapse > label:last-of-type:not(:first-of-type) {border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }.collapse > label:last-of-type:first-of-type {border-radius: var(--universal-border-radius); }.collapse > :checked:last-of-type:not(:first-of-type) + label {border-radius: 0; }.collapse > :checked:last-of-type + label + div {border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }mark.tertiary {--mark-back-color: #3cb4e6; }mark.tag {padding: calc(var(--universal-padding)/2) var(--universal-padding);border-radius: 1em; }:root {--progress-back-color: #3cb4e6;--progress-fore-color: #555; }progress {display: block;vertical-align: baseline;-webkit-appearance: none;-moz-appearance: none;appearance: none;height: 0.75rem;width: calc(100% - 2 * var(--universal-margin));margin: var(--universal-margin);border: 0;border-radius: calc(2 * var(--universal-border-radius));background: var(--progress-back-color);color: var(--progress-fore-color); }progress::-webkit-progress-value {background: var(--progress-fore-color);border-top-left-radius: calc(2 * var(--universal-border-radius));border-bottom-left-radius: calc(2 * var(--universal-border-radius)); }progress::-webkit-progress-bar {background: var(--progress-back-color); }progress::-moz-progress-bar {background: var(--progress-fore-color);border-top-left-radius: calc(2 * var(--universal-border-radius));border-bottom-left-radius: calc(2 * var(--universal-border-radius)); }progress[value="1000"]::-webkit-progress-value {border-radius: calc(2 * var(--universal-border-radius)); }progress[value="1000"]::-moz-progress-bar {border-radius: calc(2 * var(--universal-border-radius)); }progress.inline {display: inline-block;vertical-align: middle;width: 60%; }:root {--spinner-back-color: #ddd;--spinner-fore-color: #555; }@keyframes spinner-donut-anim {0% {transform: rotate(0deg); }100% {transform: rotate(360deg); } }.spinner {display: inline-block;margin: var(--universal-margin);border: 0.25rem solid var(--spinner-back-color);border-left: 0.25rem solid var(--spinner-fore-color);border-radius: 50%;width: 1.25rem;height: 1.25rem;animation: spinner-donut-anim 1.2s linear infinite; }progress.primary {--progress-fore-color: #1976d2; }progress.secondary {--progress-fore-color: #d32f2f; }progress.tertiary {--progress-fore-color: #308732; }.spinner.primary {--spinner-fore-color: #1976d2; }.spinner.secondary {--spinner-fore-color: #d32f2f; }.spinner.tertiary {--spinner-fore-color: #308732; }span[class^='icon-'] {display: inline-block;height: 1em;width: 1em;vertical-align: -0.125em;background-size: contain;margin: 0 calc(var(--universal-margin) / 4); }span[class^='icon-'].secondary {-webkit-filter: invert(25%);filter: invert(25%); }span[class^='icon-'].inverse {-webkit-filter: invert(100%);filter: invert(100%); }span.icon-alert {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='8' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='16' x2='12' y2='16'%3E%3C/line%3E%3C/svg%3E"); }span.icon-bookmark {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M19 21l-7-5-7 5V5a2 2 0 0 1 2-2h10a2 2 0 0 1 2 2z'%3E%3C/path%3E%3C/svg%3E"); }span.icon-calendar {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='4' width='18' height='18' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='16' y1='2' x2='16' y2='6'%3E%3C/line%3E%3Cline x1='8' y1='2' x2='8' y2='6'%3E%3C/line%3E%3Cline x1='3' y1='10' x2='21' y2='10'%3E%3C/line%3E%3C/svg%3E"); }span.icon-credit {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='1' y='4' width='22' height='16' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='1' y1='10' x2='23' y2='10'%3E%3C/line%3E%3C/svg%3E"); }span.icon-edit {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 14.66V20a2 2 0 0 1-2 2H4a2 2 0 0 1-2-2V6a2 2 0 0 1 2-2h5.34'%3E%3C/path%3E%3Cpolygon points='18 2 22 6 12 16 8 16 8 12 18 2'%3E%3C/polygon%3E%3C/svg%3E"); }span.icon-link {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M18 13v6a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2V8a2 2 0 0 1 2-2h6'%3E%3C/path%3E%3Cpolyline points='15 3 21 3 21 9'%3E%3C/polyline%3E%3Cline x1='10' y1='14' x2='21' y2='3'%3E%3C/line%3E%3C/svg%3E"); }span.icon-help {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M9.09 9a3 3 0 0 1 5.83 1c0 2-3 3-3 3'%3E%3C/path%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='17' x2='12' y2='17'%3E%3C/line%3E%3C/svg%3E"); }span.icon-home {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M3 9l9-7 9 7v11a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2z'%3E%3C/path%3E%3Cpolyline points='9 22 9 12 15 12 15 22'%3E%3C/polyline%3E%3C/svg%3E"); }span.icon-info {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='16' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='8' x2='12' y2='8'%3E%3C/line%3E%3C/svg%3E"); }span.icon-lock {background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='11' width='18' height='11' rx='2' ry='2'%3E%3C/rect%3E%3Cpath d='M7 11V7a5 5 0 0 1 10 0v4'%3E%3C/path%3E%3C/svg%3E"); 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 </head>
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-<div class="card fluid">
-<div class="sectione dark">
 <center>
-<h1 id="release-notes-for-stm32f1xx-cmsis"><strong>Release Notes for STM32F1xx CMSIS</strong></h1>
+<h1 id="release-notes-for-stm32f1xx-cmsis"><small>Release Notes for</small> <mark>STM32F1xx CMSIS</mark></h1>
 <p>Copyright © 2016 STMicroelectronics<br />
 </p>
-<a href="https://www.st.com" class="logo"><img src="./_htmresc/st_logo.png" alt="ST logo" /></a>
-</center>
-</div>
-</div>
-<h1 id="license"><strong>License</strong></h1>
-This software component is licensed by ST under BSD 3-Clause license, the “License”; You may not use this component except in compliance with the License. You may obtain a copy of the License at:
-<center>
-<a href="https://opensource.org/licenses/BSD-3-Clause">https://opensource.org/licenses/BSD-3-Clause</a>
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AAAAAAAAAAAAAAAAAAAgApj7P8B7rljbw+FKrEAAAAASUVORK5CYII=" alt="ST logo" /></a>
 </center>
 </div>
 <div class="col-sm-12 col-lg-8">
 <h1 id="update-history"><strong>Update History</strong></h1>
 <div class="collapse">
-<input type="checkbox" id="collapse-section4_3_3" checked aria-hidden="true"> <label for="collapse-section4_3_3" aria-hidden="true"><strong>V4.3.3 / 21-May-2021</strong></label>
+<input type="checkbox" id="collapse-section4_3_4" checked aria-hidden="true"> <label for="collapse-section4_3_4" aria-hidden="true"><strong>V4.3.4 / 07-April-2023</strong></label>
 <div>
 <h2 id="main-changes">Main Changes</h2>
 <ul>
+<li>Define SPI2_IRQHandler weak alias instead of a duplication of the definition of SPI1_IRQHandler weak alias.</li>
+<li>Update the GCC startup file to be aligned to IAR/Keil IDE.</li>
+<li>All source files: update disclaimer to add reference to the new license agreement.</li>
+</ul>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section4_3_3" aria-hidden="true"> <label for="collapse-section4_3_3" aria-hidden="true"><strong>V4.3.3 / 21-May-2021</strong></label>
+<div>
+<h2 id="main-changes-1">Main Changes</h2>
+<ul>
 <li>Improve GCC startup files robustness.</li>
 <li>Add LSI maximum startup time datasheet value: LSI_STARTUP_TIME.</li>
 <li>Add atomic register access macros.</li>
@@ -52,7 +55,7 @@
 <div class="collapse">
 <input type="checkbox" id="collapse-section4_3_2" aria-hidden="true"> <label for="collapse-section4_3_2" aria-hidden="true"><strong>V4.3.2 / 07-September-2020</strong></label>
 <div>
-<h2 id="main-changes-1">Main Changes</h2>
+<h2 id="main-changes-2">Main Changes</h2>
 <ul>
 <li>Protect Vector table modification following SRAM or FLASH preprocessor directive by a generic preprocessor directive : USER_VECT_TAB_ADDRESS</li>
 <li>SystemInit(): update to don’t reset RCC registers to its reset values.</li>
@@ -62,7 +65,7 @@
 </ul></li>
 <li>I2S:
 <ul>
-<li>Add missing I2SCFG and I2SPR bits difinitions for STM32F101xE and STM32F101xG</li>
+<li>Add missing I2SCFG and I2SPR bits definitions for STM32F101xE and STM32F101xG</li>
 </ul></li>
 </ul>
 </div>
@@ -70,7 +73,7 @@
 <div class="collapse">
 <input type="checkbox" id="collapse-section4_3_1" aria-hidden="true"> <label for="collapse-section4_3_1" aria-hidden="true"><strong>V4.3.1 / 26-June-2019</strong></label>
 <div>
-<h2 id="main-changes-2">Main Changes</h2>
+<h2 id="main-changes-3">Main Changes</h2>
 <ul>
 <li>Fix MISRA C 2012 Compilation errors: update to use “UL” postfix for bits mask definitions(_Msk) and memory/peripheral base addresses</li>
 <li>Fix wrong initialization value for “SystemCoreClock” in System_stm32f1xx.c file</li>
@@ -105,7 +108,7 @@
 <div class="collapse">
 <input type="checkbox" id="collapse-section4_3_0" aria-hidden="true"> <label for="collapse-section4_3_0" aria-hidden="true"><strong>V4.3.0 / 09-October-2018</strong></label>
 <div>
-<h2 id="main-changes-3">Main Changes</h2>
+<h2 id="main-changes-4">Main Changes</h2>
 <ul>
 <li>Add missing IS_TIM_SYNCHRO_INSTANCE macro definition to check TIM SYNCHRO feature instance support.</li>
 </ul>
@@ -114,7 +117,7 @@
 <div class="collapse">
 <input type="checkbox" id="collapse-section4_2_0" aria-hidden="true"> <label for="collapse-section4_2_0" aria-hidden="true"><strong>V4.2.0 / 31-March-2017</strong></label>
 <div>
-<h2 id="main-changes-4">Main Changes</h2>
+<h2 id="main-changes-5">Main Changes</h2>
 <ul>
 <li>Use _Pos and _Mask macros for all Bit Definitions</li>
 <li>Remove Core-CM3 bit definitions from CMSIS devices drivers: duplicated with bit definitions in core_cm3.h.</li>
@@ -154,7 +157,7 @@
 <div class="collapse">
 <input type="checkbox" id="collapse-section4_1_0" aria-hidden="true"> <label for="collapse-section4_1_0" aria-hidden="true"><strong>V4.1.0 / 29-April-2016</strong></label>
 <div>
-<h2 id="main-changes-5">Main Changes</h2>
+<h2 id="main-changes-6">Main Changes</h2>
 <ul>
 <li>Add _Pos and _Msk defines to be used with _VAL2FLD(field, value) and _FLD2VAL(field, value).
 <ul>
@@ -162,8 +165,8 @@
 </ul></li>
 <li>RCC: Add define RCC_CFGR_MCOSEL for compatibility across all STM32 series.</li>
 <li>ADC: Add define ADC_MULTIMODE_SUPPORT for devices supporting the ADC multimode feature.</li>
-<li>ADC: Add define ADC_SR_EOS and ADC_SR_JEOS for compatibility accross all STM32 series.</li>
-<li>stm32f1xx.h: Replace __STM32F1xx_CMSIS_DEVICE_VERSION_MAIN by __STM32F1_CMSIS_VERSION_MAIN for MISRA compliancy on define length name.</li>
+<li>ADC: Add define ADC_SR_EOS and ADC_SR_JEOS for compatibility across all STM32 series.</li>
+<li>stm32f1xx.h: Replace __STM32F1xx_CMSIS_DEVICE_VERSION_MAIN by __STM32F1_CMSIS_VERSION_MAIN for MISRA compliance on define length name.</li>
 <li>Add APBPrescTable constant to list APB prescalers values.</li>
 <li>Add FLASHSIZE_BASE for the FLASH Size register base address.</li>
 <li>Add UID_BASE for the unique device ID register base address.</li>
@@ -173,7 +176,7 @@
 <div class="collapse">
 <input type="checkbox" id="collapse-section4_0_2" aria-hidden="true"> <label for="collapse-section4_0_2" aria-hidden="true"><strong>V4.0.2 / 18-December-2016</strong></label>
 <div>
-<h2 id="main-changes-6">Main Changes</h2>
+<h2 id="main-changes-7">Main Changes</h2>
 <ul>
 <li>FLASH: Add FLASH_OBR_DATA0 and FLASH_OBR_DATA1 for FLASH_OBR register.</li>
 <li>WWDG: Align bit name across all STM32 families.
@@ -203,7 +206,7 @@
 <div class="collapse">
 <input type="checkbox" id="collapse-section4_0_1" aria-hidden="true"> <label for="collapse-section4_0_1" aria-hidden="true"><strong>V4.0.1 / 31-July-2015</strong></label>
 <div>
-<h2 id="main-changes-7">Main Changes</h2>
+<h2 id="main-changes-8">Main Changes</h2>
 <ul>
 <li>Remove __IO or __I on constant table declaration (AHBPrescTable in system_stm32f1xx.c) due to issue with mbed C++ code. The table content was filled with random value at initialization phase.</li>
 <li>uint8_t alignment done on CMSIS CRC registers structure.</li>
@@ -214,7 +217,7 @@
 <div class="collapse">
 <input type="checkbox" id="collapse-section4_0_0" aria-hidden="true"> <label for="collapse-section4_0_0" aria-hidden="true"><strong>V4.0.0 / 16-December-2014</strong></label>
 <div>
-<h2 id="main-changes-8">Main Changes</h2>
+<h2 id="main-changes-9">Main Changes</h2>
 <ul>
 <li>Update based on STM32Cube specification</li>
 <li><strong>This version has to be used only with STM32CubeF1 based development</strong></li>
@@ -224,7 +227,7 @@
 <div class="collapse">
 <input type="checkbox" id="collapse-section3_6_3" aria-hidden="true"> <label for="collapse-section3_6_3" aria-hidden="true"><strong>V3.6.3 / 10-April-2014</strong></label>
 <div>
-<h2 id="main-changes-9">Main Changes</h2>
+<h2 id="main-changes-10">Main Changes</h2>
 <ul>
 <li>Update startup files for EWARM toolchain to cope with compiler enhancement of the V7.10 version.</li>
 </ul>
@@ -233,7 +236,7 @@
 <div class="collapse">
 <input type="checkbox" id="collapse-section3_6_2" aria-hidden="true"> <label for="collapse-section3_6_2" aria-hidden="true"><strong>V3.6.2 / 28-February-2013</strong></label>
 <div>
-<h2 id="main-changes-10">Main Changes</h2>
+<h2 id="main-changes-11">Main Changes</h2>
 <ul>
 <li>stm32f10x.h
 <ul>
@@ -246,7 +249,7 @@
 <div class="collapse">
 <input type="checkbox" id="collapse-section3_6_1" aria-hidden="true"> <label for="collapse-section3_6_1" aria-hidden="true"><strong>V3.6.1 / 09-March-2012</strong></label>
 <div>
-<h2 id="main-changes-11">Main Changes</h2>
+<h2 id="main-changes-12">Main Changes</h2>
 <ul>
 <li>All source files: license disclaimer text update and add link to the License file on ST Internet.</li>
 </ul>
@@ -255,7 +258,7 @@
 <div class="collapse">
 <input type="checkbox" id="collapse-section3_6_0" aria-hidden="true"> <label for="collapse-section3_6_0" aria-hidden="true"><strong>V3.6.0 / 27-January-2012</strong></label>
 <div>
-<h2 id="main-changes-12">Main Changes</h2>
+<h2 id="main-changes-13">Main Changes</h2>
 <ul>
 <li>Update directory structure to be compliant with CMSIS V2.1</li>
 <li>All source files: update disclaimer to add reference to the new license agreement</li>
@@ -284,7 +287,7 @@
 <div class="collapse">
 <input type="checkbox" id="collapse-section3_5_0" aria-hidden="true"> <label for="collapse-section3_5_0" aria-hidden="true"><strong>V3.5.0 / 11-March-2011</strong></label>
 <div>
-<h2 id="main-changes-13">Main Changes</h2>
+<h2 id="main-changes-14">Main Changes</h2>
 <ul>
 <li><em>stm32f10x.h</em> and <em>startup_stm32f10x_hd_vl.s</em> files: remove the FSMC interrupt definition for STM32F10x High-density Value line devices.</li>
 <li>system_stm32f10x.c file provided within the CMSIS folder.</li>
@@ -294,7 +297,7 @@
 <div class="collapse">
 <input type="checkbox" id="collapse-section3_4_0" aria-hidden="true"> <label for="collapse-section3_4_0" aria-hidden="true"><strong>V3.4.0 / 15-October-2010</strong></label>
 <div>
-<h2 id="main-changes-14">Main Changes</h2>
+<h2 id="main-changes-15">Main Changes</h2>
 <ul>
 <li>General
 <ul>
@@ -330,7 +333,7 @@
 <div class="collapse">
 <input type="checkbox" id="collapse-section3_3_0" aria-hidden="true"> <label for="collapse-section3_3_0" aria-hidden="true"><strong>V3.3.0 / 16-April-2010</strong></label>
 <div>
-<h2 id="main-changes-15">Main Changes</h2>
+<h2 id="main-changes-16">Main Changes</h2>
 <ul>
 <li>General
 <ul>
@@ -369,7 +372,7 @@
 <div class="collapse">
 <input type="checkbox" id="collapse-section3_2_0" aria-hidden="true"> <label for="collapse-section3_2_0" aria-hidden="true"><strong>V3.2.0 / 01-March-2010</strong></label>
 <div>
-<h2 id="main-changes-16">Main Changes</h2>
+<h2 id="main-changes-17">Main Changes</h2>
 <ul>
 <li>General
 <ul>
diff --git a/Source/Templates/arm/startup_stm32f100xb.s b/Source/Templates/arm/startup_stm32f100xb.s
index 64d7f09..741030c 100644
--- a/Source/Templates/arm/startup_stm32f100xb.s
+++ b/Source/Templates/arm/startup_stm32f100xb.s
@@ -14,13 +14,12 @@
 ;******************************************************************************
 ;* @attention
 ;*
-;* Copyright (c) 2017 STMicroelectronics.
+;* Copyright (c) 2017-2021 STMicroelectronics.
 ;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
 ;*
 ;******************************************************************************
 
@@ -312,4 +311,3 @@
 
                  END
 
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f100xe.s b/Source/Templates/arm/startup_stm32f100xe.s
index 4a89db2..c8aa745 100644
--- a/Source/Templates/arm/startup_stm32f100xe.s
+++ b/Source/Templates/arm/startup_stm32f100xe.s
@@ -16,13 +16,12 @@
 ;******************************************************************************
 ;* @attention
 ;*
-;* Copyright (c) 2017 STMicroelectronics.
+;* Copyright (c) 2017-2021 STMicroelectronics.
 ;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
 ;*
 ;******************************************************************************
 
@@ -343,4 +342,3 @@
 
                  END
 
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f101x6.s b/Source/Templates/arm/startup_stm32f101x6.s
index 2915a6c..7dfe571 100644
--- a/Source/Templates/arm/startup_stm32f101x6.s
+++ b/Source/Templates/arm/startup_stm32f101x6.s
@@ -14,13 +14,12 @@
 ;******************************************************************************
 ;* @attention
 ;*
-;* Copyright (c) 2017 STMicroelectronics.
+;* Copyright (c) 2017-2021 STMicroelectronics.
 ;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
 ;*
 ;******************************************************************************
 
@@ -275,4 +274,3 @@
 
                  END
 
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f101xb.s b/Source/Templates/arm/startup_stm32f101xb.s
index 8f46389..9ade8a8 100644
--- a/Source/Templates/arm/startup_stm32f101xb.s
+++ b/Source/Templates/arm/startup_stm32f101xb.s
@@ -14,13 +14,12 @@
 ;******************************************************************************
 ;* @attention
 ;*
-;* Copyright (c) 2017 STMicroelectronics.
+;* Copyright (c) 2017-2021 STMicroelectronics.
 ;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
 ;*
 ;******************************************************************************
 
@@ -285,4 +284,3 @@
 
                  END
 
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f101xe.s b/Source/Templates/arm/startup_stm32f101xe.s
index 76fe278..de204a9 100644
--- a/Source/Templates/arm/startup_stm32f101xe.s
+++ b/Source/Templates/arm/startup_stm32f101xe.s
@@ -14,13 +14,12 @@
 ;******************************************************************************
 ;* @attention
 ;*
-;* Copyright (c) 2017 STMicroelectronics.
+;* Copyright (c) 2017-2021 STMicroelectronics.
 ;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
 ;*
 ;******************************************************************************
 
@@ -323,4 +322,3 @@
 
                  END
 
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f101xg.s b/Source/Templates/arm/startup_stm32f101xg.s
index 309ac0e..ce73fd9 100644
--- a/Source/Templates/arm/startup_stm32f101xg.s
+++ b/Source/Templates/arm/startup_stm32f101xg.s
@@ -14,13 +14,12 @@
 ;******************************************************************************
 ;* @attention
 ;*
-;* Copyright (c) 2017 STMicroelectronics.
+;* Copyright (c) 2017-2021 STMicroelectronics.
 ;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
 ;*
 ;******************************************************************************
 
@@ -335,4 +334,3 @@
 
                  END
 
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f102x6.s b/Source/Templates/arm/startup_stm32f102x6.s
index eb7c1f0..a9cfb75 100644
--- a/Source/Templates/arm/startup_stm32f102x6.s
+++ b/Source/Templates/arm/startup_stm32f102x6.s
@@ -14,13 +14,12 @@
 ;******************************************************************************
 ;* @attention
 ;*
-;* Copyright (c) 2017 STMicroelectronics.
+;* Copyright (c) 2017-2021 STMicroelectronics.
 ;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
 ;*
 ;******************************************************************************
 
@@ -282,4 +281,3 @@
 
                  END
 
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f102xb.s b/Source/Templates/arm/startup_stm32f102xb.s
index 85829e4..231ca7c 100644
--- a/Source/Templates/arm/startup_stm32f102xb.s
+++ b/Source/Templates/arm/startup_stm32f102xb.s
@@ -14,13 +14,12 @@
 ;******************************************************************************
 ;* @attention
 ;*
-;* Copyright (c) 2017 STMicroelectronics.
+;* Copyright (c) 2017-2021 STMicroelectronics.
 ;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
 ;*
 ;******************************************************************************
 
@@ -292,4 +291,3 @@
 
                  END
 
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f103x6.s b/Source/Templates/arm/startup_stm32f103x6.s
index f99fc61..beeddde 100644
--- a/Source/Templates/arm/startup_stm32f103x6.s
+++ b/Source/Templates/arm/startup_stm32f103x6.s
@@ -14,13 +14,12 @@
 ;******************************************************************************
 ;* @attention
 ;*
-;* Copyright (c) 2017 STMicroelectronics.
+;* Copyright (c) 2017-2021 STMicroelectronics.
 ;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
 ;*
 ;******************************************************************************
 
@@ -294,4 +293,3 @@
 
                  END
 
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f103xb.s b/Source/Templates/arm/startup_stm32f103xb.s
index 7f746bf..0915ab0 100644
--- a/Source/Templates/arm/startup_stm32f103xb.s
+++ b/Source/Templates/arm/startup_stm32f103xb.s
@@ -14,13 +14,12 @@
 ;******************************************************************************
 ;* @attention
 ;*
-;* Copyright (c) 2017 STMicroelectronics.
+;* Copyright (c) 2017-2021 STMicroelectronics.
 ;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
 ;*
 ;******************************************************************************
 
@@ -304,4 +303,3 @@
 
                  END
 
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f103xe.s b/Source/Templates/arm/startup_stm32f103xe.s
index 6e9eba1..1d6bab0 100644
--- a/Source/Templates/arm/startup_stm32f103xe.s
+++ b/Source/Templates/arm/startup_stm32f103xe.s
@@ -14,13 +14,12 @@
 ;******************************************************************************
 ;* @attention
 ;*
-;* Copyright (c) 2017 STMicroelectronics.
+;* Copyright (c) 2017-2021 STMicroelectronics.
 ;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
 ;*
 ;******************************************************************************
 
@@ -353,4 +352,3 @@
 
                  END
 
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f103xg.s b/Source/Templates/arm/startup_stm32f103xg.s
index e6ad5a4..5f6caa0 100644
--- a/Source/Templates/arm/startup_stm32f103xg.s
+++ b/Source/Templates/arm/startup_stm32f103xg.s
@@ -14,13 +14,12 @@
 ;******************************************************************************
 ;* @attention
 ;*
-;* Copyright (c) 2017 STMicroelectronics.
+;* Copyright (c) 2017-2021 STMicroelectronics.
 ;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
 ;*
 ;******************************************************************************
 
@@ -353,4 +352,3 @@
 
                  END
 
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f105xc.s b/Source/Templates/arm/startup_stm32f105xc.s
index e07237b..9cdb91e 100644
--- a/Source/Templates/arm/startup_stm32f105xc.s
+++ b/Source/Templates/arm/startup_stm32f105xc.s
@@ -14,13 +14,12 @@
 ;******************************************************************************
 ;* @attention
 ;*
-;* Copyright (c) 2017 STMicroelectronics.
+;* Copyright (c) 2017-2021 STMicroelectronics.
 ;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
 ;*
 ;******************************************************************************
 
@@ -361,4 +360,3 @@
 
                  END
 
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f107xc.s b/Source/Templates/arm/startup_stm32f107xc.s
index 3aea16e..8a6cfbb 100644
--- a/Source/Templates/arm/startup_stm32f107xc.s
+++ b/Source/Templates/arm/startup_stm32f107xc.s
@@ -14,13 +14,12 @@
 ;******************************************************************************
 ;* @attention
 ;*
-;* Copyright (c) 2017 STMicroelectronics.
+;* Copyright (c) 2017-2021 STMicroelectronics.
 ;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
 ;*
 ;******************************************************************************
 
@@ -365,4 +364,3 @@
 
                  END
 
-;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/gcc/linker/STM32F100XB_FLASH.ld b/Source/Templates/gcc/linker/STM32F100XB_FLASH.ld
index 6b11337..8fea722 100644
--- a/Source/Templates/gcc/linker/STM32F100XB_FLASH.ld
+++ b/Source/Templates/gcc/linker/STM32F100XB_FLASH.ld
@@ -130,7 +130,7 @@
   . = ALIGN(4);
   .bss :
   {
-    /* This is used by the startup in order to initialize the .bss secion */
+    /* This is used by the startup in order to initialize the .bss section */
     _sbss = .;         /* define a global symbol at bss start */
     __bss_start__ = _sbss;
     *(.bss)
diff --git a/Source/Templates/gcc/linker/STM32F100XE_FLASH.ld b/Source/Templates/gcc/linker/STM32F100XE_FLASH.ld
index c73f97a..e768329 100644
--- a/Source/Templates/gcc/linker/STM32F100XE_FLASH.ld
+++ b/Source/Templates/gcc/linker/STM32F100XE_FLASH.ld
@@ -130,7 +130,7 @@
   . = ALIGN(4);
   .bss :
   {
-    /* This is used by the startup in order to initialize the .bss secion */
+    /* This is used by the startup in order to initialize the .bss section */
     _sbss = .;         /* define a global symbol at bss start */
     __bss_start__ = _sbss;
     *(.bss)
diff --git a/Source/Templates/gcc/linker/STM32F101X6_FLASH.ld b/Source/Templates/gcc/linker/STM32F101X6_FLASH.ld
index 70f1aa6..d222796 100644
--- a/Source/Templates/gcc/linker/STM32F101X6_FLASH.ld
+++ b/Source/Templates/gcc/linker/STM32F101X6_FLASH.ld
@@ -130,7 +130,7 @@
   . = ALIGN(4);
   .bss :
   {
-    /* This is used by the startup in order to initialize the .bss secion */
+    /* This is used by the startup in order to initialize the .bss section */
     _sbss = .;         /* define a global symbol at bss start */
     __bss_start__ = _sbss;
     *(.bss)
diff --git a/Source/Templates/gcc/linker/STM32F101XB_FLASH.ld b/Source/Templates/gcc/linker/STM32F101XB_FLASH.ld
index 1e0eaa5..7b8f4b3 100644
--- a/Source/Templates/gcc/linker/STM32F101XB_FLASH.ld
+++ b/Source/Templates/gcc/linker/STM32F101XB_FLASH.ld
@@ -130,7 +130,7 @@
   . = ALIGN(4);
   .bss :
   {
-    /* This is used by the startup in order to initialize the .bss secion */
+    /* This is used by the startup in order to initialize the .bss section */
     _sbss = .;         /* define a global symbol at bss start */
     __bss_start__ = _sbss;
     *(.bss)
diff --git a/Source/Templates/gcc/linker/STM32F101XE_FLASH.ld b/Source/Templates/gcc/linker/STM32F101XE_FLASH.ld
index 48d9e8a..21de5e0 100644
--- a/Source/Templates/gcc/linker/STM32F101XE_FLASH.ld
+++ b/Source/Templates/gcc/linker/STM32F101XE_FLASH.ld
@@ -130,7 +130,7 @@
   . = ALIGN(4);
   .bss :
   {
-    /* This is used by the startup in order to initialize the .bss secion */
+    /* This is used by the startup in order to initialize the .bss section */
     _sbss = .;         /* define a global symbol at bss start */
     __bss_start__ = _sbss;
     *(.bss)
diff --git a/Source/Templates/gcc/linker/STM32F101XG_FLASH.ld b/Source/Templates/gcc/linker/STM32F101XG_FLASH.ld
index 4797bae..5d027a2 100644
--- a/Source/Templates/gcc/linker/STM32F101XG_FLASH.ld
+++ b/Source/Templates/gcc/linker/STM32F101XG_FLASH.ld
@@ -130,7 +130,7 @@
   . = ALIGN(4);
   .bss :
   {
-    /* This is used by the startup in order to initialize the .bss secion */
+    /* This is used by the startup in order to initialize the .bss section */
     _sbss = .;         /* define a global symbol at bss start */
     __bss_start__ = _sbss;
     *(.bss)
diff --git a/Source/Templates/gcc/linker/STM32F102X6_FLASH.ld b/Source/Templates/gcc/linker/STM32F102X6_FLASH.ld
index 1d7e863..269202e 100644
--- a/Source/Templates/gcc/linker/STM32F102X6_FLASH.ld
+++ b/Source/Templates/gcc/linker/STM32F102X6_FLASH.ld
@@ -130,7 +130,7 @@
   . = ALIGN(4);
   .bss :
   {
-    /* This is used by the startup in order to initialize the .bss secion */
+    /* This is used by the startup in order to initialize the .bss section */
     _sbss = .;         /* define a global symbol at bss start */
     __bss_start__ = _sbss;
     *(.bss)
diff --git a/Source/Templates/gcc/linker/STM32F102XB_FLASH.ld b/Source/Templates/gcc/linker/STM32F102XB_FLASH.ld
index efd58c6..c052cea 100644
--- a/Source/Templates/gcc/linker/STM32F102XB_FLASH.ld
+++ b/Source/Templates/gcc/linker/STM32F102XB_FLASH.ld
@@ -130,7 +130,7 @@
   . = ALIGN(4);
   .bss :
   {
-    /* This is used by the startup in order to initialize the .bss secion */
+    /* This is used by the startup in order to initialize the .bss section */
     _sbss = .;         /* define a global symbol at bss start */
     __bss_start__ = _sbss;
     *(.bss)
diff --git a/Source/Templates/gcc/linker/STM32F103X6_FLASH.ld b/Source/Templates/gcc/linker/STM32F103X6_FLASH.ld
index 85bb065..9cc2403 100644
--- a/Source/Templates/gcc/linker/STM32F103X6_FLASH.ld
+++ b/Source/Templates/gcc/linker/STM32F103X6_FLASH.ld
@@ -130,7 +130,7 @@
   . = ALIGN(4);
   .bss :
   {
-    /* This is used by the startup in order to initialize the .bss secion */
+    /* This is used by the startup in order to initialize the .bss section */
     _sbss = .;         /* define a global symbol at bss start */
     __bss_start__ = _sbss;
     *(.bss)
diff --git a/Source/Templates/gcc/linker/STM32F103XB_FLASH.ld b/Source/Templates/gcc/linker/STM32F103XB_FLASH.ld
index 4be9df6..7bd75da 100644
--- a/Source/Templates/gcc/linker/STM32F103XB_FLASH.ld
+++ b/Source/Templates/gcc/linker/STM32F103XB_FLASH.ld
@@ -130,7 +130,7 @@
   . = ALIGN(4);
   .bss :
   {
-    /* This is used by the startup in order to initialize the .bss secion */
+    /* This is used by the startup in order to initialize the .bss section */
     _sbss = .;         /* define a global symbol at bss start */
     __bss_start__ = _sbss;
     *(.bss)
diff --git a/Source/Templates/gcc/linker/STM32F103XE_FLASH.ld b/Source/Templates/gcc/linker/STM32F103XE_FLASH.ld
index e9c5f66..75dd8f9 100644
--- a/Source/Templates/gcc/linker/STM32F103XE_FLASH.ld
+++ b/Source/Templates/gcc/linker/STM32F103XE_FLASH.ld
@@ -130,7 +130,7 @@
   . = ALIGN(4);
   .bss :
   {
-    /* This is used by the startup in order to initialize the .bss secion */
+    /* This is used by the startup in order to initialize the .bss section */
     _sbss = .;         /* define a global symbol at bss start */
     __bss_start__ = _sbss;
     *(.bss)
diff --git a/Source/Templates/gcc/linker/STM32F103XG_FLASH.ld b/Source/Templates/gcc/linker/STM32F103XG_FLASH.ld
index ee2f9a1..8f1fc9f 100644
--- a/Source/Templates/gcc/linker/STM32F103XG_FLASH.ld
+++ b/Source/Templates/gcc/linker/STM32F103XG_FLASH.ld
@@ -130,7 +130,7 @@
   . = ALIGN(4);
   .bss :
   {
-    /* This is used by the startup in order to initialize the .bss secion */
+    /* This is used by the startup in order to initialize the .bss section */
     _sbss = .;         /* define a global symbol at bss start */
     __bss_start__ = _sbss;
     *(.bss)
diff --git a/Source/Templates/gcc/linker/STM32F105XC_FLASH.ld b/Source/Templates/gcc/linker/STM32F105XC_FLASH.ld
index 1136668..694a1c9 100644
--- a/Source/Templates/gcc/linker/STM32F105XC_FLASH.ld
+++ b/Source/Templates/gcc/linker/STM32F105XC_FLASH.ld
@@ -130,7 +130,7 @@
   . = ALIGN(4);
   .bss :
   {
-    /* This is used by the startup in order to initialize the .bss secion */
+    /* This is used by the startup in order to initialize the .bss section */
     _sbss = .;         /* define a global symbol at bss start */
     __bss_start__ = _sbss;
     *(.bss)
diff --git a/Source/Templates/gcc/linker/STM32F107XC_FLASH.ld b/Source/Templates/gcc/linker/STM32F107XC_FLASH.ld
index c3e6d3f..10141b3 100644
--- a/Source/Templates/gcc/linker/STM32F107XC_FLASH.ld
+++ b/Source/Templates/gcc/linker/STM32F107XC_FLASH.ld
@@ -130,7 +130,7 @@
   . = ALIGN(4);
   .bss :
   {
-    /* This is used by the startup in order to initialize the .bss secion */
+    /* This is used by the startup in order to initialize the .bss section */
     _sbss = .;         /* define a global symbol at bss start */
     __bss_start__ = _sbss;
     *(.bss)
diff --git a/Source/Templates/gcc/startup_stm32f100xb.s b/Source/Templates/gcc/startup_stm32f100xb.s
index 0d8575b..2a6443a 100644
--- a/Source/Templates/gcc/startup_stm32f100xb.s
+++ b/Source/Templates/gcc/startup_stm32f100xb.s
@@ -15,13 +15,12 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -61,6 +60,9 @@
   .type Reset_Handler, %function
 Reset_Handler:
 
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+
 /* Copy the data segment initializers from flash to SRAM */
   ldr r0, =_sdata
   ldr r1, =_edata
@@ -92,8 +94,6 @@
   cmp r2, r4
   bcc FillZerobss
 
-/* Call the clock system intitialization function.*/
-    bl  SystemInit
 /* Call static constructors */
     bl __libc_init_array
 /* Call the application's entry point.*/
@@ -377,7 +377,7 @@
   .weak  SPI1_IRQHandler
   .thumb_set SPI1_IRQHandler,Default_Handler
   
-  .weak  SPI1_IRQHandler
+  .weak  SPI2_IRQHandler
   .thumb_set SPI2_IRQHandler,Default_Handler
 
   .weak  USART1_IRQHandler
@@ -404,5 +404,4 @@
   .weak  TIM7_IRQHandler
   .thumb_set TIM7_IRQHandler,Default_Handler  
 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 
diff --git a/Source/Templates/gcc/startup_stm32f100xe.s b/Source/Templates/gcc/startup_stm32f100xe.s
index a430da4..b00ea4e 100644
--- a/Source/Templates/gcc/startup_stm32f100xe.s
+++ b/Source/Templates/gcc/startup_stm32f100xe.s
@@ -15,13 +15,12 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -61,6 +60,9 @@
   .type Reset_Handler, %function
 Reset_Handler:
 
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+
 /* Copy the data segment initializers from flash to SRAM */
   ldr r0, =_sdata
   ldr r1, =_edata
@@ -92,8 +94,6 @@
   cmp r2, r4
   bcc FillZerobss
 
-/* Call the clock system intitialization function.*/
-    bl  SystemInit
 /* Call static constructors */
     bl __libc_init_array
 /* Call the application's entry point.*/
@@ -445,6 +445,5 @@
 
   .weak  DMA2_Channel5_IRQHandler
   .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
-  
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+
 
diff --git a/Source/Templates/gcc/startup_stm32f101x6.s b/Source/Templates/gcc/startup_stm32f101x6.s
index 2f3df08..0ebbd2f 100644
--- a/Source/Templates/gcc/startup_stm32f101x6.s
+++ b/Source/Templates/gcc/startup_stm32f101x6.s
@@ -15,13 +15,12 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -61,6 +60,9 @@
   .type Reset_Handler, %function
 Reset_Handler:
 
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+
 /* Copy the data segment initializers from flash to SRAM */
   ldr r0, =_sdata
   ldr r1, =_edata
@@ -92,8 +94,6 @@
   cmp r2, r4
   bcc FillZerobss
 
-/* Call the clock system intitialization function.*/
-    bl  SystemInit
 /* Call static constructors */
     bl __libc_init_array
 /* Call the application's entry point.*/
@@ -320,4 +320,3 @@
   .weak  RTC_Alarm_IRQHandler
   .thumb_set RTC_Alarm_IRQHandler,Default_Handler
 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Source/Templates/gcc/startup_stm32f101xb.s b/Source/Templates/gcc/startup_stm32f101xb.s
index abec1e4..a67b880 100644
--- a/Source/Templates/gcc/startup_stm32f101xb.s
+++ b/Source/Templates/gcc/startup_stm32f101xb.s
@@ -15,13 +15,12 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -61,6 +60,9 @@
   .type Reset_Handler, %function
 Reset_Handler:
 
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+
 /* Copy the data segment initializers from flash to SRAM */
   ldr r0, =_sdata
   ldr r1, =_edata
@@ -92,8 +94,6 @@
   cmp r2, r4
   bcc FillZerobss
 
-/* Call the clock system intitialization function.*/
-    bl  SystemInit
 /* Call static constructors */
     bl __libc_init_array
 /* Call the application's entry point.*/
@@ -335,5 +335,4 @@
   .thumb_set RTC_Alarm_IRQHandler,Default_Handler
 
 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 
diff --git a/Source/Templates/gcc/startup_stm32f101xe.s b/Source/Templates/gcc/startup_stm32f101xe.s
index 0af2f20..9b945e5 100644
--- a/Source/Templates/gcc/startup_stm32f101xe.s
+++ b/Source/Templates/gcc/startup_stm32f101xe.s
@@ -15,13 +15,12 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -61,6 +60,9 @@
   .type Reset_Handler, %function
 Reset_Handler:
 
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+
 /* Copy the data segment initializers from flash to SRAM */
   ldr r0, =_sdata
   ldr r1, =_edata
@@ -92,8 +94,6 @@
   cmp r2, r4
   bcc FillZerobss
 
-/* Call the clock system intitialization function.*/
-    bl  SystemInit
 /* Call static constructors */
     bl __libc_init_array
 /* Call the application's entry point.*/
@@ -421,4 +421,3 @@
   .weak DMA2_Channel4_5_IRQHandler
   .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler
 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Source/Templates/gcc/startup_stm32f101xg.s b/Source/Templates/gcc/startup_stm32f101xg.s
index 4e8a95f..0e3c37f 100644
--- a/Source/Templates/gcc/startup_stm32f101xg.s
+++ b/Source/Templates/gcc/startup_stm32f101xg.s
@@ -15,13 +15,12 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -61,6 +60,9 @@
   .type Reset_Handler, %function
 Reset_Handler:
 
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+
 /* Copy the data segment initializers from flash to SRAM */
   ldr r0, =_sdata
   ldr r1, =_edata
@@ -92,8 +94,6 @@
   cmp r2, r4
   bcc FillZerobss
 
-/* Call the clock system intitialization function.*/
-    bl  SystemInit
 /* Call static constructors */
     bl __libc_init_array
 /* Call the application's entry point.*/
@@ -437,4 +437,3 @@
   .weak  DMA2_Channel4_5_IRQHandler
   .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler
 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Source/Templates/gcc/startup_stm32f102x6.s b/Source/Templates/gcc/startup_stm32f102x6.s
index 97437a1..0301ea9 100644
--- a/Source/Templates/gcc/startup_stm32f102x6.s
+++ b/Source/Templates/gcc/startup_stm32f102x6.s
@@ -15,13 +15,12 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -61,6 +60,9 @@
   .type Reset_Handler, %function
 Reset_Handler:
 
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+
 /* Copy the data segment initializers from flash to SRAM */
   ldr r0, =_sdata
   ldr r1, =_edata
@@ -92,8 +94,6 @@
   cmp r2, r4
   bcc FillZerobss
 
-/* Call the clock system intitialization function.*/
-    bl  SystemInit
 /* Call static constructors */
     bl __libc_init_array
 /* Call the application's entry point.*/
@@ -328,4 +328,3 @@
   .weak USBWakeUp_IRQHandler
   .thumb_set USBWakeUp_IRQHandler,Default_Handler
 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Source/Templates/gcc/startup_stm32f102xb.s b/Source/Templates/gcc/startup_stm32f102xb.s
index 914cc31..f2e4cc8 100644
--- a/Source/Templates/gcc/startup_stm32f102xb.s
+++ b/Source/Templates/gcc/startup_stm32f102xb.s
@@ -15,13 +15,12 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -61,6 +60,9 @@
   .type Reset_Handler, %function
 Reset_Handler:
 
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+
 /* Copy the data segment initializers from flash to SRAM */
   ldr r0, =_sdata
   ldr r1, =_edata
@@ -92,8 +94,6 @@
   cmp r2, r4
   bcc FillZerobss
 
-/* Call the clock system intitialization function.*/
-    bl  SystemInit
 /* Call static constructors */
     bl __libc_init_array
 /* Call the application's entry point.*/
@@ -343,5 +343,4 @@
   .weak USBWakeUp_IRQHandler
   .thumb_set USBWakeUp_IRQHandler,Default_Handler
 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 
diff --git a/Source/Templates/gcc/startup_stm32f103x6.s b/Source/Templates/gcc/startup_stm32f103x6.s
index ac5cb81..87ca9ca 100644
--- a/Source/Templates/gcc/startup_stm32f103x6.s
+++ b/Source/Templates/gcc/startup_stm32f103x6.s
@@ -15,13 +15,12 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -61,6 +60,9 @@
   .type Reset_Handler, %function
 Reset_Handler:
 
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+
 /* Copy the data segment initializers from flash to SRAM */
   ldr r0, =_sdata
   ldr r1, =_edata
@@ -92,8 +94,6 @@
   cmp r2, r4
   bcc FillZerobss
 
-/* Call the clock system intitialization function.*/
-    bl  SystemInit
 /* Call static constructors */
     bl __libc_init_array
 /* Call the application's entry point.*/
@@ -346,4 +346,3 @@
   .weak USBWakeUp_IRQHandler
   .thumb_set USBWakeUp_IRQHandler,Default_Handler
 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Source/Templates/gcc/startup_stm32f103xb.s b/Source/Templates/gcc/startup_stm32f103xb.s
index f2b7fbe..7614285 100644
--- a/Source/Templates/gcc/startup_stm32f103xb.s
+++ b/Source/Templates/gcc/startup_stm32f103xb.s
@@ -15,13 +15,12 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -61,6 +60,9 @@
   .type Reset_Handler, %function
 Reset_Handler:
 
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+
 /* Copy the data segment initializers from flash to SRAM */
   ldr r0, =_sdata
   ldr r1, =_edata
@@ -92,8 +94,6 @@
   cmp r2, r4
   bcc FillZerobss
 
-/* Call the clock system intitialization function.*/
-    bl  SystemInit
 /* Call static constructors */
     bl __libc_init_array
 /* Call the application's entry point.*/
@@ -361,5 +361,4 @@
   .weak USBWakeUp_IRQHandler
   .thumb_set USBWakeUp_IRQHandler,Default_Handler
 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 
diff --git a/Source/Templates/gcc/startup_stm32f103xe.s b/Source/Templates/gcc/startup_stm32f103xe.s
index ef23cee..771aa8a 100644
--- a/Source/Templates/gcc/startup_stm32f103xe.s
+++ b/Source/Templates/gcc/startup_stm32f103xe.s
@@ -17,13 +17,12 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -63,6 +62,9 @@
   .type Reset_Handler, %function
 Reset_Handler:
 
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+
 /* Copy the data segment initializers from flash to SRAM */
   ldr r0, =_sdata
   ldr r1, =_edata
@@ -94,8 +96,6 @@
   cmp r2, r4
   bcc FillZerobss
 
-/* Call the clock system intitialization function.*/
-    bl  SystemInit
 /* Call static constructors */
     bl __libc_init_array
 /* Call the application's entry point.*/
@@ -468,4 +468,3 @@
   .weak DMA2_Channel4_5_IRQHandler
   .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler
 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Source/Templates/gcc/startup_stm32f103xg.s b/Source/Templates/gcc/startup_stm32f103xg.s
index 514b2a3..d7dc622 100644
--- a/Source/Templates/gcc/startup_stm32f103xg.s
+++ b/Source/Templates/gcc/startup_stm32f103xg.s
@@ -15,13 +15,12 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -61,6 +60,9 @@
   .type Reset_Handler, %function
 Reset_Handler:
 
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+
 /* Copy the data segment initializers from flash to SRAM */
   ldr r0, =_sdata
   ldr r1, =_edata
@@ -92,8 +94,6 @@
   cmp r2, r4
   bcc FillZerobss
 
-/* Call the clock system intitialization function.*/
-    bl  SystemInit
 /* Call static constructors */
     bl __libc_init_array
 /* Call the application's entry point.*/
@@ -464,4 +464,3 @@
   .weak  DMA2_Channel4_5_IRQHandler
   .thumb_set DMA2_Channel4_5_IRQHandler,Default_Handler
 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Source/Templates/gcc/startup_stm32f105xc.s b/Source/Templates/gcc/startup_stm32f105xc.s
index 9ca591a..b40a7b0 100644
--- a/Source/Templates/gcc/startup_stm32f105xc.s
+++ b/Source/Templates/gcc/startup_stm32f105xc.s
@@ -15,13 +15,12 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -61,6 +60,9 @@
   .type Reset_Handler, %function
 Reset_Handler:
 
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+
 /* Copy the data segment initializers from flash to SRAM */
   ldr r0, =_sdata
   ldr r1, =_edata
@@ -91,8 +93,7 @@
 LoopFillZerobss:
   cmp r2, r4
   bcc FillZerobss
-/* Call the clock system intitialization function.*/
-    bl  SystemInit
+
 /* Call static constructors */
   bl __libc_init_array
 /* Call the application's entry point.*/
@@ -460,4 +461,3 @@
   .weak OTG_FS_IRQHandler
   .thumb_set OTG_FS_IRQHandler ,Default_Handler
 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Source/Templates/gcc/startup_stm32f107xc.s b/Source/Templates/gcc/startup_stm32f107xc.s
index d28b3fd..2d1b748 100644
--- a/Source/Templates/gcc/startup_stm32f107xc.s
+++ b/Source/Templates/gcc/startup_stm32f107xc.s
@@ -15,13 +15,12 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -61,6 +60,9 @@
   .type Reset_Handler, %function
 Reset_Handler:
 
+/* Call the clock system initialization function.*/
+    bl  SystemInit
+
 /* Copy the data segment initializers from flash to SRAM */
   ldr r0, =_sdata
   ldr r1, =_edata
@@ -92,8 +94,7 @@
   cmp r2, r4
   bcc FillZerobss
 
-/* Call the clock system intitialization function.*/
-    bl  SystemInit
+
 /* Call static constructors */
     bl __libc_init_array
 /* Call the application's entry point.*/
@@ -469,4 +470,3 @@
   .weak  OTG_FS_IRQHandler
   .thumb_set OTG_FS_IRQHandler ,Default_Handler
 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Source/Templates/iar/startup_stm32f100xb.s b/Source/Templates/iar/startup_stm32f100xb.s
index 1458421..f04e9c0 100644
--- a/Source/Templates/iar/startup_stm32f100xb.s
+++ b/Source/Templates/iar/startup_stm32f100xb.s
@@ -11,17 +11,15 @@
 ;*                        address.
 ;*                      After Reset the Cortex-M3 processor is in Thread mode,
 ;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* @attention
+;********************************************************************************
 ;*
-;* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-;* All rights reserved.</center></h2>
+;* Copyright (c) 2017-2021 STMicroelectronics.
+;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
-;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
 ;*******************************************************************************
 ;
 ;
@@ -393,4 +391,3 @@
         B TIM7_IRQHandler                
 
         END
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Source/Templates/iar/startup_stm32f100xe.s b/Source/Templates/iar/startup_stm32f100xe.s
index 93c26bf..3919fd2 100644
--- a/Source/Templates/iar/startup_stm32f100xe.s
+++ b/Source/Templates/iar/startup_stm32f100xe.s
@@ -10,17 +10,15 @@
 ;*                        address.
 ;*                      After Reset the Cortex-M3 processor is in Thread mode,
 ;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* @attention
+;********************************************************************************
 ;*
-;* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-;* All rights reserved.</center></h2>
+;* Copyright (c) 2017-2021 STMicroelectronics.
+;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
-;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
 ;*******************************************************************************
 ;
 ;
@@ -459,4 +457,3 @@
         B DMA2_Channel5_IRQHandler
                 
         END
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Source/Templates/iar/startup_stm32f101x6.s b/Source/Templates/iar/startup_stm32f101x6.s
index 167e420..9d2db89 100644
--- a/Source/Templates/iar/startup_stm32f101x6.s
+++ b/Source/Templates/iar/startup_stm32f101x6.s
@@ -11,17 +11,15 @@
 ;*                        address.
 ;*                      After Reset the Cortex-M3 processor is in Thread mode,
 ;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* @attention
+;********************************************************************************
 ;*
-;* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-;* All rights reserved.</center></h2>
+;* Copyright (c) 2017-2021 STMicroelectronics.
+;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
-;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
 ;*******************************************************************************
 ;
 ;
@@ -320,4 +318,3 @@
         B RTC_Alarm_IRQHandler
 
         END
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Source/Templates/iar/startup_stm32f101xb.s b/Source/Templates/iar/startup_stm32f101xb.s
index bc80744..8e7fb1d 100644
--- a/Source/Templates/iar/startup_stm32f101xb.s
+++ b/Source/Templates/iar/startup_stm32f101xb.s
@@ -11,17 +11,15 @@
 ;*                        address.
 ;*                      After Reset the Cortex-M3 processor is in Thread mode,
 ;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* @attention
+;********************************************************************************
 ;*
-;* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-;* All rights reserved.</center></h2>
+;* Copyright (c) 2017-2021 STMicroelectronics.
+;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
-;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
 ;*******************************************************************************
 ;
 ;
@@ -345,4 +343,3 @@
         B RTC_Alarm_IRQHandler
 
         END
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Source/Templates/iar/startup_stm32f101xe.s b/Source/Templates/iar/startup_stm32f101xe.s
index 51f9ae0..bb6ec5d 100644
--- a/Source/Templates/iar/startup_stm32f101xe.s
+++ b/Source/Templates/iar/startup_stm32f101xe.s
@@ -12,17 +12,15 @@
 ;*                        calls main()).
 ;*                      After Reset the Cortex-M3 processor is in Thread mode,
 ;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* @attention
+;********************************************************************************
 ;*
-;* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-;* All rights reserved.</center></h2>
+;* Copyright (c) 2017-2021 STMicroelectronics.
+;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
-;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
 ;*******************************************************************************
 ;
 ;
@@ -425,4 +423,3 @@
         
         END
 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Source/Templates/iar/startup_stm32f101xg.s b/Source/Templates/iar/startup_stm32f101xg.s
index 21ab456..8a75a07 100644
--- a/Source/Templates/iar/startup_stm32f101xg.s
+++ b/Source/Templates/iar/startup_stm32f101xg.s
@@ -13,17 +13,15 @@
 ;*                        calls main()).
 ;*                      After Reset the Cortex-M3 processor is in Thread mode,
 ;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* @attention
+;********************************************************************************
 ;*
-;* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-;* All rights reserved.</center></h2>
+;* Copyright (c) 2017-2021 STMicroelectronics.
+;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
-;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
 ;*******************************************************************************
 ;
 ;
@@ -456,4 +454,3 @@
         
         END
 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Source/Templates/iar/startup_stm32f102x6.s b/Source/Templates/iar/startup_stm32f102x6.s
index 73f094a..32f2096 100644
--- a/Source/Templates/iar/startup_stm32f102x6.s
+++ b/Source/Templates/iar/startup_stm32f102x6.s
@@ -11,17 +11,15 @@
 ;*                        address.
 ;*                      After Reset the Cortex-M3 processor is in Thread mode,
 ;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* @attention
+;********************************************************************************
 ;*
-;* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-;* All rights reserved.</center></h2>
+;* Copyright (c) 2017-2021 STMicroelectronics.
+;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
-;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
 ;*******************************************************************************
 ;
 ;
@@ -335,4 +333,3 @@
         B USBWakeUp_IRQHandler
 
         END
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Source/Templates/iar/startup_stm32f102xb.s b/Source/Templates/iar/startup_stm32f102xb.s
index 98ad2ab..9b54644 100644
--- a/Source/Templates/iar/startup_stm32f102xb.s
+++ b/Source/Templates/iar/startup_stm32f102xb.s
@@ -11,17 +11,15 @@
 ;*                        address.
 ;*                      After Reset the Cortex-M3 processor is in Thread mode,
 ;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* @attention
+;********************************************************************************
 ;*
-;* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-;* All rights reserved.</center></h2>
+;* Copyright (c) 2017-2021 STMicroelectronics.
+;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
-;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
 ;*******************************************************************************
 ;
 ;
@@ -360,4 +358,3 @@
         B USBWakeUp_IRQHandler
 
         END
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Source/Templates/iar/startup_stm32f103x6.s b/Source/Templates/iar/startup_stm32f103x6.s
index af92293..b6d9d2a 100644
--- a/Source/Templates/iar/startup_stm32f103x6.s
+++ b/Source/Templates/iar/startup_stm32f103x6.s
@@ -11,17 +11,15 @@
 ;*                        address.
 ;*                      After Reset the Cortex-M3 processor is in Thread mode,
 ;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* @attention
+;********************************************************************************
 ;*
-;* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-;* All rights reserved.</center></h2>
+;* Copyright (c) 2017-2021 STMicroelectronics.
+;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
-;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
 ;*******************************************************************************
 ;
 ;
@@ -365,4 +363,3 @@
         B USBWakeUp_IRQHandler
 
         END
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Source/Templates/iar/startup_stm32f103xb.s b/Source/Templates/iar/startup_stm32f103xb.s
index 8768b84..91bccf1 100644
--- a/Source/Templates/iar/startup_stm32f103xb.s
+++ b/Source/Templates/iar/startup_stm32f103xb.s
@@ -11,17 +11,15 @@
 ;*                        address.
 ;*                      After Reset the Cortex-M3 processor is in Thread mode,
 ;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* @attention
+;********************************************************************************
 ;*
-;* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-;* All rights reserved.</center></h2>
+;* Copyright (c) 2017-2021 STMicroelectronics.
+;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
-;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
 ;*******************************************************************************
 ;
 ;
@@ -390,4 +388,3 @@
         B USBWakeUp_IRQHandler
 
         END
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Source/Templates/iar/startup_stm32f103xe.s b/Source/Templates/iar/startup_stm32f103xe.s
index 1cca3db..c25a316 100644
--- a/Source/Templates/iar/startup_stm32f103xe.s
+++ b/Source/Templates/iar/startup_stm32f103xe.s
@@ -12,17 +12,15 @@
 ;*                        calls main()).
 ;*                      After Reset the Cortex-M3 processor is in Thread mode,
 ;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* @attention
+;********************************************************************************
 ;*
-;* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-;* All rights reserved.</center></h2>
+;* Copyright (c) 2017-2021 STMicroelectronics.
+;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
-;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
 ;*******************************************************************************
 ;
 ;
@@ -495,4 +493,3 @@
         
         END
 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Source/Templates/iar/startup_stm32f103xg.s b/Source/Templates/iar/startup_stm32f103xg.s
index 3a16b93..b1febe4 100644
--- a/Source/Templates/iar/startup_stm32f103xg.s
+++ b/Source/Templates/iar/startup_stm32f103xg.s
@@ -9,17 +9,15 @@
 ;*                      - Set the vector table entries with the exceptions ISR address,
 ;*                      After Reset the Cortex-M3 processor is in Thread mode,
 ;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* @attention
+;********************************************************************************
 ;*
-;* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-;* All rights reserved.</center></h2>
+;* Copyright (c) 2017-2021 STMicroelectronics.
+;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
-;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
 ;*******************************************************************************
 ;
 ;
@@ -492,4 +490,3 @@
         
         END
 
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Source/Templates/iar/startup_stm32f105xc.s b/Source/Templates/iar/startup_stm32f105xc.s
index dc80673..95b667e 100644
--- a/Source/Templates/iar/startup_stm32f105xc.s
+++ b/Source/Templates/iar/startup_stm32f105xc.s
@@ -11,17 +11,15 @@
 ;*                        address.
 ;*                      After Reset the Cortex-M3 processor is in Thread mode,
 ;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* @attention
+;********************************************************************************
 ;*
-;* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-;* All rights reserved.</center></h2>
+;* Copyright (c) 2017-2021 STMicroelectronics.
+;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
-;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
 ;*******************************************************************************
 ;
 ;
@@ -506,4 +504,3 @@
         B OTG_FS_IRQHandler
 
         END
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Source/Templates/iar/startup_stm32f107xc.s b/Source/Templates/iar/startup_stm32f107xc.s
index 784cf54..b141e69 100644
--- a/Source/Templates/iar/startup_stm32f107xc.s
+++ b/Source/Templates/iar/startup_stm32f107xc.s
@@ -11,17 +11,15 @@
 ;*                        address.
 ;*                      After Reset the Cortex-M3 processor is in Thread mode,
 ;*                      priority is Privileged, and the Stack is set to Main.
-;*******************************************************************************
-;* @attention
+;********************************************************************************
 ;*
-;* <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-;* All rights reserved.</center></h2>
+;* Copyright (c) 2017-2021 STMicroelectronics.
+;* All rights reserved.
 ;*
-;* This software component is licensed by ST under BSD 3-Clause license,
-;* the "License"; You may not use this file except in compliance with the
-;* License. You may obtain a copy of the License at:
-;*                        opensource.org/licenses/BSD-3-Clause
-;*
+;* This software is licensed under terms that can be found in the LICENSE file
+;* in the root directory of this software component.
+;* If no LICENSE file comes with this software, it is provided AS-IS.
+;
 ;*******************************************************************************
 ;
 ;
@@ -506,4 +504,3 @@
         B OTG_FS_IRQHandler
 
         END
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Source/Templates/system_stm32f1xx.c b/Source/Templates/system_stm32f1xx.c
index bc96aae..3e277e6 100644
--- a/Source/Templates/system_stm32f1xx.c
+++ b/Source/Templates/system_stm32f1xx.c
@@ -33,13 +33,12 @@
   ******************************************************************************
   * @attention
   *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
+  * Copyright (c) 2017-2021 STMicroelectronics.
+  * All rights reserved.
   *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
   *
   ******************************************************************************
   */
@@ -404,5 +403,4 @@
   
 /**
   * @}
-  */    
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
+  */
diff --git a/_htmresc/favicon.png b/_htmresc/favicon.png
new file mode 100644
index 0000000..06713ee
--- /dev/null
+++ b/_htmresc/favicon.png
Binary files differ
diff --git a/_htmresc/mini-st.css b/_htmresc/mini-st_2020.css
similarity index 77%
rename from _htmresc/mini-st.css
rename to _htmresc/mini-st_2020.css
index 71fbc14..3d9e81a 100644
--- a/_htmresc/mini-st.css
+++ b/_htmresc/mini-st_2020.css
@@ -1,39 +1,39 @@
 @charset "UTF-8";
 /*
-  Flavor name: Default (mini-default)
-  Author: Angelos Chalaris (chalarangelo@gmail.com)
-  Maintainers: Angelos Chalaris
-  mini.css version: v3.0.0-alpha.3
+  Flavor name: Custom (mini-custom)
+  Generated online - https://minicss.org/flavors
+  mini.css version: v3.0.1
 */
 /*
   Browsers resets and base typography.
 */
 /* Core module CSS variable definitions */
 :root {
-  --fore-color: #111;
-  --secondary-fore-color: #444;
-  --back-color: #f8f8f8;
-  --secondary-back-color: #f0f0f0;
-  --blockquote-color: #f57c00;
-  --pre-color: #1565c0;
-  --border-color: #aaa;
-  --secondary-border-color: #ddd;
-  --heading-ratio: 1.19;
+  --fore-color: #03234b;
+  --secondary-fore-color: #03234b;
+  --back-color: #ffffff;
+  --secondary-back-color: #ffffff;
+  --blockquote-color: #e6007e;
+  --pre-color: #e6007e;
+  --border-color: #3cb4e6;
+  --secondary-border-color: #3cb4e6;
+  --heading-ratio: 1.2;
   --universal-margin: 0.5rem;
-  --universal-padding: 0.125rem;
-  --universal-border-radius: 0.125rem;
-  --a-link-color: #0277bd;
-  --a-visited-color: #01579b; }
+  --universal-padding: 0.25rem;
+  --universal-border-radius: 0.075rem;
+  --background-margin: 1.5%;
+  --a-link-color: #3cb4e6;
+  --a-visited-color: #8c0078; }
 
 html {
-  font-size: 14px; }
+  font-size: 13.5px; }
 
 a, b, del, em, i, ins, q, span, strong, u {
   font-size: 1em; }
 
 html, * {
-  font-family: -apple-system, BlinkMacSystemFont, "Segoe UI", Roboto, Ubuntu, "Helvetica Neue", Helvetica, sans-serif;
-  line-height: 1.4;
+  font-family: -apple-system, BlinkMacSystemFont, Helvetica, arial, sans-serif;
+  line-height: 1.25;
   -webkit-text-size-adjust: 100%; }
 
 * {
@@ -42,7 +42,10 @@
 body {
   margin: 0;
   color: var(--fore-color);
-  background: var(--back-color); }
+  @background: var(--back-color);
+  background: var(--back-color) linear-gradient(#ffd200, #ffd200) repeat-y left top;
+  background-size: var(--background-margin);
+  }
 
 details {
   display: block; }
@@ -62,9 +65,9 @@
   height: auto; }
 
 h1, h2, h3, h4, h5, h6 {
-  line-height: 1.2;
+  line-height: 1.25;
   margin: calc(1.5 * var(--universal-margin)) var(--universal-margin);
-  font-weight: 500; }
+  font-weight: 400; }
   h1 small, h2 small, h3 small, h4 small, h5 small, h6 small {
     color: var(--secondary-fore-color);
     display: block;
@@ -74,21 +77,15 @@
   font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio) * var(--heading-ratio)); }
 
 h2 {
-  font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio); );
-  background: var(--mark-back-color);
-  font-weight: 600;
-  padding: 0.1em 0.5em 0.2em 0.5em;
-  color: var(--mark-fore-color); }
-
+  font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio) );
+  border-style: none none solid none ; 
+  border-width: thin;
+  border-color: var(--border-color); }
 h3 {
-  font-size: calc(1rem * var(--heading-ratio));
-  padding-left: calc(2 * var(--universal-margin)); 
-  /* background: var(--border-color); */
-    }
+  font-size: calc(1rem * var(--heading-ratio) ); }
 
 h4 {
-  font-size: 1rem;);
-  padding-left: calc(4 * var(--universal-margin));  }
+  font-size: calc(1rem * var(--heading-ratio)); }
 
 h5 {
   font-size: 1rem; }
@@ -101,7 +98,7 @@
 
 ol, ul {
   margin: var(--universal-margin);
-  padding-left: calc(6 * var(--universal-margin)); }
+  padding-left: calc(3 * var(--universal-margin)); }
 
 b, strong {
   font-weight: 700; }
@@ -111,7 +108,7 @@
   border: 0;
   line-height: 1.25em;
   margin: var(--universal-margin);
-  height: 0.0625rem;
+  height: 0.0714285714rem;
   background: linear-gradient(to right, transparent, var(--border-color) 20%, var(--border-color) 80%, transparent); }
 
 blockquote {
@@ -121,16 +118,16 @@
   color: var(--secondary-fore-color);
   margin: var(--universal-margin);
   padding: calc(3 * var(--universal-padding));
-  border: 0.0625rem solid var(--secondary-border-color);
-  border-left: 0.375rem solid var(--blockquote-color);
+  border: 0.0714285714rem solid var(--secondary-border-color);
+  border-left: 0.3rem solid var(--blockquote-color);
   border-radius: 0 var(--universal-border-radius) var(--universal-border-radius) 0; }
   blockquote:before {
     position: absolute;
     top: calc(0rem - var(--universal-padding));
     left: 0;
     font-family: sans-serif;
-    font-size: 3rem;
-    font-weight: 700;
+    font-size: 2rem;
+    font-weight: 800;
     content: "\201c";
     color: var(--blockquote-color); }
   blockquote[cite]:after {
@@ -160,8 +157,8 @@
   background: var(--secondary-back-color);
   padding: calc(1.5 * var(--universal-padding));
   margin: var(--universal-margin);
-  border: 0.0625rem solid var(--secondary-border-color);
-  border-left: 0.25rem solid var(--pre-color);
+  border: 0.0714285714rem solid var(--secondary-border-color);
+  border-left: 0.2857142857rem solid var(--pre-color);
   border-radius: 0 var(--universal-border-radius) var(--universal-border-radius) 0; }
 
 sup, sub, code, kbd {
@@ -204,7 +201,8 @@
   box-sizing: border-box;
   display: flex;
   flex: 0 1 auto;
-  flex-flow: row wrap; }
+  flex-flow: row wrap;
+  margin: 0 0 0 var(--background-margin); }
 
 .col-sm,
 [class^='col-sm-'],
@@ -565,9 +563,9 @@
     order: 999; } }
 /* Card component CSS variable definitions */
 :root {
-  --card-back-color: #f8f8f8;
-  --card-fore-color: #111;
-  --card-border-color: #ddd; }
+  --card-back-color: #3cb4e6;
+  --card-fore-color: #03234b;
+  --card-border-color: #03234b; }
 
 .card {
   display: flex;
@@ -578,7 +576,7 @@
   width: 100%;
   background: var(--card-back-color);
   color: var(--card-fore-color);
-  border: 0.0625rem solid var(--card-border-color);
+  border: 0.0714285714rem solid var(--card-border-color);
   border-radius: var(--universal-border-radius);
   margin: var(--universal-margin);
   overflow: hidden; }
@@ -592,7 +590,7 @@
     margin: 0;
     border: 0;
     border-radius: 0;
-    border-bottom: 0.0625rem solid var(--card-border-color);
+    border-bottom: 0.0714285714rem solid var(--card-border-color);
     padding: var(--universal-padding);
     width: 100%; }
     .card > .sectione.media {
@@ -617,17 +615,18 @@
   width: auto; }
 
 .card.warning {
-/*  --card-back-color: #ffca28; */
   --card-back-color: #e5b8b7;
-  --card-border-color: #e8b825; }
+  --card-fore-color: #3b234b;
+  --card-border-color: #8c0078; }
 
 .card.error {
-  --card-back-color: #b71c1c;
-  --card-fore-color: #f8f8f8;
-  --card-border-color: #a71a1a; }
+  --card-back-color: #464650;
+  --card-fore-color: #ffffff;
+  --card-border-color: #8c0078; }
 
 .card > .sectione.dark {
-  --card-back-color: #e0e0e0; }
+  --card-back-color: #3b234b;
+  --card-fore-color: #ffffff; }
 
 .card > .sectione.double-padded {
   padding: calc(1.5 * var(--universal-padding)); }
@@ -637,12 +636,12 @@
 */
 /* Input_control module CSS variable definitions */
 :root {
-  --form-back-color: #f0f0f0;
-  --form-fore-color: #111;
-  --form-border-color: #ddd;
-  --input-back-color: #f8f8f8;
-  --input-fore-color: #111;
-  --input-border-color: #ddd;
+  --form-back-color: #ffe97f;
+  --form-fore-color: #03234b;
+  --form-border-color: #3cb4e6;
+  --input-back-color: #ffffff;
+  --input-fore-color: #03234b;
+  --input-border-color: #3cb4e6;
   --input-focus-color: #0288d1;
   --input-invalid-color: #d32f2f;
   --button-back-color: #e2e2e2;
@@ -655,13 +654,13 @@
 form {
   background: var(--form-back-color);
   color: var(--form-fore-color);
-  border: 0.0625rem solid var(--form-border-color);
+  border: 0.0714285714rem solid var(--form-border-color);
   border-radius: var(--universal-border-radius);
   margin: var(--universal-margin);
   padding: calc(2 * var(--universal-padding)) var(--universal-padding); }
 
 fieldset {
-  border: 0.0625rem solid var(--form-border-color);
+  border: 0.0714285714rem solid var(--form-border-color);
   border-radius: var(--universal-border-radius);
   margin: calc(var(--universal-margin) / 4);
   padding: var(--universal-padding); }
@@ -671,7 +670,7 @@
   display: table;
   max-width: 100%;
   white-space: normal;
-  font-weight: 700;
+  font-weight: 500;
   padding: calc(var(--universal-padding) / 2); }
 
 label {
@@ -716,7 +715,7 @@
   box-sizing: border-box;
   background: var(--input-back-color);
   color: var(--input-fore-color);
-  border: 0.0625rem solid var(--input-border-color);
+  border: 0.0714285714rem solid var(--input-border-color);
   border-radius: var(--universal-border-radius);
   margin: calc(var(--universal-margin) / 2);
   padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); }
@@ -763,8 +762,8 @@
   [type="radio"]:checked:before {
     border-radius: 100%;
     content: '';
-    top: calc(0.0625rem + var(--universal-padding) / 2);
-    left: calc(0.0625rem + var(--universal-padding) / 2);
+    top: calc(0.0714285714rem + var(--universal-padding) / 2);
+    left: calc(0.0714285714rem + var(--universal-padding) / 2);
     background: var(--input-fore-color);
     width: 0.5rem;
     height: 0.5rem; }
@@ -793,7 +792,7 @@
   display: inline-block;
   background: var(--button-back-color);
   color: var(--button-fore-color);
-  border: 0.0625rem solid var(--button-border-color);
+  border: 0.0714285714rem solid var(--button-border-color);
   border-radius: var(--universal-border-radius);
   padding: var(--universal-padding) calc(1.5 * var(--universal-padding));
   margin: var(--universal-margin);
@@ -814,7 +813,7 @@
 
 .button-group {
   display: flex;
-  border: 0.0625rem solid var(--button-group-border-color);
+  border: 0.0714285714rem solid var(--button-group-border-color);
   border-radius: var(--universal-border-radius);
   margin: var(--universal-margin); }
   .button-group > button, .button-group [type="button"], .button-group > [type="submit"], .button-group > [type="reset"], .button-group > .button, .button-group > [role="button"] {
@@ -826,13 +825,13 @@
     border-radius: 0;
     box-shadow: none; }
   .button-group > :not(:first-child) {
-    border-left: 0.0625rem solid var(--button-group-border-color); }
+    border-left: 0.0714285714rem solid var(--button-group-border-color); }
   @media screen and (max-width: 499px) {
     .button-group {
       flex-direction: column; }
       .button-group > :not(:first-child) {
         border: 0;
-        border-top: 0.0625rem solid var(--button-group-border-color); } }
+        border-top: 0.0714285714rem solid var(--button-group-border-color); } }
 
 /*
   Custom elements for forms and input elements.
@@ -874,29 +873,29 @@
 */
 /* Navigation module CSS variable definitions */
 :root {
-  --header-back-color: #f8f8f8;
-  --header-hover-back-color: #f0f0f0;
-  --header-fore-color: #444;
-  --header-border-color: #ddd;
-  --nav-back-color: #f8f8f8;
-  --nav-hover-back-color: #f0f0f0;
-  --nav-fore-color: #444;
-  --nav-border-color: #ddd;
-  --nav-link-color: #0277bd;
-  --footer-fore-color: #444;
-  --footer-back-color: #f8f8f8;
-  --footer-border-color: #ddd;
-  --footer-link-color: #0277bd;
-  --drawer-back-color: #f8f8f8;
-  --drawer-hover-back-color: #f0f0f0;
-  --drawer-border-color: #ddd;
-  --drawer-close-color: #444; }
+  --header-back-color: #03234b;
+  --header-hover-back-color: #ffd200;
+  --header-fore-color: #ffffff;
+  --header-border-color: #3cb4e6;
+  --nav-back-color: #ffffff;
+  --nav-hover-back-color: #ffe97f;
+  --nav-fore-color: #e6007e;
+  --nav-border-color: #3cb4e6;
+  --nav-link-color: #3cb4e6;
+  --footer-fore-color: #ffffff;
+  --footer-back-color: #03234b;
+  --footer-border-color: #3cb4e6;
+  --footer-link-color: #3cb4e6;
+  --drawer-back-color: #ffffff;
+  --drawer-hover-back-color: #ffe97f;
+  --drawer-border-color: #3cb4e6;
+  --drawer-close-color: #e6007e; }
 
 header {
-  height: 3.1875rem;
+  height: 2.75rem;
   background: var(--header-back-color);
   color: var(--header-fore-color);
-  border-bottom: 0.0625rem solid var(--header-border-color);
+  border-bottom: 0.0714285714rem solid var(--header-border-color);
   padding: calc(var(--universal-padding) / 4) 0;
   white-space: nowrap;
   overflow-x: auto;
@@ -927,7 +926,7 @@
 nav {
   background: var(--nav-back-color);
   color: var(--nav-fore-color);
-  border: 0.0625rem solid var(--nav-border-color);
+  border: 0.0714285714rem solid var(--nav-border-color);
   border-radius: var(--universal-border-radius);
   margin: var(--universal-margin); }
   nav * {
@@ -946,10 +945,10 @@
     nav .sublink-1:before {
       position: absolute;
       left: calc(var(--universal-padding) - 1 * var(--universal-padding));
-      top: -0.0625rem;
+      top: -0.0714285714rem;
       content: '';
       height: 100%;
-      border: 0.0625rem solid var(--nav-border-color);
+      border: 0.0714285714rem solid var(--nav-border-color);
       border-left: 0; }
   nav .sublink-2 {
     position: relative;
@@ -957,16 +956,16 @@
     nav .sublink-2:before {
       position: absolute;
       left: calc(var(--universal-padding) - 3 * var(--universal-padding));
-      top: -0.0625rem;
+      top: -0.0714285714rem;
       content: '';
       height: 100%;
-      border: 0.0625rem solid var(--nav-border-color);
+      border: 0.0714285714rem solid var(--nav-border-color);
       border-left: 0; }
 
 footer {
   background: var(--footer-back-color);
   color: var(--footer-fore-color);
-  border-top: 0.0625rem solid var(--footer-border-color);
+  border-top: 0.0714285714rem solid var(--footer-border-color);
   padding: calc(2 * var(--universal-padding)) var(--universal-padding);
   font-size: 0.875rem; }
   footer a, footer a:visited {
@@ -1013,7 +1012,7 @@
     height: 100vh;
     overflow-y: auto;
     background: var(--drawer-back-color);
-    border: 0.0625rem solid var(--drawer-border-color);
+    border: 0.0714285714rem solid var(--drawer-border-color);
     border-radius: 0;
     margin: 0;
     z-index: 1110;
@@ -1060,38 +1059,36 @@
 */
 /* Table module CSS variable definitions. */
 :root {
-  --table-border-color: #aaa;
-  --table-border-separator-color: #666;
-  --table-head-back-color: #e6e6e6;
-  --table-head-fore-color: #111;
-  --table-body-back-color: #f8f8f8;
-  --table-body-fore-color: #111;
-  --table-body-alt-back-color: #eee; }
+  --table-border-color: #03234b;
+  --table-border-separator-color: #03234b;
+  --table-head-back-color: #03234b;
+  --table-head-fore-color: #ffffff;
+  --table-body-back-color: #ffffff;
+  --table-body-fore-color: #03234b;
+  --table-body-alt-back-color: #f4f4f4; }
 
 table {
   border-collapse: separate;
   border-spacing: 0;
-  : margin: calc(1.5 * var(--universal-margin)) var(--universal-margin);
+  margin: 0;
   display: flex;
   flex: 0 1 auto;
   flex-flow: row wrap;
   padding: var(--universal-padding);
-  padding-top: 0;
-	margin: calc(1.5 * var(--universal-margin)) var(--universal-margin);	}
+  padding-top: 0; }
   table caption {
-    font-size: 1.25 * rem;
+    font-size: 1rem;
     margin: calc(2 * var(--universal-margin)) 0;
     max-width: 100%;
-    flex: 0 0 100%;
-		text-align: left;}
+    flex: 0 0 100%; }
   table thead, table tbody {
     display: flex;
     flex-flow: row wrap;
-    border: 0.0625rem solid var(--table-border-color); }
+    border: 0.0714285714rem solid var(--table-border-color); }
   table thead {
     z-index: 999;
     border-radius: var(--universal-border-radius) var(--universal-border-radius) 0 0;
-    border-bottom: 0.0625rem solid var(--table-border-separator-color); }
+    border-bottom: 0.0714285714rem solid var(--table-border-separator-color); }
   table tbody {
     border-top: 0;
     margin-top: calc(0 - var(--universal-margin));
@@ -1109,11 +1106,11 @@
   table td {
     background: var(--table-body-back-color);
     color: var(--table-body-fore-color);
-    border-top: 0.0625rem solid var(--table-border-color); }
+    border-top: 0.0714285714rem solid var(--table-border-color); }
 
 table:not(.horizontal) {
   overflow: auto;
-  max-height: 850px; }
+  max-height: 100%; }
   table:not(.horizontal) thead, table:not(.horizontal) tbody {
     max-width: 100%;
     flex: 0 0 100%; }
@@ -1134,32 +1131,33 @@
   border: 0; }
   table.horizontal thead, table.horizontal tbody {
     border: 0;
+    flex: .2 0 0;
     flex-flow: row nowrap; }
   table.horizontal tbody {
     overflow: auto;
     justify-content: space-between;
-    flex: 1 0 0;
-    margin-left: calc( 4 * var(--universal-margin));
+    flex: .8 0 0;
+    margin-left: 0;
     padding-bottom: calc(var(--universal-padding) / 4); }
   table.horizontal tr {
     flex-direction: column;
     flex: 1 0 auto; }
   table.horizontal th, table.horizontal td {
-    width: 100%;
+    width: auto;
     border: 0;
-    border-bottom: 0.0625rem solid var(--table-border-color); }
+    border-bottom: 0.0714285714rem solid var(--table-border-color); }
     table.horizontal th:not(:first-child), table.horizontal td:not(:first-child) {
       border-top: 0; }
   table.horizontal th {
     text-align: right;
-    border-left: 0.0625rem solid var(--table-border-color);
-    border-right: 0.0625rem solid var(--table-border-separator-color); }
+    border-left: 0.0714285714rem solid var(--table-border-color);
+    border-right: 0.0714285714rem solid var(--table-border-separator-color); }
   table.horizontal thead tr:first-child {
     padding-left: 0; }
   table.horizontal th:first-child, table.horizontal td:first-child {
-    border-top: 0.0625rem solid var(--table-border-color); }
+    border-top: 0.0714285714rem solid var(--table-border-color); }
   table.horizontal tbody tr:last-child td {
-    border-right: 0.0625rem solid var(--table-border-color); }
+    border-right: 0.0714285714rem solid var(--table-border-color); }
     table.horizontal tbody tr:last-child td:first-child {
       border-top-right-radius: 0.25rem; }
     table.horizontal tbody tr:last-child td:last-child {
@@ -1191,12 +1189,12 @@
       display: table-row-group; }
     table tr, table.horizontal tr {
       display: block;
-      border: 0.0625rem solid var(--table-border-color);
+      border: 0.0714285714rem solid var(--table-border-color);
       border-radius: var(--universal-border-radius);
-      background: #fafafa;
+      background: #ffffff;
       padding: var(--universal-padding);
       margin: var(--universal-margin);
-      margin-bottom: calc(2 * var(--universal-margin)); }
+      margin-bottom: calc(1 * var(--universal-margin)); }
     table th, table td, table.horizontal th, table.horizontal td {
       width: auto; }
     table td, table.horizontal td {
@@ -1211,9 +1209,6 @@
       border-top: 0; }
     table tbody tr:last-child td, table.horizontal tbody tr:last-child td {
       border-right: 0; } }
-:root {
-  --table-body-alt-back-color: #eee; }
-
 table tr:nth-of-type(2n) > td {
   background: var(--table-body-alt-back-color); }
 
@@ -1234,8 +1229,8 @@
 */
 /* Contextual module CSS variable definitions */
 :root {
-  --mark-back-color: #0277bd;
-  --mark-fore-color: #fafafa; }
+  --mark-back-color: #3cb4e6;
+  --mark-fore-color: #ffffff; }
 
 mark {
   background: var(--mark-back-color);
@@ -1243,11 +1238,11 @@
   font-size: 0.95em;
   line-height: 1em;
   border-radius: var(--universal-border-radius);
-  padding: calc(var(--universal-padding) / 4) calc(var(--universal-padding) / 2); }
+  padding: calc(var(--universal-padding) / 4) var(--universal-padding); }
   mark.inline-block {
     display: inline-block;
     font-size: 1em;
-    line-height: 1.5;
+    line-height: 1.4;
     padding: calc(var(--universal-padding) / 2) var(--universal-padding); }
 
 :root {
@@ -1314,8 +1309,8 @@
 
 :root {
   --modal-overlay-color: rgba(0, 0, 0, 0.45);
-  --modal-close-color: #444;
-  --modal-close-hover-color: #f0f0f0; }
+  --modal-close-color: #e6007e;
+  --modal-close-hover-color: #ffe97f; }
 
 [type="checkbox"].modal {
   height: 1px;
@@ -1368,13 +1363,14 @@
       z-index: 1211; }
 
 :root {
-  --collapse-label-back-color: #e8e8e8;
-  --collapse-label-fore-color: #212121;
-  --collapse-label-hover-back-color: #f0f0f0;
-  --collapse-selected-label-back-color: #ececec;
-  --collapse-border-color: #ddd;
-  --collapse-content-back-color: #fafafa;
-  --collapse-selected-label-border-color: #0277bd; }
+  --collapse-label-back-color: #03234b;
+  --collapse-label-fore-color: #ffffff;
+  --collapse-label-hover-back-color: #3cb4e6;
+  --collapse-selected-label-back-color: #3cb4e6;
+  --collapse-border-color: var(--collapse-label-back-color);
+  --collapse-selected-border-color: #ceecf8;
+  --collapse-content-back-color: #ffffff;
+  --collapse-selected-label-border-color: #3cb4e6; }
 
 .collapse {
   width: calc(100% - 2 * var(--universal-margin));
@@ -1395,13 +1391,13 @@
   .collapse > label {
     flex-grow: 1;
     display: inline-block;
-    height: 1.5rem;
+    height: 1.25rem;
     cursor: pointer;
-    transition: background 0.3s;
+    transition: background 0.2s;
     color: var(--collapse-label-fore-color);
     background: var(--collapse-label-back-color);
-    border: 0.0625rem solid var(--collapse-border-color);
-    padding: calc(1.5 * var(--universal-padding)); }
+    border: 0.0714285714rem solid var(--collapse-selected-border-color);
+    padding: calc(1.25 * var(--universal-padding)); }
     .collapse > label:hover, .collapse > label:focus {
       background: var(--collapse-label-hover-back-color); }
     .collapse > label + div {
@@ -1418,7 +1414,7 @@
       max-height: 1px; }
   .collapse > :checked + label {
     background: var(--collapse-selected-label-back-color);
-    border-bottom-color: var(--collapse-selected-label-border-color); }
+    border-color: var(--collapse-selected-label-border-color); }
     .collapse > :checked + label + div {
       box-sizing: border-box;
       position: relative;
@@ -1427,13 +1423,13 @@
       overflow: auto;
       margin: 0;
       background: var(--collapse-content-back-color);
-      border: 0.0625rem solid var(--collapse-border-color);
+      border: 0.0714285714rem solid var(--collapse-selected-border-color);
       border-top: 0;
       padding: var(--universal-padding);
       clip: auto;
       -webkit-clip-path: inset(0%);
       clip-path: inset(0%);
-      max-height: 850px; }
+      max-height: 100%; }
   .collapse > label:not(:first-of-type) {
     border-top: 0; }
   .collapse > label:first-of-type {
@@ -1450,11 +1446,8 @@
 /*
   Custom elements for contextual background elements, toasts and tooltips.
 */
-mark.secondary {
-  --mark-back-color: #d32f2f; }
-
 mark.tertiary {
-  --mark-back-color: #308732; }
+  --mark-back-color: #3cb4e6; }
 
 mark.tag {
   padding: calc(var(--universal-padding)/2) var(--universal-padding);
@@ -1463,9 +1456,9 @@
 /*
   Definitions for progress elements and spinners.
 */
-/* Progess module CSS variable definitions */
+/* Progress module CSS variable definitions */
 :root {
-  --progress-back-color: #ddd;
+  --progress-back-color: #3cb4e6;
   --progress-fore-color: #555; }
 
 progress {
@@ -1558,45 +1551,45 @@
     filter: invert(100%); }
 
 span.icon-alert {
-  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='8' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='16' x2='12' y2='16'%3E%3C/line%3E%3C/svg%3E"); }
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='8' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='16' x2='12' y2='16'%3E%3C/line%3E%3C/svg%3E"); }
 span.icon-bookmark {
-  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M19 21l-7-5-7 5V5a2 2 0 0 1 2-2h10a2 2 0 0 1 2 2z'%3E%3C/path%3E%3C/svg%3E"); }
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M19 21l-7-5-7 5V5a2 2 0 0 1 2-2h10a2 2 0 0 1 2 2z'%3E%3C/path%3E%3C/svg%3E"); }
 span.icon-calendar {
-  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='4' width='18' height='18' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='16' y1='2' x2='16' y2='6'%3E%3C/line%3E%3Cline x1='8' y1='2' x2='8' y2='6'%3E%3C/line%3E%3Cline x1='3' y1='10' x2='21' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='4' width='18' height='18' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='16' y1='2' x2='16' y2='6'%3E%3C/line%3E%3Cline x1='8' y1='2' x2='8' y2='6'%3E%3C/line%3E%3Cline x1='3' y1='10' x2='21' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
 span.icon-credit {
-  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='1' y='4' width='22' height='16' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='1' y1='10' x2='23' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='1' y='4' width='22' height='16' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='1' y1='10' x2='23' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
 span.icon-edit {
-  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 14.66V20a2 2 0 0 1-2 2H4a2 2 0 0 1-2-2V6a2 2 0 0 1 2-2h5.34'%3E%3C/path%3E%3Cpolygon points='18 2 22 6 12 16 8 16 8 12 18 2'%3E%3C/polygon%3E%3C/svg%3E"); }
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 14.66V20a2 2 0 0 1-2 2H4a2 2 0 0 1-2-2V6a2 2 0 0 1 2-2h5.34'%3E%3C/path%3E%3Cpolygon points='18 2 22 6 12 16 8 16 8 12 18 2'%3E%3C/polygon%3E%3C/svg%3E"); }
 span.icon-link {
-  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M18 13v6a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2V8a2 2 0 0 1 2-2h6'%3E%3C/path%3E%3Cpolyline points='15 3 21 3 21 9'%3E%3C/polyline%3E%3Cline x1='10' y1='14' x2='21' y2='3'%3E%3C/line%3E%3C/svg%3E"); }
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M18 13v6a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2V8a2 2 0 0 1 2-2h6'%3E%3C/path%3E%3Cpolyline points='15 3 21 3 21 9'%3E%3C/polyline%3E%3Cline x1='10' y1='14' x2='21' y2='3'%3E%3C/line%3E%3C/svg%3E"); }
 span.icon-help {
-  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M9.09 9a3 3 0 0 1 5.83 1c0 2-3 3-3 3'%3E%3C/path%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='17' x2='12' y2='17'%3E%3C/line%3E%3C/svg%3E"); }
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M9.09 9a3 3 0 0 1 5.83 1c0 2-3 3-3 3'%3E%3C/path%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='17' x2='12' y2='17'%3E%3C/line%3E%3C/svg%3E"); }
 span.icon-home {
-  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M3 9l9-7 9 7v11a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2z'%3E%3C/path%3E%3Cpolyline points='9 22 9 12 15 12 15 22'%3E%3C/polyline%3E%3C/svg%3E"); }
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M3 9l9-7 9 7v11a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2z'%3E%3C/path%3E%3Cpolyline points='9 22 9 12 15 12 15 22'%3E%3C/polyline%3E%3C/svg%3E"); }
 span.icon-info {
-  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='16' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='8' x2='12' y2='8'%3E%3C/line%3E%3C/svg%3E"); }
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='16' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='8' x2='12' y2='8'%3E%3C/line%3E%3C/svg%3E"); }
 span.icon-lock {
-  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='11' width='18' height='11' rx='2' ry='2'%3E%3C/rect%3E%3Cpath d='M7 11V7a5 5 0 0 1 10 0v4'%3E%3C/path%3E%3C/svg%3E"); }
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='11' width='18' height='11' rx='2' ry='2'%3E%3C/rect%3E%3Cpath d='M7 11V7a5 5 0 0 1 10 0v4'%3E%3C/path%3E%3C/svg%3E"); }
 span.icon-mail {
-  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 4h16c1.1 0 2 .9 2 2v12c0 1.1-.9 2-2 2H4c-1.1 0-2-.9-2-2V6c0-1.1.9-2 2-2z'%3E%3C/path%3E%3Cpolyline points='22,6 12,13 2,6'%3E%3C/polyline%3E%3C/svg%3E"); }
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 4h16c1.1 0 2 .9 2 2v12c0 1.1-.9 2-2 2H4c-1.1 0-2-.9-2-2V6c0-1.1.9-2 2-2z'%3E%3C/path%3E%3Cpolyline points='22,6 12,13 2,6'%3E%3C/polyline%3E%3C/svg%3E"); }
 span.icon-location {
-  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 10c0 7-9 13-9 13s-9-6-9-13a9 9 0 0 1 18 0z'%3E%3C/path%3E%3Ccircle cx='12' cy='10' r='3'%3E%3C/circle%3E%3C/svg%3E"); }
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 10c0 7-9 13-9 13s-9-6-9-13a9 9 0 0 1 18 0z'%3E%3C/path%3E%3Ccircle cx='12' cy='10' r='3'%3E%3C/circle%3E%3C/svg%3E"); }
 span.icon-phone {
-  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M22 16.92v3a2 2 0 0 1-2.18 2 19.79 19.79 0 0 1-8.63-3.07 19.5 19.5 0 0 1-6-6 19.79 19.79 0 0 1-3.07-8.67A2 2 0 0 1 4.11 2h3a2 2 0 0 1 2 1.72 12.84 12.84 0 0 0 .7 2.81 2 2 0 0 1-.45 2.11L8.09 9.91a16 16 0 0 0 6 6l1.27-1.27a2 2 0 0 1 2.11-.45 12.84 12.84 0 0 0 2.81.7A2 2 0 0 1 22 16.92z'%3E%3C/path%3E%3C/svg%3E"); }
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M22 16.92v3a2 2 0 0 1-2.18 2 19.79 19.79 0 0 1-8.63-3.07 19.5 19.5 0 0 1-6-6 19.79 19.79 0 0 1-3.07-8.67A2 2 0 0 1 4.11 2h3a2 2 0 0 1 2 1.72 12.84 12.84 0 0 0 .7 2.81 2 2 0 0 1-.45 2.11L8.09 9.91a16 16 0 0 0 6 6l1.27-1.27a2 2 0 0 1 2.11-.45 12.84 12.84 0 0 0 2.81.7A2 2 0 0 1 22 16.92z'%3E%3C/path%3E%3C/svg%3E"); }
 span.icon-rss {
-  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 11a9 9 0 0 1 9 9'%3E%3C/path%3E%3Cpath d='M4 4a16 16 0 0 1 16 16'%3E%3C/path%3E%3Ccircle cx='5' cy='19' r='1'%3E%3C/circle%3E%3C/svg%3E"); }
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 11a9 9 0 0 1 9 9'%3E%3C/path%3E%3Cpath d='M4 4a16 16 0 0 1 16 16'%3E%3C/path%3E%3Ccircle cx='5' cy='19' r='1'%3E%3C/circle%3E%3C/svg%3E"); }
 span.icon-search {
-  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='11' cy='11' r='8'%3E%3C/circle%3E%3Cline x1='21' y1='21' x2='16.65' y2='16.65'%3E%3C/line%3E%3C/svg%3E"); }
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='11' cy='11' r='8'%3E%3C/circle%3E%3Cline x1='21' y1='21' x2='16.65' y2='16.65'%3E%3C/line%3E%3C/svg%3E"); }
 span.icon-settings {
-  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='3'%3E%3C/circle%3E%3Cpath d='M19.4 15a1.65 1.65 0 0 0 .33 1.82l.06.06a2 2 0 0 1 0 2.83 2 2 0 0 1-2.83 0l-.06-.06a1.65 1.65 0 0 0-1.82-.33 1.65 1.65 0 0 0-1 1.51V21a2 2 0 0 1-2 2 2 2 0 0 1-2-2v-.09A1.65 1.65 0 0 0 9 19.4a1.65 1.65 0 0 0-1.82.33l-.06.06a2 2 0 0 1-2.83 0 2 2 0 0 1 0-2.83l.06-.06a1.65 1.65 0 0 0 .33-1.82 1.65 1.65 0 0 0-1.51-1H3a2 2 0 0 1-2-2 2 2 0 0 1 2-2h.09A1.65 1.65 0 0 0 4.6 9a1.65 1.65 0 0 0-.33-1.82l-.06-.06a2 2 0 0 1 0-2.83 2 2 0 0 1 2.83 0l.06.06a1.65 1.65 0 0 0 1.82.33H9a1.65 1.65 0 0 0 1-1.51V3a2 2 0 0 1 2-2 2 2 0 0 1 2 2v.09a1.65 1.65 0 0 0 1 1.51 1.65 1.65 0 0 0 1.82-.33l.06-.06a2 2 0 0 1 2.83 0 2 2 0 0 1 0 2.83l-.06.06a1.65 1.65 0 0 0-.33 1.82V9a1.65 1.65 0 0 0 1.51 1H21a2 2 0 0 1 2 2 2 2 0 0 1-2 2h-.09a1.65 1.65 0 0 0-1.51 1z'%3E%3C/path%3E%3C/svg%3E"); }
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='3'%3E%3C/circle%3E%3Cpath d='M19.4 15a1.65 1.65 0 0 0 .33 1.82l.06.06a2 2 0 0 1 0 2.83 2 2 0 0 1-2.83 0l-.06-.06a1.65 1.65 0 0 0-1.82-.33 1.65 1.65 0 0 0-1 1.51V21a2 2 0 0 1-2 2 2 2 0 0 1-2-2v-.09A1.65 1.65 0 0 0 9 19.4a1.65 1.65 0 0 0-1.82.33l-.06.06a2 2 0 0 1-2.83 0 2 2 0 0 1 0-2.83l.06-.06a1.65 1.65 0 0 0 .33-1.82 1.65 1.65 0 0 0-1.51-1H3a2 2 0 0 1-2-2 2 2 0 0 1 2-2h.09A1.65 1.65 0 0 0 4.6 9a1.65 1.65 0 0 0-.33-1.82l-.06-.06a2 2 0 0 1 0-2.83 2 2 0 0 1 2.83 0l.06.06a1.65 1.65 0 0 0 1.82.33H9a1.65 1.65 0 0 0 1-1.51V3a2 2 0 0 1 2-2 2 2 0 0 1 2 2v.09a1.65 1.65 0 0 0 1 1.51 1.65 1.65 0 0 0 1.82-.33l.06-.06a2 2 0 0 1 2.83 0 2 2 0 0 1 0 2.83l-.06.06a1.65 1.65 0 0 0-.33 1.82V9a1.65 1.65 0 0 0 1.51 1H21a2 2 0 0 1 2 2 2 2 0 0 1-2 2h-.09a1.65 1.65 0 0 0-1.51 1z'%3E%3C/path%3E%3C/svg%3E"); }
 span.icon-share {
-  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='18' cy='5' r='3'%3E%3C/circle%3E%3Ccircle cx='6' cy='12' r='3'%3E%3C/circle%3E%3Ccircle cx='18' cy='19' r='3'%3E%3C/circle%3E%3Cline x1='8.59' y1='13.51' x2='15.42' y2='17.49'%3E%3C/line%3E%3Cline x1='15.41' y1='6.51' x2='8.59' y2='10.49'%3E%3C/line%3E%3C/svg%3E"); }
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='18' cy='5' r='3'%3E%3C/circle%3E%3Ccircle cx='6' cy='12' r='3'%3E%3C/circle%3E%3Ccircle cx='18' cy='19' r='3'%3E%3C/circle%3E%3Cline x1='8.59' y1='13.51' x2='15.42' y2='17.49'%3E%3C/line%3E%3Cline x1='15.41' y1='6.51' x2='8.59' y2='10.49'%3E%3C/line%3E%3C/svg%3E"); }
 span.icon-cart {
-  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='9' cy='21' r='1'%3E%3C/circle%3E%3Ccircle cx='20' cy='21' r='1'%3E%3C/circle%3E%3Cpath d='M1 1h4l2.68 13.39a2 2 0 0 0 2 1.61h9.72a2 2 0 0 0 2-1.61L23 6H6'%3E%3C/path%3E%3C/svg%3E"); }
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='9' cy='21' r='1'%3E%3C/circle%3E%3Ccircle cx='20' cy='21' r='1'%3E%3C/circle%3E%3Cpath d='M1 1h4l2.68 13.39a2 2 0 0 0 2 1.61h9.72a2 2 0 0 0 2-1.61L23 6H6'%3E%3C/path%3E%3C/svg%3E"); }
 span.icon-upload {
-  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 15v4a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2v-4'%3E%3C/path%3E%3Cpolyline points='17 8 12 3 7 8'%3E%3C/polyline%3E%3Cline x1='12' y1='3' x2='12' y2='15'%3E%3C/line%3E%3C/svg%3E"); }
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 15v4a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2v-4'%3E%3C/path%3E%3Cpolyline points='17 8 12 3 7 8'%3E%3C/polyline%3E%3Cline x1='12' y1='3' x2='12' y2='15'%3E%3C/line%3E%3C/svg%3E"); }
 span.icon-user {
-  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%23111' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 21v-2a4 4 0 0 0-4-4H8a4 4 0 0 0-4 4v2'%3E%3C/path%3E%3Ccircle cx='12' cy='7' r='4'%3E%3C/circle%3E%3C/svg%3E"); }
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 21v-2a4 4 0 0 0-4-4H8a4 4 0 0 0-4 4v2'%3E%3C/path%3E%3Ccircle cx='12' cy='7' r='4'%3E%3C/circle%3E%3C/svg%3E"); }
 
 /*
   Definitions for utilities and helper classes.
@@ -1604,7 +1597,7 @@
 /* Utility module CSS variable definitions */
 :root {
   --generic-border-color: rgba(0, 0, 0, 0.3);
-  --generic-box-shadow: 0 0.25rem 0.25rem 0 rgba(0, 0, 0, 0.125), 0 0.125rem 0.125rem -0.125rem rgba(0, 0, 0, 0.25); }
+  --generic-box-shadow: 0 0.2857142857rem 0.2857142857rem 0 rgba(0, 0, 0, 0.125), 0 0.1428571429rem 0.1428571429rem -0.1428571429rem rgba(0, 0, 0, 0.125); }
 
 .hidden {
   display: none !important; }
@@ -1622,7 +1615,7 @@
   overflow: hidden !important; }
 
 .bordered {
-  border: 0.0625rem solid var(--generic-border-color) !important; }
+  border: 0.0714285714rem solid var(--generic-border-color) !important; }
 
 .rounded {
   border-radius: var(--universal-border-radius) !important; }
@@ -1697,4 +1690,14 @@
     clip-path: inset(100%) !important;
     overflow: hidden !important; } }
 
-/*# sourceMappingURL=mini-default.css.map */
+/*# sourceMappingURL=mini-custom.css.map */
+
+img[alt="ST logo"] { display: block; margin: auto; width: 75%; max-width: 250px; min-width: 71px; }
+img[alt="Cube logo"] { float: right; width: 30%; max-width: 10rem; min-width: 8rem; padding-right: 1rem;}
+
+.figure {
+  display: block;
+  margin-left: auto;
+  margin-right: auto;
+  text-align: center;
+}
\ No newline at end of file
diff --git a/_htmresc/st_logo.png b/_htmresc/st_logo.png
deleted file mode 100644
index 8b80057..0000000
--- a/_htmresc/st_logo.png
+++ /dev/null
Binary files differ
diff --git a/_htmresc/st_logo_2020.png b/_htmresc/st_logo_2020.png
new file mode 100644
index 0000000..d6cebb5
--- /dev/null
+++ b/_htmresc/st_logo_2020.png
Binary files differ