Release v2.3.7
diff --git a/Include/stm32f301x8.h b/Include/stm32f301x8.h index 2b5a6c2..c9bb646 100644 --- a/Include/stm32f301x8.h +++ b/Include/stm32f301x8.h
@@ -12,13 +12,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -571,6 +570,10 @@ __IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */ } WWDG_TypeDef; +/** + * @} + */ + /** @addtogroup Peripheral_memory_map * @{ */ @@ -746,7 +749,7 @@ #define ADC5_V1_1 /*!< ADC IP version */ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /* Note: No specific macro feature on this device */ @@ -883,7 +886,7 @@ #define ADC_CFGR_ALIGN_Pos (5U) #define ADC_CFGR_ALIGN_Msk (0x1UL << ADC_CFGR_ALIGN_Pos) /*!< 0x00000020 */ -#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignement */ +#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignment */ #define ADC_CFGR_EXTSEL_Pos (6U) #define ADC_CFGR_EXTSEL_Msk (0xFUL << ADC_CFGR_EXTSEL_Pos) /*!< 0x000003C0 */ @@ -2241,7 +2244,7 @@ #define OPAMP2_CSR_TSTREF OPAMP2_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP2_CSR_OUTCAL_Pos (30U) #define OPAMP2_CSR_OUTCAL_Msk (0x1UL << OPAMP2_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP2_CSR_LOCK_Pos (31U) #define OPAMP2_CSR_LOCK_Msk (0x1UL << OPAMP2_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP2_CSR_LOCK OPAMP2_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2303,7 +2306,7 @@ #define OPAMP_CSR_TSTREF OPAMP_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP_CSR_OUTCAL_Pos (30U) #define OPAMP_CSR_OUTCAL_Msk (0x1UL << OPAMP_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP_CSR_LOCK_Pos (31U) #define OPAMP_CSR_LOCK_Msk (0x1UL << OPAMP_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP_CSR_LOCK OPAMP_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2356,7 +2359,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /* Note: No specific macro feature on this device */ @@ -5348,7 +5351,7 @@ /* */ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define RTC_TAMPER1_SUPPORT /*!< TAMPER 1 feature support */ #define RTC_TAMPER2_SUPPORT /*!< TAMPER 2 feature support */ @@ -6030,7 +6033,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define SPI_I2S_SUPPORT /*!< I2S support */ #define SPI_I2S_FULLDUPLEX_SUPPORT /*!< I2S Full-Duplex support */ @@ -7138,11 +7141,11 @@ #define TIM_DMAR_DMAB TIM_DMAR_DMAB_Msk /*!<DMA register for burst accesses */ /******************* Bit definition for TIM16_OR register *********************/ -#define TIM16_OR_TI1_RMP_Pos (6U) -#define TIM16_OR_TI1_RMP_Msk (0x3UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x000000C0 */ +#define TIM16_OR_TI1_RMP_Pos (0U) +#define TIM16_OR_TI1_RMP_Msk (0x3UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000003 */ #define TIM16_OR_TI1_RMP TIM16_OR_TI1_RMP_Msk /*!<TI1_RMP[1:0] bits (TIM16 Input 1 remap) */ -#define TIM16_OR_TI1_RMP_0 (0x1UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000040 */ -#define TIM16_OR_TI1_RMP_1 (0x2UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000080 */ +#define TIM16_OR_TI1_RMP_0 (0x1UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000001 */ +#define TIM16_OR_TI1_RMP_1 (0x2UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000002 */ /******************* Bit definition for TIM1_OR register *********************/ #define TIM1_OR_ETR_RMP_Pos (0U) @@ -7740,7 +7743,7 @@ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /* Support of 7 bits data length feature */ @@ -8612,8 +8615,6 @@ * @} */ - /** +/** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Include/stm32f302x8.h b/Include/stm32f302x8.h index ecd2947..c591756 100644 --- a/Include/stm32f302x8.h +++ b/Include/stm32f302x8.h
@@ -12,13 +12,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -675,6 +674,10 @@ __IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */ } WWDG_TypeDef; +/** + * @} + */ + /** @addtogroup Peripheral_memory_map * @{ */ @@ -855,7 +858,7 @@ #define ADC5_V1_1 /*!< ADC IP version */ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /* Note: No specific macro feature on this device */ @@ -992,7 +995,7 @@ #define ADC_CFGR_ALIGN_Pos (5U) #define ADC_CFGR_ALIGN_Msk (0x1UL << ADC_CFGR_ALIGN_Pos) /*!< 0x00000020 */ -#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignement */ +#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignment */ #define ADC_CFGR_EXTSEL_Pos (6U) #define ADC_CFGR_EXTSEL_Msk (0xFUL << ADC_CFGR_EXTSEL_Pos) /*!< 0x000003C0 */ @@ -2350,7 +2353,7 @@ #define OPAMP2_CSR_TSTREF OPAMP2_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP2_CSR_OUTCAL_Pos (30U) #define OPAMP2_CSR_OUTCAL_Msk (0x1UL << OPAMP2_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP2_CSR_LOCK_Pos (31U) #define OPAMP2_CSR_LOCK_Msk (0x1UL << OPAMP2_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP2_CSR_LOCK OPAMP2_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2412,7 +2415,7 @@ #define OPAMP_CSR_TSTREF OPAMP_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP_CSR_OUTCAL_Pos (30U) #define OPAMP_CSR_OUTCAL_Msk (0x1UL << OPAMP_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP_CSR_LOCK_Pos (31U) #define OPAMP_CSR_LOCK_Msk (0x1UL << OPAMP_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP_CSR_LOCK OPAMP_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -5943,7 +5946,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /* Note: No specific macro feature on this device */ @@ -8976,7 +8979,7 @@ /* */ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define RTC_TAMPER1_SUPPORT /*!< TAMPER 1 feature support */ #define RTC_TAMPER2_SUPPORT /*!< TAMPER 2 feature support */ @@ -9658,7 +9661,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define SPI_I2S_SUPPORT /*!< I2S support */ #define SPI_I2S_FULLDUPLEX_SUPPORT /*!< I2S Full-Duplex support */ @@ -11371,7 +11374,7 @@ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /* Support of 7 bits data length feature */ @@ -12385,8 +12388,6 @@ * @} */ - /** +/** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Include/stm32f302xc.h b/Include/stm32f302xc.h index c58c15c..e666f1a 100644 --- a/Include/stm32f302xc.h +++ b/Include/stm32f302xc.h
@@ -12,13 +12,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -679,6 +678,10 @@ __IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */ } WWDG_TypeDef; +/** + * @} + */ + /** @addtogroup Peripheral_memory_map * @{ */ @@ -890,7 +893,7 @@ #define ADC5_V1_1 /*!< ADC IP version */ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define ADC_MULTIMODE_SUPPORT /*!< ADC feature available only on specific devices: multimode available on devices with several ADC instances */ @@ -1027,7 +1030,7 @@ #define ADC_CFGR_ALIGN_Pos (5U) #define ADC_CFGR_ALIGN_Msk (0x1UL << ADC_CFGR_ALIGN_Pos) /*!< 0x00000020 */ -#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignement */ +#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignment */ #define ADC_CFGR_EXTSEL_Pos (6U) #define ADC_CFGR_EXTSEL_Msk (0xFUL << ADC_CFGR_EXTSEL_Pos) /*!< 0x000003C0 */ @@ -2483,7 +2486,7 @@ #define OPAMP1_CSR_TSTREF OPAMP1_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP1_CSR_OUTCAL_Pos (30U) #define OPAMP1_CSR_OUTCAL_Msk (0x1UL << OPAMP1_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP1_CSR_OUTCAL OPAMP1_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP1_CSR_OUTCAL OPAMP1_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP1_CSR_LOCK_Pos (31U) #define OPAMP1_CSR_LOCK_Msk (0x1UL << OPAMP1_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP1_CSR_LOCK OPAMP1_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2545,7 +2548,7 @@ #define OPAMP2_CSR_TSTREF OPAMP2_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP2_CSR_OUTCAL_Pos (30U) #define OPAMP2_CSR_OUTCAL_Msk (0x1UL << OPAMP2_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP2_CSR_LOCK_Pos (31U) #define OPAMP2_CSR_LOCK_Msk (0x1UL << OPAMP2_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP2_CSR_LOCK OPAMP2_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2607,7 +2610,7 @@ #define OPAMP_CSR_TSTREF OPAMP_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP_CSR_OUTCAL_Pos (30U) #define OPAMP_CSR_OUTCAL_Msk (0x1UL << OPAMP_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP_CSR_LOCK_Pos (31U) #define OPAMP_CSR_LOCK_Msk (0x1UL << OPAMP_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP_CSR_LOCK OPAMP_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -6138,7 +6141,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /* Note: No specific macro feature on this device */ @@ -9253,7 +9256,7 @@ /* */ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define RTC_TAMPER1_SUPPORT /*!< TAMPER 1 feature support */ #define RTC_TAMPER2_SUPPORT /*!< TAMPER 2 feature support */ @@ -9925,7 +9928,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define SPI_I2S_SUPPORT /*!< I2S support */ #define SPI_I2S_FULLDUPLEX_SUPPORT /*!< I2S Full-Duplex support */ @@ -10418,7 +10421,7 @@ #define SYSCFG_CFGR2_PVD_LOCK SYSCFG_CFGR2_PVD_LOCK_Msk /*!< Enables and locks the PVD connection with TIMx Break Input, as well as the PVDE and PLS[2:0] in the PWR_CR register */ #define SYSCFG_CFGR2_BYP_ADDR_PAR_Pos (4U) #define SYSCFG_CFGR2_BYP_ADDR_PAR_Msk (0x1UL << SYSCFG_CFGR2_BYP_ADDR_PAR_Pos) /*!< 0x00000010 */ -#define SYSCFG_CFGR2_BYP_ADDR_PAR SYSCFG_CFGR2_BYP_ADDR_PAR_Msk /*!< Disables the adddress parity check on RAM */ +#define SYSCFG_CFGR2_BYP_ADDR_PAR SYSCFG_CFGR2_BYP_ADDR_PAR_Msk /*!< Disables the address parity check on RAM */ #define SYSCFG_CFGR2_SRAM_PE_Pos (8U) #define SYSCFG_CFGR2_SRAM_PE_Msk (0x1UL << SYSCFG_CFGR2_SRAM_PE_Pos) /*!< 0x00000100 */ #define SYSCFG_CFGR2_SRAM_PE SYSCFG_CFGR2_SRAM_PE_Msk /*!< SRAM Parity error flag */ @@ -11051,11 +11054,11 @@ #define TIM_DMAR_DMAB TIM_DMAR_DMAB_Msk /*!<DMA register for burst accesses */ /******************* Bit definition for TIM16_OR register *********************/ -#define TIM16_OR_TI1_RMP_Pos (6U) -#define TIM16_OR_TI1_RMP_Msk (0x3UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x000000C0 */ +#define TIM16_OR_TI1_RMP_Pos (0U) +#define TIM16_OR_TI1_RMP_Msk (0x3UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000003 */ #define TIM16_OR_TI1_RMP TIM16_OR_TI1_RMP_Msk /*!<TI1_RMP[1:0] bits (TIM16 Input 1 remap) */ -#define TIM16_OR_TI1_RMP_0 (0x1UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000040 */ -#define TIM16_OR_TI1_RMP_1 (0x2UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000080 */ +#define TIM16_OR_TI1_RMP_0 (0x1UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000001 */ +#define TIM16_OR_TI1_RMP_1 (0x2UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000002 */ /******************* Bit definition for TIM1_OR register *********************/ #define TIM1_OR_ETR_RMP_Pos (0U) @@ -12728,8 +12731,6 @@ * @} */ - /** +/** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Include/stm32f302xe.h b/Include/stm32f302xe.h index f9e255b..685b025 100644 --- a/Include/stm32f302xe.h +++ b/Include/stm32f302xe.h
@@ -12,13 +12,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -738,6 +737,10 @@ __IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */ } WWDG_TypeDef; +/** + * @} + */ + /** @addtogroup Peripheral_memory_map * @{ */ @@ -981,7 +984,7 @@ #define ADC5_V1_1 /*!< ADC IP version */ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define ADC_MULTIMODE_SUPPORT /*!< ADC feature available only on specific devices: multimode available on devices with several ADC instances */ @@ -1118,7 +1121,7 @@ #define ADC_CFGR_ALIGN_Pos (5U) #define ADC_CFGR_ALIGN_Msk (0x1UL << ADC_CFGR_ALIGN_Pos) /*!< 0x00000020 */ -#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignement */ +#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignment */ #define ADC_CFGR_EXTSEL_Pos (6U) #define ADC_CFGR_EXTSEL_Msk (0xFUL << ADC_CFGR_EXTSEL_Pos) /*!< 0x000003C0 */ @@ -2506,7 +2509,7 @@ #define OPAMP1_CSR_TSTREF OPAMP1_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP1_CSR_OUTCAL_Pos (30U) #define OPAMP1_CSR_OUTCAL_Msk (0x1UL << OPAMP1_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP1_CSR_OUTCAL OPAMP1_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP1_CSR_OUTCAL OPAMP1_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP1_CSR_LOCK_Pos (31U) #define OPAMP1_CSR_LOCK_Msk (0x1UL << OPAMP1_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP1_CSR_LOCK OPAMP1_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2568,7 +2571,7 @@ #define OPAMP2_CSR_TSTREF OPAMP2_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP2_CSR_OUTCAL_Pos (30U) #define OPAMP2_CSR_OUTCAL_Msk (0x1UL << OPAMP2_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP2_CSR_LOCK_Pos (31U) #define OPAMP2_CSR_LOCK_Msk (0x1UL << OPAMP2_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP2_CSR_LOCK OPAMP2_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2630,7 +2633,7 @@ #define OPAMP_CSR_TSTREF OPAMP_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP_CSR_OUTCAL_Pos (30U) #define OPAMP_CSR_OUTCAL_Msk (0x1UL << OPAMP_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP_CSR_LOCK_Pos (31U) #define OPAMP_CSR_LOCK_Msk (0x1UL << OPAMP_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP_CSR_LOCK OPAMP_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -6161,7 +6164,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /* Note: No specific macro feature on this device */ @@ -7839,7 +7842,7 @@ #define FMC_BCR1_CBURSTRW FMC_BCR1_CBURSTRW_Msk /*!<Write burst enable */ #define FMC_BCR1_CCLKEN_Pos (20U) #define FMC_BCR1_CCLKEN_Msk (0x1UL << FMC_BCR1_CCLKEN_Pos) /*!< 0x00100000 */ -#define FMC_BCR1_CCLKEN FMC_BCR1_CCLKEN_Msk /*!<Continous clock enable */ +#define FMC_BCR1_CCLKEN FMC_BCR1_CCLKEN_Msk /*!<Continuous clock enable */ /****************** Bit definition for FMC_BCR2 register *******************/ #define FMC_BCR2_MBKEN_Pos (0U) @@ -10133,7 +10136,7 @@ /* */ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define RCC_PLLSRC_PREDIV1_SUPPORT /*!< PREDIV support used as PLL source input */ @@ -10936,7 +10939,7 @@ /* */ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define RTC_TAMPER1_SUPPORT /*!< TAMPER 1 feature support */ #define RTC_TAMPER2_SUPPORT /*!< TAMPER 2 feature support */ @@ -11608,7 +11611,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define SPI_I2S_SUPPORT /*!< I2S support */ #define SPI_I2S_FULLDUPLEX_SUPPORT /*!< I2S Full-Duplex support */ @@ -12126,7 +12129,7 @@ #define SYSCFG_CFGR2_PVD_LOCK SYSCFG_CFGR2_PVD_LOCK_Msk /*!< Enables and locks the PVD connection with TIMx Break Input, as well as the PVDE and PLS[2:0] in the PWR_CR register */ #define SYSCFG_CFGR2_BYP_ADDR_PAR_Pos (4U) #define SYSCFG_CFGR2_BYP_ADDR_PAR_Msk (0x1UL << SYSCFG_CFGR2_BYP_ADDR_PAR_Pos) /*!< 0x00000010 */ -#define SYSCFG_CFGR2_BYP_ADDR_PAR SYSCFG_CFGR2_BYP_ADDR_PAR_Msk /*!< Disables the adddress parity check on RAM */ +#define SYSCFG_CFGR2_BYP_ADDR_PAR SYSCFG_CFGR2_BYP_ADDR_PAR_Msk /*!< Disables the address parity check on RAM */ #define SYSCFG_CFGR2_SRAM_PE_Pos (8U) #define SYSCFG_CFGR2_SRAM_PE_Msk (0x1UL << SYSCFG_CFGR2_SRAM_PE_Pos) /*!< 0x00000100 */ #define SYSCFG_CFGR2_SRAM_PE SYSCFG_CFGR2_SRAM_PE_Msk /*!< SRAM Parity error flag */ @@ -13361,7 +13364,7 @@ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /* Support of 7 bits data length feature */ @@ -14472,8 +14475,6 @@ * @} */ - /** +/** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Include/stm32f303x8.h b/Include/stm32f303x8.h index 668c1b4..75cfbd3 100644 --- a/Include/stm32f303x8.h +++ b/Include/stm32f303x8.h
@@ -12,13 +12,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -629,6 +628,10 @@ __IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */ } WWDG_TypeDef; +/** + * @} + */ + /** @addtogroup Peripheral_memory_map * @{ */ @@ -807,7 +810,7 @@ #define ADC5_V1_1 /*!< ADC IP version */ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define ADC_MULTIMODE_SUPPORT /*!< ADC feature available only on specific devices: multimode available on devices with several ADC instances */ @@ -944,7 +947,7 @@ #define ADC_CFGR_ALIGN_Pos (5U) #define ADC_CFGR_ALIGN_Msk (0x1UL << ADC_CFGR_ALIGN_Pos) /*!< 0x00000020 */ -#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignement */ +#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignment */ #define ADC_CFGR_EXTSEL_Pos (6U) #define ADC_CFGR_EXTSEL_Msk (0xFUL << ADC_CFGR_EXTSEL_Pos) /*!< 0x000003C0 */ @@ -2295,7 +2298,7 @@ #define OPAMP2_CSR_TSTREF OPAMP2_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP2_CSR_OUTCAL_Pos (30U) #define OPAMP2_CSR_OUTCAL_Msk (0x1UL << OPAMP2_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP2_CSR_LOCK_Pos (31U) #define OPAMP2_CSR_LOCK_Msk (0x1UL << OPAMP2_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP2_CSR_LOCK OPAMP2_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2357,7 +2360,7 @@ #define OPAMP_CSR_TSTREF OPAMP_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP_CSR_OUTCAL_Pos (30U) #define OPAMP_CSR_OUTCAL_Msk (0x1UL << OPAMP_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP_CSR_LOCK_Pos (31U) #define OPAMP_CSR_LOCK_Msk (0x1UL << OPAMP_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP_CSR_LOCK OPAMP_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -5888,7 +5891,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define DAC_CHANNEL2_SUPPORT /*!< DAC feature available only on specific devices: DAC channel 2 available (may not be available on all DAC instances DACx) */ @@ -8300,7 +8303,7 @@ /* */ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /******************** Bit definition for RCC_CR register ********************/ @@ -8910,7 +8913,7 @@ /* */ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define RTC_TAMPER1_SUPPORT /*!< TAMPER 1 feature support */ #define RTC_TAMPER2_SUPPORT /*!< TAMPER 2 feature support */ @@ -9517,7 +9520,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /* Note: No specific macro feature on this device */ @@ -9968,7 +9971,7 @@ #define SYSCFG_CFGR2_PVD_LOCK SYSCFG_CFGR2_PVD_LOCK_Msk /*!< Enables and locks the PVD connection with TIMx Break Input, as well as the PVDE and PLS[2:0] in the PWR_CR register */ #define SYSCFG_CFGR2_BYP_ADDR_PAR_Pos (4U) #define SYSCFG_CFGR2_BYP_ADDR_PAR_Msk (0x1UL << SYSCFG_CFGR2_BYP_ADDR_PAR_Pos) /*!< 0x00000010 */ -#define SYSCFG_CFGR2_BYP_ADDR_PAR SYSCFG_CFGR2_BYP_ADDR_PAR_Msk /*!< Disables the adddress parity check on RAM */ +#define SYSCFG_CFGR2_BYP_ADDR_PAR SYSCFG_CFGR2_BYP_ADDR_PAR_Msk /*!< Disables the address parity check on RAM */ #define SYSCFG_CFGR2_SRAM_PE_Pos (8U) #define SYSCFG_CFGR2_SRAM_PE_Msk (0x1UL << SYSCFG_CFGR2_SRAM_PE_Pos) /*!< 0x00000100 */ #define SYSCFG_CFGR2_SRAM_PE SYSCFG_CFGR2_SRAM_PE_Msk /*!< SRAM Parity error flag */ @@ -10631,11 +10634,11 @@ #define TIM_DMAR_DMAB TIM_DMAR_DMAB_Msk /*!<DMA register for burst accesses */ /******************* Bit definition for TIM16_OR register *********************/ -#define TIM16_OR_TI1_RMP_Pos (6U) -#define TIM16_OR_TI1_RMP_Msk (0x3UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x000000C0 */ +#define TIM16_OR_TI1_RMP_Pos (0U) +#define TIM16_OR_TI1_RMP_Msk (0x3UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000003 */ #define TIM16_OR_TI1_RMP TIM16_OR_TI1_RMP_Msk /*!<TI1_RMP[1:0] bits (TIM16 Input 1 remap) */ -#define TIM16_OR_TI1_RMP_0 (0x1UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000040 */ -#define TIM16_OR_TI1_RMP_1 (0x2UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000080 */ +#define TIM16_OR_TI1_RMP_0 (0x1UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000001 */ +#define TIM16_OR_TI1_RMP_1 (0x2UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000002 */ /******************* Bit definition for TIM1_OR register *********************/ #define TIM1_OR_ETR_RMP_Pos (0U) @@ -11233,7 +11236,7 @@ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /* Support of 7 bits data length feature */ @@ -12139,8 +12142,6 @@ * @} */ - /** +/** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Include/stm32f303xc.h b/Include/stm32f303xc.h index bc07c06..51ba5c1 100644 --- a/Include/stm32f303xc.h +++ b/Include/stm32f303xc.h
@@ -12,13 +12,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -687,6 +686,10 @@ __IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */ } WWDG_TypeDef; +/** + * @} + */ + /** @addtogroup Peripheral_memory_map * @{ */ @@ -922,7 +925,7 @@ #define ADC5_V1_1 /*!< ADC IP version */ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define ADC_MULTIMODE_SUPPORT /*!< ADC feature available only on specific devices: multimode available on devices with several ADC instances */ @@ -1059,7 +1062,7 @@ #define ADC_CFGR_ALIGN_Pos (5U) #define ADC_CFGR_ALIGN_Msk (0x1UL << ADC_CFGR_ALIGN_Pos) /*!< 0x00000020 */ -#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignement */ +#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignment */ #define ADC_CFGR_EXTSEL_Pos (6U) #define ADC_CFGR_EXTSEL_Msk (0xFUL << ADC_CFGR_EXTSEL_Pos) /*!< 0x000003C0 */ @@ -2811,7 +2814,7 @@ #define OPAMP1_CSR_TSTREF OPAMP1_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP1_CSR_OUTCAL_Pos (30U) #define OPAMP1_CSR_OUTCAL_Msk (0x1UL << OPAMP1_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP1_CSR_OUTCAL OPAMP1_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP1_CSR_OUTCAL OPAMP1_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP1_CSR_LOCK_Pos (31U) #define OPAMP1_CSR_LOCK_Msk (0x1UL << OPAMP1_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP1_CSR_LOCK OPAMP1_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2873,7 +2876,7 @@ #define OPAMP2_CSR_TSTREF OPAMP2_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP2_CSR_OUTCAL_Pos (30U) #define OPAMP2_CSR_OUTCAL_Msk (0x1UL << OPAMP2_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP2_CSR_LOCK_Pos (31U) #define OPAMP2_CSR_LOCK_Msk (0x1UL << OPAMP2_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP2_CSR_LOCK OPAMP2_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2935,7 +2938,7 @@ #define OPAMP3_CSR_TSTREF OPAMP3_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP3_CSR_OUTCAL_Pos (30U) #define OPAMP3_CSR_OUTCAL_Msk (0x1UL << OPAMP3_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP3_CSR_OUTCAL OPAMP3_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP3_CSR_OUTCAL OPAMP3_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP3_CSR_LOCK_Pos (31U) #define OPAMP3_CSR_LOCK_Msk (0x1UL << OPAMP3_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP3_CSR_LOCK OPAMP3_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2997,7 +3000,7 @@ #define OPAMP4_CSR_TSTREF OPAMP4_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP4_CSR_OUTCAL_Pos (30U) #define OPAMP4_CSR_OUTCAL_Msk (0x1UL << OPAMP4_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP4_CSR_OUTCAL OPAMP4_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP4_CSR_OUTCAL OPAMP4_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP4_CSR_LOCK_Pos (31U) #define OPAMP4_CSR_LOCK_Msk (0x1UL << OPAMP4_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP4_CSR_LOCK OPAMP4_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -3059,7 +3062,7 @@ #define OPAMP_CSR_TSTREF OPAMP_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP_CSR_OUTCAL_Pos (30U) #define OPAMP_CSR_OUTCAL_Msk (0x1UL << OPAMP_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP_CSR_LOCK_Pos (31U) #define OPAMP_CSR_LOCK_Msk (0x1UL << OPAMP_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP_CSR_LOCK OPAMP_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -6590,7 +6593,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define DAC_CHANNEL2_SUPPORT /*!< DAC feature available only on specific devices: DAC channel 2 available (may not be available on all DAC instances DACx) */ @@ -9891,7 +9894,7 @@ /* */ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define RTC_TAMPER1_SUPPORT /*!< TAMPER 1 feature support */ #define RTC_TAMPER2_SUPPORT /*!< TAMPER 2 feature support */ @@ -10563,7 +10566,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define SPI_I2S_SUPPORT /*!< I2S support */ #define SPI_I2S_FULLDUPLEX_SUPPORT /*!< I2S Full-Duplex support */ @@ -11085,7 +11088,7 @@ #define SYSCFG_CFGR2_PVD_LOCK SYSCFG_CFGR2_PVD_LOCK_Msk /*!< Enables and locks the PVD connection with TIMx Break Input, as well as the PVDE and PLS[2:0] in the PWR_CR register */ #define SYSCFG_CFGR2_BYP_ADDR_PAR_Pos (4U) #define SYSCFG_CFGR2_BYP_ADDR_PAR_Msk (0x1UL << SYSCFG_CFGR2_BYP_ADDR_PAR_Pos) /*!< 0x00000010 */ -#define SYSCFG_CFGR2_BYP_ADDR_PAR SYSCFG_CFGR2_BYP_ADDR_PAR_Msk /*!< Disables the adddress parity check on RAM */ +#define SYSCFG_CFGR2_BYP_ADDR_PAR SYSCFG_CFGR2_BYP_ADDR_PAR_Msk /*!< Disables the address parity check on RAM */ #define SYSCFG_CFGR2_SRAM_PE_Pos (8U) #define SYSCFG_CFGR2_SRAM_PE_Msk (0x1UL << SYSCFG_CFGR2_SRAM_PE_Pos) /*!< 0x00000100 */ #define SYSCFG_CFGR2_SRAM_PE SYSCFG_CFGR2_SRAM_PE_Msk /*!< SRAM Parity error flag */ @@ -13477,8 +13480,6 @@ * @} */ - /** +/** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Include/stm32f303xe.h b/Include/stm32f303xe.h index cfb8aa8..29ee103 100644 --- a/Include/stm32f303xe.h +++ b/Include/stm32f303xe.h
@@ -12,13 +12,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -764,6 +763,10 @@ __IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */ } WWDG_TypeDef; +/** + * @} + */ + /** @addtogroup Peripheral_memory_map * @{ */ @@ -1033,7 +1036,7 @@ #define ADC5_V1_1 /*!< ADC IP version */ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define ADC_MULTIMODE_SUPPORT /*!< ADC feature available only on specific devices: multimode available on devices with several ADC instances */ @@ -1170,7 +1173,7 @@ #define ADC_CFGR_ALIGN_Pos (5U) #define ADC_CFGR_ALIGN_Msk (0x1UL << ADC_CFGR_ALIGN_Pos) /*!< 0x00000020 */ -#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignement */ +#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignment */ #define ADC_CFGR_EXTSEL_Pos (6U) #define ADC_CFGR_EXTSEL_Msk (0xFUL << ADC_CFGR_EXTSEL_Pos) /*!< 0x000003C0 */ @@ -2809,7 +2812,7 @@ #define OPAMP1_CSR_TSTREF OPAMP1_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP1_CSR_OUTCAL_Pos (30U) #define OPAMP1_CSR_OUTCAL_Msk (0x1UL << OPAMP1_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP1_CSR_OUTCAL OPAMP1_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP1_CSR_OUTCAL OPAMP1_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP1_CSR_LOCK_Pos (31U) #define OPAMP1_CSR_LOCK_Msk (0x1UL << OPAMP1_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP1_CSR_LOCK OPAMP1_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2871,7 +2874,7 @@ #define OPAMP2_CSR_TSTREF OPAMP2_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP2_CSR_OUTCAL_Pos (30U) #define OPAMP2_CSR_OUTCAL_Msk (0x1UL << OPAMP2_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP2_CSR_LOCK_Pos (31U) #define OPAMP2_CSR_LOCK_Msk (0x1UL << OPAMP2_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP2_CSR_LOCK OPAMP2_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2933,7 +2936,7 @@ #define OPAMP3_CSR_TSTREF OPAMP3_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP3_CSR_OUTCAL_Pos (30U) #define OPAMP3_CSR_OUTCAL_Msk (0x1UL << OPAMP3_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP3_CSR_OUTCAL OPAMP3_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP3_CSR_OUTCAL OPAMP3_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP3_CSR_LOCK_Pos (31U) #define OPAMP3_CSR_LOCK_Msk (0x1UL << OPAMP3_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP3_CSR_LOCK OPAMP3_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2995,7 +2998,7 @@ #define OPAMP4_CSR_TSTREF OPAMP4_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP4_CSR_OUTCAL_Pos (30U) #define OPAMP4_CSR_OUTCAL_Msk (0x1UL << OPAMP4_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP4_CSR_OUTCAL OPAMP4_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP4_CSR_OUTCAL OPAMP4_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP4_CSR_LOCK_Pos (31U) #define OPAMP4_CSR_LOCK_Msk (0x1UL << OPAMP4_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP4_CSR_LOCK OPAMP4_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -3057,7 +3060,7 @@ #define OPAMP_CSR_TSTREF OPAMP_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP_CSR_OUTCAL_Pos (30U) #define OPAMP_CSR_OUTCAL_Msk (0x1UL << OPAMP_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP_CSR_LOCK_Pos (31U) #define OPAMP_CSR_LOCK_Msk (0x1UL << OPAMP_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP_CSR_LOCK OPAMP_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -6588,7 +6591,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define DAC_CHANNEL2_SUPPORT /*!< DAC feature available only on specific devices: DAC channel 2 available (may not be available on all DAC instances DACx) */ @@ -8402,7 +8405,7 @@ #define FMC_BCR1_CBURSTRW FMC_BCR1_CBURSTRW_Msk /*!<Write burst enable */ #define FMC_BCR1_CCLKEN_Pos (20U) #define FMC_BCR1_CCLKEN_Msk (0x1UL << FMC_BCR1_CCLKEN_Pos) /*!< 0x00100000 */ -#define FMC_BCR1_CCLKEN FMC_BCR1_CCLKEN_Msk /*!<Continous clock enable */ +#define FMC_BCR1_CCLKEN FMC_BCR1_CCLKEN_Msk /*!<Continuous clock enable */ /****************** Bit definition for FMC_BCR2 register *******************/ #define FMC_BCR2_MBKEN_Pos (0U) @@ -10696,7 +10699,7 @@ /* */ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define RCC_PLLSRC_PREDIV1_SUPPORT /*!< PREDIV support used as PLL source input */ @@ -11560,7 +11563,7 @@ /* */ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define RTC_TAMPER1_SUPPORT /*!< TAMPER 1 feature support */ #define RTC_TAMPER2_SUPPORT /*!< TAMPER 2 feature support */ @@ -12232,7 +12235,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define SPI_I2S_SUPPORT /*!< I2S support */ #define SPI_I2S_FULLDUPLEX_SUPPORT /*!< I2S Full-Duplex support */ @@ -12806,7 +12809,7 @@ #define SYSCFG_CFGR2_PVD_LOCK SYSCFG_CFGR2_PVD_LOCK_Msk /*!< Enables and locks the PVD connection with TIMx Break Input, as well as the PVDE and PLS[2:0] in the PWR_CR register */ #define SYSCFG_CFGR2_BYP_ADDR_PAR_Pos (4U) #define SYSCFG_CFGR2_BYP_ADDR_PAR_Msk (0x1UL << SYSCFG_CFGR2_BYP_ADDR_PAR_Pos) /*!< 0x00000010 */ -#define SYSCFG_CFGR2_BYP_ADDR_PAR SYSCFG_CFGR2_BYP_ADDR_PAR_Msk /*!< Disables the adddress parity check on RAM */ +#define SYSCFG_CFGR2_BYP_ADDR_PAR SYSCFG_CFGR2_BYP_ADDR_PAR_Msk /*!< Disables the address parity check on RAM */ #define SYSCFG_CFGR2_SRAM_PE_Pos (8U) #define SYSCFG_CFGR2_SRAM_PE_Msk (0x1UL << SYSCFG_CFGR2_SRAM_PE_Pos) /*!< 0x00000100 */ #define SYSCFG_CFGR2_SRAM_PE SYSCFG_CFGR2_SRAM_PE_Msk /*!< SRAM Parity error flag */ @@ -14102,7 +14105,7 @@ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /* Support of 7 bits data length feature */ @@ -15333,8 +15336,6 @@ * @} */ - /** +/** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Include/stm32f318xx.h b/Include/stm32f318xx.h index c441955..b5a6ee0 100644 --- a/Include/stm32f318xx.h +++ b/Include/stm32f318xx.h
@@ -12,13 +12,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -572,6 +571,10 @@ __IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */ } WWDG_TypeDef; +/** + * @} + */ + /** @addtogroup Peripheral_memory_map * @{ */ @@ -747,7 +750,7 @@ #define ADC5_V1_1 /*!< ADC IP version */ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /* Note: No specific macro feature on this device */ @@ -884,7 +887,7 @@ #define ADC_CFGR_ALIGN_Pos (5U) #define ADC_CFGR_ALIGN_Msk (0x1UL << ADC_CFGR_ALIGN_Pos) /*!< 0x00000020 */ -#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignement */ +#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignment */ #define ADC_CFGR_EXTSEL_Pos (6U) #define ADC_CFGR_EXTSEL_Msk (0xFUL << ADC_CFGR_EXTSEL_Pos) /*!< 0x000003C0 */ @@ -2242,7 +2245,7 @@ #define OPAMP2_CSR_TSTREF OPAMP2_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP2_CSR_OUTCAL_Pos (30U) #define OPAMP2_CSR_OUTCAL_Msk (0x1UL << OPAMP2_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP2_CSR_LOCK_Pos (31U) #define OPAMP2_CSR_LOCK_Msk (0x1UL << OPAMP2_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP2_CSR_LOCK OPAMP2_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2304,7 +2307,7 @@ #define OPAMP_CSR_TSTREF OPAMP_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP_CSR_OUTCAL_Pos (30U) #define OPAMP_CSR_OUTCAL_Msk (0x1UL << OPAMP_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP_CSR_LOCK_Pos (31U) #define OPAMP_CSR_LOCK_Msk (0x1UL << OPAMP_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP_CSR_LOCK OPAMP_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2357,7 +2360,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /* Note: No specific macro feature on this device */ @@ -5338,7 +5341,7 @@ /* */ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define RTC_TAMPER1_SUPPORT /*!< TAMPER 1 feature support */ #define RTC_TAMPER2_SUPPORT /*!< TAMPER 2 feature support */ @@ -6020,7 +6023,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define SPI_I2S_SUPPORT /*!< I2S support */ #define SPI_I2S_FULLDUPLEX_SUPPORT /*!< I2S Full-Duplex support */ @@ -7125,11 +7128,11 @@ #define TIM_DMAR_DMAB TIM_DMAR_DMAB_Msk /*!<DMA register for burst accesses */ /******************* Bit definition for TIM16_OR register *********************/ -#define TIM16_OR_TI1_RMP_Pos (6U) -#define TIM16_OR_TI1_RMP_Msk (0x3UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x000000C0 */ +#define TIM16_OR_TI1_RMP_Pos (0U) +#define TIM16_OR_TI1_RMP_Msk (0x3UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000003 */ #define TIM16_OR_TI1_RMP TIM16_OR_TI1_RMP_Msk /*!<TI1_RMP[1:0] bits (TIM16 Input 1 remap) */ -#define TIM16_OR_TI1_RMP_0 (0x1UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000040 */ -#define TIM16_OR_TI1_RMP_1 (0x2UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000080 */ +#define TIM16_OR_TI1_RMP_0 (0x1UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000001 */ +#define TIM16_OR_TI1_RMP_1 (0x2UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000002 */ /******************* Bit definition for TIM1_OR register *********************/ #define TIM1_OR_ETR_RMP_Pos (0U) @@ -7727,7 +7730,7 @@ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /* Support of 7 bits data length feature */ @@ -8599,8 +8602,6 @@ * @} */ - /** +/** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Include/stm32f328xx.h b/Include/stm32f328xx.h index a78d828..f6779b7 100644 --- a/Include/stm32f328xx.h +++ b/Include/stm32f328xx.h
@@ -12,13 +12,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -628,6 +627,10 @@ __IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */ } WWDG_TypeDef; +/** + * @} + */ + /** @addtogroup Peripheral_memory_map * @{ */ @@ -806,7 +809,7 @@ #define ADC5_V1_1 /*!< ADC IP version */ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define ADC_MULTIMODE_SUPPORT /*!< ADC feature available only on specific devices: multimode available on devices with several ADC instances */ @@ -943,7 +946,7 @@ #define ADC_CFGR_ALIGN_Pos (5U) #define ADC_CFGR_ALIGN_Msk (0x1UL << ADC_CFGR_ALIGN_Pos) /*!< 0x00000020 */ -#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignement */ +#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignment */ #define ADC_CFGR_EXTSEL_Pos (6U) #define ADC_CFGR_EXTSEL_Msk (0xFUL << ADC_CFGR_EXTSEL_Pos) /*!< 0x000003C0 */ @@ -2294,7 +2297,7 @@ #define OPAMP2_CSR_TSTREF OPAMP2_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP2_CSR_OUTCAL_Pos (30U) #define OPAMP2_CSR_OUTCAL_Msk (0x1UL << OPAMP2_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP2_CSR_LOCK_Pos (31U) #define OPAMP2_CSR_LOCK_Msk (0x1UL << OPAMP2_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP2_CSR_LOCK OPAMP2_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2356,7 +2359,7 @@ #define OPAMP_CSR_TSTREF OPAMP_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP_CSR_OUTCAL_Pos (30U) #define OPAMP_CSR_OUTCAL_Msk (0x1UL << OPAMP_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP_CSR_LOCK_Pos (31U) #define OPAMP_CSR_LOCK_Msk (0x1UL << OPAMP_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP_CSR_LOCK OPAMP_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -5887,7 +5890,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define DAC_CHANNEL2_SUPPORT /*!< DAC feature available only on specific devices: DAC channel 2 available (may not be available on all DAC instances DACx) */ @@ -8276,7 +8279,7 @@ /* */ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /******************** Bit definition for RCC_CR register ********************/ @@ -8883,7 +8886,7 @@ /* */ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define RTC_TAMPER1_SUPPORT /*!< TAMPER 1 feature support */ #define RTC_TAMPER2_SUPPORT /*!< TAMPER 2 feature support */ @@ -9490,7 +9493,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /* Note: No specific macro feature on this device */ @@ -9938,7 +9941,7 @@ #define SYSCFG_CFGR2_SRAM_PARITY_LOCK SYSCFG_CFGR2_SRAM_PARITY_LOCK_Msk /*!< Enables and locks the SRAM_PARITY error signal with Break Input of TIMx */ #define SYSCFG_CFGR2_BYP_ADDR_PAR_Pos (4U) #define SYSCFG_CFGR2_BYP_ADDR_PAR_Msk (0x1UL << SYSCFG_CFGR2_BYP_ADDR_PAR_Pos) /*!< 0x00000010 */ -#define SYSCFG_CFGR2_BYP_ADDR_PAR SYSCFG_CFGR2_BYP_ADDR_PAR_Msk /*!< Disables the adddress parity check on RAM */ +#define SYSCFG_CFGR2_BYP_ADDR_PAR SYSCFG_CFGR2_BYP_ADDR_PAR_Msk /*!< Disables the address parity check on RAM */ #define SYSCFG_CFGR2_SRAM_PE_Pos (8U) #define SYSCFG_CFGR2_SRAM_PE_Msk (0x1UL << SYSCFG_CFGR2_SRAM_PE_Pos) /*!< 0x00000100 */ #define SYSCFG_CFGR2_SRAM_PE SYSCFG_CFGR2_SRAM_PE_Msk /*!< SRAM Parity error flag */ @@ -10601,11 +10604,11 @@ #define TIM_DMAR_DMAB TIM_DMAR_DMAB_Msk /*!<DMA register for burst accesses */ /******************* Bit definition for TIM16_OR register *********************/ -#define TIM16_OR_TI1_RMP_Pos (6U) -#define TIM16_OR_TI1_RMP_Msk (0x3UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x000000C0 */ +#define TIM16_OR_TI1_RMP_Pos (0U) +#define TIM16_OR_TI1_RMP_Msk (0x3UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000003 */ #define TIM16_OR_TI1_RMP TIM16_OR_TI1_RMP_Msk /*!<TI1_RMP[1:0] bits (TIM16 Input 1 remap) */ -#define TIM16_OR_TI1_RMP_0 (0x1UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000040 */ -#define TIM16_OR_TI1_RMP_1 (0x2UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000080 */ +#define TIM16_OR_TI1_RMP_0 (0x1UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000001 */ +#define TIM16_OR_TI1_RMP_1 (0x2UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000002 */ /******************* Bit definition for TIM1_OR register *********************/ #define TIM1_OR_ETR_RMP_Pos (0U) @@ -11203,7 +11206,7 @@ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /* Support of 7 bits data length feature */ @@ -12109,8 +12112,6 @@ * @} */ - /** +/** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Include/stm32f334x8.h b/Include/stm32f334x8.h index 7ca2a90..3567930 100644 --- a/Include/stm32f334x8.h +++ b/Include/stm32f334x8.h
@@ -12,13 +12,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -424,7 +423,7 @@ { __IO uint32_t MCR; /*!< HRTIM Master Timer control register, Address offset: 0x00 */ __IO uint32_t MISR; /*!< HRTIM Master Timer interrupt status register, Address offset: 0x04 */ - __IO uint32_t MICR; /*!< HRTIM Master Timer interupt clear register, Address offset: 0x08 */ + __IO uint32_t MICR; /*!< HRTIM Master Timer interrupt clear register, Address offset: 0x08 */ __IO uint32_t MDIER; /*!< HRTIM Master Timer DMA/interrupt enable register Address offset: 0x0C */ __IO uint32_t MCNTR; /*!< HRTIM Master Timer counter register, Address offset: 0x10 */ __IO uint32_t MPER; /*!< HRTIM Master Timer period register, Address offset: 0x14 */ @@ -732,6 +731,10 @@ __IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */ } WWDG_TypeDef; +/** + * @} + */ + /** @addtogroup Peripheral_memory_map * @{ */ @@ -924,7 +927,7 @@ #define ADC5_V1_1 /*!< ADC IP version */ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define ADC_MULTIMODE_SUPPORT /*!< ADC feature available only on specific devices: multimode available on devices with several ADC instances */ @@ -1061,7 +1064,7 @@ #define ADC_CFGR_ALIGN_Pos (5U) #define ADC_CFGR_ALIGN_Msk (0x1UL << ADC_CFGR_ALIGN_Pos) /*!< 0x00000020 */ -#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignement */ +#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignment */ #define ADC_CFGR_EXTSEL_Pos (6U) #define ADC_CFGR_EXTSEL_Msk (0xFUL << ADC_CFGR_EXTSEL_Pos) /*!< 0x000003C0 */ @@ -2480,7 +2483,7 @@ #define OPAMP2_CSR_TSTREF OPAMP2_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP2_CSR_OUTCAL_Pos (30U) #define OPAMP2_CSR_OUTCAL_Msk (0x1UL << OPAMP2_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP2_CSR_LOCK_Pos (31U) #define OPAMP2_CSR_LOCK_Msk (0x1UL << OPAMP2_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP2_CSR_LOCK OPAMP2_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2542,7 +2545,7 @@ #define OPAMP_CSR_TSTREF OPAMP_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP_CSR_OUTCAL_Pos (30U) #define OPAMP_CSR_OUTCAL_Msk (0x1UL << OPAMP_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP_CSR_LOCK_Pos (31U) #define OPAMP_CSR_LOCK_Msk (0x1UL << OPAMP_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP_CSR_LOCK OPAMP_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -6073,7 +6076,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define DAC_CHANNEL2_SUPPORT /*!< DAC feature available only on specific devices: DAC channel 2 available (may not be available on all DAC instances DACx) */ @@ -8160,7 +8163,7 @@ #define HRTIM_MCR_DACSYNC_Pos (25U) #define HRTIM_MCR_DACSYNC_Msk (0x3UL << HRTIM_MCR_DACSYNC_Pos) /*!< 0x06000000 */ -#define HRTIM_MCR_DACSYNC HRTIM_MCR_DACSYNC_Msk /*!< DAC sychronization mask */ +#define HRTIM_MCR_DACSYNC HRTIM_MCR_DACSYNC_Msk /*!< DAC synchronization mask */ #define HRTIM_MCR_DACSYNC_0 (0x1UL << HRTIM_MCR_DACSYNC_Pos) /*!< 0x02000000 */ #define HRTIM_MCR_DACSYNC_1 (0x2UL << HRTIM_MCR_DACSYNC_Pos) /*!< 0x04000000 */ @@ -8374,7 +8377,7 @@ #define HRTIM_TIMCR_DACSYNC_Pos (25U) #define HRTIM_TIMCR_DACSYNC_Msk (0x3UL << HRTIM_TIMCR_DACSYNC_Pos) /*!< 0x06000000 */ -#define HRTIM_TIMCR_DACSYNC HRTIM_TIMCR_DACSYNC_Msk /*!< DAC sychronization mask */ +#define HRTIM_TIMCR_DACSYNC HRTIM_TIMCR_DACSYNC_Msk /*!< DAC synchronization mask */ #define HRTIM_TIMCR_DACSYNC_0 (0x1UL << HRTIM_TIMCR_DACSYNC_Pos) /*!< 0x02000000 */ #define HRTIM_TIMCR_DACSYNC_1 (0x2UL << HRTIM_TIMCR_DACSYNC_Pos) /*!< 0x04000000 */ #define HRTIM_TIMCR_PREEN_Pos (27U) @@ -10038,7 +10041,7 @@ /**** Bit definition for Common HRTIM Timer Burst mode control register ********/ #define HRTIM_BMCR_BME_Pos (0U) #define HRTIM_BMCR_BME_Msk (0x1UL << HRTIM_BMCR_BME_Pos) /*!< 0x00000001 */ -#define HRTIM_BMCR_BME HRTIM_BMCR_BME_Msk /*!< Burst mode enbale */ +#define HRTIM_BMCR_BME HRTIM_BMCR_BME_Msk /*!< Burst mode enable */ #define HRTIM_BMCR_BMOM_Pos (1U) #define HRTIM_BMCR_BMOM_Msk (0x1UL << HRTIM_BMCR_BMOM_Pos) /*!< 0x00000002 */ #define HRTIM_BMCR_BMOM HRTIM_BMCR_BMOM_Msk /*!< Burst mode operating mode */ @@ -11396,7 +11399,7 @@ /* */ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /******************** Bit definition for RCC_CR register ********************/ @@ -12025,7 +12028,7 @@ /* */ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define RTC_TAMPER1_SUPPORT /*!< TAMPER 1 feature support */ #define RTC_TAMPER2_SUPPORT /*!< TAMPER 2 feature support */ @@ -12632,7 +12635,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /* Note: No specific macro feature on this device */ @@ -13083,7 +13086,7 @@ #define SYSCFG_CFGR2_PVD_LOCK SYSCFG_CFGR2_PVD_LOCK_Msk /*!< Enables and locks the PVD connection with TIMx Break Input, as well as the PVDE and PLS[2:0] in the PWR_CR register */ #define SYSCFG_CFGR2_BYP_ADDR_PAR_Pos (4U) #define SYSCFG_CFGR2_BYP_ADDR_PAR_Msk (0x1UL << SYSCFG_CFGR2_BYP_ADDR_PAR_Pos) /*!< 0x00000010 */ -#define SYSCFG_CFGR2_BYP_ADDR_PAR SYSCFG_CFGR2_BYP_ADDR_PAR_Msk /*!< Disables the adddress parity check on RAM */ +#define SYSCFG_CFGR2_BYP_ADDR_PAR SYSCFG_CFGR2_BYP_ADDR_PAR_Msk /*!< Disables the address parity check on RAM */ #define SYSCFG_CFGR2_SRAM_PE_Pos (8U) #define SYSCFG_CFGR2_SRAM_PE_Msk (0x1UL << SYSCFG_CFGR2_SRAM_PE_Pos) /*!< 0x00000100 */ #define SYSCFG_CFGR2_SRAM_PE SYSCFG_CFGR2_SRAM_PE_Msk /*!< SRAM Parity error flag */ @@ -14357,7 +14360,7 @@ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /* Support of 7 bits data length feature */ @@ -15270,8 +15273,6 @@ * @} */ - /** +/** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Include/stm32f358xx.h b/Include/stm32f358xx.h index 13f503e..d5d218e 100644 --- a/Include/stm32f358xx.h +++ b/Include/stm32f358xx.h
@@ -12,13 +12,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -648,6 +647,10 @@ __IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */ } WWDG_TypeDef; +/** + * @} + */ + /** @addtogroup Peripheral_memory_map * @{ */ @@ -880,7 +883,7 @@ #define ADC5_V1_1 /*!< ADC IP version */ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define ADC_MULTIMODE_SUPPORT /*!< ADC feature available only on specific devices: multimode available on devices with several ADC instances */ @@ -1017,7 +1020,7 @@ #define ADC_CFGR_ALIGN_Pos (5U) #define ADC_CFGR_ALIGN_Msk (0x1UL << ADC_CFGR_ALIGN_Pos) /*!< 0x00000020 */ -#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignement */ +#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignment */ #define ADC_CFGR_EXTSEL_Pos (6U) #define ADC_CFGR_EXTSEL_Msk (0xFUL << ADC_CFGR_EXTSEL_Pos) /*!< 0x000003C0 */ @@ -2769,7 +2772,7 @@ #define OPAMP1_CSR_TSTREF OPAMP1_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP1_CSR_OUTCAL_Pos (30U) #define OPAMP1_CSR_OUTCAL_Msk (0x1UL << OPAMP1_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP1_CSR_OUTCAL OPAMP1_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP1_CSR_OUTCAL OPAMP1_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP1_CSR_LOCK_Pos (31U) #define OPAMP1_CSR_LOCK_Msk (0x1UL << OPAMP1_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP1_CSR_LOCK OPAMP1_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2831,7 +2834,7 @@ #define OPAMP2_CSR_TSTREF OPAMP2_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP2_CSR_OUTCAL_Pos (30U) #define OPAMP2_CSR_OUTCAL_Msk (0x1UL << OPAMP2_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP2_CSR_LOCK_Pos (31U) #define OPAMP2_CSR_LOCK_Msk (0x1UL << OPAMP2_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP2_CSR_LOCK OPAMP2_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2893,7 +2896,7 @@ #define OPAMP3_CSR_TSTREF OPAMP3_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP3_CSR_OUTCAL_Pos (30U) #define OPAMP3_CSR_OUTCAL_Msk (0x1UL << OPAMP3_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP3_CSR_OUTCAL OPAMP3_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP3_CSR_OUTCAL OPAMP3_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP3_CSR_LOCK_Pos (31U) #define OPAMP3_CSR_LOCK_Msk (0x1UL << OPAMP3_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP3_CSR_LOCK OPAMP3_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2955,7 +2958,7 @@ #define OPAMP4_CSR_TSTREF OPAMP4_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP4_CSR_OUTCAL_Pos (30U) #define OPAMP4_CSR_OUTCAL_Msk (0x1UL << OPAMP4_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP4_CSR_OUTCAL OPAMP4_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP4_CSR_OUTCAL OPAMP4_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP4_CSR_LOCK_Pos (31U) #define OPAMP4_CSR_LOCK_Msk (0x1UL << OPAMP4_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP4_CSR_LOCK OPAMP4_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -3017,7 +3020,7 @@ #define OPAMP_CSR_TSTREF OPAMP_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP_CSR_OUTCAL_Pos (30U) #define OPAMP_CSR_OUTCAL_Msk (0x1UL << OPAMP_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP_CSR_LOCK_Pos (31U) #define OPAMP_CSR_LOCK_Msk (0x1UL << OPAMP_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP_CSR_LOCK OPAMP_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -6548,7 +6551,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define DAC_CHANNEL2_SUPPORT /*!< DAC feature available only on specific devices: DAC channel 2 available (may not be available on all DAC instances DACx) */ @@ -9788,7 +9791,7 @@ /* */ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define RTC_TAMPER1_SUPPORT /*!< TAMPER 1 feature support */ #define RTC_TAMPER2_SUPPORT /*!< TAMPER 2 feature support */ @@ -10460,7 +10463,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define SPI_I2S_SUPPORT /*!< I2S support */ #define SPI_I2S_FULLDUPLEX_SUPPORT /*!< I2S Full-Duplex support */ @@ -10976,7 +10979,7 @@ #define SYSCFG_CFGR2_SRAM_PARITY_LOCK SYSCFG_CFGR2_SRAM_PARITY_LOCK_Msk /*!< Enables and locks the SRAM_PARITY error signal with Break Input of TIMx */ #define SYSCFG_CFGR2_BYP_ADDR_PAR_Pos (4U) #define SYSCFG_CFGR2_BYP_ADDR_PAR_Msk (0x1UL << SYSCFG_CFGR2_BYP_ADDR_PAR_Pos) /*!< 0x00000010 */ -#define SYSCFG_CFGR2_BYP_ADDR_PAR SYSCFG_CFGR2_BYP_ADDR_PAR_Msk /*!< Disables the adddress parity check on RAM */ +#define SYSCFG_CFGR2_BYP_ADDR_PAR SYSCFG_CFGR2_BYP_ADDR_PAR_Msk /*!< Disables the address parity check on RAM */ #define SYSCFG_CFGR2_SRAM_PE_Pos (8U) #define SYSCFG_CFGR2_SRAM_PE_Msk (0x1UL << SYSCFG_CFGR2_SRAM_PE_Pos) /*!< 0x00000100 */ #define SYSCFG_CFGR2_SRAM_PE SYSCFG_CFGR2_SRAM_PE_Msk /*!< SRAM Parity error flag */ @@ -11609,11 +11612,11 @@ #define TIM_DMAR_DMAB TIM_DMAR_DMAB_Msk /*!<DMA register for burst accesses */ /******************* Bit definition for TIM16_OR register *********************/ -#define TIM16_OR_TI1_RMP_Pos (6U) -#define TIM16_OR_TI1_RMP_Msk (0x3UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x000000C0 */ +#define TIM16_OR_TI1_RMP_Pos (0U) +#define TIM16_OR_TI1_RMP_Msk (0x3UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000003 */ #define TIM16_OR_TI1_RMP TIM16_OR_TI1_RMP_Msk /*!<TI1_RMP[1:0] bits (TIM16 Input 1 remap) */ -#define TIM16_OR_TI1_RMP_0 (0x1UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000040 */ -#define TIM16_OR_TI1_RMP_1 (0x2UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000080 */ +#define TIM16_OR_TI1_RMP_0 (0x1UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000001 */ +#define TIM16_OR_TI1_RMP_1 (0x2UL << TIM16_OR_TI1_RMP_Pos) /*!< 0x00000002 */ /******************* Bit definition for TIM1_OR register *********************/ #define TIM1_OR_ETR_RMP_Pos (0U) @@ -13244,8 +13247,6 @@ * @} */ - /** +/** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Include/stm32f373xc.h b/Include/stm32f373xc.h index 4a95fb5..b590cf1 100644 --- a/Include/stm32f373xc.h +++ b/Include/stm32f373xc.h
@@ -12,13 +12,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -713,6 +712,10 @@ __IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */ } WWDG_TypeDef; +/** + * @} + */ + /** @addtogroup Peripheral_memory_map * @{ */ @@ -918,7 +921,7 @@ #define ADC1_V2_5 /*!< ADC IP version */ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /* Note: No specific macro feature on this device */ @@ -5030,7 +5033,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define DAC_CHANNEL2_SUPPORT /*!< DAC feature available only on specific devices: DAC channel 2 available (may not be available on all DAC instances DACx) */ @@ -8295,7 +8298,7 @@ /* */ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define RTC_TAMPER1_SUPPORT /*!< TAMPER 1 feature support */ #define RTC_TAMPER2_SUPPORT /*!< TAMPER 2 feature support */ @@ -9349,7 +9352,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define SPI_I2S_SUPPORT /*!< I2S support */ @@ -12023,8 +12026,6 @@ * @} */ - /** +/** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Include/stm32f378xx.h b/Include/stm32f378xx.h index 0dbb462..300c124 100644 --- a/Include/stm32f378xx.h +++ b/Include/stm32f378xx.h
@@ -12,13 +12,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -675,6 +674,10 @@ __IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */ } WWDG_TypeDef; +/** + * @} + */ + /** @addtogroup Peripheral_memory_map * @{ */ @@ -877,7 +880,7 @@ #define ADC1_V2_5 /*!< ADC IP version */ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /* Note: No specific macro feature on this device */ @@ -4989,7 +4992,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define DAC_CHANNEL2_SUPPORT /*!< DAC feature available only on specific devices: DAC channel 2 available (may not be available on all DAC instances DACx) */ @@ -8196,7 +8199,7 @@ /* */ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define RTC_TAMPER1_SUPPORT /*!< TAMPER 1 feature support */ #define RTC_TAMPER2_SUPPORT /*!< TAMPER 2 feature support */ @@ -9250,7 +9253,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define SPI_I2S_SUPPORT /*!< I2S support */ @@ -11799,8 +11802,6 @@ * @} */ - /** +/** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Include/stm32f398xx.h b/Include/stm32f398xx.h index dc90a89..dbde83f 100644 --- a/Include/stm32f398xx.h +++ b/Include/stm32f398xx.h
@@ -12,13 +12,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -723,6 +722,10 @@ __IO uint32_t SR; /*!< WWDG Status register, Address offset: 0x08 */ } WWDG_TypeDef; +/** + * @} + */ + /** @addtogroup Peripheral_memory_map * @{ */ @@ -989,7 +992,7 @@ #define ADC5_V1_1 /*!< ADC IP version */ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define ADC_MULTIMODE_SUPPORT /*!< ADC feature available only on specific devices: multimode available on devices with several ADC instances */ @@ -1126,7 +1129,7 @@ #define ADC_CFGR_ALIGN_Pos (5U) #define ADC_CFGR_ALIGN_Msk (0x1UL << ADC_CFGR_ALIGN_Pos) /*!< 0x00000020 */ -#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignement */ +#define ADC_CFGR_ALIGN ADC_CFGR_ALIGN_Msk /*!< ADC data alignment */ #define ADC_CFGR_EXTSEL_Pos (6U) #define ADC_CFGR_EXTSEL_Msk (0xFUL << ADC_CFGR_EXTSEL_Pos) /*!< 0x000003C0 */ @@ -2765,7 +2768,7 @@ #define OPAMP1_CSR_TSTREF OPAMP1_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP1_CSR_OUTCAL_Pos (30U) #define OPAMP1_CSR_OUTCAL_Msk (0x1UL << OPAMP1_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP1_CSR_OUTCAL OPAMP1_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP1_CSR_OUTCAL OPAMP1_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP1_CSR_LOCK_Pos (31U) #define OPAMP1_CSR_LOCK_Msk (0x1UL << OPAMP1_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP1_CSR_LOCK OPAMP1_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2827,7 +2830,7 @@ #define OPAMP2_CSR_TSTREF OPAMP2_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP2_CSR_OUTCAL_Pos (30U) #define OPAMP2_CSR_OUTCAL_Msk (0x1UL << OPAMP2_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP2_CSR_OUTCAL OPAMP2_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP2_CSR_LOCK_Pos (31U) #define OPAMP2_CSR_LOCK_Msk (0x1UL << OPAMP2_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP2_CSR_LOCK OPAMP2_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2889,7 +2892,7 @@ #define OPAMP3_CSR_TSTREF OPAMP3_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP3_CSR_OUTCAL_Pos (30U) #define OPAMP3_CSR_OUTCAL_Msk (0x1UL << OPAMP3_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP3_CSR_OUTCAL OPAMP3_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP3_CSR_OUTCAL OPAMP3_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP3_CSR_LOCK_Pos (31U) #define OPAMP3_CSR_LOCK_Msk (0x1UL << OPAMP3_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP3_CSR_LOCK OPAMP3_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -2951,7 +2954,7 @@ #define OPAMP4_CSR_TSTREF OPAMP4_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP4_CSR_OUTCAL_Pos (30U) #define OPAMP4_CSR_OUTCAL_Msk (0x1UL << OPAMP4_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP4_CSR_OUTCAL OPAMP4_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP4_CSR_OUTCAL OPAMP4_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP4_CSR_LOCK_Pos (31U) #define OPAMP4_CSR_LOCK_Msk (0x1UL << OPAMP4_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP4_CSR_LOCK OPAMP4_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -3013,7 +3016,7 @@ #define OPAMP_CSR_TSTREF OPAMP_CSR_TSTREF_Msk /*!< It enables the switch to put out the internal reference */ #define OPAMP_CSR_OUTCAL_Pos (30U) #define OPAMP_CSR_OUTCAL_Msk (0x1UL << OPAMP_CSR_OUTCAL_Pos) /*!< 0x40000000 */ -#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP ouput status flag */ +#define OPAMP_CSR_OUTCAL OPAMP_CSR_OUTCAL_Msk /*!< OPAMP output status flag */ #define OPAMP_CSR_LOCK_Pos (31U) #define OPAMP_CSR_LOCK_Msk (0x1UL << OPAMP_CSR_LOCK_Pos) /*!< 0x80000000 */ #define OPAMP_CSR_LOCK OPAMP_CSR_LOCK_Msk /*!< OPAMP lock */ @@ -6544,7 +6547,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define DAC_CHANNEL2_SUPPORT /*!< DAC feature available only on specific devices: DAC channel 2 available (may not be available on all DAC instances DACx) */ @@ -8340,7 +8343,7 @@ #define FMC_BCR1_CBURSTRW FMC_BCR1_CBURSTRW_Msk /*!<Write burst enable */ #define FMC_BCR1_CCLKEN_Pos (20U) #define FMC_BCR1_CCLKEN_Msk (0x1UL << FMC_BCR1_CCLKEN_Pos) /*!< 0x00100000 */ -#define FMC_BCR1_CCLKEN FMC_BCR1_CCLKEN_Msk /*!<Continous clock enable */ +#define FMC_BCR1_CCLKEN FMC_BCR1_CCLKEN_Msk /*!<Continuous clock enable */ /****************** Bit definition for FMC_BCR2 register *******************/ #define FMC_BCR2_MBKEN_Pos (0U) @@ -10611,7 +10614,7 @@ /* */ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define RCC_PLLSRC_PREDIV1_SUPPORT /*!< PREDIV support used as PLL source input */ @@ -11455,7 +11458,7 @@ /* */ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define RTC_TAMPER1_SUPPORT /*!< TAMPER 1 feature support */ #define RTC_TAMPER2_SUPPORT /*!< TAMPER 2 feature support */ @@ -12127,7 +12130,7 @@ /******************************************************************************/ /* - * @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) + * @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ #define SPI_I2S_SUPPORT /*!< I2S support */ #define SPI_I2S_FULLDUPLEX_SUPPORT /*!< I2S Full-Duplex support */ @@ -12695,7 +12698,7 @@ #define SYSCFG_CFGR2_SRAM_PARITY_LOCK SYSCFG_CFGR2_SRAM_PARITY_LOCK_Msk /*!< Enables and locks the SRAM_PARITY error signal with Break Input of TIMx */ #define SYSCFG_CFGR2_BYP_ADDR_PAR_Pos (4U) #define SYSCFG_CFGR2_BYP_ADDR_PAR_Msk (0x1UL << SYSCFG_CFGR2_BYP_ADDR_PAR_Pos) /*!< 0x00000010 */ -#define SYSCFG_CFGR2_BYP_ADDR_PAR SYSCFG_CFGR2_BYP_ADDR_PAR_Msk /*!< Disables the adddress parity check on RAM */ +#define SYSCFG_CFGR2_BYP_ADDR_PAR SYSCFG_CFGR2_BYP_ADDR_PAR_Msk /*!< Disables the address parity check on RAM */ #define SYSCFG_CFGR2_SRAM_PE_Pos (8U) #define SYSCFG_CFGR2_SRAM_PE_Msk (0x1UL << SYSCFG_CFGR2_SRAM_PE_Pos) /*!< 0x00000100 */ #define SYSCFG_CFGR2_SRAM_PE SYSCFG_CFGR2_SRAM_PE_Msk /*!< SRAM Parity error flag */ @@ -13991,7 +13994,7 @@ /******************************************************************************/ /* -* @brief Specific device feature definitions (not present on all devices in the STM32F3 serie) +* @brief Specific device feature definitions (not present on all devices in the STM32F3 series) */ /* Support of 7 bits data length feature */ @@ -15087,8 +15090,6 @@ * @} */ - /** +/** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Include/stm32f3xx.h b/Include/stm32f3xx.h index ec4dca5..536018a 100644 --- a/Include/stm32f3xx.h +++ b/Include/stm32f3xx.h
@@ -8,21 +8,20 @@ * is using in the C source code, usually in main.c. This file contains: * - Configuration section that allows to select: * - The STM32F3xx device used in the target application - * - To use or not the peripheralÂ’s drivers in application code(i.e. - * code will be based on direct access to peripheralÂ’s registers + * - To use or not the peripheral's drivers in application code(i.e. + * code will be based on direct access to peripheral's registers * rather than drivers API), this option is controlled by * "#define USE_HAL_DRIVER" * ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -103,11 +102,11 @@ #endif /* USE_HAL_DRIVER */ /** - * @brief CMSIS Device version number V2.3.6 + * @brief CMSIS Device version number V2.3.7 */ #define __STM32F3_CMSIS_VERSION_MAIN (0x02) /*!< [31:24] main version */ #define __STM32F3_CMSIS_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */ -#define __STM32F3_CMSIS_VERSION_SUB2 (0x06) /*!< [15:8] sub2 version */ +#define __STM32F3_CMSIS_VERSION_SUB2 (0x07) /*!< [15:8] sub2 version */ #define __STM32F3_CMSIS_VERSION_RC (0x00) /*!< [7:0] release candidate */ #define __STM32F3_CMSIS_VERSION ((__STM32F3_CMSIS_VERSION_MAIN << 24)\ |(__STM32F3_CMSIS_VERSION_SUB1 << 16)\ @@ -279,8 +278,3 @@ /** * @} */ - - - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/Include/system_stm32f3xx.h b/Include/system_stm32f3xx.h index 0eae2b6..454a302 100644 --- a/Include/system_stm32f3xx.h +++ b/Include/system_stm32f3xx.h
@@ -2,17 +2,16 @@ ****************************************************************************** * @file system_stm32f3xx.h * @author MCD Application Team - * @brief CMSIS Cortex-M4 Device System Source File for STM32F3xx devices. - ****************************************************************************** + * @brief CMSIS Cortex-M4 Device System Source File for STM32F3xx devices. ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + ****************************************************************************** + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -102,5 +101,4 @@ /** * @} - */ -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ + */
diff --git a/LICENSE.md b/LICENSE.md index 77fa138..4806ed9 100644 --- a/LICENSE.md +++ b/LICENSE.md
@@ -186,7 +186,7 @@ same "printed page" as the copyright notice for easier identification within third-party archives. - Copyright [2019] [STMicroelectronics] + Copyright 2017 STMicroelectronics Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License.
diff --git a/README.md b/README.md index 38b9d82..9c30521 100644 --- a/README.md +++ b/README.md
@@ -27,14 +27,7 @@ ## Compatibility information -In this table, you can find the successive versions of this CMSIS Device component, in-line with the corresponding versions of the full MCU package: - -CMSIS Device F3 | CMSIS Core | Was delivered in the full MCU package ---------------- | ---------- | ------------------------------------- -Tag v2.3.4 | Tag v5.4.0_cm4 | Tag v1.11.0 -Tag v2.3.4 | Tag v5.4.0_cm4 | Tag v1.11.1 -Tag v2.3.5 | Tag v5.4.0_cm4 | Tag v1.11.2 -Tag v2.3.6 | Tag v5.4.0_cm4 | Tag v1.11.3 +It is **crucial** that you use a consistent set of versions for the CMSIS Core - CMSIS Device, as mentioned in [this](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/STM32CubeF3/blob/master/Release_Notes.html) release note. The full **STM32CubeF3** MCU package is available [here](https://github.com/STMicroelectronics/STM32CubeF3).
diff --git a/Release_Notes.html b/Release_Notes.html index 4e3f101..172a551 100644 --- a/Release_Notes.html +++ b/Release_Notes.html
@@ -29,21 +29,37 @@ </center> </div> </div> -<h1 id="license"><strong>License</strong></h1> -This software component is licensed by ST under BSD 3-Clause license, the “License”; You may not use this component except in compliance with the License. You may obtain a copy of the License at: -<center> -<a href="https://opensource.org/licenses/BSD-3-Clause">https://opensource.org/licenses/BSD-3-Clause</a> -</center> </div> <div class="col-sm-12 col-lg-8"> <h1 id="update-history"><strong>Update History</strong></h1> <div class="collapse"> -<input type="checkbox" id="collapse-section2_3_6" aria-hidden="true"> <label for="collapse-section2_3_6" aria-hidden="true"><strong>V2.3.6 / 23-July-2021</strong></label> +<input type="checkbox" id="collapse-section2_3_7" checked aria-hidden="true"> <label for="collapse-section2_3_7" aria-hidden="true"><strong>V2.3.7 / 27-January-2023</strong></label> <div> <h2 id="main-changes">Main Changes</h2> <ul> <li>General update <ul> +<li>General updates to fix known defects and implementation enhancements</li> +<li>All source files: update disclaimer to add reference to the new license agreement.</li> +</ul></li> +<li>GCC start-up files updates +<ul> +<li>Alignment with IAR/MDK-ARM startup files: Update to call SystemInit first in startup/Reset_Handler()</li> +</ul></li> +<li>STM32F301x8/STM32F302xC/STM32F303x8/STM32F318xx/STM32F328xx/STM32F358xx updates +<ul> +<li>TIM16_OR_TI1_RMP wrong defined value</li> +</ul></li> +</ul> +</div> +</div> +<div class="collapse"> +<input type="checkbox" id="collapse-section2_3_6" aria-hidden="true"> <label for="collapse-section2_3_6" aria-hidden="true"><strong>V2.3.6 / 23-July-2021</strong></label> +<div> +<h2 id="main-changes-1">Main Changes</h2> +<ul> +<li>General update +<ul> <li>Added new atomic register access macros in stm32f3xx.h file.</li> <li>Add LSI maximum startup time datasheet value: LSI_STARTUP_TIME.</li> </ul></li> @@ -61,7 +77,7 @@ <div class="collapse"> <input type="checkbox" id="collapse-section2_3_5" aria-hidden="true"> <label for="collapse-section2_3_5" aria-hidden="true"><strong>V2.3.5 / 10-November-2020</strong></label> <div> -<h2 id="main-changes-1">Main Changes</h2> +<h2 id="main-changes-2">Main Changes</h2> <ul> <li>General update <ul> @@ -79,11 +95,11 @@ <div class="collapse"> <input type="checkbox" id="collapse-section2_3_4" aria-hidden="true"> <label for="collapse-section2_3_4" aria-hidden="true"><strong>V2.3.4 / 12-September-2019</strong></label> <div> -<h2 id="main-changes-2">Main Changes</h2> +<h2 id="main-changes-3">Main Changes</h2> <ul> <li>General update <ul> -<li>Use ‘UL’ unsigned long postfix for _Msk definitions and momory/peripheral base addresses for MISRA C 2012 Compliance</li> +<li>Use ‘UL’ unsigned long postfix for _Msk definitions and memory/peripheral base addresses for MISRA C 2012 Compliance</li> <li>SystemInit(): update to don’t reset RCC registers to its reset values.</li> </ul></li> <li>STM32F334x8 update @@ -104,7 +120,7 @@ <div class="collapse"> <input type="checkbox" id="collapse-section2.3.3" aria-hidden="true"> <label for="collapse-section2.3.3" aria-hidden="true"><strong>V2.3.3 / 11-June-2018</strong></label> <div> -<h2 id="main-changes-3">Main Changes</h2> +<h2 id="main-changes-4">Main Changes</h2> <ul> <li>General update <ul> @@ -121,7 +137,7 @@ <div class="collapse"> <input type="checkbox" id="collapse-section2.3.2" aria-hidden="true"> <label for="collapse-section2.3.2" aria-hidden="true"><strong>V2.3.2 / 23-June-2017</strong></label> <div> -<h2 id="main-changes-4">Main Changes</h2> +<h2 id="main-changes-5">Main Changes</h2> <ul> <li>Remove support of Atollic TrueSTUDIO STM32 (TrueSTUDIO) toolchain.</li> <li>FLASH updates @@ -154,7 +170,7 @@ <div class="collapse"> <input type="checkbox" id="collapse-section2.3.1" aria-hidden="true"> <label for="collapse-section2.3.1" aria-hidden="true"><strong>V2.3.1 / 16-December-2016</strong></label> <div> -<h2 id="main-changes-5">Main Changes</h2> +<h2 id="main-changes-6">Main Changes</h2> <ul> <li>COMP updates <ul> @@ -167,7 +183,7 @@ <li>TIM updates <ul> <li>Added macro IS_TIM_ADVANCED_INSTANCE() to identify advanced timer instances</li> -<li>Remove TIM_CR2_OIS2N, TIM_CR2_OIS3, TIM_CR2_OIS3N and TIM_CR2_OIS4 definitions for STM32F373xC and STM32F378xx devices (alignement with STM32F3xx Reference Manual)</li> +<li>Remove TIM_CR2_OIS2N, TIM_CR2_OIS3, TIM_CR2_OIS3N and TIM_CR2_OIS4 definitions for STM32F373xC and STM32F378xx devices (alignment with STM32F3xx Reference Manual)</li> </ul></li> <li>RCC updates <ul> @@ -179,7 +195,7 @@ </ul></li> <li>USB updates <ul> -<li>compliancy with MISRA C 2004 rules: +<li>compliance with MISRA C 2004 rules: <ul> <li>MISRA C 2004 rule 10.6 (‘U’ suffix applied to all constants of ‘unsigned’ type).</li> <li>MISRA C 2004 rule 12.7 (bitwise operations not performed on signed integer types).</li> @@ -195,11 +211,11 @@ <div class="collapse"> <input type="checkbox" id="collapse-section2.3.0" aria-hidden="true"> <label for="collapse-section2.3.0" aria-hidden="true"><strong>V2.3.0 / 29-April-2016</strong></label> <div> -<h2 id="main-changes-6">Main Changes</h2> +<h2 id="main-changes-7">Main Changes</h2> <ul> <li>General updates <ul> -<li>Updated CMSIS Device compliancy with MISRA C 2004 rules: +<li>Updated CMSIS Device compliance with MISRA C 2004 rules: <ul> <li>MISRA C 2004 rule 5.1 (bitwise operators ~ and <<).</li> <li>MISRA C 2004 rule 10.6 (‘U’ suffix applied to all constants of ‘unsigned’ type).</li> @@ -274,7 +290,7 @@ <div class="collapse"> <input type="checkbox" id="collapse-section2.2.0" aria-hidden="true"> <label for="collapse-section2.2.0" aria-hidden="true"><strong>V2.2.0 / 13-November-2015</strong></label> <div> -<h2 id="main-changes-7">Main Changes</h2> +<h2 id="main-changes-8">Main Changes</h2> <ul> <li>General updates <ul> @@ -348,7 +364,7 @@ <div class="collapse"> <input type="checkbox" id="collapse-section2.1.0" aria-hidden="true"> <label for="collapse-section2.1.0" aria-hidden="true"><strong>V2.1.0 / 12-Sept-2014</strong></label> <div> -<h2 id="main-changes-8">Main Changes</h2> +<h2 id="main-changes-9">Main Changes</h2> <ul> <li>Add the support of the <strong>STM32F302xE</strong> and the <strong>STM32F398xx</strong> devices.</li> <li>STM32F303xE update @@ -358,7 +374,7 @@ <li>STM32F302xC update <ul> <li>Removed DHR12R2, DHR12L2, DHR8R2 and DOR2 from DAC registers definition</li> -<li>Removed all DAC channel 2 related constant defintions</li> +<li>Removed all DAC channel 2 related constant definitions</li> <li>Removed TIM8 related constant definitions</li> <li>Removed DAC_CHANNEL_2 from IS_DAC_CHANNEL_INSTANCE() macro</li> </ul></li> @@ -368,7 +384,7 @@ <div class="collapse"> <input type="checkbox" id="collapse-section2.1.0.RC2" aria-hidden="true"> <label for="collapse-section2.1.0.RC2" aria-hidden="true"><strong>V2.1.0.RC2 / 25-Aug-2014</strong></label> <div> -<h2 id="main-changes-9">Main Changes</h2> +<h2 id="main-changes-10">Main Changes</h2> <ul> <li>Add CMSIS files for STM32F303xE products</li> </ul> @@ -377,7 +393,7 @@ <div class="collapse"> <input type="checkbox" id="collapse-section2.0.1" aria-hidden="true"> <label for="collapse-section2.0.1" aria-hidden="true"><strong>V2.0.1 / 18-June-2014</strong></label> <div> -<h2 id="main-changes-10">Main Changes</h2> +<h2 id="main-changes-11">Main Changes</h2> <ul> <li>General <ul> @@ -434,7 +450,7 @@ <div class="collapse"> <input type="checkbox" id="collapse-section2.0.0" aria-hidden="true"> <label for="collapse-section2.0.0" aria-hidden="true"><strong>V2.0.0 / 28-May-2014</strong></label> <div> -<h2 id="main-changes-11">Main Changes</h2> +<h2 id="main-changes-12">Main Changes</h2> <ul> <li>Major update based on STM32Cube specification: new CMSIS device files release dedicated to <strong>STM32F301x6/x8, STM32F302x6/x8, STM32F302xB/xC, STM32F303x6/x8, STM32F373xB/xC, STM32F334x4/x6/x8, STM32F318xx, STM32F328xx, STM32F358xx and STM32F378xx devices .</strong></li> <li><strong>This version has to be used for STM32CubeF3 based development although files can be used independently too.</strong></li> @@ -444,7 +460,7 @@ <div class="collapse"> <input type="checkbox" id="collapse-section1.1.1" aria-hidden="true"> <label for="collapse-section1.1.1" aria-hidden="true"><strong>V1.1.1 / 28-March-2014</strong></label> <div> -<h2 id="main-changes-12">Main Changes</h2> +<h2 id="main-changes-13">Main Changes</h2> <ul> <li>Add new startup files for the STM32F302x8 and STM32F334x8 devices for TrueSTUDIO toolchain.</li> <li>Update startup files for EWARM toolchain to cope with compiler enhancement of the V7.10 version.</li> @@ -454,7 +470,7 @@ <div class="collapse"> <input type="checkbox" id="collapse-section1.1.0" aria-hidden="true"> <label for="collapse-section1.1.0" aria-hidden="true"><strong>V1.1.0 / 27-February-2014</strong></label> <div> -<h2 id="main-changes-13">Main Changes</h2> +<h2 id="main-changes-14">Main Changes</h2> <ul> <li>Add the support of the <strong>STM32F302x8</strong> and the <strong>STM32F334x8</strong> devices.</li> <li>Update devices names definition to be in line with the new new STM32F30x family devices names. @@ -470,7 +486,7 @@ <li>Update IRQn enum to support the STM32F302x8 and STM32F334x8 devices.</li> <li>Update HSE_STARTUP_TIMEOUT value.</li> <li>Update HSI_STARTUP_TIMEOUT value.</li> -<li>Add HRTIM peripheral registers and bits definitons.</li> +<li>Add HRTIM peripheral registers and bits definitions.</li> <li>Add CFGR3 registers in the SYSCFG_TypeDef structure.</li> <li>Update peripheral base addresses to support the added peripherals: DAC2, I2C3, HRTIM.</li> <li>Update ADC_SQR4 register bit definition.</li> @@ -487,7 +503,7 @@ <div class="collapse"> <input type="checkbox" id="collapse-section1.0.0" aria-hidden="true"> <label for="collapse-section1.0.0" aria-hidden="true"><strong>V1.0.0 / 04-September-2012</strong></label> <div> -<h2 id="main-changes-14">Main Changes</h2> +<h2 id="main-changes-15">Main Changes</h2> <ul> <li>First official release for <strong>STM32F30x devices</strong> (Standard Library)</li> </ul>
diff --git a/Source/Templates/arm/startup_stm32f301x8.s b/Source/Templates/arm/startup_stm32f301x8.s index 9742069..9be01d4 100644 --- a/Source/Templates/arm/startup_stm32f301x8.s +++ b/Source/Templates/arm/startup_stm32f301x8.s
@@ -17,12 +17,11 @@ ;* Copyright (c) 2016 STMicroelectronics. ;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* -;****************************************************************************** +;******************************************************************************* ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs @@ -342,5 +341,3 @@ ENDIF END - -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f302x8.s b/Source/Templates/arm/startup_stm32f302x8.s index 217928b..0159d3f 100644 --- a/Source/Templates/arm/startup_stm32f302x8.s +++ b/Source/Templates/arm/startup_stm32f302x8.s
@@ -17,12 +17,11 @@ ;* Copyright (c) 2016 STMicroelectronics. ;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* -;****************************************************************************** +;******************************************************************************* ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs @@ -358,5 +357,3 @@ ENDIF END - -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f302xc.s b/Source/Templates/arm/startup_stm32f302xc.s index 267bbc2..89f4842 100644 --- a/Source/Templates/arm/startup_stm32f302xc.s +++ b/Source/Templates/arm/startup_stm32f302xc.s
@@ -17,12 +17,11 @@ ;* Copyright (c) 2016 STMicroelectronics. ;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* -;****************************************************************************** +;******************************************************************************* ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs @@ -374,5 +373,3 @@ ENDIF END - -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f302xe.s b/Source/Templates/arm/startup_stm32f302xe.s index 78cc744..e049772 100644 --- a/Source/Templates/arm/startup_stm32f302xe.s +++ b/Source/Templates/arm/startup_stm32f302xe.s
@@ -17,12 +17,11 @@ ;* Copyright (c) 2016 STMicroelectronics. ;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* -;****************************************************************************** +;******************************************************************************* ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs @@ -393,5 +392,3 @@ ENDIF END - -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f303x8.s b/Source/Templates/arm/startup_stm32f303x8.s index 360b8fa..df18909 100644 --- a/Source/Templates/arm/startup_stm32f303x8.s +++ b/Source/Templates/arm/startup_stm32f303x8.s
@@ -17,12 +17,11 @@ ;* Copyright (c) 2016 STMicroelectronics. ;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* -;****************************************************************************** +;******************************************************************************* ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs @@ -344,5 +343,3 @@ ENDIF END - -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f303xc.s b/Source/Templates/arm/startup_stm32f303xc.s index 4f9ff3f..7d1adbe 100644 --- a/Source/Templates/arm/startup_stm32f303xc.s +++ b/Source/Templates/arm/startup_stm32f303xc.s
@@ -17,12 +17,11 @@ ;* Copyright (c) 2016 STMicroelectronics. ;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* -;****************************************************************************** +;******************************************************************************* ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs @@ -390,5 +389,3 @@ ENDIF END - -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f303xe.s b/Source/Templates/arm/startup_stm32f303xe.s index 6f18e2f..3bee9e1 100644 --- a/Source/Templates/arm/startup_stm32f303xe.s +++ b/Source/Templates/arm/startup_stm32f303xe.s
@@ -17,12 +17,11 @@ ;* Copyright (c) 2016 STMicroelectronics. ;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* -;****************************************************************************** +;******************************************************************************* ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs @@ -409,5 +408,3 @@ ENDIF END - -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f318xx.s b/Source/Templates/arm/startup_stm32f318xx.s index 5b607a1..7eb3ece 100644 --- a/Source/Templates/arm/startup_stm32f318xx.s +++ b/Source/Templates/arm/startup_stm32f318xx.s
@@ -17,12 +17,11 @@ ;* Copyright (c) 2016 STMicroelectronics. ;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* -;****************************************************************************** +;******************************************************************************* ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs @@ -340,5 +339,3 @@ ENDIF END - -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f328xx.s b/Source/Templates/arm/startup_stm32f328xx.s index 74ca364..3758cb0 100644 --- a/Source/Templates/arm/startup_stm32f328xx.s +++ b/Source/Templates/arm/startup_stm32f328xx.s
@@ -17,12 +17,11 @@ ;* Copyright (c) 2016 STMicroelectronics. ;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* -;****************************************************************************** +;******************************************************************************* ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs @@ -342,5 +341,3 @@ ENDIF END - -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f334x8.s b/Source/Templates/arm/startup_stm32f334x8.s index fc52e6b..4e40ae9 100644 --- a/Source/Templates/arm/startup_stm32f334x8.s +++ b/Source/Templates/arm/startup_stm32f334x8.s
@@ -17,12 +17,11 @@ ;* Copyright (c) 2016 STMicroelectronics. ;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* -;****************************************************************************** +;******************************************************************************* ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs @@ -358,5 +357,3 @@ ENDIF END - -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f358xx.s b/Source/Templates/arm/startup_stm32f358xx.s index ac982d4..74f6c48 100644 --- a/Source/Templates/arm/startup_stm32f358xx.s +++ b/Source/Templates/arm/startup_stm32f358xx.s
@@ -17,12 +17,11 @@ ;* Copyright (c) 2016 STMicroelectronics. ;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* -;****************************************************************************** +;******************************************************************************* ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs @@ -381,5 +380,3 @@ ENDIF END - -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f373xc.s b/Source/Templates/arm/startup_stm32f373xc.s index 18cdca1..ad9fbe3 100644 --- a/Source/Templates/arm/startup_stm32f373xc.s +++ b/Source/Templates/arm/startup_stm32f373xc.s
@@ -17,12 +17,11 @@ ;* Copyright (c) 2016 STMicroelectronics. ;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* -;****************************************************************************** +;******************************************************************************* ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs @@ -386,5 +385,3 @@ ENDIF END - -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f378xx.s b/Source/Templates/arm/startup_stm32f378xx.s index dd2ab34..3c821d5 100644 --- a/Source/Templates/arm/startup_stm32f378xx.s +++ b/Source/Templates/arm/startup_stm32f378xx.s
@@ -17,12 +17,11 @@ ;* Copyright (c) 2016 STMicroelectronics. ;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* -;****************************************************************************** +;******************************************************************************* ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs @@ -378,5 +377,3 @@ ENDIF END - -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/arm/startup_stm32f398xx.s b/Source/Templates/arm/startup_stm32f398xx.s index 9160ce2..696df4c 100644 --- a/Source/Templates/arm/startup_stm32f398xx.s +++ b/Source/Templates/arm/startup_stm32f398xx.s
@@ -17,12 +17,11 @@ ;* Copyright (c) 2016 STMicroelectronics. ;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* -;****************************************************************************** +;******************************************************************************* ; Amount of memory (in bytes) allocated for Stack ; Tailor this value to your application needs @@ -400,5 +399,3 @@ ENDIF END - -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****
diff --git a/Source/Templates/gcc/startup_stm32f301x8.s b/Source/Templates/gcc/startup_stm32f301x8.s index ea47932..b6be88d 100644 --- a/Source/Templates/gcc/startup_stm32f301x8.s +++ b/Source/Templates/gcc/startup_stm32f301x8.s
@@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -61,6 +60,9 @@ .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Call the clock system initialization function.*/ + bl SystemInit /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata @@ -93,8 +95,6 @@ cmp r2, r4 bcc FillZerobss -/* Call the clock system intitialization function.*/ - bl SystemInit /* Call static constructors */ bl __libc_init_array /* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32f302x8.s b/Source/Templates/gcc/startup_stm32f302x8.s index 06ce014..327d46b 100644 --- a/Source/Templates/gcc/startup_stm32f302x8.s +++ b/Source/Templates/gcc/startup_stm32f302x8.s
@@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -61,6 +60,9 @@ .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Call the clock system initialization function.*/ + bl SystemInit /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata @@ -93,8 +95,6 @@ cmp r2, r4 bcc FillZerobss -/* Call the clock system intitialization function.*/ - bl SystemInit /* Call static constructors */ bl __libc_init_array /* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32f302xc.s b/Source/Templates/gcc/startup_stm32f302xc.s index a125887..b57b511 100644 --- a/Source/Templates/gcc/startup_stm32f302xc.s +++ b/Source/Templates/gcc/startup_stm32f302xc.s
@@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -61,6 +60,9 @@ .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Call the clock system initialization function.*/ + bl SystemInit /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata @@ -93,8 +95,6 @@ cmp r2, r4 bcc FillZerobss -/* Call the clock system intitialization function.*/ - bl SystemInit /* Call static constructors */ bl __libc_init_array /* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32f302xe.s b/Source/Templates/gcc/startup_stm32f302xe.s index f3ec882..996489f 100644 --- a/Source/Templates/gcc/startup_stm32f302xe.s +++ b/Source/Templates/gcc/startup_stm32f302xe.s
@@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -62,6 +61,9 @@ Reset_Handler: ldr sp, =_estack /* Atollic update: set stack pointer */ +/* Call the clock system initialization function.*/ + bl SystemInit + /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata ldr r1, =_edata @@ -93,8 +95,6 @@ cmp r2, r4 bcc FillZerobss -/* Call the clock system intitialization function.*/ - bl SystemInit /* Call static constructors */ bl __libc_init_array /* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32f303x8.s b/Source/Templates/gcc/startup_stm32f303x8.s index de00a3d..a66407a 100644 --- a/Source/Templates/gcc/startup_stm32f303x8.s +++ b/Source/Templates/gcc/startup_stm32f303x8.s
@@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -61,6 +60,9 @@ .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Call the clock system initialization function.*/ + bl SystemInit /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata @@ -93,8 +95,6 @@ cmp r2, r4 bcc FillZerobss -/* Call the clock system intitialization function.*/ - bl SystemInit /* Call static constructors */ bl __libc_init_array /* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32f303xc.s b/Source/Templates/gcc/startup_stm32f303xc.s index 7a6ff6e..a00935e 100644 --- a/Source/Templates/gcc/startup_stm32f303xc.s +++ b/Source/Templates/gcc/startup_stm32f303xc.s
@@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -61,6 +60,9 @@ .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Call the clock system initialization function.*/ + bl SystemInit /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata @@ -93,8 +95,6 @@ cmp r2, r4 bcc FillZerobss -/* Call the clock system intitialization function.*/ - bl SystemInit /* Call static constructors */ bl __libc_init_array /* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32f303xe.s b/Source/Templates/gcc/startup_stm32f303xe.s index 26d41cb..554d3ab 100644 --- a/Source/Templates/gcc/startup_stm32f303xe.s +++ b/Source/Templates/gcc/startup_stm32f303xe.s
@@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -61,6 +60,9 @@ .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Call the clock system initialization function.*/ + bl SystemInit /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata @@ -93,8 +95,6 @@ cmp r2, r4 bcc FillZerobss -/* Call the clock system intitialization function.*/ - bl SystemInit /* Call static constructors */ bl __libc_init_array /* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32f318xx.s b/Source/Templates/gcc/startup_stm32f318xx.s index 871320c..d4ac330 100644 --- a/Source/Templates/gcc/startup_stm32f318xx.s +++ b/Source/Templates/gcc/startup_stm32f318xx.s
@@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -61,6 +60,9 @@ .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Call the clock system initialization function.*/ + bl SystemInit /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata @@ -93,8 +95,6 @@ cmp r2, r4 bcc FillZerobss -/* Call the clock system intitialization function.*/ - bl SystemInit /* Call static constructors */ bl __libc_init_array /* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32f328xx.s b/Source/Templates/gcc/startup_stm32f328xx.s index ad60ca3..d12e058 100644 --- a/Source/Templates/gcc/startup_stm32f328xx.s +++ b/Source/Templates/gcc/startup_stm32f328xx.s
@@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -61,6 +60,9 @@ .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Call the clock system initialization function.*/ + bl SystemInit /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata @@ -93,8 +95,6 @@ cmp r2, r4 bcc FillZerobss -/* Call the clock system intitialization function.*/ - bl SystemInit /* Call static constructors */ bl __libc_init_array /* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32f334x8.s b/Source/Templates/gcc/startup_stm32f334x8.s index 56bc56c..0846f01 100644 --- a/Source/Templates/gcc/startup_stm32f334x8.s +++ b/Source/Templates/gcc/startup_stm32f334x8.s
@@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -61,6 +60,9 @@ .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Call the clock system initialization function.*/ + bl SystemInit /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata @@ -93,8 +95,6 @@ cmp r2, r4 bcc FillZerobss -/* Call the clock system intitialization function.*/ - bl SystemInit /* Call static constructors */ bl __libc_init_array /* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32f358xx.s b/Source/Templates/gcc/startup_stm32f358xx.s index f4d68f9..b8817fd 100644 --- a/Source/Templates/gcc/startup_stm32f358xx.s +++ b/Source/Templates/gcc/startup_stm32f358xx.s
@@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -62,6 +61,9 @@ Reset_Handler: ldr sp, =_estack /* Atollic update: set stack pointer */ +/* Call the clock system initialization function.*/ + bl SystemInit + /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata ldr r1, =_edata @@ -93,8 +95,6 @@ cmp r2, r4 bcc FillZerobss -/* Call the clock system intitialization function.*/ - bl SystemInit /* Call static constructors */ bl __libc_init_array /* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32f373xc.s b/Source/Templates/gcc/startup_stm32f373xc.s index c2f212e..46decd4 100644 --- a/Source/Templates/gcc/startup_stm32f373xc.s +++ b/Source/Templates/gcc/startup_stm32f373xc.s
@@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -61,6 +60,9 @@ .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Call the clock system initialization function.*/ + bl SystemInit /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata @@ -93,8 +95,6 @@ cmp r2, r4 bcc FillZerobss -/* Call the clock system intitialization function.*/ - bl SystemInit /* Call static constructors */ bl __libc_init_array /* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32f378xx.s b/Source/Templates/gcc/startup_stm32f378xx.s index 0a9cb06..0060847 100644 --- a/Source/Templates/gcc/startup_stm32f378xx.s +++ b/Source/Templates/gcc/startup_stm32f378xx.s
@@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -61,6 +60,9 @@ .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Call the clock system initialization function.*/ + bl SystemInit /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata @@ -93,8 +95,6 @@ cmp r2, r4 bcc FillZerobss -/* Call the clock system intitialization function.*/ - bl SystemInit /* Call static constructors */ bl __libc_init_array /* Call the application's entry point.*/
diff --git a/Source/Templates/gcc/startup_stm32f398xx.s b/Source/Templates/gcc/startup_stm32f398xx.s index 68ec3e1..cd37f1c 100644 --- a/Source/Templates/gcc/startup_stm32f398xx.s +++ b/Source/Templates/gcc/startup_stm32f398xx.s
@@ -15,13 +15,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -61,6 +60,9 @@ .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* Atollic update: set stack pointer */ + +/* Call the clock system initialization function.*/ + bl SystemInit /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata @@ -93,8 +95,6 @@ cmp r2, r4 bcc FillZerobss -/* Call the clock system intitialization function.*/ - bl SystemInit /* Call static constructors */ bl __libc_init_array /* Call the application's entry point.*/
diff --git a/Source/Templates/iar/startup_stm32f301x8.s b/Source/Templates/iar/startup_stm32f301x8.s index eaf4134..225e29a 100644 --- a/Source/Templates/iar/startup_stm32f301x8.s +++ b/Source/Templates/iar/startup_stm32f301x8.s
@@ -14,13 +14,12 @@ ;******************************************************************************* ;* @attention ;* -;* <h2><center>© Copyright (c) 2016 STMicroelectronics. -;* All rights reserved.</center></h2> +;* Copyright (c) 2016 STMicroelectronics. +;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* ;******************************************************************************* ; @@ -424,4 +423,4 @@ B FPU_IRQHandler END -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +
diff --git a/Source/Templates/iar/startup_stm32f302x8.s b/Source/Templates/iar/startup_stm32f302x8.s index d5b49e2..8da0ccf 100644 --- a/Source/Templates/iar/startup_stm32f302x8.s +++ b/Source/Templates/iar/startup_stm32f302x8.s
@@ -14,13 +14,12 @@ ;******************************************************************************* ;* @attention ;* -;* <h2><center>© Copyright (c) 2016 STMicroelectronics. -;* All rights reserved.</center></h2> +;* Copyright (c) 2016 STMicroelectronics. +;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* ;******************************************************************************* ; @@ -464,4 +463,4 @@ B FPU_IRQHandler END -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +
diff --git a/Source/Templates/iar/startup_stm32f302xc.s b/Source/Templates/iar/startup_stm32f302xc.s index 445d310..32052b3 100644 --- a/Source/Templates/iar/startup_stm32f302xc.s +++ b/Source/Templates/iar/startup_stm32f302xc.s
@@ -14,13 +14,12 @@ ;******************************************************************************* ;* @attention ;* -;* <h2><center>© Copyright (c) 2016 STMicroelectronics. -;* All rights reserved.</center></h2> +;* Copyright (c) 2016 STMicroelectronics. +;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* ;******************************************************************************* ; @@ -504,4 +503,4 @@ B FPU_IRQHandler END -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +
diff --git a/Source/Templates/iar/startup_stm32f302xe.s b/Source/Templates/iar/startup_stm32f302xe.s index bbd45e0..65e2749 100644 --- a/Source/Templates/iar/startup_stm32f302xe.s +++ b/Source/Templates/iar/startup_stm32f302xe.s
@@ -15,13 +15,12 @@ ;******************************************************************************* ;* @attention ;* -;* <h2><center>© Copyright (c) 2016 STMicroelectronics. -;* All rights reserved.</center></h2> +;* Copyright (c) 2016 STMicroelectronics. +;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* ;******************************************************************************* ; @@ -548,4 +547,4 @@ B SPI4_IRQHandler END -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +
diff --git a/Source/Templates/iar/startup_stm32f303x8.s b/Source/Templates/iar/startup_stm32f303x8.s index 76e15f6..b0c51e0 100644 --- a/Source/Templates/iar/startup_stm32f303x8.s +++ b/Source/Templates/iar/startup_stm32f303x8.s
@@ -14,13 +14,12 @@ ;******************************************************************************* ;* @attention ;* -;* <h2><center>© Copyright (c) 2016 STMicroelectronics. -;* All rights reserved.</center></h2> +;* Copyright (c) 2016 STMicroelectronics. +;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* ;******************************************************************************* ; @@ -429,4 +428,4 @@ B FPU_IRQHandler END -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +
diff --git a/Source/Templates/iar/startup_stm32f303xc.s b/Source/Templates/iar/startup_stm32f303xc.s index 9579896..cc9ae25 100644 --- a/Source/Templates/iar/startup_stm32f303xc.s +++ b/Source/Templates/iar/startup_stm32f303xc.s
@@ -14,13 +14,12 @@ ;******************************************************************************* ;* @attention ;* -;* <h2><center>© Copyright (c) 2016 STMicroelectronics. -;* All rights reserved.</center></h2> +;* Copyright (c) 2016 STMicroelectronics. +;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* ;******************************************************************************* ; @@ -545,4 +544,4 @@ B FPU_IRQHandler END -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +
diff --git a/Source/Templates/iar/startup_stm32f303xe.s b/Source/Templates/iar/startup_stm32f303xe.s index d866112..fc7e9bd 100644 --- a/Source/Templates/iar/startup_stm32f303xe.s +++ b/Source/Templates/iar/startup_stm32f303xe.s
@@ -15,13 +15,12 @@ ;******************************************************************************* ;* @attention ;* -;* <h2><center>© Copyright (c) 2016 STMicroelectronics. -;* All rights reserved.</center></h2> +;* Copyright (c) 2016 STMicroelectronics. +;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* ;******************************************************************************* ; @@ -589,4 +588,4 @@ B SPI4_IRQHandler END -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +
diff --git a/Source/Templates/iar/startup_stm32f318xx.s b/Source/Templates/iar/startup_stm32f318xx.s index aba37d0..29a3cd3 100644 --- a/Source/Templates/iar/startup_stm32f318xx.s +++ b/Source/Templates/iar/startup_stm32f318xx.s
@@ -14,13 +14,12 @@ ;******************************************************************************* ;* @attention ;* -;* <h2><center>© Copyright (c) 2016 STMicroelectronics. -;* All rights reserved.</center></h2> +;* Copyright (c) 2016 STMicroelectronics. +;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* ;******************************************************************************* ; @@ -419,4 +418,4 @@ B FPU_IRQHandler END -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +
diff --git a/Source/Templates/iar/startup_stm32f328xx.s b/Source/Templates/iar/startup_stm32f328xx.s index ba8151e..39f3e60 100644 --- a/Source/Templates/iar/startup_stm32f328xx.s +++ b/Source/Templates/iar/startup_stm32f328xx.s
@@ -14,13 +14,12 @@ ;******************************************************************************* ;* @attention ;* -;* <h2><center>© Copyright (c) 2016 STMicroelectronics. -;* All rights reserved.</center></h2> +;* Copyright (c) 2016 STMicroelectronics. +;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* ;******************************************************************************* ; @@ -424,4 +423,4 @@ B FPU_IRQHandler END -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +
diff --git a/Source/Templates/iar/startup_stm32f334x8.s b/Source/Templates/iar/startup_stm32f334x8.s index 58b70a8..835186b 100644 --- a/Source/Templates/iar/startup_stm32f334x8.s +++ b/Source/Templates/iar/startup_stm32f334x8.s
@@ -14,13 +14,12 @@ ;******************************************************************************* ;* @attention ;* -;* <h2><center>© Copyright (c) 2016 STMicroelectronics. -;* All rights reserved.</center></h2> +;* Copyright (c) 2016 STMicroelectronics. +;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* ;******************************************************************************* ; @@ -464,4 +463,4 @@ B FPU_IRQHandler END -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +
diff --git a/Source/Templates/iar/startup_stm32f358xx.s b/Source/Templates/iar/startup_stm32f358xx.s index b67683a..90fa59b 100644 --- a/Source/Templates/iar/startup_stm32f358xx.s +++ b/Source/Templates/iar/startup_stm32f358xx.s
@@ -14,13 +14,12 @@ ;******************************************************************************* ;* @attention ;* -;* <h2><center>© Copyright (c) 2016 STMicroelectronics. -;* All rights reserved.</center></h2> +;* Copyright (c) 2016 STMicroelectronics. +;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* ;******************************************************************************* ; @@ -520,4 +519,4 @@ B FPU_IRQHandler END -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +
diff --git a/Source/Templates/iar/startup_stm32f373xc.s b/Source/Templates/iar/startup_stm32f373xc.s index 3296b95..2ebf634 100644 --- a/Source/Templates/iar/startup_stm32f373xc.s +++ b/Source/Templates/iar/startup_stm32f373xc.s
@@ -14,13 +14,12 @@ ;******************************************************************************* ;* @attention ;* -;* <h2><center>© Copyright (c) 2016 STMicroelectronics. -;* All rights reserved.</center></h2> +;* Copyright (c) 2016 STMicroelectronics. +;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* ;******************************************************************************* ; @@ -534,4 +533,4 @@ B FPU_IRQHandler END -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** +
diff --git a/Source/Templates/iar/startup_stm32f378xx.s b/Source/Templates/iar/startup_stm32f378xx.s index e484651..fde0da1 100644 --- a/Source/Templates/iar/startup_stm32f378xx.s +++ b/Source/Templates/iar/startup_stm32f378xx.s
@@ -14,13 +14,12 @@ ;******************************************************************************* ;* @attention ;* -;* <h2><center>© Copyright (c) 2016 STMicroelectronics. -;* All rights reserved.</center></h2> +;* Copyright (c) 2016 STMicroelectronics. +;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* ;******************************************************************************* ; @@ -514,4 +513,4 @@ B FPU_IRQHandler END -;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** +
diff --git a/Source/Templates/iar/startup_stm32f398xx.s b/Source/Templates/iar/startup_stm32f398xx.s index 1dd1671..d9e630c 100644 --- a/Source/Templates/iar/startup_stm32f398xx.s +++ b/Source/Templates/iar/startup_stm32f398xx.s
@@ -15,13 +15,12 @@ ;******************************************************************************* ;* @attention ;* -;* <h2><center>© Copyright (c) 2016 STMicroelectronics. -;* All rights reserved.</center></h2> +;* Copyright (c) 2016 STMicroelectronics. +;* All rights reserved. ;* -;* This software component is licensed by ST under BSD 3-Clause license, -;* the "License"; You may not use this file except in compliance with the -;* License. You may obtain a copy of the License at: -;* opensource.org/licenses/BSD-3-Clause +;* This software is licensed under terms that can be found in the LICENSE file +;* in the root directory of this software component. +;* If no LICENSE file comes with this software, it is provided AS-IS. ;* ;******************************************************************************* ; @@ -564,4 +563,4 @@ B SPI4_IRQHandler END -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +
diff --git a/Source/Templates/system_stm32f3xx.c b/Source/Templates/system_stm32f3xx.c index 12c7d71..27d9350 100644 --- a/Source/Templates/system_stm32f3xx.c +++ b/Source/Templates/system_stm32f3xx.c
@@ -44,13 +44,12 @@ ****************************************************************************** * @attention * - * <h2><center>© Copyright (c) 2016 STMicroelectronics. - * All rights reserved.</center></h2> + * Copyright (c) 2016 STMicroelectronics. + * All rights reserved. * - * This software component is licensed by ST under BSD 3-Clause license, - * the "License"; You may not use this file except in compliance with the - * License. You may obtain a copy of the License at: - * opensource.org/licenses/BSD-3-Clause + * This software is licensed under terms that can be found in the LICENSE file + * in the root directory of this software component. + * If no LICENSE file comes with this software, it is provided AS-IS. * ****************************************************************************** */ @@ -286,6 +285,3 @@ /** * @} */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ -
diff --git a/_htmresc/favicon.png b/_htmresc/favicon.png new file mode 100644 index 0000000..06713ee --- /dev/null +++ b/_htmresc/favicon.png Binary files differ
diff --git a/_htmresc/mini-st.css b/_htmresc/mini-st.css index 71fbc14..eb41d56 100644 --- a/_htmresc/mini-st.css +++ b/_htmresc/mini-st.css
@@ -1463,7 +1463,7 @@ /* Definitions for progress elements and spinners. */ -/* Progess module CSS variable definitions */ +/* Progress module CSS variable definitions */ :root { --progress-back-color: #ddd; --progress-fore-color: #555; }
diff --git a/_htmresc/mini-st_2020.css b/_htmresc/mini-st_2020.css new file mode 100644 index 0000000..986f4d4 --- /dev/null +++ b/_htmresc/mini-st_2020.css
@@ -0,0 +1,1711 @@ +@charset "UTF-8"; +/* + Flavor name: Custom (mini-custom) + Generated online - https://minicss.org/flavors + mini.css version: v3.0.1 +*/ +/* + Browsers resets and base typography. +*/ +/* Core module CSS variable definitions */ +:root { + --fore-color: #03234b; + --secondary-fore-color: #03234b; + --back-color: #ffffff; + --secondary-back-color: #ffffff; + --blockquote-color: #e6007e; + --pre-color: #e6007e; + --border-color: #3cb4e6; + --secondary-border-color: #3cb4e6; + --heading-ratio: 1.2; + --universal-margin: 0.5rem; + --universal-padding: 0.25rem; + --universal-border-radius: 0.075rem; + --background-margin: 1.5%; + --a-link-color: #3cb4e6; + --a-visited-color: #8c0078; } + +html { + font-size: 13.5px; } + +a, b, del, em, i, ins, q, span, strong, u { + font-size: 1em; } + +html, * { + font-family: -apple-system, BlinkMacSystemFont, Helvetica, arial, sans-serif; + line-height: 1.25; + -webkit-text-size-adjust: 100%; } + +* { + font-size: 1rem; } + +body { + margin: 0; + color: var(--fore-color); + @background: var(--back-color); + background: var(--back-color) linear-gradient(#ffd200, #ffd200) repeat-y left top; + background-size: var(--background-margin); + } + +details { + display: block; } + +summary { + display: list-item; } + +abbr[title] { + border-bottom: none; + text-decoration: underline dotted; } + +input { + overflow: visible; } + +img { + max-width: 100%; + height: auto; } + +h1, h2, h3, h4, h5, h6 { + line-height: 1.25; + margin: calc(1.5 * var(--universal-margin)) var(--universal-margin); + font-weight: 400; } + h1 small, h2 small, h3 small, h4 small, h5 small, h6 small { + color: var(--secondary-fore-color); + display: block; + margin-top: -0.25rem; } + +h1 { + font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio) * var(--heading-ratio)); } + +h2 { + font-size: calc(1rem * var(--heading-ratio) * var(--heading-ratio) ); + border-style: none none solid none ; + border-width: thin; + border-color: var(--border-color); } +h3 { + font-size: calc(1rem * var(--heading-ratio) ); } + +h4 { + font-size: calc(1rem * var(--heading-ratio)); } + +h5 { + font-size: 1rem; } + +h6 { + font-size: calc(1rem / var(--heading-ratio)); } + +p { + margin: var(--universal-margin); } + +ol, ul { + margin: var(--universal-margin); + padding-left: calc(3 * var(--universal-margin)); } + +b, strong { + font-weight: 700; } + +hr { + box-sizing: content-box; + border: 0; + line-height: 1.25em; + margin: var(--universal-margin); + height: 0.0714285714rem; + background: linear-gradient(to right, transparent, var(--border-color) 20%, var(--border-color) 80%, transparent); } + +blockquote { + display: block; + position: relative; + font-style: italic; + color: var(--secondary-fore-color); + margin: var(--universal-margin); + padding: calc(3 * var(--universal-padding)); + border: 0.0714285714rem solid var(--secondary-border-color); + border-left: 0.3rem solid var(--blockquote-color); + border-radius: 0 var(--universal-border-radius) var(--universal-border-radius) 0; } + blockquote:before { + position: absolute; + top: calc(0rem - var(--universal-padding)); + left: 0; + font-family: sans-serif; + font-size: 2rem; + font-weight: 800; + content: "\201c"; + color: var(--blockquote-color); } + blockquote[cite]:after { + font-style: normal; + font-size: 0.75em; + font-weight: 700; + content: "\a— " attr(cite); + white-space: pre; } + +code, kbd, pre, samp { + font-family: Menlo, Consolas, monospace; + font-size: 0.85em; } + +code { + background: var(--secondary-back-color); + border-radius: var(--universal-border-radius); + padding: calc(var(--universal-padding) / 4) calc(var(--universal-padding) / 2); } + +kbd { + background: var(--fore-color); + color: var(--back-color); + border-radius: var(--universal-border-radius); + padding: calc(var(--universal-padding) / 4) calc(var(--universal-padding) / 2); } + +pre { + overflow: auto; + background: var(--secondary-back-color); + padding: calc(1.5 * var(--universal-padding)); + margin: var(--universal-margin); + border: 0.0714285714rem solid var(--secondary-border-color); + border-left: 0.2857142857rem solid var(--pre-color); + border-radius: 0 var(--universal-border-radius) var(--universal-border-radius) 0; } + +sup, sub, code, kbd { + line-height: 0; + position: relative; + vertical-align: baseline; } + +small, sup, sub, figcaption { + font-size: 0.75em; } + +sup { + top: -0.5em; } + +sub { + bottom: -0.25em; } + +figure { + margin: var(--universal-margin); } + +figcaption { + color: var(--secondary-fore-color); } + +a { + text-decoration: none; } + a:link { + color: var(--a-link-color); } + a:visited { + color: var(--a-visited-color); } + a:hover, a:focus { + text-decoration: underline; } + +/* + Definitions for the grid system, cards and containers. +*/ +.container { + margin: 0 auto; + padding: 0 calc(1.5 * var(--universal-padding)); } + +.row { + box-sizing: border-box; + display: flex; + flex: 0 1 auto; + flex-flow: row wrap; + margin: 0 0 0 var(--background-margin); } + +.col-sm, +[class^='col-sm-'], +[class^='col-sm-offset-'], +.row[class*='cols-sm-'] > * { + box-sizing: border-box; + flex: 0 0 auto; + padding: 0 calc(var(--universal-padding) / 2); } + +.col-sm, +.row.cols-sm > * { + max-width: 100%; + flex-grow: 1; + flex-basis: 0; } + +.col-sm-1, +.row.cols-sm-1 > * { + max-width: 8.3333333333%; + flex-basis: 8.3333333333%; } + +.col-sm-offset-0 { + margin-left: 0; } + +.col-sm-2, +.row.cols-sm-2 > * { + max-width: 16.6666666667%; + flex-basis: 16.6666666667%; } + +.col-sm-offset-1 { + margin-left: 8.3333333333%; } + +.col-sm-3, +.row.cols-sm-3 > * { + max-width: 25%; + flex-basis: 25%; } + +.col-sm-offset-2 { + margin-left: 16.6666666667%; } + +.col-sm-4, +.row.cols-sm-4 > * { + max-width: 33.3333333333%; + flex-basis: 33.3333333333%; } + +.col-sm-offset-3 { + margin-left: 25%; } + +.col-sm-5, +.row.cols-sm-5 > * { + max-width: 41.6666666667%; + flex-basis: 41.6666666667%; } + +.col-sm-offset-4 { + margin-left: 33.3333333333%; } + +.col-sm-6, +.row.cols-sm-6 > * { + max-width: 50%; + flex-basis: 50%; } + +.col-sm-offset-5 { + margin-left: 41.6666666667%; } + +.col-sm-7, +.row.cols-sm-7 > * { + max-width: 58.3333333333%; + flex-basis: 58.3333333333%; } + +.col-sm-offset-6 { + margin-left: 50%; } + +.col-sm-8, +.row.cols-sm-8 > * { + max-width: 66.6666666667%; + flex-basis: 66.6666666667%; } + +.col-sm-offset-7 { + margin-left: 58.3333333333%; } + +.col-sm-9, +.row.cols-sm-9 > * { + max-width: 75%; + flex-basis: 75%; } + +.col-sm-offset-8 { + margin-left: 66.6666666667%; } + +.col-sm-10, +.row.cols-sm-10 > * { + max-width: 83.3333333333%; + flex-basis: 83.3333333333%; } + +.col-sm-offset-9 { + margin-left: 75%; } + +.col-sm-11, +.row.cols-sm-11 > * { + max-width: 91.6666666667%; + flex-basis: 91.6666666667%; } + +.col-sm-offset-10 { + margin-left: 83.3333333333%; } + +.col-sm-12, +.row.cols-sm-12 > * { + max-width: 100%; + flex-basis: 100%; } + +.col-sm-offset-11 { + margin-left: 91.6666666667%; } + +.col-sm-normal { + order: initial; } + +.col-sm-first { + order: -999; } + +.col-sm-last { + order: 999; } + +@media screen and (min-width: 500px) { + .col-md, + [class^='col-md-'], + [class^='col-md-offset-'], + .row[class*='cols-md-'] > * { + box-sizing: border-box; + flex: 0 0 auto; + padding: 0 calc(var(--universal-padding) / 2); } + + .col-md, + .row.cols-md > * { + max-width: 100%; + flex-grow: 1; + flex-basis: 0; } + + .col-md-1, + .row.cols-md-1 > * { + max-width: 8.3333333333%; + flex-basis: 8.3333333333%; } + + .col-md-offset-0 { + margin-left: 0; } + + .col-md-2, + .row.cols-md-2 > * { + max-width: 16.6666666667%; + flex-basis: 16.6666666667%; } + + .col-md-offset-1 { + margin-left: 8.3333333333%; } + + .col-md-3, + .row.cols-md-3 > * { + max-width: 25%; + flex-basis: 25%; } + + .col-md-offset-2 { + margin-left: 16.6666666667%; } + + .col-md-4, + .row.cols-md-4 > * { + max-width: 33.3333333333%; + flex-basis: 33.3333333333%; } + + .col-md-offset-3 { + margin-left: 25%; } + + .col-md-5, + .row.cols-md-5 > * { + max-width: 41.6666666667%; + flex-basis: 41.6666666667%; } + + .col-md-offset-4 { + margin-left: 33.3333333333%; } + + .col-md-6, + .row.cols-md-6 > * { + max-width: 50%; + flex-basis: 50%; } + + .col-md-offset-5 { + margin-left: 41.6666666667%; } + + .col-md-7, + .row.cols-md-7 > * { + max-width: 58.3333333333%; + flex-basis: 58.3333333333%; } + + .col-md-offset-6 { + margin-left: 50%; } + + .col-md-8, + .row.cols-md-8 > * { + max-width: 66.6666666667%; + flex-basis: 66.6666666667%; } + + .col-md-offset-7 { + margin-left: 58.3333333333%; } + + .col-md-9, + .row.cols-md-9 > * { + max-width: 75%; + flex-basis: 75%; } + + .col-md-offset-8 { + margin-left: 66.6666666667%; } + + .col-md-10, + .row.cols-md-10 > * { + max-width: 83.3333333333%; + flex-basis: 83.3333333333%; } + + .col-md-offset-9 { + margin-left: 75%; } + + .col-md-11, + .row.cols-md-11 > * { + max-width: 91.6666666667%; + flex-basis: 91.6666666667%; } + + .col-md-offset-10 { + margin-left: 83.3333333333%; } + + .col-md-12, + .row.cols-md-12 > * { + max-width: 100%; + flex-basis: 100%; } + + .col-md-offset-11 { + margin-left: 91.6666666667%; } + + .col-md-normal { + order: initial; } + + .col-md-first { + order: -999; } + + .col-md-last { + order: 999; } } +@media screen and (min-width: 1280px) { + .col-lg, + [class^='col-lg-'], + [class^='col-lg-offset-'], + .row[class*='cols-lg-'] > * { + box-sizing: border-box; + flex: 0 0 auto; + padding: 0 calc(var(--universal-padding) / 2); } + + .col-lg, + .row.cols-lg > * { + max-width: 100%; + flex-grow: 1; + flex-basis: 0; } + + .col-lg-1, + .row.cols-lg-1 > * { + max-width: 8.3333333333%; + flex-basis: 8.3333333333%; } + + .col-lg-offset-0 { + margin-left: 0; } + + .col-lg-2, + .row.cols-lg-2 > * { + max-width: 16.6666666667%; + flex-basis: 16.6666666667%; } + + .col-lg-offset-1 { + margin-left: 8.3333333333%; } + + .col-lg-3, + .row.cols-lg-3 > * { + max-width: 25%; + flex-basis: 25%; } + + .col-lg-offset-2 { + margin-left: 16.6666666667%; } + + .col-lg-4, + .row.cols-lg-4 > * { + max-width: 33.3333333333%; + flex-basis: 33.3333333333%; } + + .col-lg-offset-3 { + margin-left: 25%; } + + .col-lg-5, + .row.cols-lg-5 > * { + max-width: 41.6666666667%; + flex-basis: 41.6666666667%; } + + .col-lg-offset-4 { + margin-left: 33.3333333333%; } + + .col-lg-6, + .row.cols-lg-6 > * { + max-width: 50%; + flex-basis: 50%; } + + .col-lg-offset-5 { + margin-left: 41.6666666667%; } + + .col-lg-7, + .row.cols-lg-7 > * { + max-width: 58.3333333333%; + flex-basis: 58.3333333333%; } + + .col-lg-offset-6 { + margin-left: 50%; } + + .col-lg-8, + .row.cols-lg-8 > * { + max-width: 66.6666666667%; + flex-basis: 66.6666666667%; } + + .col-lg-offset-7 { + margin-left: 58.3333333333%; } + + .col-lg-9, + .row.cols-lg-9 > * { + max-width: 75%; + flex-basis: 75%; } + + .col-lg-offset-8 { + margin-left: 66.6666666667%; } + + .col-lg-10, + .row.cols-lg-10 > * { + max-width: 83.3333333333%; + flex-basis: 83.3333333333%; } + + .col-lg-offset-9 { + margin-left: 75%; } + + .col-lg-11, + .row.cols-lg-11 > * { + max-width: 91.6666666667%; + flex-basis: 91.6666666667%; } + + .col-lg-offset-10 { + margin-left: 83.3333333333%; } + + .col-lg-12, + .row.cols-lg-12 > * { + max-width: 100%; + flex-basis: 100%; } + + .col-lg-offset-11 { + margin-left: 91.6666666667%; } + + .col-lg-normal { + order: initial; } + + .col-lg-first { + order: -999; } + + .col-lg-last { + order: 999; } } +/* Card component CSS variable definitions */ +:root { + --card-back-color: #3cb4e6; + --card-fore-color: #03234b; + --card-border-color: #03234b; } + +.card { + display: flex; + flex-direction: column; + justify-content: space-between; + align-self: center; + position: relative; + width: 100%; + background: var(--card-back-color); + color: var(--card-fore-color); + border: 0.0714285714rem solid var(--card-border-color); + border-radius: var(--universal-border-radius); + margin: var(--universal-margin); + overflow: hidden; } + @media screen and (min-width: 320px) { + .card { + max-width: 320px; } } + .card > .sectione { + background: var(--card-back-color); + color: var(--card-fore-color); + box-sizing: border-box; + margin: 0; + border: 0; + border-radius: 0; + border-bottom: 0.0714285714rem solid var(--card-border-color); + padding: var(--universal-padding); + width: 100%; } + .card > .sectione.media { + height: 200px; + padding: 0; + -o-object-fit: cover; + object-fit: cover; } + .card > .sectione:last-child { + border-bottom: 0; } + +/* + Custom elements for card elements. +*/ +@media screen and (min-width: 240px) { + .card.small { + max-width: 240px; } } +@media screen and (min-width: 480px) { + .card.large { + max-width: 480px; } } +.card.fluid { + max-width: 100%; + width: auto; } + +.card.warning { + --card-back-color: #e5b8b7; + --card-fore-color: #3b234b; + --card-border-color: #8c0078; } + +.card.error { + --card-back-color: #464650; + --card-fore-color: #ffffff; + --card-border-color: #8c0078; } + +.card > .sectione.dark { + --card-back-color: #3b234b; + --card-fore-color: #ffffff; } + +.card > .sectione.double-padded { + padding: calc(1.5 * var(--universal-padding)); } + +/* + Definitions for forms and input elements. +*/ +/* Input_control module CSS variable definitions */ +:root { + --form-back-color: #ffe97f; + --form-fore-color: #03234b; + --form-border-color: #3cb4e6; + --input-back-color: #ffffff; + --input-fore-color: #03234b; + --input-border-color: #3cb4e6; + --input-focus-color: #0288d1; + --input-invalid-color: #d32f2f; + --button-back-color: #e2e2e2; + --button-hover-back-color: #dcdcdc; + --button-fore-color: #212121; + --button-border-color: transparent; + --button-hover-border-color: transparent; + --button-group-border-color: rgba(124, 124, 124, 0.54); } + +form { + background: var(--form-back-color); + color: var(--form-fore-color); + border: 0.0714285714rem solid var(--form-border-color); + border-radius: var(--universal-border-radius); + margin: var(--universal-margin); + padding: calc(2 * var(--universal-padding)) var(--universal-padding); } + +fieldset { + border: 0.0714285714rem solid var(--form-border-color); + border-radius: var(--universal-border-radius); + margin: calc(var(--universal-margin) / 4); + padding: var(--universal-padding); } + +legend { + box-sizing: border-box; + display: table; + max-width: 100%; + white-space: normal; + font-weight: 500; + padding: calc(var(--universal-padding) / 2); } + +label { + padding: calc(var(--universal-padding) / 2) var(--universal-padding); } + +.input-group { + display: inline-block; } + .input-group.fluid { + display: flex; + align-items: center; + justify-content: center; } + .input-group.fluid > input { + max-width: 100%; + flex-grow: 1; + flex-basis: 0px; } + @media screen and (max-width: 499px) { + .input-group.fluid { + align-items: stretch; + flex-direction: column; } } + .input-group.vertical { + display: flex; + align-items: stretch; + flex-direction: column; } + .input-group.vertical > input { + max-width: 100%; + flex-grow: 1; + flex-basis: 0px; } + +[type="number"]::-webkit-inner-spin-button, [type="number"]::-webkit-outer-spin-button { + height: auto; } + +[type="search"] { + -webkit-appearance: textfield; + outline-offset: -2px; } + +[type="search"]::-webkit-search-cancel-button, +[type="search"]::-webkit-search-decoration { + -webkit-appearance: none; } + +input:not([type]), [type="text"], [type="email"], [type="number"], [type="search"], +[type="password"], [type="url"], [type="tel"], [type="checkbox"], [type="radio"], textarea, select { + box-sizing: border-box; + background: var(--input-back-color); + color: var(--input-fore-color); + border: 0.0714285714rem solid var(--input-border-color); + border-radius: var(--universal-border-radius); + margin: calc(var(--universal-margin) / 2); + padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); } + +input:not([type="button"]):not([type="submit"]):not([type="reset"]):hover, input:not([type="button"]):not([type="submit"]):not([type="reset"]):focus, textarea:hover, textarea:focus, select:hover, select:focus { + border-color: var(--input-focus-color); + box-shadow: none; } +input:not([type="button"]):not([type="submit"]):not([type="reset"]):invalid, input:not([type="button"]):not([type="submit"]):not([type="reset"]):focus:invalid, textarea:invalid, textarea:focus:invalid, select:invalid, select:focus:invalid { + border-color: var(--input-invalid-color); + box-shadow: none; } +input:not([type="button"]):not([type="submit"]):not([type="reset"])[readonly], textarea[readonly], select[readonly] { + background: var(--secondary-back-color); } + +select { + max-width: 100%; } + +option { + overflow: hidden; + text-overflow: ellipsis; } + +[type="checkbox"], [type="radio"] { + -webkit-appearance: none; + -moz-appearance: none; + appearance: none; + position: relative; + height: calc(1rem + var(--universal-padding) / 2); + width: calc(1rem + var(--universal-padding) / 2); + vertical-align: text-bottom; + padding: 0; + flex-basis: calc(1rem + var(--universal-padding) / 2) !important; + flex-grow: 0 !important; } + [type="checkbox"]:checked:before, [type="radio"]:checked:before { + position: absolute; } + +[type="checkbox"]:checked:before { + content: '\2713'; + font-family: sans-serif; + font-size: calc(1rem + var(--universal-padding) / 2); + top: calc(0rem - var(--universal-padding)); + left: calc(var(--universal-padding) / 4); } + +[type="radio"] { + border-radius: 100%; } + [type="radio"]:checked:before { + border-radius: 100%; + content: ''; + top: calc(0.0714285714rem + var(--universal-padding) / 2); + left: calc(0.0714285714rem + var(--universal-padding) / 2); + background: var(--input-fore-color); + width: 0.5rem; + height: 0.5rem; } + +:placeholder-shown { + color: var(--input-fore-color); } + +::-ms-placeholder { + color: var(--input-fore-color); + opacity: 0.54; } + +button::-moz-focus-inner, [type="button"]::-moz-focus-inner, [type="reset"]::-moz-focus-inner, [type="submit"]::-moz-focus-inner { + border-style: none; + padding: 0; } + +button, html [type="button"], [type="reset"], [type="submit"] { + -webkit-appearance: button; } + +button { + overflow: visible; + text-transform: none; } + +button, [type="button"], [type="submit"], [type="reset"], +a.button, label.button, .button, +a[role="button"], label[role="button"], [role="button"] { + display: inline-block; + background: var(--button-back-color); + color: var(--button-fore-color); + border: 0.0714285714rem solid var(--button-border-color); + border-radius: var(--universal-border-radius); + padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); + margin: var(--universal-margin); + text-decoration: none; + cursor: pointer; + transition: background 0.3s; } + button:hover, button:focus, [type="button"]:hover, [type="button"]:focus, [type="submit"]:hover, [type="submit"]:focus, [type="reset"]:hover, [type="reset"]:focus, + a.button:hover, + a.button:focus, label.button:hover, label.button:focus, .button:hover, .button:focus, + a[role="button"]:hover, + a[role="button"]:focus, label[role="button"]:hover, label[role="button"]:focus, [role="button"]:hover, [role="button"]:focus { + background: var(--button-hover-back-color); + border-color: var(--button-hover-border-color); } + +input:disabled, input[disabled], textarea:disabled, textarea[disabled], select:disabled, select[disabled], button:disabled, button[disabled], .button:disabled, .button[disabled], [role="button"]:disabled, [role="button"][disabled] { + cursor: not-allowed; + opacity: 0.75; } + +.button-group { + display: flex; + border: 0.0714285714rem solid var(--button-group-border-color); + border-radius: var(--universal-border-radius); + margin: var(--universal-margin); } + .button-group > button, .button-group [type="button"], .button-group > [type="submit"], .button-group > [type="reset"], .button-group > .button, .button-group > [role="button"] { + margin: 0; + max-width: 100%; + flex: 1 1 auto; + text-align: center; + border: 0; + border-radius: 0; + box-shadow: none; } + .button-group > :not(:first-child) { + border-left: 0.0714285714rem solid var(--button-group-border-color); } + @media screen and (max-width: 499px) { + .button-group { + flex-direction: column; } + .button-group > :not(:first-child) { + border: 0; + border-top: 0.0714285714rem solid var(--button-group-border-color); } } + +/* + Custom elements for forms and input elements. +*/ +button.primary, [type="button"].primary, [type="submit"].primary, [type="reset"].primary, .button.primary, [role="button"].primary { + --button-back-color: #1976d2; + --button-fore-color: #f8f8f8; } + button.primary:hover, button.primary:focus, [type="button"].primary:hover, [type="button"].primary:focus, [type="submit"].primary:hover, [type="submit"].primary:focus, [type="reset"].primary:hover, [type="reset"].primary:focus, .button.primary:hover, .button.primary:focus, [role="button"].primary:hover, [role="button"].primary:focus { + --button-hover-back-color: #1565c0; } + +button.secondary, [type="button"].secondary, [type="submit"].secondary, [type="reset"].secondary, .button.secondary, [role="button"].secondary { + --button-back-color: #d32f2f; + --button-fore-color: #f8f8f8; } + button.secondary:hover, button.secondary:focus, [type="button"].secondary:hover, [type="button"].secondary:focus, [type="submit"].secondary:hover, [type="submit"].secondary:focus, [type="reset"].secondary:hover, [type="reset"].secondary:focus, .button.secondary:hover, .button.secondary:focus, [role="button"].secondary:hover, [role="button"].secondary:focus { + --button-hover-back-color: #c62828; } + +button.tertiary, [type="button"].tertiary, [type="submit"].tertiary, [type="reset"].tertiary, .button.tertiary, [role="button"].tertiary { + --button-back-color: #308732; + --button-fore-color: #f8f8f8; } + button.tertiary:hover, button.tertiary:focus, [type="button"].tertiary:hover, [type="button"].tertiary:focus, [type="submit"].tertiary:hover, [type="submit"].tertiary:focus, [type="reset"].tertiary:hover, [type="reset"].tertiary:focus, .button.tertiary:hover, .button.tertiary:focus, [role="button"].tertiary:hover, [role="button"].tertiary:focus { + --button-hover-back-color: #277529; } + +button.inverse, [type="button"].inverse, [type="submit"].inverse, [type="reset"].inverse, .button.inverse, [role="button"].inverse { + --button-back-color: #212121; + --button-fore-color: #f8f8f8; } + button.inverse:hover, button.inverse:focus, [type="button"].inverse:hover, [type="button"].inverse:focus, [type="submit"].inverse:hover, [type="submit"].inverse:focus, [type="reset"].inverse:hover, [type="reset"].inverse:focus, .button.inverse:hover, .button.inverse:focus, [role="button"].inverse:hover, [role="button"].inverse:focus { + --button-hover-back-color: #111; } + +button.small, [type="button"].small, [type="submit"].small, [type="reset"].small, .button.small, [role="button"].small { + padding: calc(0.5 * var(--universal-padding)) calc(0.75 * var(--universal-padding)); + margin: var(--universal-margin); } + +button.large, [type="button"].large, [type="submit"].large, [type="reset"].large, .button.large, [role="button"].large { + padding: calc(1.5 * var(--universal-padding)) calc(2 * var(--universal-padding)); + margin: var(--universal-margin); } + +/* + Definitions for navigation elements. +*/ +/* Navigation module CSS variable definitions */ +:root { + --header-back-color: #03234b; + --header-hover-back-color: #ffd200; + --header-fore-color: #ffffff; + --header-border-color: #3cb4e6; + --nav-back-color: #ffffff; + --nav-hover-back-color: #ffe97f; + --nav-fore-color: #e6007e; + --nav-border-color: #3cb4e6; + --nav-link-color: #3cb4e6; + --footer-fore-color: #ffffff; + --footer-back-color: #03234b; + --footer-border-color: #3cb4e6; + --footer-link-color: #3cb4e6; + --drawer-back-color: #ffffff; + --drawer-hover-back-color: #ffe97f; + --drawer-border-color: #3cb4e6; + --drawer-close-color: #e6007e; } + +header { + height: 2.75rem; + background: var(--header-back-color); + color: var(--header-fore-color); + border-bottom: 0.0714285714rem solid var(--header-border-color); + padding: calc(var(--universal-padding) / 4) 0; + white-space: nowrap; + overflow-x: auto; + overflow-y: hidden; } + header.row { + box-sizing: content-box; } + header .logo { + color: var(--header-fore-color); + font-size: 1.75rem; + padding: var(--universal-padding) calc(2 * var(--universal-padding)); + text-decoration: none; } + header button, header [type="button"], header .button, header [role="button"] { + box-sizing: border-box; + position: relative; + top: calc(0rem - var(--universal-padding) / 4); + height: calc(3.1875rem + var(--universal-padding) / 2); + background: var(--header-back-color); + line-height: calc(3.1875rem - var(--universal-padding) * 1.5); + text-align: center; + color: var(--header-fore-color); + border: 0; + border-radius: 0; + margin: 0; + text-transform: uppercase; } + header button:hover, header button:focus, header [type="button"]:hover, header [type="button"]:focus, header .button:hover, header .button:focus, header [role="button"]:hover, header [role="button"]:focus { + background: var(--header-hover-back-color); } + +nav { + background: var(--nav-back-color); + color: var(--nav-fore-color); + border: 0.0714285714rem solid var(--nav-border-color); + border-radius: var(--universal-border-radius); + margin: var(--universal-margin); } + nav * { + padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); } + nav a, nav a:visited { + display: block; + color: var(--nav-link-color); + border-radius: var(--universal-border-radius); + transition: background 0.3s; } + nav a:hover, nav a:focus, nav a:visited:hover, nav a:visited:focus { + text-decoration: none; + background: var(--nav-hover-back-color); } + nav .sublink-1 { + position: relative; + margin-left: calc(2 * var(--universal-padding)); } + nav .sublink-1:before { + position: absolute; + left: calc(var(--universal-padding) - 1 * var(--universal-padding)); + top: -0.0714285714rem; + content: ''; + height: 100%; + border: 0.0714285714rem solid var(--nav-border-color); + border-left: 0; } + nav .sublink-2 { + position: relative; + margin-left: calc(4 * var(--universal-padding)); } + nav .sublink-2:before { + position: absolute; + left: calc(var(--universal-padding) - 3 * var(--universal-padding)); + top: -0.0714285714rem; + content: ''; + height: 100%; + border: 0.0714285714rem solid var(--nav-border-color); + border-left: 0; } + +footer { + background: var(--footer-back-color); + color: var(--footer-fore-color); + border-top: 0.0714285714rem solid var(--footer-border-color); + padding: calc(2 * var(--universal-padding)) var(--universal-padding); + font-size: 0.875rem; } + footer a, footer a:visited { + color: var(--footer-link-color); } + +header.sticky { + position: -webkit-sticky; + position: sticky; + z-index: 1101; + top: 0; } + +footer.sticky { + position: -webkit-sticky; + position: sticky; + z-index: 1101; + bottom: 0; } + +.drawer-toggle:before { + display: inline-block; + position: relative; + vertical-align: bottom; + content: '\00a0\2261\00a0'; + font-family: sans-serif; + font-size: 1.5em; } +@media screen and (min-width: 500px) { + .drawer-toggle:not(.persistent) { + display: none; } } + +[type="checkbox"].drawer { + height: 1px; + width: 1px; + margin: -1px; + overflow: hidden; + position: absolute; + clip: rect(0 0 0 0); + -webkit-clip-path: inset(100%); + clip-path: inset(100%); } + [type="checkbox"].drawer + * { + display: block; + box-sizing: border-box; + position: fixed; + top: 0; + width: 320px; + height: 100vh; + overflow-y: auto; + background: var(--drawer-back-color); + border: 0.0714285714rem solid var(--drawer-border-color); + border-radius: 0; + margin: 0; + z-index: 1110; + right: -320px; + transition: right 0.3s; } + [type="checkbox"].drawer + * .drawer-close { + position: absolute; + top: var(--universal-margin); + right: var(--universal-margin); + z-index: 1111; + width: 2rem; + height: 2rem; + border-radius: var(--universal-border-radius); + padding: var(--universal-padding); + margin: 0; + cursor: pointer; + transition: background 0.3s; } + [type="checkbox"].drawer + * .drawer-close:before { + display: block; + content: '\00D7'; + color: var(--drawer-close-color); + position: relative; + font-family: sans-serif; + font-size: 2rem; + line-height: 1; + text-align: center; } + [type="checkbox"].drawer + * .drawer-close:hover, [type="checkbox"].drawer + * .drawer-close:focus { + background: var(--drawer-hover-back-color); } + @media screen and (max-width: 320px) { + [type="checkbox"].drawer + * { + width: 100%; } } + [type="checkbox"].drawer:checked + * { + right: 0; } + @media screen and (min-width: 500px) { + [type="checkbox"].drawer:not(.persistent) + * { + position: static; + height: 100%; + z-index: 1100; } + [type="checkbox"].drawer:not(.persistent) + * .drawer-close { + display: none; } } + +/* + Definitions for the responsive table component. +*/ +/* Table module CSS variable definitions. */ +:root { + --table-border-color: #03234b; + --table-border-separator-color: #03234b; + --table-head-back-color: #03234b; + --table-head-fore-color: #ffffff; + --table-body-back-color: #ffffff; + --table-body-fore-color: #03234b; + --table-body-alt-back-color: #f4f4f4; } + +table { + border-collapse: separate; + border-spacing: 0; + margin: 0; + display: flex; + flex: 0 1 auto; + flex-flow: row wrap; + padding: var(--universal-padding); + padding-top: 0; } + table caption { + font-size: 1rem; + margin: calc(2 * var(--universal-margin)) 0; + max-width: 100%; + flex: 0 0 100%; } + table thead, table tbody { + display: flex; + flex-flow: row wrap; + border: 0.0714285714rem solid var(--table-border-color); } + table thead { + z-index: 999; + border-radius: var(--universal-border-radius) var(--universal-border-radius) 0 0; + border-bottom: 0.0714285714rem solid var(--table-border-separator-color); } + table tbody { + border-top: 0; + margin-top: calc(0 - var(--universal-margin)); + border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); } + table tr { + display: flex; + padding: 0; } + table th, table td { + padding: calc(0.5 * var(--universal-padding)); + font-size: 0.9rem; } + table th { + text-align: left; + background: var(--table-head-back-color); + color: var(--table-head-fore-color); } + table td { + background: var(--table-body-back-color); + color: var(--table-body-fore-color); + border-top: 0.0714285714rem solid var(--table-border-color); } + +table:not(.horizontal) { + overflow: auto; + max-height: 100%; } + table:not(.horizontal) thead, table:not(.horizontal) tbody { + max-width: 100%; + flex: 0 0 100%; } + table:not(.horizontal) tr { + flex-flow: row wrap; + flex: 0 0 100%; } + table:not(.horizontal) th, table:not(.horizontal) td { + flex: 1 0 0%; + overflow: hidden; + text-overflow: ellipsis; } + table:not(.horizontal) thead { + position: sticky; + top: 0; } + table:not(.horizontal) tbody tr:first-child td { + border-top: 0; } + +table.horizontal { + border: 0; } + table.horizontal thead, table.horizontal tbody { + border: 0; + flex: .2 0 0; + flex-flow: row nowrap; } + table.horizontal tbody { + overflow: auto; + justify-content: space-between; + flex: .8 0 0; + margin-left: 0; + padding-bottom: calc(var(--universal-padding) / 4); } + table.horizontal tr { + flex-direction: column; + flex: 1 0 auto; } + table.horizontal th, table.horizontal td { + width: auto; + border: 0; + border-bottom: 0.0714285714rem solid var(--table-border-color); } + table.horizontal th:not(:first-child), table.horizontal td:not(:first-child) { + border-top: 0; } + table.horizontal th { + text-align: right; + border-left: 0.0714285714rem solid var(--table-border-color); + border-right: 0.0714285714rem solid var(--table-border-separator-color); } + table.horizontal thead tr:first-child { + padding-left: 0; } + table.horizontal th:first-child, table.horizontal td:first-child { + border-top: 0.0714285714rem solid var(--table-border-color); } + table.horizontal tbody tr:last-child td { + border-right: 0.0714285714rem solid var(--table-border-color); } + table.horizontal tbody tr:last-child td:first-child { + border-top-right-radius: 0.25rem; } + table.horizontal tbody tr:last-child td:last-child { + border-bottom-right-radius: 0.25rem; } + table.horizontal thead tr:first-child th:first-child { + border-top-left-radius: 0.25rem; } + table.horizontal thead tr:first-child th:last-child { + border-bottom-left-radius: 0.25rem; } + +@media screen and (max-width: 499px) { + table, table.horizontal { + border-collapse: collapse; + border: 0; + width: 100%; + display: table; } + table thead, table th, table.horizontal thead, table.horizontal th { + border: 0; + height: 1px; + width: 1px; + margin: -1px; + overflow: hidden; + padding: 0; + position: absolute; + clip: rect(0 0 0 0); + -webkit-clip-path: inset(100%); + clip-path: inset(100%); } + table tbody, table.horizontal tbody { + border: 0; + display: table-row-group; } + table tr, table.horizontal tr { + display: block; + border: 0.0714285714rem solid var(--table-border-color); + border-radius: var(--universal-border-radius); + background: #ffffff; + padding: var(--universal-padding); + margin: var(--universal-margin); + margin-bottom: calc(1 * var(--universal-margin)); } + table th, table td, table.horizontal th, table.horizontal td { + width: auto; } + table td, table.horizontal td { + display: block; + border: 0; + text-align: right; } + table td:before, table.horizontal td:before { + content: attr(data-label); + float: left; + font-weight: 600; } + table th:first-child, table td:first-child, table.horizontal th:first-child, table.horizontal td:first-child { + border-top: 0; } + table tbody tr:last-child td, table.horizontal tbody tr:last-child td { + border-right: 0; } } +table tr:nth-of-type(2n) > td { + background: var(--table-body-alt-back-color); } + +@media screen and (max-width: 500px) { + table tr:nth-of-type(2n) { + background: var(--table-body-alt-back-color); } } +:root { + --table-body-hover-back-color: #90caf9; } + +table.hoverable tr:hover, table.hoverable tr:hover > td, table.hoverable tr:focus, table.hoverable tr:focus > td { + background: var(--table-body-hover-back-color); } + +@media screen and (max-width: 500px) { + table.hoverable tr:hover, table.hoverable tr:hover > td, table.hoverable tr:focus, table.hoverable tr:focus > td { + background: var(--table-body-hover-back-color); } } +/* + Definitions for contextual background elements, toasts and tooltips. +*/ +/* Contextual module CSS variable definitions */ +:root { + --mark-back-color: #3cb4e6; + --mark-fore-color: #ffffff; } + +mark { + background: var(--mark-back-color); + color: var(--mark-fore-color); + font-size: 0.95em; + line-height: 1em; + border-radius: var(--universal-border-radius); + padding: calc(var(--universal-padding) / 4) var(--universal-padding); } + mark.inline-block { + display: inline-block; + font-size: 1em; + line-height: 1.4; + padding: calc(var(--universal-padding) / 2) var(--universal-padding); } + +:root { + --toast-back-color: #424242; + --toast-fore-color: #fafafa; } + +.toast { + position: fixed; + bottom: calc(var(--universal-margin) * 3); + left: 50%; + transform: translate(-50%, -50%); + z-index: 1111; + color: var(--toast-fore-color); + background: var(--toast-back-color); + border-radius: calc(var(--universal-border-radius) * 16); + padding: var(--universal-padding) calc(var(--universal-padding) * 3); } + +:root { + --tooltip-back-color: #212121; + --tooltip-fore-color: #fafafa; } + +.tooltip { + position: relative; + display: inline-block; } + .tooltip:before, .tooltip:after { + position: absolute; + opacity: 0; + clip: rect(0 0 0 0); + -webkit-clip-path: inset(100%); + clip-path: inset(100%); + transition: all 0.3s; + z-index: 1010; + left: 50%; } + .tooltip:not(.bottom):before, .tooltip:not(.bottom):after { + bottom: 75%; } + .tooltip.bottom:before, .tooltip.bottom:after { + top: 75%; } + .tooltip:hover:before, .tooltip:hover:after, .tooltip:focus:before, .tooltip:focus:after { + opacity: 1; + clip: auto; + -webkit-clip-path: inset(0%); + clip-path: inset(0%); } + .tooltip:before { + content: ''; + background: transparent; + border: var(--universal-margin) solid transparent; + left: calc(50% - var(--universal-margin)); } + .tooltip:not(.bottom):before { + border-top-color: #212121; } + .tooltip.bottom:before { + border-bottom-color: #212121; } + .tooltip:after { + content: attr(aria-label); + color: var(--tooltip-fore-color); + background: var(--tooltip-back-color); + border-radius: var(--universal-border-radius); + padding: var(--universal-padding); + white-space: nowrap; + transform: translateX(-50%); } + .tooltip:not(.bottom):after { + margin-bottom: calc(2 * var(--universal-margin)); } + .tooltip.bottom:after { + margin-top: calc(2 * var(--universal-margin)); } + +:root { + --modal-overlay-color: rgba(0, 0, 0, 0.45); + --modal-close-color: #e6007e; + --modal-close-hover-color: #ffe97f; } + +[type="checkbox"].modal { + height: 1px; + width: 1px; + margin: -1px; + overflow: hidden; + position: absolute; + clip: rect(0 0 0 0); + -webkit-clip-path: inset(100%); + clip-path: inset(100%); } + [type="checkbox"].modal + div { + position: fixed; + top: 0; + left: 0; + display: none; + width: 100vw; + height: 100vh; + background: var(--modal-overlay-color); } + [type="checkbox"].modal + div .card { + margin: 0 auto; + max-height: 50vh; + overflow: auto; } + [type="checkbox"].modal + div .card .modal-close { + position: absolute; + top: 0; + right: 0; + width: 1.75rem; + height: 1.75rem; + border-radius: var(--universal-border-radius); + padding: var(--universal-padding); + margin: 0; + cursor: pointer; + transition: background 0.3s; } + [type="checkbox"].modal + div .card .modal-close:before { + display: block; + content: '\00D7'; + color: var(--modal-close-color); + position: relative; + font-family: sans-serif; + font-size: 1.75rem; + line-height: 1; + text-align: center; } + [type="checkbox"].modal + div .card .modal-close:hover, [type="checkbox"].modal + div .card .modal-close:focus { + background: var(--modal-close-hover-color); } + [type="checkbox"].modal:checked + div { + display: flex; + flex: 0 1 auto; + z-index: 1200; } + [type="checkbox"].modal:checked + div .card .modal-close { + z-index: 1211; } + +:root { + --collapse-label-back-color: #03234b; + --collapse-label-fore-color: #ffffff; + --collapse-label-hover-back-color: #3cb4e6; + --collapse-selected-label-back-color: #3cb4e6; + --collapse-border-color: var(--collapse-label-back-color); + --collapse-selected-border-color: #ceecf8; + --collapse-content-back-color: #ffffff; + --collapse-selected-label-border-color: #3cb4e6; } + +.collapse { + width: calc(100% - 2 * var(--universal-margin)); + opacity: 1; + display: flex; + flex-direction: column; + margin: var(--universal-margin); + border-radius: var(--universal-border-radius); } + .collapse > [type="radio"], .collapse > [type="checkbox"] { + height: 1px; + width: 1px; + margin: -1px; + overflow: hidden; + position: absolute; + clip: rect(0 0 0 0); + -webkit-clip-path: inset(100%); + clip-path: inset(100%); } + .collapse > label { + flex-grow: 1; + display: inline-block; + height: 1.25rem; + cursor: pointer; + transition: background 0.2s; + color: var(--collapse-label-fore-color); + background: var(--collapse-label-back-color); + border: 0.0714285714rem solid var(--collapse-selected-border-color); + padding: calc(1.25 * var(--universal-padding)); } + .collapse > label:hover, .collapse > label:focus { + background: var(--collapse-label-hover-back-color); } + .collapse > label + div { + flex-basis: auto; + height: 1px; + width: 1px; + margin: -1px; + overflow: hidden; + position: absolute; + clip: rect(0 0 0 0); + -webkit-clip-path: inset(100%); + clip-path: inset(100%); + transition: max-height 0.3s; + max-height: 1px; } + .collapse > :checked + label { + background: var(--collapse-selected-label-back-color); + border-color: var(--collapse-selected-label-border-color); } + .collapse > :checked + label + div { + box-sizing: border-box; + position: relative; + width: 100%; + height: auto; + overflow: auto; + margin: 0; + background: var(--collapse-content-back-color); + border: 0.0714285714rem solid var(--collapse-selected-border-color); + border-top: 0; + padding: var(--universal-padding); + clip: auto; + -webkit-clip-path: inset(0%); + clip-path: inset(0%); + max-height: 100%; } + .collapse > label:not(:first-of-type) { + border-top: 0; } + .collapse > label:first-of-type { + border-radius: var(--universal-border-radius) var(--universal-border-radius) 0 0; } + .collapse > label:last-of-type:not(:first-of-type) { + border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); } + .collapse > label:last-of-type:first-of-type { + border-radius: var(--universal-border-radius); } + .collapse > :checked:last-of-type:not(:first-of-type) + label { + border-radius: 0; } + .collapse > :checked:last-of-type + label + div { + border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); } + +/* + Custom elements for contextual background elements, toasts and tooltips. +*/ +mark.tertiary { + --mark-back-color: #3cb4e6; } + +mark.tag { + padding: calc(var(--universal-padding)/2) var(--universal-padding); + border-radius: 1em; } + +/* + Definitions for progress elements and spinners. +*/ +/* Progress module CSS variable definitions */ +:root { + --progress-back-color: #3cb4e6; + --progress-fore-color: #555; } + +progress { + display: block; + vertical-align: baseline; + -webkit-appearance: none; + -moz-appearance: none; + appearance: none; + height: 0.75rem; + width: calc(100% - 2 * var(--universal-margin)); + margin: var(--universal-margin); + border: 0; + border-radius: calc(2 * var(--universal-border-radius)); + background: var(--progress-back-color); + color: var(--progress-fore-color); } + progress::-webkit-progress-value { + background: var(--progress-fore-color); + border-top-left-radius: calc(2 * var(--universal-border-radius)); + border-bottom-left-radius: calc(2 * var(--universal-border-radius)); } + progress::-webkit-progress-bar { + background: var(--progress-back-color); } + progress::-moz-progress-bar { + background: var(--progress-fore-color); + border-top-left-radius: calc(2 * var(--universal-border-radius)); + border-bottom-left-radius: calc(2 * var(--universal-border-radius)); } + progress[value="1000"]::-webkit-progress-value { + border-radius: calc(2 * var(--universal-border-radius)); } + progress[value="1000"]::-moz-progress-bar { + border-radius: calc(2 * var(--universal-border-radius)); } + progress.inline { + display: inline-block; + vertical-align: middle; + width: 60%; } + +:root { + --spinner-back-color: #ddd; + --spinner-fore-color: #555; } + +@keyframes spinner-donut-anim { + 0% { + transform: rotate(0deg); } + 100% { + transform: rotate(360deg); } } +.spinner { + display: inline-block; + margin: var(--universal-margin); + border: 0.25rem solid var(--spinner-back-color); + border-left: 0.25rem solid var(--spinner-fore-color); + border-radius: 50%; + width: 1.25rem; + height: 1.25rem; + animation: spinner-donut-anim 1.2s linear infinite; } + +/* + Custom elements for progress bars and spinners. +*/ +progress.primary { + --progress-fore-color: #1976d2; } + +progress.secondary { + --progress-fore-color: #d32f2f; } + +progress.tertiary { + --progress-fore-color: #308732; } + +.spinner.primary { + --spinner-fore-color: #1976d2; } + +.spinner.secondary { + --spinner-fore-color: #d32f2f; } + +.spinner.tertiary { + --spinner-fore-color: #308732; } + +/* + Definitions for icons - powered by Feather (https://feathericons.com/). +*/ +span[class^='icon-'] { + display: inline-block; + height: 1em; + width: 1em; + vertical-align: -0.125em; + background-size: contain; + margin: 0 calc(var(--universal-margin) / 4); } + span[class^='icon-'].secondary { + -webkit-filter: invert(25%); + filter: invert(25%); } + span[class^='icon-'].inverse { + -webkit-filter: invert(100%); + filter: invert(100%); } + +span.icon-alert { + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='8' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='16' x2='12' y2='16'%3E%3C/line%3E%3C/svg%3E"); } +span.icon-bookmark { + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M19 21l-7-5-7 5V5a2 2 0 0 1 2-2h10a2 2 0 0 1 2 2z'%3E%3C/path%3E%3C/svg%3E"); } +span.icon-calendar { + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='4' width='18' height='18' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='16' y1='2' x2='16' y2='6'%3E%3C/line%3E%3Cline x1='8' y1='2' x2='8' y2='6'%3E%3C/line%3E%3Cline x1='3' y1='10' x2='21' y2='10'%3E%3C/line%3E%3C/svg%3E"); } +span.icon-credit { + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='1' y='4' width='22' height='16' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='1' y1='10' x2='23' y2='10'%3E%3C/line%3E%3C/svg%3E"); } +span.icon-edit { + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 14.66V20a2 2 0 0 1-2 2H4a2 2 0 0 1-2-2V6a2 2 0 0 1 2-2h5.34'%3E%3C/path%3E%3Cpolygon points='18 2 22 6 12 16 8 16 8 12 18 2'%3E%3C/polygon%3E%3C/svg%3E"); } +span.icon-link { + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M18 13v6a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2V8a2 2 0 0 1 2-2h6'%3E%3C/path%3E%3Cpolyline points='15 3 21 3 21 9'%3E%3C/polyline%3E%3Cline x1='10' y1='14' x2='21' y2='3'%3E%3C/line%3E%3C/svg%3E"); } +span.icon-help { + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M9.09 9a3 3 0 0 1 5.83 1c0 2-3 3-3 3'%3E%3C/path%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='17' x2='12' y2='17'%3E%3C/line%3E%3C/svg%3E"); } +span.icon-home { + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M3 9l9-7 9 7v11a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2z'%3E%3C/path%3E%3Cpolyline points='9 22 9 12 15 12 15 22'%3E%3C/polyline%3E%3C/svg%3E"); } +span.icon-info { + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='16' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='8' x2='12' y2='8'%3E%3C/line%3E%3C/svg%3E"); } +span.icon-lock { + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='11' width='18' height='11' rx='2' ry='2'%3E%3C/rect%3E%3Cpath d='M7 11V7a5 5 0 0 1 10 0v4'%3E%3C/path%3E%3C/svg%3E"); } +span.icon-mail { + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 4h16c1.1 0 2 .9 2 2v12c0 1.1-.9 2-2 2H4c-1.1 0-2-.9-2-2V6c0-1.1.9-2 2-2z'%3E%3C/path%3E%3Cpolyline points='22,6 12,13 2,6'%3E%3C/polyline%3E%3C/svg%3E"); } +span.icon-location { + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 10c0 7-9 13-9 13s-9-6-9-13a9 9 0 0 1 18 0z'%3E%3C/path%3E%3Ccircle cx='12' cy='10' r='3'%3E%3C/circle%3E%3C/svg%3E"); } +span.icon-phone { + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M22 16.92v3a2 2 0 0 1-2.18 2 19.79 19.79 0 0 1-8.63-3.07 19.5 19.5 0 0 1-6-6 19.79 19.79 0 0 1-3.07-8.67A2 2 0 0 1 4.11 2h3a2 2 0 0 1 2 1.72 12.84 12.84 0 0 0 .7 2.81 2 2 0 0 1-.45 2.11L8.09 9.91a16 16 0 0 0 6 6l1.27-1.27a2 2 0 0 1 2.11-.45 12.84 12.84 0 0 0 2.81.7A2 2 0 0 1 22 16.92z'%3E%3C/path%3E%3C/svg%3E"); } +span.icon-rss { + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 11a9 9 0 0 1 9 9'%3E%3C/path%3E%3Cpath d='M4 4a16 16 0 0 1 16 16'%3E%3C/path%3E%3Ccircle cx='5' cy='19' r='1'%3E%3C/circle%3E%3C/svg%3E"); } +span.icon-search { + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='11' cy='11' r='8'%3E%3C/circle%3E%3Cline x1='21' y1='21' x2='16.65' y2='16.65'%3E%3C/line%3E%3C/svg%3E"); } +span.icon-settings { + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='3'%3E%3C/circle%3E%3Cpath d='M19.4 15a1.65 1.65 0 0 0 .33 1.82l.06.06a2 2 0 0 1 0 2.83 2 2 0 0 1-2.83 0l-.06-.06a1.65 1.65 0 0 0-1.82-.33 1.65 1.65 0 0 0-1 1.51V21a2 2 0 0 1-2 2 2 2 0 0 1-2-2v-.09A1.65 1.65 0 0 0 9 19.4a1.65 1.65 0 0 0-1.82.33l-.06.06a2 2 0 0 1-2.83 0 2 2 0 0 1 0-2.83l.06-.06a1.65 1.65 0 0 0 .33-1.82 1.65 1.65 0 0 0-1.51-1H3a2 2 0 0 1-2-2 2 2 0 0 1 2-2h.09A1.65 1.65 0 0 0 4.6 9a1.65 1.65 0 0 0-.33-1.82l-.06-.06a2 2 0 0 1 0-2.83 2 2 0 0 1 2.83 0l.06.06a1.65 1.65 0 0 0 1.82.33H9a1.65 1.65 0 0 0 1-1.51V3a2 2 0 0 1 2-2 2 2 0 0 1 2 2v.09a1.65 1.65 0 0 0 1 1.51 1.65 1.65 0 0 0 1.82-.33l.06-.06a2 2 0 0 1 2.83 0 2 2 0 0 1 0 2.83l-.06.06a1.65 1.65 0 0 0-.33 1.82V9a1.65 1.65 0 0 0 1.51 1H21a2 2 0 0 1 2 2 2 2 0 0 1-2 2h-.09a1.65 1.65 0 0 0-1.51 1z'%3E%3C/path%3E%3C/svg%3E"); } +span.icon-share { + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='18' cy='5' r='3'%3E%3C/circle%3E%3Ccircle cx='6' cy='12' r='3'%3E%3C/circle%3E%3Ccircle cx='18' cy='19' r='3'%3E%3C/circle%3E%3Cline x1='8.59' y1='13.51' x2='15.42' y2='17.49'%3E%3C/line%3E%3Cline x1='15.41' y1='6.51' x2='8.59' y2='10.49'%3E%3C/line%3E%3C/svg%3E"); } +span.icon-cart { + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='9' cy='21' r='1'%3E%3C/circle%3E%3Ccircle cx='20' cy='21' r='1'%3E%3C/circle%3E%3Cpath d='M1 1h4l2.68 13.39a2 2 0 0 0 2 1.61h9.72a2 2 0 0 0 2-1.61L23 6H6'%3E%3C/path%3E%3C/svg%3E"); } +span.icon-upload { + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 15v4a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2v-4'%3E%3C/path%3E%3Cpolyline points='17 8 12 3 7 8'%3E%3C/polyline%3E%3Cline x1='12' y1='3' x2='12' y2='15'%3E%3C/line%3E%3C/svg%3E"); } +span.icon-user { + background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 21v-2a4 4 0 0 0-4-4H8a4 4 0 0 0-4 4v2'%3E%3C/path%3E%3Ccircle cx='12' cy='7' r='4'%3E%3C/circle%3E%3C/svg%3E"); } + +/* + Definitions for STMicroelectronics icons (https://brandportal.st.com/document/26). +*/ +span.icon-st-update { + background-image: url("Update.svg"); } +span.icon-st-add { + background-image: url("Add button.svg"); } + +/* + Definitions for utilities and helper classes. +*/ +/* Utility module CSS variable definitions */ +:root { + --generic-border-color: rgba(0, 0, 0, 0.3); + --generic-box-shadow: 0 0.2857142857rem 0.2857142857rem 0 rgba(0, 0, 0, 0.125), 0 0.1428571429rem 0.1428571429rem -0.1428571429rem rgba(0, 0, 0, 0.125); } + +.hidden { + display: none !important; } + +.visually-hidden { + position: absolute !important; + width: 1px !important; + height: 1px !important; + margin: -1px !important; + border: 0 !important; + padding: 0 !important; + clip: rect(0 0 0 0) !important; + -webkit-clip-path: inset(100%) !important; + clip-path: inset(100%) !important; + overflow: hidden !important; } + +.bordered { + border: 0.0714285714rem solid var(--generic-border-color) !important; } + +.rounded { + border-radius: var(--universal-border-radius) !important; } + +.circular { + border-radius: 50% !important; } + +.shadowed { + box-shadow: var(--generic-box-shadow) !important; } + +.responsive-margin { + margin: calc(var(--universal-margin) / 4) !important; } + @media screen and (min-width: 500px) { + .responsive-margin { + margin: calc(var(--universal-margin) / 2) !important; } } + @media screen and (min-width: 1280px) { + .responsive-margin { + margin: var(--universal-margin) !important; } } + +.responsive-padding { + padding: calc(var(--universal-padding) / 4) !important; } + @media screen and (min-width: 500px) { + .responsive-padding { + padding: calc(var(--universal-padding) / 2) !important; } } + @media screen and (min-width: 1280px) { + .responsive-padding { + padding: var(--universal-padding) !important; } } + +@media screen and (max-width: 499px) { + .hidden-sm { + display: none !important; } } +@media screen and (min-width: 500px) and (max-width: 1279px) { + .hidden-md { + display: none !important; } } +@media screen and (min-width: 1280px) { + .hidden-lg { + display: none !important; } } +@media screen and (max-width: 499px) { + .visually-hidden-sm { + position: absolute !important; + width: 1px !important; + height: 1px !important; + margin: -1px !important; + border: 0 !important; + padding: 0 !important; + clip: rect(0 0 0 0) !important; + -webkit-clip-path: inset(100%) !important; + clip-path: inset(100%) !important; + overflow: hidden !important; } } +@media screen and (min-width: 500px) and (max-width: 1279px) { + .visually-hidden-md { + position: absolute !important; + width: 1px !important; + height: 1px !important; + margin: -1px !important; + border: 0 !important; + padding: 0 !important; + clip: rect(0 0 0 0) !important; + -webkit-clip-path: inset(100%) !important; + clip-path: inset(100%) !important; + overflow: hidden !important; } } +@media screen and (min-width: 1280px) { + .visually-hidden-lg { + position: absolute !important; + width: 1px !important; + height: 1px !important; + margin: -1px !important; + border: 0 !important; + padding: 0 !important; + clip: rect(0 0 0 0) !important; + -webkit-clip-path: inset(100%) !important; + clip-path: inset(100%) !important; + overflow: hidden !important; } } + +/*# sourceMappingURL=mini-custom.css.map */ + +img[alt="ST logo"] { display: block; margin: auto; width: 75%; max-width: 250px; min-width: 71px; } +img[alt="Cube logo"] { float: right; width: 30%; max-width: 10rem; min-width: 8rem; padding-right: 1rem;} + +.figure { + display: block; + margin-left: auto; + margin-right: auto; + text-align: center; +} \ No newline at end of file
diff --git a/_htmresc/st_logo_2020.png b/_htmresc/st_logo_2020.png new file mode 100644 index 0000000..d6cebb5 --- /dev/null +++ b/_htmresc/st_logo_2020.png Binary files differ
