[CMSIS] Update the DMA_SxCR_CHSEL_x bit definitions to use bitwise shift operations
diff --git a/Include/stm32f401xc.h b/Include/stm32f401xc.h index e4d40ad..18aa1d9 100644 --- a/Include/stm32f401xc.h +++ b/Include/stm32f401xc.h
@@ -1419,9 +1419,9 @@ #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0x7UL << DMA_SxCR_CHSEL_Pos) /*!< 0x0E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk
diff --git a/Include/stm32f401xe.h b/Include/stm32f401xe.h index b98f2c3..6847fad 100644 --- a/Include/stm32f401xe.h +++ b/Include/stm32f401xe.h
@@ -1419,9 +1419,9 @@ #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0x7UL << DMA_SxCR_CHSEL_Pos) /*!< 0x0E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk
diff --git a/Include/stm32f405xx.h b/Include/stm32f405xx.h index 296382b..3cea856 100644 --- a/Include/stm32f405xx.h +++ b/Include/stm32f405xx.h
@@ -5511,9 +5511,9 @@ #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0x7UL << DMA_SxCR_CHSEL_Pos) /*!< 0x0E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk
diff --git a/Include/stm32f407xx.h b/Include/stm32f407xx.h index 47838cf..8bbee2c 100644 --- a/Include/stm32f407xx.h +++ b/Include/stm32f407xx.h
@@ -5811,9 +5811,9 @@ #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0x7UL << DMA_SxCR_CHSEL_Pos) /*!< 0x0E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk
diff --git a/Include/stm32f410cx.h b/Include/stm32f410cx.h index a840cbf..87ab9db 100644 --- a/Include/stm32f410cx.h +++ b/Include/stm32f410cx.h
@@ -1478,9 +1478,9 @@ #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0x7UL << DMA_SxCR_CHSEL_Pos) /*!< 0x0E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk
diff --git a/Include/stm32f410rx.h b/Include/stm32f410rx.h index 53a52ad..22f7b36 100644 --- a/Include/stm32f410rx.h +++ b/Include/stm32f410rx.h
@@ -1478,9 +1478,9 @@ #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0x7UL << DMA_SxCR_CHSEL_Pos) /*!< 0x0E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk
diff --git a/Include/stm32f410tx.h b/Include/stm32f410tx.h index 9e4bee2..7a4c96b 100644 --- a/Include/stm32f410tx.h +++ b/Include/stm32f410tx.h
@@ -1468,9 +1468,9 @@ #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0x7UL << DMA_SxCR_CHSEL_Pos) /*!< 0x0E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk
diff --git a/Include/stm32f411xe.h b/Include/stm32f411xe.h index 6524f3a..6020c68 100644 --- a/Include/stm32f411xe.h +++ b/Include/stm32f411xe.h
@@ -1422,9 +1422,9 @@ #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0x7UL << DMA_SxCR_CHSEL_Pos) /*!< 0x0E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk
diff --git a/Include/stm32f412cx.h b/Include/stm32f412cx.h index 1923466..d8dbe79 100644 --- a/Include/stm32f412cx.h +++ b/Include/stm32f412cx.h
@@ -5572,9 +5572,9 @@ #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0x7UL << DMA_SxCR_CHSEL_Pos) /*!< 0x0E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk
diff --git a/Include/stm32f412rx.h b/Include/stm32f412rx.h index 412c8b9..a245961 100644 --- a/Include/stm32f412rx.h +++ b/Include/stm32f412rx.h
@@ -5626,9 +5626,9 @@ #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0x7UL << DMA_SxCR_CHSEL_Pos) /*!< 0x0E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk
diff --git a/Include/stm32f412vx.h b/Include/stm32f412vx.h index 8024bb5..ec1d119 100644 --- a/Include/stm32f412vx.h +++ b/Include/stm32f412vx.h
@@ -5628,9 +5628,9 @@ #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0x7UL << DMA_SxCR_CHSEL_Pos) /*!< 0x0E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk
diff --git a/Include/stm32f412zx.h b/Include/stm32f412zx.h index 87fbd37..ebb010b 100644 --- a/Include/stm32f412zx.h +++ b/Include/stm32f412zx.h
@@ -5632,9 +5632,9 @@ #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0x7UL << DMA_SxCR_CHSEL_Pos) /*!< 0x0E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk
diff --git a/Include/stm32f413xx.h b/Include/stm32f413xx.h index 7e6d003..3b634be 100644 --- a/Include/stm32f413xx.h +++ b/Include/stm32f413xx.h
@@ -5928,10 +5928,10 @@ #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0xFUL << DMA_SxCR_CHSEL_Pos) /*!< 0x1E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U -#define DMA_SxCR_CHSEL_3 0x10000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ +#define DMA_SxCR_CHSEL_3 (0x8UL << DMA_SxCR_CHSEL_Pos) /*!< 0x10000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk
diff --git a/Include/stm32f415xx.h b/Include/stm32f415xx.h index d17575d..da24537 100644 --- a/Include/stm32f415xx.h +++ b/Include/stm32f415xx.h
@@ -5693,9 +5693,9 @@ #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0x7UL << DMA_SxCR_CHSEL_Pos) /*!< 0x0E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk
diff --git a/Include/stm32f417xx.h b/Include/stm32f417xx.h index 2083237..7c62637 100644 --- a/Include/stm32f417xx.h +++ b/Include/stm32f417xx.h
@@ -5990,9 +5990,9 @@ #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0x7UL << DMA_SxCR_CHSEL_Pos) /*!< 0x0E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk
diff --git a/Include/stm32f423xx.h b/Include/stm32f423xx.h index 7e91ac8..6ec9c72 100644 --- a/Include/stm32f423xx.h +++ b/Include/stm32f423xx.h
@@ -5964,10 +5964,10 @@ #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0xFUL << DMA_SxCR_CHSEL_Pos) /*!< 0x1E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U -#define DMA_SxCR_CHSEL_3 0x10000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ +#define DMA_SxCR_CHSEL_3 (0x8UL << DMA_SxCR_CHSEL_Pos) /*!< 0x10000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk
diff --git a/Include/stm32f427xx.h b/Include/stm32f427xx.h index b92c0a5..ff6146c 100644 --- a/Include/stm32f427xx.h +++ b/Include/stm32f427xx.h
@@ -5902,9 +5902,9 @@ #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0x7UL << DMA_SxCR_CHSEL_Pos) /*!< 0x0E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk
diff --git a/Include/stm32f429xx.h b/Include/stm32f429xx.h index dec71c7..10ae627 100644 --- a/Include/stm32f429xx.h +++ b/Include/stm32f429xx.h
@@ -5961,9 +5961,9 @@ #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0x7UL << DMA_SxCR_CHSEL_Pos) /*!< 0x0E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk
diff --git a/Include/stm32f437xx.h b/Include/stm32f437xx.h index 3e5eaee..5325978 100644 --- a/Include/stm32f437xx.h +++ b/Include/stm32f437xx.h
@@ -6094,9 +6094,9 @@ #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0x7UL << DMA_SxCR_CHSEL_Pos) /*!< 0x0E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk
diff --git a/Include/stm32f439xx.h b/Include/stm32f439xx.h index 33d5ac7..55bbfe8 100644 --- a/Include/stm32f439xx.h +++ b/Include/stm32f439xx.h
@@ -6148,9 +6148,9 @@ #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0x7UL << DMA_SxCR_CHSEL_Pos) /*!< 0x0E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk
diff --git a/Include/stm32f446xx.h b/Include/stm32f446xx.h index 1052d95..3491bca 100644 --- a/Include/stm32f446xx.h +++ b/Include/stm32f446xx.h
@@ -5979,9 +5979,9 @@ #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0x7UL << DMA_SxCR_CHSEL_Pos) /*!< 0x0E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk
diff --git a/Include/stm32f469xx.h b/Include/stm32f469xx.h index 3d10d50..7669bf2 100644 --- a/Include/stm32f469xx.h +++ b/Include/stm32f469xx.h
@@ -6063,9 +6063,9 @@ #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0x7UL << DMA_SxCR_CHSEL_Pos) /*!< 0x0E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk
diff --git a/Include/stm32f479xx.h b/Include/stm32f479xx.h index 3e02cd2..0a22d6a 100644 --- a/Include/stm32f479xx.h +++ b/Include/stm32f479xx.h
@@ -6253,9 +6253,9 @@ #define DMA_SxCR_CHSEL_Pos (25U) #define DMA_SxCR_CHSEL_Msk (0x7UL << DMA_SxCR_CHSEL_Pos) /*!< 0x0E000000 */ #define DMA_SxCR_CHSEL DMA_SxCR_CHSEL_Msk -#define DMA_SxCR_CHSEL_0 0x02000000U -#define DMA_SxCR_CHSEL_1 0x04000000U -#define DMA_SxCR_CHSEL_2 0x08000000U +#define DMA_SxCR_CHSEL_0 (0x1UL << DMA_SxCR_CHSEL_Pos) /*!< 0x02000000 */ +#define DMA_SxCR_CHSEL_1 (0x2UL << DMA_SxCR_CHSEL_Pos) /*!< 0x04000000 */ +#define DMA_SxCR_CHSEL_2 (0x4UL << DMA_SxCR_CHSEL_Pos) /*!< 0x08000000 */ #define DMA_SxCR_MBURST_Pos (23U) #define DMA_SxCR_MBURST_Msk (0x3UL << DMA_SxCR_MBURST_Pos) /*!< 0x01800000 */ #define DMA_SxCR_MBURST DMA_SxCR_MBURST_Msk