Add PTPPPSCR register to ETH_TypeDef (#1)
* Add PTPPPSCR register to ETH_TypeDef
* Add ETH_PTPPPSCR_PPSFREQ bits definition
diff --git a/Include/stm32f745xx.h b/Include/stm32f745xx.h
index 658fb72..15ea6d2 100644
--- a/Include/stm32f745xx.h
+++ b/Include/stm32f745xx.h
@@ -475,7 +475,8 @@
__IO uint32_t PTPTTLR;
__IO uint32_t RESERVED8;
__IO uint32_t PTPTSSR;
- uint32_t RESERVED9[565];
+ __IO uint32_t PTPPPSCR;
+ uint32_t RESERVED9[564];
__IO uint32_t DMABMR;
__IO uint32_t DMATPDR;
__IO uint32_t DMARPDR;
@@ -15221,6 +15222,11 @@
#define ETH_PTPTSSR_TSSO_Msk (0x1UL << ETH_PTPTSSR_TSSO_Pos) /*!< 0x00000010 */
#define ETH_PTPTSSR_TSSO ETH_PTPTSSR_TSSO_Msk /* Time stamp seconds overflow */
+/* Bit definition for Ethernet PTP PPS Control Register */
+#define ETH_PTPPPSCR_PPSFREQ_Pos (0U)
+#define ETH_PTPPPSCR_PPSFREQ_Msk (0x0FUL << ETH_PTPPPSCR_PPSFREQ_Pos) /*!< 0x0000000F */
+#define ETH_PTPPPSCR_PPSFREQ ETH_PTPPPSCR_PPSFREQ_Msk /* PPS frequency selection */
+
/******************************************************************************/
/* Ethernet DMA Registers bits definition */
/******************************************************************************/
diff --git a/Include/stm32f746xx.h b/Include/stm32f746xx.h
index 24de996..fbf25aa 100644
--- a/Include/stm32f746xx.h
+++ b/Include/stm32f746xx.h
@@ -477,7 +477,8 @@
__IO uint32_t PTPTTLR;
__IO uint32_t RESERVED8;
__IO uint32_t PTPTSSR;
- uint32_t RESERVED9[565];
+ __IO uint32_t PTPPPSCR;
+ uint32_t RESERVED9[564];
__IO uint32_t DMABMR;
__IO uint32_t DMATPDR;
__IO uint32_t DMARPDR;
@@ -15569,6 +15570,11 @@
#define ETH_PTPTSSR_TSSO_Msk (0x1UL << ETH_PTPTSSR_TSSO_Pos) /*!< 0x00000010 */
#define ETH_PTPTSSR_TSSO ETH_PTPTSSR_TSSO_Msk /* Time stamp seconds overflow */
+/* Bit definition for Ethernet PTP PPS Control Register */
+#define ETH_PTPPPSCR_PPSFREQ_Pos (0U)
+#define ETH_PTPPPSCR_PPSFREQ_Msk (0x0FUL << ETH_PTPPPSCR_PPSFREQ_Pos) /*!< 0x0000000F */
+#define ETH_PTPPPSCR_PPSFREQ ETH_PTPPPSCR_PPSFREQ_Msk /* PPS frequency selection */
+
/******************************************************************************/
/* Ethernet DMA Registers bits definition */
/******************************************************************************/
diff --git a/Include/stm32f750xx.h b/Include/stm32f750xx.h
index 65480da..0f1878a 100644
--- a/Include/stm32f750xx.h
+++ b/Include/stm32f750xx.h
@@ -478,7 +478,8 @@
__IO uint32_t PTPTTLR;
__IO uint32_t RESERVED8;
__IO uint32_t PTPTSSR;
- uint32_t RESERVED9[565];
+ __IO uint32_t PTPPPSCR;
+ uint32_t RESERVED9[564];
__IO uint32_t DMABMR;
__IO uint32_t DMATPDR;
__IO uint32_t DMARPDR;
@@ -15862,6 +15863,11 @@
#define ETH_PTPTSSR_TSSO_Msk (0x1UL << ETH_PTPTSSR_TSSO_Pos) /*!< 0x00000010 */
#define ETH_PTPTSSR_TSSO ETH_PTPTSSR_TSSO_Msk /* Time stamp seconds overflow */
+/* Bit definition for Ethernet PTP PPS Control Register */
+#define ETH_PTPPPSCR_PPSFREQ_Pos (0U)
+#define ETH_PTPPPSCR_PPSFREQ_Msk (0x0FUL << ETH_PTPPPSCR_PPSFREQ_Pos) /*!< 0x0000000F */
+#define ETH_PTPPPSCR_PPSFREQ ETH_PTPPPSCR_PPSFREQ_Msk /* PPS frequency selection */
+
/******************************************************************************/
/* Ethernet DMA Registers bits definition */
/******************************************************************************/
diff --git a/Include/stm32f756xx.h b/Include/stm32f756xx.h
index ff10523..3384822 100644
--- a/Include/stm32f756xx.h
+++ b/Include/stm32f756xx.h
@@ -478,7 +478,8 @@
__IO uint32_t PTPTTLR;
__IO uint32_t RESERVED8;
__IO uint32_t PTPTSSR;
- uint32_t RESERVED9[565];
+ __IO uint32_t PTPPPSCR;
+ uint32_t RESERVED9[564];
__IO uint32_t DMABMR;
__IO uint32_t DMATPDR;
__IO uint32_t DMARPDR;
@@ -15862,6 +15863,11 @@
#define ETH_PTPTSSR_TSSO_Msk (0x1UL << ETH_PTPTSSR_TSSO_Pos) /*!< 0x00000010 */
#define ETH_PTPTSSR_TSSO ETH_PTPTSSR_TSSO_Msk /* Time stamp seconds overflow */
+/* Bit definition for Ethernet PTP PPS Control Register */
+#define ETH_PTPPPSCR_PPSFREQ_Pos (0U)
+#define ETH_PTPPPSCR_PPSFREQ_Msk (0x0FUL << ETH_PTPPPSCR_PPSFREQ_Pos) /*!< 0x0000000F */
+#define ETH_PTPPPSCR_PPSFREQ ETH_PTPPPSCR_PPSFREQ_Msk /* PPS frequency selection */
+
/******************************************************************************/
/* Ethernet DMA Registers bits definition */
/******************************************************************************/
diff --git a/Include/stm32f765xx.h b/Include/stm32f765xx.h
index 97845ad..0dd0b24 100644
--- a/Include/stm32f765xx.h
+++ b/Include/stm32f765xx.h
@@ -519,7 +519,8 @@
__IO uint32_t PTPTTLR;
__IO uint32_t RESERVED8;
__IO uint32_t PTPTSSR;
- uint32_t RESERVED9[565];
+ __IO uint32_t PTPPPSCR;
+ uint32_t RESERVED9[564];
__IO uint32_t DMABMR;
__IO uint32_t DMATPDR;
__IO uint32_t DMARPDR;
@@ -15879,6 +15880,11 @@
#define ETH_PTPTSSR_TSSO_Msk (0x1UL << ETH_PTPTSSR_TSSO_Pos) /*!< 0x00000010 */
#define ETH_PTPTSSR_TSSO ETH_PTPTSSR_TSSO_Msk /* Time stamp seconds overflow */
+/* Bit definition for Ethernet PTP PPS Control Register */
+#define ETH_PTPPPSCR_PPSFREQ_Pos (0U)
+#define ETH_PTPPPSCR_PPSFREQ_Msk (0x0FUL << ETH_PTPPPSCR_PPSFREQ_Pos) /*!< 0x0000000F */
+#define ETH_PTPPPSCR_PPSFREQ ETH_PTPPPSCR_PPSFREQ_Msk /* PPS frequency selection */
+
/******************************************************************************/
/* Ethernet DMA Registers bits definition */
/******************************************************************************/
diff --git a/Include/stm32f767xx.h b/Include/stm32f767xx.h
index 2f9a672..e89cc7d 100644
--- a/Include/stm32f767xx.h
+++ b/Include/stm32f767xx.h
@@ -522,7 +522,8 @@
__IO uint32_t PTPTTLR;
__IO uint32_t RESERVED8;
__IO uint32_t PTPTSSR;
- uint32_t RESERVED9[565];
+ __IO uint32_t PTPPPSCR;
+ uint32_t RESERVED9[564];
__IO uint32_t DMABMR;
__IO uint32_t DMATPDR;
__IO uint32_t DMARPDR;
@@ -16273,6 +16274,11 @@
#define ETH_PTPTSSR_TSSO_Msk (0x1UL << ETH_PTPTSSR_TSSO_Pos) /*!< 0x00000010 */
#define ETH_PTPTSSR_TSSO ETH_PTPTSSR_TSSO_Msk /* Time stamp seconds overflow */
+/* Bit definition for Ethernet PTP PPS Control Register */
+#define ETH_PTPPPSCR_PPSFREQ_Pos (0U)
+#define ETH_PTPPPSCR_PPSFREQ_Msk (0x0FUL << ETH_PTPPPSCR_PPSFREQ_Pos) /*!< 0x0000000F */
+#define ETH_PTPPPSCR_PPSFREQ ETH_PTPPPSCR_PPSFREQ_Msk /* PPS frequency selection */
+
/******************************************************************************/
/* Ethernet DMA Registers bits definition */
/******************************************************************************/
diff --git a/Include/stm32f769xx.h b/Include/stm32f769xx.h
index 88afec7..e11eb75 100644
--- a/Include/stm32f769xx.h
+++ b/Include/stm32f769xx.h
@@ -523,7 +523,8 @@
__IO uint32_t PTPTTLR;
__IO uint32_t RESERVED8;
__IO uint32_t PTPTSSR;
- uint32_t RESERVED9[565];
+ __IO uint32_t PTPPPSCR;
+ uint32_t RESERVED9[564];
__IO uint32_t DMABMR;
__IO uint32_t DMATPDR;
__IO uint32_t DMARPDR;
@@ -16368,6 +16369,11 @@
#define ETH_PTPTSSR_TSSO_Msk (0x1UL << ETH_PTPTSSR_TSSO_Pos) /*!< 0x00000010 */
#define ETH_PTPTSSR_TSSO ETH_PTPTSSR_TSSO_Msk /* Time stamp seconds overflow */
+/* Bit definition for Ethernet PTP PPS Control Register */
+#define ETH_PTPPPSCR_PPSFREQ_Pos (0U)
+#define ETH_PTPPPSCR_PPSFREQ_Msk (0x0FUL << ETH_PTPPPSCR_PPSFREQ_Pos) /*!< 0x0000000F */
+#define ETH_PTPPPSCR_PPSFREQ ETH_PTPPPSCR_PPSFREQ_Msk /* PPS frequency selection */
+
/******************************************************************************/
/* Ethernet DMA Registers bits definition */
/******************************************************************************/
diff --git a/Include/stm32f777xx.h b/Include/stm32f777xx.h
index c5bcd8a..4e4b2db 100644
--- a/Include/stm32f777xx.h
+++ b/Include/stm32f777xx.h
@@ -523,7 +523,8 @@
__IO uint32_t PTPTTLR;
__IO uint32_t RESERVED8;
__IO uint32_t PTPTSSR;
- uint32_t RESERVED9[565];
+ __IO uint32_t PTPPPSCR;
+ uint32_t RESERVED9[564];
__IO uint32_t DMABMR;
__IO uint32_t DMATPDR;
__IO uint32_t DMARPDR;
@@ -16566,6 +16567,11 @@
#define ETH_PTPTSSR_TSSO_Msk (0x1UL << ETH_PTPTSSR_TSSO_Pos) /*!< 0x00000010 */
#define ETH_PTPTSSR_TSSO ETH_PTPTSSR_TSSO_Msk /* Time stamp seconds overflow */
+/* Bit definition for Ethernet PTP PPS Control Register */
+#define ETH_PTPPPSCR_PPSFREQ_Pos (0U)
+#define ETH_PTPPPSCR_PPSFREQ_Msk (0x0FUL << ETH_PTPPPSCR_PPSFREQ_Pos) /*!< 0x0000000F */
+#define ETH_PTPPPSCR_PPSFREQ ETH_PTPPPSCR_PPSFREQ_Msk /* PPS frequency selection */
+
/******************************************************************************/
/* Ethernet DMA Registers bits definition */
/******************************************************************************/
diff --git a/Include/stm32f779xx.h b/Include/stm32f779xx.h
index 5565a0b..2af7465 100644
--- a/Include/stm32f779xx.h
+++ b/Include/stm32f779xx.h
@@ -524,7 +524,8 @@
__IO uint32_t PTPTTLR;
__IO uint32_t RESERVED8;
__IO uint32_t PTPTSSR;
- uint32_t RESERVED9[565];
+ __IO uint32_t PTPPPSCR;
+ uint32_t RESERVED9[564];
__IO uint32_t DMABMR;
__IO uint32_t DMATPDR;
__IO uint32_t DMARPDR;
@@ -16661,6 +16662,11 @@
#define ETH_PTPTSSR_TSSO_Msk (0x1UL << ETH_PTPTSSR_TSSO_Pos) /*!< 0x00000010 */
#define ETH_PTPTSSR_TSSO ETH_PTPTSSR_TSSO_Msk /* Time stamp seconds overflow */
+/* Bit definition for Ethernet PTP PPS Control Register */
+#define ETH_PTPPPSCR_PPSFREQ_Pos (0U)
+#define ETH_PTPPPSCR_PPSFREQ_Msk (0x0FUL << ETH_PTPPPSCR_PPSFREQ_Pos) /*!< 0x0000000F */
+#define ETH_PTPPPSCR_PPSFREQ ETH_PTPPPSCR_PPSFREQ_Msk /* PPS frequency selection */
+
/******************************************************************************/
/* Ethernet DMA Registers bits definition */
/******************************************************************************/
