| ;/******************** (C) COPYRIGHT 2016 STMicroelectronics ******************** |
| ;* File Name : startup_stm32l053xx.s |
| ;* Author : MCD Application Team |
| ;* Description : STM32L053xx Ultra Low Power Devices vector |
| ;* This module performs: |
| ;* - Set the initial SP |
| ;* - Set the initial PC == _iar_program_start, |
| ;* - Set the vector table entries with the exceptions ISR |
| ;* address. |
| ;* - Configure the system clock |
| ;* - Branches to main in the C library (which eventually |
| ;* calls main()). |
| ;* After Reset the Cortex-M0+ processor is in Thread mode, |
| ;* priority is Privileged, and the Stack is set to Main. |
| ;******************************************************************************** |
| ;* |
| ;* Redistribution and use in source and binary forms, with or without modification, |
| ;* are permitted provided that the following conditions are met: |
| ;* 1. Redistributions of source code must retain the above copyright notice, |
| ;* this list of conditions and the following disclaimer. |
| ;* 2. Redistributions in binary form must reproduce the above copyright notice, |
| ;* this list of conditions and the following disclaimer in the documentation |
| ;* and/or other materials provided with the distribution. |
| ;* 3. Neither the name of STMicroelectronics nor the names of its contributors |
| ;* may be used to endorse or promote products derived from this software |
| ;* without specific prior written permission. |
| ;* |
| ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| ;* |
| ;*******************************************************************************/ |
| ; |
| ; |
| ; The modules in this file are included in the libraries, and may be replaced |
| ; by any user-defined modules that define the PUBLIC symbol _program_start or |
| ; a user defined start symbol. |
| ; To override the cstartup defined in the library, simply add your modified |
| ; version to the workbench project. |
| ; |
| ; The vector table is normally located at address 0. |
| ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6. |
| ; The name "__vector_table" has special meaning for C-SPY: |
| ; it is where the SP start value is found, and the NVIC vector |
| ; table register (VTOR) is initialized to this address if != 0. |
| ; |
| ; Cortex-M version |
| ; |
| |
| MODULE ?cstartup |
| |
| ;; Forward declaration of sections. |
| SECTION CSTACK:DATA:NOROOT(3) |
| |
| SECTION .intvec:CODE:NOROOT(2) |
| |
| EXTERN __iar_program_start |
| EXTERN SystemInit |
| PUBLIC __vector_table |
| |
| DATA |
| __vector_table |
| DCD sfe(CSTACK) |
| DCD Reset_Handler ; Reset Handler |
| |
| DCD NMI_Handler ; NMI Handler |
| DCD HardFault_Handler ; Hard Fault Handler |
| DCD 0 ; Reserved |
| DCD 0 ; Reserved |
| DCD 0 ; Reserved |
| DCD 0 ; Reserved |
| DCD 0 ; Reserved |
| DCD 0 ; Reserved |
| DCD 0 ; Reserved |
| DCD SVC_Handler ; SVCall Handler |
| DCD 0 ; Reserved |
| DCD 0 ; Reserved |
| DCD PendSV_Handler ; PendSV Handler |
| DCD SysTick_Handler ; SysTick Handler |
| |
| ; External Interrupts |
| DCD WWDG_IRQHandler ; Window Watchdog |
| DCD PVD_IRQHandler ; PVD through EXTI Line detect |
| DCD RTC_IRQHandler ; RTC through EXTI Line |
| DCD FLASH_IRQHandler ; FLASH |
| DCD RCC_CRS_IRQHandler ; RCC_CRS |
| DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1 |
| DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3 |
| DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15 |
| DCD TSC_IRQHandler ; TSC |
| DCD DMA1_Channel1_IRQHandler ; DMA1 Channel 1 |
| DCD DMA1_Channel2_3_IRQHandler ; DMA1 Channel 2 and Channel 3 |
| DCD DMA1_Channel4_5_6_7_IRQHandler ; DMA1 Channel 4, Channel 5, Channel 6 and Channel 7 |
| DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2 |
| DCD LPTIM1_IRQHandler ; LPTIM1 |
| DCD 0 ; Reserved |
| DCD TIM2_IRQHandler ; TIM2 |
| DCD 0 ; Reserved |
| DCD TIM6_DAC_IRQHandler ; TIM6 and DAC |
| DCD 0 ; Reserved |
| DCD 0 ; Reserved |
| DCD TIM21_IRQHandler ; TIM21 |
| DCD 0 ; Reserved |
| DCD TIM22_IRQHandler ; TIM22 |
| DCD I2C1_IRQHandler ; I2C1 |
| DCD I2C2_IRQHandler ; I2C2 |
| DCD SPI1_IRQHandler ; SPI1 |
| DCD SPI2_IRQHandler ; SPI2 |
| DCD USART1_IRQHandler ; USART1 |
| DCD USART2_IRQHandler ; USART2 |
| DCD RNG_LPUART1_IRQHandler ; RNG and LPUART1 |
| DCD LCD_IRQHandler ; LCD |
| DCD USB_IRQHandler ; USB |
| |
| ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
| ;; |
| ;; Default interrupt handlers. |
| ;; |
| THUMB |
| PUBWEAK Reset_Handler |
| SECTION .text:CODE:NOROOT:REORDER(2) |
| Reset_Handler |
| LDR R0, =SystemInit |
| BLX R0 |
| LDR R0, =__iar_program_start |
| BX R0 |
| |
| PUBWEAK NMI_Handler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| NMI_Handler |
| B NMI_Handler |
| |
| |
| PUBWEAK HardFault_Handler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| HardFault_Handler |
| B HardFault_Handler |
| |
| |
| PUBWEAK SVC_Handler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| SVC_Handler |
| B SVC_Handler |
| |
| |
| PUBWEAK PendSV_Handler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| PendSV_Handler |
| B PendSV_Handler |
| |
| |
| PUBWEAK SysTick_Handler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| SysTick_Handler |
| B SysTick_Handler |
| |
| |
| PUBWEAK WWDG_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| WWDG_IRQHandler |
| B WWDG_IRQHandler |
| |
| |
| PUBWEAK PVD_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| PVD_IRQHandler |
| B PVD_IRQHandler |
| |
| |
| PUBWEAK RTC_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| RTC_IRQHandler |
| B RTC_IRQHandler |
| |
| |
| PUBWEAK FLASH_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| FLASH_IRQHandler |
| B FLASH_IRQHandler |
| |
| |
| PUBWEAK RCC_CRS_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| RCC_CRS_IRQHandler |
| B RCC_CRS_IRQHandler |
| |
| |
| PUBWEAK EXTI0_1_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| EXTI0_1_IRQHandler |
| B EXTI0_1_IRQHandler |
| |
| |
| PUBWEAK EXTI2_3_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| EXTI2_3_IRQHandler |
| B EXTI2_3_IRQHandler |
| |
| |
| PUBWEAK EXTI4_15_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| EXTI4_15_IRQHandler |
| B EXTI4_15_IRQHandler |
| |
| |
| PUBWEAK TSC_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| TSC_IRQHandler |
| B TSC_IRQHandler |
| |
| |
| PUBWEAK DMA1_Channel1_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| DMA1_Channel1_IRQHandler |
| B DMA1_Channel1_IRQHandler |
| |
| |
| PUBWEAK DMA1_Channel2_3_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| DMA1_Channel2_3_IRQHandler |
| B DMA1_Channel2_3_IRQHandler |
| |
| |
| PUBWEAK DMA1_Channel4_5_6_7_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| DMA1_Channel4_5_6_7_IRQHandler |
| B DMA1_Channel4_5_6_7_IRQHandler |
| |
| |
| PUBWEAK ADC1_COMP_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| ADC1_COMP_IRQHandler |
| B ADC1_COMP_IRQHandler |
| |
| |
| PUBWEAK LPTIM1_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| LPTIM1_IRQHandler |
| B LPTIM1_IRQHandler |
| |
| |
| PUBWEAK TIM2_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| TIM2_IRQHandler |
| B TIM2_IRQHandler |
| |
| |
| PUBWEAK TIM6_DAC_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| TIM6_DAC_IRQHandler |
| B TIM6_DAC_IRQHandler |
| |
| PUBWEAK TIM21_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| TIM21_IRQHandler |
| B TIM21_IRQHandler |
| |
| PUBWEAK TIM22_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| TIM22_IRQHandler |
| B TIM22_IRQHandler |
| |
| |
| PUBWEAK I2C1_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| I2C1_IRQHandler |
| B I2C1_IRQHandler |
| |
| |
| PUBWEAK I2C2_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| I2C2_IRQHandler |
| B I2C2_IRQHandler |
| |
| |
| PUBWEAK SPI1_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| SPI1_IRQHandler |
| B SPI1_IRQHandler |
| |
| |
| PUBWEAK SPI2_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| SPI2_IRQHandler |
| B SPI2_IRQHandler |
| |
| |
| PUBWEAK USART1_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| USART1_IRQHandler |
| B USART1_IRQHandler |
| |
| |
| PUBWEAK USART2_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| USART2_IRQHandler |
| B USART2_IRQHandler |
| |
| |
| PUBWEAK RNG_LPUART1_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| RNG_LPUART1_IRQHandler |
| B RNG_LPUART1_IRQHandler |
| |
| |
| PUBWEAK LCD_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| LCD_IRQHandler |
| B LCD_IRQHandler |
| |
| PUBWEAK USB_IRQHandler |
| SECTION .text:CODE:NOROOT:REORDER(1) |
| USB_IRQHandler |
| B USB_IRQHandler |
| |
| END |
| ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE***** |
