Release_Notes.html - third_party/github/STMicroelectronics/cmsis_device_l1 - Git at Google

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 <h1 id="release-notes-for-stm32l1xx-cmsis"><small>Release Notes for</small> <mark>STM32L1xx CMSIS</mark></h1>
 <p>Copyright © 2009-2018 ARM Limited - STMicroelectronics<br />
 </p>
 <a href="https://www.st.com" class="logo"><img src="_htmresc/st_logo.png" alt="ST logo" /></a>
 </center>
 </div>
 </div>
 <h1 id="purpose">Purpose</h1>
 <p>This driver provides the CMSIS device for the stm32l1xx products. This covers:</p>
 <ul>
 <li>STM32L100xx devices</li>
 <li>STM32L151xx devices</li>
 <li>STM32L152xx devices</li>
 <li>STM32L162xx devices</li>
 </ul>
 <p>This driver is composed of the descriptions of the registers under “Include” directory.</p>
 <p>Various template file are provided to easily build an application. They can be adapted to fit applications requirements.</p>
 <ul>
 <li>Templates/system_stm32l1xx.c contains the initialization code referred as SystemInit.</li>
 <li>Startup files are provided as example for IAR©, KEIL© and SW4STM32©.</li>
 <li>Linker files are provided as example for IAR©, KEIL© and SW4STM32©.</li>
 </ul>
 </div>
 <div class="col-sm-12 col-lg-8">
 <h1 id="update-history">Update History</h1>
 <div class="collapse">
 <input type="checkbox" id="collapse-section13" checked aria-hidden="true"> <label for="collapse-section13" aria-hidden="true">V2.3.2 / 21-May-2021</label>
 <div>
 <h2 id="main-changes">Main Changes</h2>
 <h3 id="maintenance-release">Maintenance release</h3>
 <h2 id="contents">Contents</h2>
 <ul>
 <li>Improve GCC startup files robustness.</li>
 <li>Add LSI maximum startup time datasheet value: LSI_STARTUP_TIME.</li>
 <li>Add atomic register access macros.</li>
 <li>Protect Vector table modification following SRAM or FLASH preprocessor directive by a generic preprocessor directive : USER_VECT_TAB_ADDRESS.</li>
 <li>Remove bit definition related to PF and PG ports from unsupported devices (L1xxxB devices).</li>
 <li>Fix SYSCFG_EXTICR1_EXTI3_PF and SYSCFG_EXTICR1_EXTI3_PG defines values.</li>
 <li>Update the hal_flash.h file to correctly support the FLASH_SIZE of cat.2 devices.</li>
 </ul>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section12" aria-hidden="true"> <label for="collapse-section12" aria-hidden="true">V2.3.1 / 24-June-2020</label>
 <div>
 <h2 id="main-changes-1">Main Changes</h2>
 <h3 id="maintenance-release-1">Maintenance release</h3>
 <h2 id="contents-1">Contents</h2>
 <ul>
 <li>All header files
 <ul>
 <li>Remove NVIC CMSIS bits definitions to avoid duplication with CMSIS Core V5.x</li>
 <li>Remove GPIOx BRR register from GPIO structure and bit definitions when not supported</li>
 <li>Add ADC VREFINT/TEMPSENSOR addresses definitions in line with products datasheets:
 <ul>
 <li>VREFINT_CAL_ADDR_CMSIS</li>
 <li>TEMPSENSOR_CAL1_ADDR_CMSIS</li>
 <li>TEMPSENSOR_CAL2_ADDR_CMSIS</li>
 </ul></li>
 <li>Remove unused IS_TIM_SYNCHRO_INSTANCE() assert macro</li>
 <li>Update IS_TIM_MASTER_INSTANCE with all supported instances.</li>
 </ul></li>
 <li>system_stm32l1xx.c file
 <ul>
 <li>Update SystemInit() API to don’t reset RCC registers to its reset values</li>
 </ul></li>
 </ul>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section11" aria-hidden="true"> <label for="collapse-section11" aria-hidden="true">V2.3.0 / 05-April-2019</label>
 <div>
 <h2 id="main-changes-2">Main Changes</h2>
 <h3 id="maintenance-release-2">Maintenance release</h3>
 <h2 id="contents-2">Contents</h2>
 <ul>
 <li>stm32l0xx.h
 <ul>
 <li>Align ErrorStatus typedef to common error handling</li>
 </ul></li>
 <li>startup_stm32l1xxxxx.s
 <ul>
 <li>Update header of startup files to remove build error with ARM compiler.</li>
 </ul></li>
 <li>Updated Update CMSIS Devices compliancy with MISRA C 2012 rules
 <ul>
 <li>Rule-10.6: Use ‘UL’ postfix for _Msk definitions and memory/peripheral base addresses</li>
 </ul></li>
 <li>Update CMSIS device description files according to latest version of HAL/LL drivers
 <ul>
 <li>Correct definitions for USB_COUNT3_TX_0 and USB_COUNT3_TX_1 registers</li>
 <li>Add IS_PCD_ALL_INSTANCE definition</li>
 <li>Add IS_TIM_SYNCHRO_INSTANCE macro definition</li>
 <li>Update macros definition for TIM instances</li>
 </ul></li>
 </ul>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section10" aria-hidden="true"> <label for="collapse-section10" aria-hidden="true">V2.2.3 / 12-January-2018</label>
 <div>
 <h2 id="main-changes-3">Main Changes</h2>
 <h3 id="patch-release">Patch release</h3>
 <h2 id="contents-3">Contents</h2>
 <ul>
 <li>Corrected devices supporting RI_HYSCR3, RI_HYSCR4, RI_ASMRx, RI_CMRx, RI_CICRx registers in CMSIS files.</li>
 </ul>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section9" aria-hidden="true"> <label for="collapse-section9" aria-hidden="true">V2.2.2 / 25-August-2017</label>
 <div>
 <h2 id="main-changes-4">Main Changes</h2>
 <h3 id="maintenance-release-3">Maintenance release</h3>
 <h2 id="contents-4">Contents</h2>
 <ul>
 <li>Removed DATE and VERSION fields from header files.</li>
 </ul>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section8" aria-hidden="true"> <label for="collapse-section8" aria-hidden="true">V2.2.1 / 21-April-2017</label>
 <div>
 <h2 id="main-changes-5">Main Changes</h2>
 <h3 id="maintenance-release-4">Maintenance release</h3>
 <h2 id="contents-5">Contents</h2>
 <ul>
 <li>Update CMSIS Devices compliancy with MISRA C 2004 rules:
 <ul>
 <li>MISRA C 2004 rule 10.6 (‘U’ suffix applied to all constants of ‘unsigned’ type)</li>
 <li>Update system_stm32l1xx.h/.c files.</li>
 </ul></li>
 <li>Align Bit definitions for SCB_CFSR register to be compliant with CMSIS Core V4.x and V5.x.</li>
 <li>Rename RTC_CR_BCK bits in RTC_CR register to RTC_CR_BKP, to be aligned with others series.</li>
 <li>Rename GPIO_AFRL_AFRLx and GPIO_AFRL_AFRHx bit definitions (from GPIO_AFRL/AFRH registers) to GPIO_AFRL_AFSELx.</li>
 </ul>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section7" aria-hidden="true"> <label for="collapse-section7" aria-hidden="true">V2.2.0 / 01-July-2016</label>
 <div>
 <h2 id="main-changes-6">Main Changes</h2>
 <h3 id="maintenance-release-5">Maintenance release</h3>
 <h2 id="contents-6">Contents</h2>
 <ul>
 <li>Add macros _Pos and _Msk for each constants.
 <ul>
 <li>For instance:
 <ul>
 <li>#define ADC_LTR_LT ((uint32_t)0x00000FFFU)</li>
 </ul></li>
 <li>Is now provided as:
 <ul>
 <li>#define ADC_LTR_LT_Pos (0U)</li>
 <li>#define ADC_LTR_LT_Msk (0xFFFU &lt;&lt; ADC_LTR_LT_Pos)</li>
 <li>#define ADC_LTR_LT ADC_LTR_LT_Msk</li>
 </ul></li>
 </ul></li>
 <li>IS_I2S_ALL_INSTANCE is now SPI2 and SPI3 instead of SPI1 and SPI2.</li>
 <li>Update the TIM_ARR_ARR and TIM_CNT_CNT as they support the 32 bit counter feature.</li>
 <li>Add macro IS_TIM_ETR_INSTANCE.</li>
 <li>Add RI_ASCR2_GR6_x with x = 1,2,3,4 if applicable.</li>
 <li>Add macro IS_SMBUS_ALL_INSTANCE.</li>
 <li>Set default value for SystemCoreClock to 2097000 instead of 32000000.</li>
 <li>Correct the presence of TIM9 for some devices inside various TIMER macros.</li>
 </ul>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="true">V2.1.3 / 04-March-2016</label>
 <div>
 <h2 id="main-changes-7">Main Changes</h2>
 <h3 id="maintenance-release-6">Maintenance release</h3>
 <h2 id="contents-7">Contents</h2>
 <ul>
 <li>Add HardFault_IRQn.</li>
 <li>Add BKP5R to BKP19R for RTC_TypeDef for stm32l151xba.</li>
 <li>Align bits naming on all stm32 families (ex: WWDG_CFR_WDGTB0 -&gt; WWDG_CFR_WDGTB_0).</li>
 <li>Rename RCC_CFGR_MCO_DIVx to RCC_CFGR_MCOPRE_DIVx</li>
 <li>Align Bits naming on all stm32 families (ex: EXTI_IMR_MR0 –&gt; EXTI_IMR_IM0)</li>
 <li>Update .icf file to correct empty linker ROM Start/End menu, under IAR, for stm32l151xdx, stm32l152xdx and stm32l162xdx.</li>
 <li>Rename RCC_CFGR_MCO_x to RCC_CFGR_MCOSEL_x to be aligned with Reference Manual.</li>
 <li>Update CMSIS drivers to apply MISRA C 2004 rule 10.6. (Use U postfix)</li>
 <li>Add defines FLASHSIZE_BASE and UID_BASE</li>
 <li>ADC common instance standardization (new define ADC1_COMMON)</li>
 <li>Remove bit GPIO_BRR_BR_x from Cat1 to Cat2 devices</li>
 <li>Literals “ADC_SMPR1_SMP27, ADC_SMPR1_SMP28, ADC_SMPR1_SMP29” are available on Cat4, Cat5 only.</li>
 <li>Add DMA_CNDTR_NDT, DMA_CPAR_PA and DMA_CMAR_MA definitions present on other stm32 families.</li>
 <li>Add defines to trig feature inside source code based on CMSIS content:
 <ul>
 <li>RTC_TAMPER1_SUPPORT</li>
 <li>RTC_TAMPER2_SUPPORT</li>
 <li>RTC_TAMPER3_SUPPORT</li>
 <li>RTC_BACKUP_SUPPORT</li>
 <li>RTC_WAKEUP_SUPPORT</li>
 <li>RTC_SMOOTHCALIB_SUPPORT</li>
 <li>RTC_SUBSECOND_SUPPORT.</li>
 <li>PWR_PVD_SUPPORT</li>
 </ul></li>
 <li>Set CMSIS variables PLLMulTable, AHBPrescTable and APBPrescTable as external in system_stm32l1xx.h.</li>
 <li>Bit 23 of all EXTI registers (IMR, EMR, …) is not supported on Cat 1 &amp; 2.</li>
 <li>Correct a wrong values for RI_ASCR1_CH_27 to RI_ASCR1_CH_30</li>
 <li>Add defines for LCD capacitance</li>
 <li>Suppress SPI1 from I2S_ALL_INSTANCE</li>
 </ul>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true">V2.1.2 / 09-October-2015</label>
 <div>
 <h2 id="main-changes-8">Main Changes</h2>
 <h3 id="maintenance-release-7">Maintenance release</h3>
 <h2 id="contents-8">Contents</h2>
 <ul>
 <li>Removing the __IO attribute for PLLMulTable and AHBPrescTable. This was leading to issue during C++ initialisation.</li>
 <li>IDR field of CRC_TypeDef changed from uint32_t to uint8_t to comply with register structure.</li>
 <li>Added TIM10 and TIM11 to IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(INSTANCE).</li>
 <li>Renaming USB_CNTR_LP_MODE to USB_CNTR_LPMODE for naming consistancy with other bits.</li>
 <li>Renaming USB_ISTR_PMAOVRM to USB_ISTR_PMAOVR to use the name of the bit in this register.</li>
 </ul>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true">V2.1.1 / 31-March-2015</label>
 <div>
 <h2 id="main-changes-9">Main Changes</h2>
 <h3 id="maintenance-release-8">Maintenance release</h3>
 <h2 id="contents-9">Contents</h2>
 <ul>
 <li>Ensure compliancy w/ C++</li>
 <li>Minor update on Timer assert.</li>
 <li>Adding IS_AES_ALL_INSTANCE macro for product with AES.</li>
 </ul>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true">V2.1.0 / 06-February-2015</label>
 <div>
 <h2 id="main-changes-10">Main Changes</h2>
 <h3 id="maintenance-release-9">Maintenance release</h3>
 <h2 id="contents-10">Contents</h2>
 <ul>
 <li>Add CMSIS files for new STM32L1 e<strong>X</strong>tended Devices : <strong>STM32L151xDX, STM32L152xDX and STM32L162xDX</strong></li>
 </ul>
 </div>
 </div>
 <div class="collapse">
 <input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true">V2.0.0 / 05-September-2014</label>
 <div>
 <h2 id="main-changes-11">Main Changes</h2>
 <h3 id="maintenance-release-10">Maintenance release</h3>
 <h2 id="contents-11">Contents</h2>
 <ul>
 <li>Update based on STM32Cube specification</li>
 </ul>
 <h2 id="other-compatibilities">Other compatibilities</h2>
 <ul>
 <li>This version has to be used only with <strong>STM32CubeL1</strong> based development</li>
 </ul>
 </div>
 </div>
 </div>
 </div>
 <footer class="sticky">
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	<h1 id="release-notes-for-stm32l1xx-cmsis"><small>Release Notes for</small> <mark>STM32L1xx CMSIS</mark></h1>
	<p>Copyright © 2009-2018 ARM Limited - STMicroelectronics<br />
	</p>
	<a href="https://www.st.com" class="logo"><img src="_htmresc/st_logo.png" alt="ST logo" /></a>
	</center>
	</div>
	</div>
	<h1 id="purpose">Purpose</h1>
	<p>This driver provides the CMSIS device for the stm32l1xx products. This covers:</p>
	<ul>
	<li>STM32L100xx devices</li>
	<li>STM32L151xx devices</li>
	<li>STM32L152xx devices</li>
	<li>STM32L162xx devices</li>
	</ul>
	<p>This driver is composed of the descriptions of the registers under “Include” directory.</p>
	<p>Various template file are provided to easily build an application. They can be adapted to fit applications requirements.</p>
	<ul>
	<li>Templates/system_stm32l1xx.c contains the initialization code referred as SystemInit.</li>
	<li>Startup files are provided as example for IAR©, KEIL© and SW4STM32©.</li>
	<li>Linker files are provided as example for IAR©, KEIL© and SW4STM32©.</li>
	</ul>
	</div>
	<div class="col-sm-12 col-lg-8">
	<h1 id="update-history">Update History</h1>
	<div class="collapse">
	<input type="checkbox" id="collapse-section13" checked aria-hidden="true"> <label for="collapse-section13" aria-hidden="true">V2.3.2 / 21-May-2021</label>
	<div>
	<h2 id="main-changes">Main Changes</h2>
	<h3 id="maintenance-release">Maintenance release</h3>
	<h2 id="contents">Contents</h2>
	<ul>
	<li>Improve GCC startup files robustness.</li>
	<li>Add LSI maximum startup time datasheet value: LSI_STARTUP_TIME.</li>
	<li>Add atomic register access macros.</li>
	<li>Protect Vector table modification following SRAM or FLASH preprocessor directive by a generic preprocessor directive : USER_VECT_TAB_ADDRESS.</li>
	<li>Remove bit definition related to PF and PG ports from unsupported devices (L1xxxB devices).</li>
	<li>Fix SYSCFG_EXTICR1_EXTI3_PF and SYSCFG_EXTICR1_EXTI3_PG defines values.</li>
	<li>Update the hal_flash.h file to correctly support the FLASH_SIZE of cat.2 devices.</li>
	</ul>
	</div>
	</div>
	<div class="collapse">
	<input type="checkbox" id="collapse-section12" aria-hidden="true"> <label for="collapse-section12" aria-hidden="true">V2.3.1 / 24-June-2020</label>
	<div>
	<h2 id="main-changes-1">Main Changes</h2>
	<h3 id="maintenance-release-1">Maintenance release</h3>
	<h2 id="contents-1">Contents</h2>
	<ul>
	<li>All header files
	<ul>
	<li>Remove NVIC CMSIS bits definitions to avoid duplication with CMSIS Core V5.x</li>
	<li>Remove GPIOx BRR register from GPIO structure and bit definitions when not supported</li>
	<li>Add ADC VREFINT/TEMPSENSOR addresses definitions in line with products datasheets:
	<ul>
	<li>VREFINT_CAL_ADDR_CMSIS</li>
	<li>TEMPSENSOR_CAL1_ADDR_CMSIS</li>
	<li>TEMPSENSOR_CAL2_ADDR_CMSIS</li>
	</ul></li>
	<li>Remove unused IS_TIM_SYNCHRO_INSTANCE() assert macro</li>
	<li>Update IS_TIM_MASTER_INSTANCE with all supported instances.</li>
	</ul></li>
	<li>system_stm32l1xx.c file
	<ul>
	<li>Update SystemInit() API to don’t reset RCC registers to its reset values</li>
	</ul></li>
	</ul>
	</div>
	</div>
	<div class="collapse">
	<input type="checkbox" id="collapse-section11" aria-hidden="true"> <label for="collapse-section11" aria-hidden="true">V2.3.0 / 05-April-2019</label>
	<div>
	<h2 id="main-changes-2">Main Changes</h2>
	<h3 id="maintenance-release-2">Maintenance release</h3>
	<h2 id="contents-2">Contents</h2>
	<ul>
	<li>stm32l0xx.h
	<ul>
	<li>Align ErrorStatus typedef to common error handling</li>
	</ul></li>
	<li>startup_stm32l1xxxxx.s
	<ul>
	<li>Update header of startup files to remove build error with ARM compiler.</li>
	</ul></li>
	<li>Updated Update CMSIS Devices compliancy with MISRA C 2012 rules
	<ul>
	<li>Rule-10.6: Use ‘UL’ postfix for _Msk definitions and memory/peripheral base addresses</li>
	</ul></li>
	<li>Update CMSIS device description files according to latest version of HAL/LL drivers
	<ul>
	<li>Correct definitions for USB_COUNT3_TX_0 and USB_COUNT3_TX_1 registers</li>
	<li>Add IS_PCD_ALL_INSTANCE definition</li>
	<li>Add IS_TIM_SYNCHRO_INSTANCE macro definition</li>
	<li>Update macros definition for TIM instances</li>
	</ul></li>
	</ul>
	</div>
	</div>
	<div class="collapse">
	<input type="checkbox" id="collapse-section10" aria-hidden="true"> <label for="collapse-section10" aria-hidden="true">V2.2.3 / 12-January-2018</label>
	<div>
	<h2 id="main-changes-3">Main Changes</h2>
	<h3 id="patch-release">Patch release</h3>
	<h2 id="contents-3">Contents</h2>
	<ul>
	<li>Corrected devices supporting RI_HYSCR3, RI_HYSCR4, RI_ASMRx, RI_CMRx, RI_CICRx registers in CMSIS files.</li>
	</ul>
	</div>
	</div>
	<div class="collapse">
	<input type="checkbox" id="collapse-section9" aria-hidden="true"> <label for="collapse-section9" aria-hidden="true">V2.2.2 / 25-August-2017</label>
	<div>
	<h2 id="main-changes-4">Main Changes</h2>
	<h3 id="maintenance-release-3">Maintenance release</h3>
	<h2 id="contents-4">Contents</h2>
	<ul>
	<li>Removed DATE and VERSION fields from header files.</li>
	</ul>
	</div>
	</div>
	<div class="collapse">
	<input type="checkbox" id="collapse-section8" aria-hidden="true"> <label for="collapse-section8" aria-hidden="true">V2.2.1 / 21-April-2017</label>
	<div>
	<h2 id="main-changes-5">Main Changes</h2>
	<h3 id="maintenance-release-4">Maintenance release</h3>
	<h2 id="contents-5">Contents</h2>
	<ul>
	<li>Update CMSIS Devices compliancy with MISRA C 2004 rules:
	<ul>
	<li>MISRA C 2004 rule 10.6 (‘U’ suffix applied to all constants of ‘unsigned’ type)</li>
	<li>Update system_stm32l1xx.h/.c files.</li>
	</ul></li>
	<li>Align Bit definitions for SCB_CFSR register to be compliant with CMSIS Core V4.x and V5.x.</li>
	<li>Rename RTC_CR_BCK bits in RTC_CR register to RTC_CR_BKP, to be aligned with others series.</li>
	<li>Rename GPIO_AFRL_AFRLx and GPIO_AFRL_AFRHx bit definitions (from GPIO_AFRL/AFRH registers) to GPIO_AFRL_AFSELx.</li>
	</ul>
	</div>
	</div>
	<div class="collapse">
	<input type="checkbox" id="collapse-section7" aria-hidden="true"> <label for="collapse-section7" aria-hidden="true">V2.2.0 / 01-July-2016</label>
	<div>
	<h2 id="main-changes-6">Main Changes</h2>
	<h3 id="maintenance-release-5">Maintenance release</h3>
	<h2 id="contents-6">Contents</h2>
	<ul>
	<li>Add macros _Pos and _Msk for each constants.
	<ul>
	<li>For instance:
	<ul>
	<li>#define ADC_LTR_LT ((uint32_t)0x00000FFFU)</li>
	</ul></li>
	<li>Is now provided as:
	<ul>
	<li>#define ADC_LTR_LT_Pos (0U)</li>
	<li>#define ADC_LTR_LT_Msk (0xFFFU << ADC_LTR_LT_Pos)</li>
	<li>#define ADC_LTR_LT ADC_LTR_LT_Msk</li>
	</ul></li>
	</ul></li>
	<li>IS_I2S_ALL_INSTANCE is now SPI2 and SPI3 instead of SPI1 and SPI2.</li>
	<li>Update the TIM_ARR_ARR and TIM_CNT_CNT as they support the 32 bit counter feature.</li>
	<li>Add macro IS_TIM_ETR_INSTANCE.</li>
	<li>Add RI_ASCR2_GR6_x with x = 1,2,3,4 if applicable.</li>
	<li>Add macro IS_SMBUS_ALL_INSTANCE.</li>
	<li>Set default value for SystemCoreClock to 2097000 instead of 32000000.</li>
	<li>Correct the presence of TIM9 for some devices inside various TIMER macros.</li>
	</ul>
	</div>
	</div>
	<div class="collapse">
	<input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="true">V2.1.3 / 04-March-2016</label>
	<div>
	<h2 id="main-changes-7">Main Changes</h2>
	<h3 id="maintenance-release-6">Maintenance release</h3>
	<h2 id="contents-7">Contents</h2>
	<ul>
	<li>Add HardFault_IRQn.</li>
	<li>Add BKP5R to BKP19R for RTC_TypeDef for stm32l151xba.</li>
	<li>Align bits naming on all stm32 families (ex: WWDG_CFR_WDGTB0 -> WWDG_CFR_WDGTB_0).</li>
	<li>Rename RCC_CFGR_MCO_DIVx to RCC_CFGR_MCOPRE_DIVx</li>
	<li>Align Bits naming on all stm32 families (ex: EXTI_IMR_MR0 –> EXTI_IMR_IM0)</li>
	<li>Update .icf file to correct empty linker ROM Start/End menu, under IAR, for stm32l151xdx, stm32l152xdx and stm32l162xdx.</li>
	<li>Rename RCC_CFGR_MCO_x to RCC_CFGR_MCOSEL_x to be aligned with Reference Manual.</li>
	<li>Update CMSIS drivers to apply MISRA C 2004 rule 10.6. (Use U postfix)</li>
	<li>Add defines FLASHSIZE_BASE and UID_BASE</li>
	<li>ADC common instance standardization (new define ADC1_COMMON)</li>
	<li>Remove bit GPIO_BRR_BR_x from Cat1 to Cat2 devices</li>
	<li>Literals “ADC_SMPR1_SMP27, ADC_SMPR1_SMP28, ADC_SMPR1_SMP29” are available on Cat4, Cat5 only.</li>
	<li>Add DMA_CNDTR_NDT, DMA_CPAR_PA and DMA_CMAR_MA definitions present on other stm32 families.</li>
	<li>Add defines to trig feature inside source code based on CMSIS content:
	<ul>
	<li>RTC_TAMPER1_SUPPORT</li>
	<li>RTC_TAMPER2_SUPPORT</li>
	<li>RTC_TAMPER3_SUPPORT</li>
	<li>RTC_BACKUP_SUPPORT</li>
	<li>RTC_WAKEUP_SUPPORT</li>
	<li>RTC_SMOOTHCALIB_SUPPORT</li>
	<li>RTC_SUBSECOND_SUPPORT.</li>
	<li>PWR_PVD_SUPPORT</li>
	</ul></li>
	<li>Set CMSIS variables PLLMulTable, AHBPrescTable and APBPrescTable as external in system_stm32l1xx.h.</li>
	<li>Bit 23 of all EXTI registers (IMR, EMR, …) is not supported on Cat 1 & 2.</li>
	<li>Correct a wrong values for RI_ASCR1_CH_27 to RI_ASCR1_CH_30</li>
	<li>Add defines for LCD capacitance</li>
	<li>Suppress SPI1 from I2S_ALL_INSTANCE</li>
	</ul>
	</div>
	</div>
	<div class="collapse">
	<input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true">V2.1.2 / 09-October-2015</label>
	<div>
	<h2 id="main-changes-8">Main Changes</h2>
	<h3 id="maintenance-release-7">Maintenance release</h3>
	<h2 id="contents-8">Contents</h2>
	<ul>
	<li>Removing the __IO attribute for PLLMulTable and AHBPrescTable. This was leading to issue during C++ initialisation.</li>
	<li>IDR field of CRC_TypeDef changed from uint32_t to uint8_t to comply with register structure.</li>
	<li>Added TIM10 and TIM11 to IS_TIM_CLOCKSOURCE_ETRMODE2_INSTANCE(INSTANCE).</li>
	<li>Renaming USB_CNTR_LP_MODE to USB_CNTR_LPMODE for naming consistancy with other bits.</li>
	<li>Renaming USB_ISTR_PMAOVRM to USB_ISTR_PMAOVR to use the name of the bit in this register.</li>
	</ul>
	</div>
	</div>
	<div class="collapse">
	<input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true">V2.1.1 / 31-March-2015</label>
	<div>
	<h2 id="main-changes-9">Main Changes</h2>
	<h3 id="maintenance-release-8">Maintenance release</h3>
	<h2 id="contents-9">Contents</h2>
	<ul>
	<li>Ensure compliancy w/ C++</li>
	<li>Minor update on Timer assert.</li>
	<li>Adding IS_AES_ALL_INSTANCE macro for product with AES.</li>
	</ul>
	</div>
	</div>
	<div class="collapse">
	<input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true">V2.1.0 / 06-February-2015</label>
	<div>
	<h2 id="main-changes-10">Main Changes</h2>
	<h3 id="maintenance-release-9">Maintenance release</h3>
	<h2 id="contents-10">Contents</h2>
	<ul>
	<li>Add CMSIS files for new STM32L1 e<strong>X</strong>tended Devices : <strong>STM32L151xDX, STM32L152xDX and STM32L162xDX</strong></li>
	</ul>
	</div>
	</div>
	<div class="collapse">
	<input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true">V2.0.0 / 05-September-2014</label>
	<div>
	<h2 id="main-changes-11">Main Changes</h2>
	<h3 id="maintenance-release-10">Maintenance release</h3>
	<h2 id="contents-11">Contents</h2>
	<ul>
	<li>Update based on STM32Cube specification</li>
	</ul>
	<h2 id="other-compatibilities">Other compatibilities</h2>
	<ul>
	<li>This version has to be used only with <strong>STM32CubeL1</strong> based development</li>
	</ul>
	</div>
	</div>
	</div>
	</div>
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