[CMSIS] Remove cast (uint32_t) from FLASH_SIZE_DATA_REGISTER define
diff --git a/Include/stm32l412xx.h b/Include/stm32l412xx.h
index a61a714..5b35f36 100644
--- a/Include/stm32l412xx.h
+++ b/Include/stm32l412xx.h
@@ -821,7 +821,7 @@
 #define SRAM1_SIZE_MAX        (0x00008000UL) /*!< maximum SRAM1 size (up to 32 KBytes) */
 #define SRAM2_SIZE            (0x00002000UL) /*!< SRAM2 size (8 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x80U << 10U) :  \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l422xx.h b/Include/stm32l422xx.h
index c1148d5..d42ce95 100644
--- a/Include/stm32l422xx.h
+++ b/Include/stm32l422xx.h
@@ -854,7 +854,7 @@
 #define SRAM1_SIZE_MAX        (0x00008000UL) /*!< maximum SRAM1 size (up to 32 KBytes) */
 #define SRAM2_SIZE            (0x00002000UL) /*!< SRAM2 size (8 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x80U << 10U) :  \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l431xx.h b/Include/stm32l431xx.h
index dee8037..bd516b6 100644
--- a/Include/stm32l431xx.h
+++ b/Include/stm32l431xx.h
@@ -934,7 +934,7 @@
 #define SRAM1_SIZE_MAX        (0x0000C000UL) /*!< maximum SRAM1 size (up to 48 KBytes) */
 #define SRAM2_SIZE            (0x00004000UL) /*!< SRAM2 size (16 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x100U << 10U) : \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l432xx.h b/Include/stm32l432xx.h
index a1b3248..31bb55b 100644
--- a/Include/stm32l432xx.h
+++ b/Include/stm32l432xx.h
@@ -930,7 +930,7 @@
 #define SRAM1_SIZE_MAX        (0x0000C000UL) /*!< maximum SRAM1 size (up to 48 KBytes) */
 #define SRAM2_SIZE            (0x00004000UL) /*!< SRAM2 size (16 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x100U << 10U) : \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l433xx.h b/Include/stm32l433xx.h
index 749d99e..604f3d2 100644
--- a/Include/stm32l433xx.h
+++ b/Include/stm32l433xx.h
@@ -988,7 +988,7 @@
 #define SRAM1_SIZE_MAX        (0x0000C000UL) /*!< maximum SRAM1 size (up to 48 KBytes) */
 #define SRAM2_SIZE            (0x00004000UL) /*!< SRAM2 size (16 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x100U << 10U) : \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l442xx.h b/Include/stm32l442xx.h
index 0cd94c2..3dbda3d 100644
--- a/Include/stm32l442xx.h
+++ b/Include/stm32l442xx.h
@@ -963,7 +963,7 @@
 #define SRAM1_SIZE_MAX        (0x0000C000UL) /*!< maximum SRAM1 size (up to 48 KBytes) */
 #define SRAM2_SIZE            (0x00004000UL) /*!< SRAM2 size (16 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x100U << 10U) : \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l443xx.h b/Include/stm32l443xx.h
index bb91245..ab16789 100644
--- a/Include/stm32l443xx.h
+++ b/Include/stm32l443xx.h
@@ -1021,7 +1021,7 @@
 #define SRAM1_SIZE_MAX        (0x0000C000UL) /*!< maximum SRAM1 size (up to 48 KBytes) */
 #define SRAM2_SIZE            (0x00004000UL) /*!< SRAM2 size (16 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x100U << 10U) : \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l451xx.h b/Include/stm32l451xx.h
index 40c33f2..d628c34 100644
--- a/Include/stm32l451xx.h
+++ b/Include/stm32l451xx.h
@@ -954,7 +954,7 @@
 #define SRAM1_SIZE_MAX        (0x00020000UL) /*!< maximum SRAM1 size (up to 128 KBytes) */
 #define SRAM2_SIZE            (0x00008000UL) /*!< SRAM2 size (32 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x200U << 10U) : \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l452xx.h b/Include/stm32l452xx.h
index 5a878c1..d8c221a 100644
--- a/Include/stm32l452xx.h
+++ b/Include/stm32l452xx.h
@@ -993,7 +993,7 @@
 #define SRAM1_SIZE_MAX        (0x00020000UL) /*!< maximum SRAM1 size (up to 128 KBytes) */
 #define SRAM2_SIZE            (0x00008000UL) /*!< SRAM2 size (32 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x200U << 10U) : \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l462xx.h b/Include/stm32l462xx.h
index 2124f20..ff8667d 100644
--- a/Include/stm32l462xx.h
+++ b/Include/stm32l462xx.h
@@ -1026,7 +1026,7 @@
 #define SRAM1_SIZE_MAX        (0x00020000UL) /*!< maximum SRAM1 size (up to 128 KBytes) */
 #define SRAM2_SIZE            (0x00008000UL) /*!< SRAM2 size (32 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x200U << 10U) : \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l471xx.h b/Include/stm32l471xx.h
index 2812114..248e1fb 100644
--- a/Include/stm32l471xx.h
+++ b/Include/stm32l471xx.h
@@ -1011,7 +1011,7 @@
 #define SRAM1_SIZE_MAX        (0x00018000UL) /*!< maximum SRAM1 size (up to 96 KBytes) */
 #define SRAM2_SIZE            (0x00008000UL) /*!< SRAM2 size (32 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU))== 0x0000FFFFU)) ? (0x400U << 10U) : \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l475xx.h b/Include/stm32l475xx.h
index 6d90e54..b85faa2 100644
--- a/Include/stm32l475xx.h
+++ b/Include/stm32l475xx.h
@@ -1130,7 +1130,7 @@
 #define SRAM1_SIZE_MAX        (0x00018000UL) /*!< maximum SRAM1 size (up to 96 KBytes) */
 #define SRAM2_SIZE            (0x00008000UL) /*!< SRAM2 size (32 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU))== 0x0000FFFFU)) ? (0x400U << 10U) : \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l476xx.h b/Include/stm32l476xx.h
index ace1e1f..283eff1 100644
--- a/Include/stm32l476xx.h
+++ b/Include/stm32l476xx.h
@@ -1145,7 +1145,7 @@
 #define SRAM1_SIZE_MAX        (0x00018000UL) /*!< maximum SRAM1 size (up to 96 KBytes) */
 #define SRAM2_SIZE            (0x00008000UL) /*!< SRAM2 size (32 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU))== 0x0000FFFFU)) ? (0x400U << 10U) : \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l485xx.h b/Include/stm32l485xx.h
index e1769d7..3a353db 100644
--- a/Include/stm32l485xx.h
+++ b/Include/stm32l485xx.h
@@ -1163,7 +1163,7 @@
 #define SRAM1_SIZE_MAX        (0x00018000UL) /*!< maximum SRAM1 size (up to 96 KBytes) */
 #define SRAM2_SIZE            (0x00008000UL) /*!< SRAM2 size (32 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU))== 0x0000FFFFU)) ? (0x400U << 10U) : \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l486xx.h b/Include/stm32l486xx.h
index 6c5ad60..5201a23 100644
--- a/Include/stm32l486xx.h
+++ b/Include/stm32l486xx.h
@@ -1178,7 +1178,7 @@
 #define SRAM1_SIZE_MAX        (0x00018000UL) /*!< maximum SRAM1 size (up to 96 KBytes) */
 #define SRAM2_SIZE            (0x00008000UL) /*!< SRAM2 size (32 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU))== 0x0000FFFFU)) ? (0x400U << 10U) : \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l496xx.h b/Include/stm32l496xx.h
index 623f5c7..123339e 100644
--- a/Include/stm32l496xx.h
+++ b/Include/stm32l496xx.h
@@ -1218,7 +1218,7 @@
 #define SRAM1_SIZE_MAX        (0x00040000UL) /*!< maximum SRAM1 size (up to 256 KBytes) */
 #define SRAM2_SIZE            (0x00010000UL) /*!< SRAM2 size (64 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU))== 0x0000FFFFU)) ? (0x400U << 10U) : \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l4a6xx.h b/Include/stm32l4a6xx.h
index dac4b60..1df4908 100644
--- a/Include/stm32l4a6xx.h
+++ b/Include/stm32l4a6xx.h
@@ -1276,7 +1276,7 @@
 #define SRAM1_SIZE_MAX        (0x00040000UL) /*!< maximum SRAM1 size (up to 256 KBytes) */
 #define SRAM2_SIZE            (0x00010000UL) /*!< SRAM2 size (64 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU))== 0x0000FFFFU)) ? (0x400U << 10U) : \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l4p5xx.h b/Include/stm32l4p5xx.h
index bdb3c25..cfbb3ce 100644
--- a/Include/stm32l4p5xx.h
+++ b/Include/stm32l4p5xx.h
@@ -1375,7 +1375,7 @@
 #define SRAM2_SIZE            (0x00010000UL) /*!< SRAM2 size (64 KBytes) */
 #define SRAM3_SIZE            (0x00020000UL) /*!< SRAM3 size (128 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU))== 0x0000FFFFU)) ? (0x400U << 10U) : \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l4q5xx.h b/Include/stm32l4q5xx.h
index 2ce919d..71b5334 100644
--- a/Include/stm32l4q5xx.h
+++ b/Include/stm32l4q5xx.h
@@ -1422,7 +1422,7 @@
 #define SRAM2_SIZE            (0x00010000UL) /*!< SRAM2 size (64 KBytes) */
 #define SRAM3_SIZE            (0x00020000UL) /*!< SRAM3 size (128 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU))== 0x0000FFFFU)) ? (0x400U << 10U) : \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l4r5xx.h b/Include/stm32l4r5xx.h
index 1cd8295..c94d27b 100644
--- a/Include/stm32l4r5xx.h
+++ b/Include/stm32l4r5xx.h
@@ -1249,7 +1249,7 @@
 #define SRAM2_SIZE            (0x00010000UL) /*!< SRAM2 size (64 KBytes) */
 #define SRAM3_SIZE            (0x00060000UL) /*!< SRAM3 size (384 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x800U << 10U) : \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l4r7xx.h b/Include/stm32l4r7xx.h
index 3f6133f..7a02ddd 100644
--- a/Include/stm32l4r7xx.h
+++ b/Include/stm32l4r7xx.h
@@ -1326,7 +1326,7 @@
 #define SRAM2_SIZE            (0x00010000UL) /*!< SRAM2 size (64 KBytes) */
 #define SRAM3_SIZE            (0x00060000UL) /*!< SRAM3 size (384 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x800U << 10U) : \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l4r9xx.h b/Include/stm32l4r9xx.h
index 716e619..51a3a47 100644
--- a/Include/stm32l4r9xx.h
+++ b/Include/stm32l4r9xx.h
@@ -567,7 +567,7 @@
   uint32_t      RESERVED7[7];   /*!< Reserved, 0x11C - 0x137                                                              */
   __IO uint32_t VMCCR;          /*!< DSI Host Video Mode Current Configuration Register,        Address offset: 0x138     */
   __IO uint32_t VPCCR;          /*!< DSI Host Video Packet Current Configuration Register,      Address offset: 0x13C     */
-  __IO uint32_t VCCCR;          /*!< DSI Host Video ChunksCurrent Configuration Register,     Address offset: 0x140     */
+  __IO uint32_t VCCCR;          /*!< DSI Host Video Chunks Current Configuration Register,     Address offset: 0x140     */
   __IO uint32_t VNPCCR;         /*!< DSI Host Video Null Packet Current Configuration Register, Address offset: 0x144     */
   __IO uint32_t VHSACCR;        /*!< DSI Host Video HSA Current Configuration Register,         Address offset: 0x148     */
   __IO uint32_t VHBPCCR;        /*!< DSI Host Video HBP Current Configuration Register,         Address offset: 0x14C     */
@@ -1406,7 +1406,7 @@
 #define SRAM2_SIZE            (0x00010000UL) /*!< SRAM2 size (64 KBytes) */
 #define SRAM3_SIZE            (0x00060000UL) /*!< SRAM3 size (384 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x800U << 10U) : \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l4s5xx.h b/Include/stm32l4s5xx.h
index 4ae1859..d7ffcac 100644
--- a/Include/stm32l4s5xx.h
+++ b/Include/stm32l4s5xx.h
@@ -1307,7 +1307,7 @@
 #define SRAM2_SIZE            (0x00010000UL) /*!< SRAM2 size (64 KBytes) */
 #define SRAM3_SIZE            (0x00060000UL) /*!< SRAM3 size (384 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x800U << 10U) : \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l4s7xx.h b/Include/stm32l4s7xx.h
index 87be08d..8635513 100644
--- a/Include/stm32l4s7xx.h
+++ b/Include/stm32l4s7xx.h
@@ -1384,7 +1384,7 @@
 #define SRAM2_SIZE            (0x00010000UL) /*!< SRAM2 size (64 KBytes) */
 #define SRAM3_SIZE            (0x00060000UL) /*!< SRAM3 size (384 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x800U << 10U) : \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))
diff --git a/Include/stm32l4s9xx.h b/Include/stm32l4s9xx.h
index 8e8516c..cf9f98e 100644
--- a/Include/stm32l4s9xx.h
+++ b/Include/stm32l4s9xx.h
@@ -568,7 +568,7 @@
   uint32_t      RESERVED7[7];   /*!< Reserved, 0x11C - 0x137                                                              */
   __IO uint32_t VMCCR;          /*!< DSI Host Video Mode Current Configuration Register,        Address offset: 0x138     */
   __IO uint32_t VPCCR;          /*!< DSI Host Video Packet Current Configuration Register,      Address offset: 0x13C     */
-  __IO uint32_t VCCCR;          /*!< DSI Host Video ChunksCurrent Configuration Register,     Address offset: 0x140     */
+  __IO uint32_t VCCCR;          /*!< DSI Host Video Chunks Current Configuration Register,     Address offset: 0x140     */
   __IO uint32_t VNPCCR;         /*!< DSI Host Video Null Packet Current Configuration Register, Address offset: 0x144     */
   __IO uint32_t VHSACCR;        /*!< DSI Host Video HSA Current Configuration Register,         Address offset: 0x148     */
   __IO uint32_t VHBPCCR;        /*!< DSI Host Video HBP Current Configuration Register,         Address offset: 0x14C     */
@@ -1464,7 +1464,7 @@
 #define SRAM2_SIZE            (0x00010000UL) /*!< SRAM2 size (64 KBytes) */
 #define SRAM3_SIZE            (0x00060000UL) /*!< SRAM3 size (384 KBytes) */
 
-#define FLASH_SIZE_DATA_REGISTER ((uint32_t)0x1FFF75E0)
+#define FLASH_SIZE_DATA_REGISTER (0x1FFF75E0UL)
 
 #define FLASH_SIZE               (((((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) == 0x0000FFFFU)) ? (0x800U << 10U) : \
                                   (((*((uint32_t *)FLASH_SIZE_DATA_REGISTER)) & (0x0000FFFFU)) << 10U))