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| <h1 id="release-notes-for-stm32f1xx-hal-drivers"><strong>Release Notes for STM32F1xx HAL Drivers</strong></h1> |
| <p>Copyright © 2016 STMicroelectronics<br /> |
| </p> |
| <a href="https://www.st.com" class="logo"><img src="../../_htmresc/st_logo.png" alt="ST logo" /></a> |
| </center> |
| </div> |
| </div> |
| <h1 id="license"><strong>License</strong></h1> |
| This software component is licensed by ST under BSD 3-Clause license, the “License”; You may not use this component except in compliance with the License. You may obtain a copy of the License at: |
| <center> |
| <a href="https://opensource.org/licenses/BSD-3-Clause">https://opensource.org/licenses/BSD-3-Clause</a> |
| </center> |
| </div> |
| <div class="col-sm-12 col-lg-8"> |
| <h1 id="update-history"><strong>Update History</strong></h1> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section1_1_8" aria-hidden="true"> <label for="collapse-section1_1_8" aria-hidden="true"><strong>V1.1.8 / 18-May-2021</strong></label> |
| <div> |
| <h2 id="main-changes">Main Changes</h2> |
| <ul> |
| <li>General updates to fix known defects.</li> |
| </ul> |
| <h2 id="contents">Contents</h2> |
| <ul> |
| <li><strong>HAL/LL ADC</strong> driver |
| <ul> |
| <li>Update LL_ADC_DeInit() API to clear missing SQR3 register.</li> |
| <li>Update timeout mechanism to avoid false timeout detection in case of preemption.</li> |
| </ul></li> |
| <li><strong>HAL EXTI</strong> driver |
| <ul> |
| <li>Update macros using LINE as a macro parameter in order to use EXTI_LINE instead to resolve parameter conflicts with standard C usage.</li> |
| </ul></li> |
| <li><strong>LL GPIO</strong> driver |
| <ul> |
| <li>Update LL_GPIO_Init() API to configure the Pin Pull only in INPUT mode.</li> |
| </ul></li> |
| <li><strong>HAL/LL RTC</strong> driver |
| <ul> |
| <li>Correct values assigned to macros LL_RTC_BKP_DR11 to LL_RTC_BKP_DR42 to be inline with actual registers mapping.</li> |
| <li>Update APIs LL_RTC_TIME_Init() and LL_RTC_ALARM_Init() to correctly check the RTC_Format (BIN or BCD).</li> |
| <li>Fix flag clearing operation for HAL_RTC_ALARM_CLEAR_FLAG and HAL_RTC_SECOND_CLEAR_FLAG macros.</li> |
| </ul></li> |
| <li><strong>HAL/LL TIM</strong> driver |
| <ul> |
| <li>Made TIM_DMADelayPulseCplt callback as a private function.</li> |
| <li>Update HAL_TIMEx_OnePulseN_Start and HAL_TIMEx_OnePulseN_Stop (pooling and IT mode) to take into consideration all OutputChannel parameters.</li> |
| <li>Update input capture measurement in DMA mode to avoid zero return values at high frequencies.</li> |
| <li>Update LL_TIM_GetCounterMode() API to return the correct counter mode.</li> |
| <li>Correct reversed description of TIM_LL_EC_ONEPULSEMODE One Pulse Mode.</li> |
| </ul></li> |
| <li><strong>HAL/LL SPI</strong> driver |
| <ul> |
| <li>Update LL_SPI_TransmitData8() API to avoid casting the result to 8 bits. Update to fix MISRA-C 2012 Rule-13.2.</li> |
| </ul></li> |
| <li><strong>HAL/LL I2C</strong> driver |
| <ul> |
| <li>Update to avoid I2C interrupt in endless loop: |
| <ul> |
| <li>Update HAL_I2C_Master_Transmit_IT(), HAL_I2C_Master_Receive_IT(), HAL_I2C_Master_Transmit_DMA() and HAL_I2C_Master_Receive_DMA() APIs to unlock the I2C peripheral before generating the start.</li> |
| </ul></li> |
| <li>Update the management of (hi2c->hdmatx!=NULL) & (hi2c->hdmarx!=NULL) check.</li> |
| <li>Update to prevent several calls of Start bit: |
| <ul> |
| <li>Update I2C_MemoryTransmit_TXE_BTF() API to increment EventCount.</li> |
| </ul></li> |
| <li>Update to use the right macro to clear I2C ADDR flag inside I2C_Slave_ADDR() API as it’s indicated in the reference manual.</li> |
| <li>Update HAL_I2C_EV_IRQHandler() and I2C_MasterTransmit_BTF() APIs to fix an issue where the transfer of the first few bytes to an I2C memory fails.</li> |
| </ul></li> |
| <li><strong>HAL NAND</strong> driver |
| <ul> |
| <li>Update functions HAL_NAND_Read_SpareArea_16b() and HAL_NAND_Write_SpareArea_16b() to fix column address calculation issue</li> |
| <li>Update implementation of “HAL_NAND_Write_Page_16b” and “HAL_NAND_Read_Page_16b” APIs implementation to fix an issue with the page calculation of 8 bits memories</li> |
| </ul></li> |
| <li><strong>LL USART</strong> driver |
| <ul> |
| <li>Remove useless check on maximum BRR value by removing IS_LL_USART_BRR_MAX() macro.</li> |
| </ul></li> |
| <li><strong>HAL UART</strong> driver |
| <ul> |
| <li>Enhance reception for idle services (ReceptionToIdle): |
| <ul> |
| <li>Add a new field (HAL_UART_RxTypeTypeDef) to the UART_HandleTypeDef structure to identify the type of ongoing reception.</li> |
| <li>Add UART Reception Event Callback registration.</li> |
| <li>Add reception specific APIs specific to reception for Idle transfer in different modes:</li> |
| <li>HAL_UARTEx_ReceiveToIdle(): Receive an amount of data in blocking mode until either the expected number of data is received or an IDLE event occurs.</li> |
| <li>HAL_UARTEx_ReceiveToIdle_IT(): Receive an amount of data in interrupt mode until either the expected number of data is received or an IDLE event occurs.</li> |
| <li>HAL_UARTEx_ReceiveToIdle_DMA(): Receive an amount of data in DMA mode until either the expected number of data is received or an IDLE event occurs.</li> |
| </ul></li> |
| <li>Update HAL_UART_Receive(), HAL_UART_Receive_IT() and HAL_UART_Receive_DMA() APIs to support the new enhancement of ReceptionToIdle.</li> |
| <li>Fixe wrong comment related to RX pin configuration within the description section. Correction on UART ReceptionType management in case of ReceptionToIdle API are called from RxEvent callback.</li> |
| </ul></li> |
| <li><strong>HAL SMARTCARD</strong> driver |
| <ul> |
| <li>Fix typos in the SMARTCARD State definition description.</li> |
| </ul></li> |
| <li><strong>HAL IRDA</strong> driver |
| <ul> |
| <li>Fix typos in the IRDA State definition description.</li> |
| </ul></li> |
| <li><strong>LL TIM</strong> driver |
| <ul> |
| <li>Update LL_TIM_GetCounterMode() API to return the correct counter mode.</li> |
| <li>Correct reversed description of TIM_LL_EC_ONEPULSEMODE One Pulse Mode.</li> |
| </ul></li> |
| <li><strong>HAL CAN</strong> driver |
| <ul> |
| <li>Update HAL_CAN_Init() API to be aligned with reference manual and to avoid timeout error:</li> |
| <li>Update CAN Initialization sequence to set “request initialization” bit before exit from sleep mode.</li> |
| </ul></li> |
| <li><strong>LL UTILS</strong> driver |
| <ul> |
| <li>Add a new LL_PLL_ConfigSystemClock_PLL2() API to configure system clock with HSE as clock source of the PLL, via PLL2.</li> |
| </ul></li> |
| <li><strong>HAL IWDG</strong> driver |
| <ul> |
| <li>Update HAL_IWDG_Init() API in order to fix HAL_GetTick() timeout vulnerability issue.</li> |
| <li>Add LSI startup time in default IWDG timeout calculation (HAL_IWDG_DEFAULT_TIMEOUT).</li> |
| </ul></li> |
| <li><strong>LL FMC</strong> driver |
| <ul> |
| <li>Fix compilation warning with gcc -Wpedantic compiler option.</li> |
| </ul></li> |
| <li><strong>HAL SDMMC</strong> driver |
| <ul> |
| <li>Update the definition of SDMMC_DATATIMEOUT constant in order to allow the user to redefine it in his proper application</li> |
| <li>SD_FindSCR() updated to resolve an issue with FIFO blocking when reading.</li> |
| <li>Update the definition of SDMMC_DATATIMEOUT constant in order to allow the user to redefine it in his proper application</li> |
| <li>Add the block size settings in the initialization functions and remove it from read/write transactions to avoid repeated and inefficient reconfiguration.</li> |
| <li>Update read/write functions in DMA mode in order to force the DMA direction.</li> |
| <li>Deploy new functions MMC_ReadExtCSD() and SDMMC_CmdSendEXTCSD () that read and check the sectors number of the device in order to resolve the issue of wrongly reading big memory size.</li> |
| </ul></li> |
| <li><strong>HAL USB</strong> driver |
| <ul> |
| <li>HAL PCD: add fix transfer complete for IN Interrupt transaction in single buffer mode.</li> |
| <li>Race condition in USB PCD control endpoint receive ISR.</li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section1_1_7" aria-hidden="true"> <label for="collapse-section1_1_7" aria-hidden="true"><strong>V1.1.7 / 20-October-2020</strong></label> |
| <div> |
| <h2 id="main-changes-1">Main Changes</h2> |
| <ul> |
| <li>General updates to fix known defects.</li> |
| </ul> |
| <h2 id="contents-1">Contents</h2> |
| <ul> |
| <li><strong>HAL/LL I2C</strong> driver |
| <ul> |
| <li>Update to fix hardfault issue with HAL_I2C_Mem_Write_DMA() API: |
| <ul> |
| <li>Abort the right ongoing DMA transfer when memory write access request operation failed: fix typo “hdmarx” replaced by “hdmatx”</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL/LL GPIO</strong> driver |
| <ul> |
| <li>Update LL_GPIO_Init() API to configure correctly the GPIO speed parameter when GPIO alternate function mode is selected.</li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section1_1_6" aria-hidden="true"> <label for="collapse-section1_1_6" aria-hidden="true"><strong>V1.1.6 / 07-September-2020</strong></label> |
| <div> |
| <h2 id="main-changes-2">Main Changes</h2> |
| <ul> |
| <li>General updates to fix known defects and enhancements implementation</li> |
| </ul> |
| <h2 id="contents-2">Contents</h2> |
| <ul> |
| <li><strong>HAL/LL ADC</strong> driver |
| <ul> |
| <li>Update HAL_ADC_Stop_DMA() API to check if DMA state is Busy before calling HAL_DMA_Abort() API to avoid DMA internal error.</li> |
| <li>update LL_ADC_REG_Init() API to avoid enabling continuous mode and discontinuous mode simultaneously.</li> |
| </ul></li> |
| <li><strong>HAL/LL GPIO</strong> driver |
| <ul> |
| <li>Update HAL_GPIO_TogglePin() API to allow multi Pin’s toggling.</li> |
| <li>Update LL_GPIO_TogglePin() API to improve robustness: use BSRR register instead of ODR register.</li> |
| <li>Update LL GPIO initialization sequence to avoid unwanted pulse on GPIO Pin’s</li> |
| </ul></li> |
| <li><strong>HAL/LL I2S</strong> driver |
| <ul> |
| <li>Update HAL_I2S_DMAStop() API to be more safe |
| <ul> |
| <li>Add a check on BSY, TXE and RXNE flags before disabling the I2S</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL/LL SPI</strong> driver |
| <ul> |
| <li>Update SPI_DMAReceiveCplt() API to handle efficiently the repeated transfers. |
| <ul> |
| <li>Disable TX DMA request only in bidirectional receive mode</li> |
| </ul></li> |
| <li>Update HAL_SPI_Init() API |
| <ul> |
| <li>To avoid setting the BaudRatePrescaler in case of Slave Motorola Mode</li> |
| <li>Use the bit-mask for SPI configuration</li> |
| </ul></li> |
| <li>Update Transmit/Receive processes in half-duplex mode |
| <ul> |
| <li>Disable the SPI instance before setting BDIOE bit</li> |
| </ul></li> |
| <li>Fix wrong timeout management |
| <ul> |
| <li>Calculate Timeout based on a software loop to avoid blocking issue if Systick is disabled</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL NOR</strong> driver |
| <ul> |
| <li>Update address calculation in HAL_NOR_ProgramBuffer()</li> |
| <li>Apply adequate commands according to the command set field value |
| <ul> |
| <li>command set 1 for Micron JS28F512P33</li> |
| <li>command set 2 for Micron M29W128G and Cypress S29GL128P</li> |
| </ul></li> |
| <li>Add new commands operations: |
| <ul> |
| <li>NOR_CMD_READ_ARRAY</li> |
| <li>NOR_CMD_WORD_PROGRAM</li> |
| <li>NOR_CMD_BUFFERED_PROGRAM</li> |
| <li>NOR_CMD_CONFIRM</li> |
| <li>NOR_CMD_BLOCK_ERASE</li> |
| <li>NOR_CMD_BLOCK_UNLOCK</li> |
| <li>NOR_CMD_READ_STATUS_REG</li> |
| <li>NOR_CMD_CLEAR_STATUS_REG</li> |
| </ul></li> |
| <li>Update some APIs in order to be compliant for memories with another command set. |
| <ul> |
| <li>HAL_NOR_Init()</li> |
| <li>HAL_NOR_Read_ID()</li> |
| <li>HAL_NOR_ReturnToReadMode()</li> |
| <li>HAL_NOR_Read()</li> |
| <li>HAL_NOR_Program()</li> |
| <li>HAL_NOR_ReadBuffer()</li> |
| <li>HAL_NOR_ProgramBuffer()</li> |
| <li>HAL_NOR_Erase_Block()</li> |
| <li>HAL_NOR_Erase_Chip()</li> |
| <li>HAL_NOR_GetStatus()</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL SRAM</strong> driver |
| <ul> |
| <li>General update to enhance HAL SRAM driver robustness |
| <ul> |
| <li>Update HAL_SRAM_Init() API to avoid activation of burst access for SRAM</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL FSMC</strong> driver |
| <ul> |
| <li>Update FSMC_NORSRAM_Init() API in order to resolve compilation issue with MS Visual 2017</li> |
| <li>Update FSMC_NORSRAM_Extended_Timing_Init() API in order to manage Bus turnaround phase duration FSMC_BWTR1_BUSTURN availability.</li> |
| </ul></li> |
| <li><strong>LL UTILS</strong> driver |
| <ul> |
| <li>UTILS_SetFlashLatency() API renamed to LL_SetFlashLatency() and set exportable.</li> |
| </ul></li> |
| <li><strong>HAL/LL IWDG</strong> driver |
| <ul> |
| <li>Update HAL_IWDG_DEFAULT_TIMEOUT define value to consider LSI value instead of hardcoded value.</li> |
| </ul></li> |
| <li><strong>HAL/LL TIM</strong> driver |
| <ul> |
| <li>Align HAL/LL TIM driver with latest updates and enhancements</li> |
| <li>Update Encoder interface mode to keep TIM_CCER_CCxNP bits low |
| <ul> |
| <li>Add TIM_ENCODERINPUTPOLARITY_RISING and TIM_ENCODERINPUTPOLARITY_FALLING definitions to determine encoder input polarity.</li> |
| <li>Add IS_TIM_ENCODERINPUT_POLARITY() macro to check the encoder input polarity.</li> |
| <li>Update HAL_TIM_Encoder_Init() API</li> |
| <li>Replace IS_TIM_IC_POLARITY() macro by IS_TIM_ENCODERINPUT_POLARITY() macro.</li> |
| </ul></li> |
| <li>Fix bug when using multiple DMA request to different channels of same timer |
| <ul> |
| <li>Introduce DMA burst state management mechanism |
| <ul> |
| <li>Add a new structure for DMA Burst States definition : HAL_TIM_DMABurstStateTypeDef</li> |
| <li>Update __HAL_TIM_RESET_HANDLE_STATE to support DMABurstState</li> |
| <li>Add a new API HAL_TIM_DMABurstState() to get the actual state of a DMA burst operation</li> |
| <li>Add DMABurstState, the DMA burst operation state, in the TIM_HandleTypeDef structure</li> |
| <li>Add new API TIM_DMAErrorCCxN() for TIM DMA error callback (complementary channel)</li> |
| <li>Add new API TIM_DMADelayPulseNCplt() for TIM DMA Delay Pulse complete callback (complementary channel)</li> |
| </ul></li> |
| </ul></li> |
| <li>Implement TIM channel state management mechanism |
| <ul> |
| <li>Add new macro |
| <ul> |
| <li>TIM_CHANNEL_STATE_SET_ALL and TIM_CHANNEL_N_STATE_SET_ALL</li> |
| <li>TIM_CHANNEL_STATE_SET and TIM_CHANNEL_N_STATE_SET</li> |
| <li>TIM_CHANNEL_STATE_GET and TIM_CHANNEL_N_STATE_GET</li> |
| </ul></li> |
| <li>Add new API HAL_TIM_GetActiveChannel()</li> |
| <li>Add new API HAL_TIM_GetChannelState() to get actual state of the TIM channel</li> |
| <li>Add a new structure for TIM channel States definition : HAL_TIM_ChannelStateTypeDef</li> |
| <li>Update __HAL_TIM_RESET_HANDLE_STATE to support ChannelState and ChannelNState</li> |
| <li>Add a new element in the TIM_HandleTypeDef structure : ChannelState to manage TIM channel operation state</li> |
| <li>Add a new element in the TIM_HandleTypeDef structure : ChannelNState to manage TIM complementary channel operation state</li> |
| </ul></li> |
| <li>Update HAL_TIMEx_MasterConfigSynchronization() API to avoid functional errors and assert fails when using some TIM instances as input trigger. |
| <ul> |
| <li>Replace IS_TIM_SYNCHRO_INSTANCE() macro by IS_TIM_MASTER_INSTANCE() macro.</li> |
| <li>Add IS_TIM_SLAVE_INSTANCE() macro to check on TIM_SMCR_MSM bit.</li> |
| </ul></li> |
| <li>Remove ‘register’ storage class specifier from LL TIM driver.</li> |
| <li>Add new API HAL_TIM_DMABurst_MultiWriteStart() allowing to configure the DMA Burst to transfer multiple Data from the memory to the TIM peripheral</li> |
| <li>Add new API HAL_TIM_DMABurst_MultiReadStart() allowing to configure the DMA Burst to transfer Data from the TIM peripheral to the memory</li> |
| </ul></li> |
| <li><strong>HAL/LL UART</strong> driver |
| <ul> |
| <li>Update UART polling processes to handle efficiently the Lock mechanism |
| <ul> |
| <li>Move the process unlock at the top of the HAL_UART_Receive() and HAL_UART_Transmit() API.</li> |
| </ul></li> |
| <li>Update UART polling and interruption processes to fix issues related to accesses out of user specified buffer. |
| <ul> |
| <li>Update UART_Transmit_IT(), UART_Receive_IT(), HAL_UART_Transmit() and HAL_UART_Receive() APIs.</li> |
| </ul></li> |
| <li>Update UART interruption handler to manage correctly the overrun interrupt |
| <ul> |
| <li>Add in the HAL_UART_IRQHandler() API a check on USART_CR1_RXNEIE bit when an overrun interrupt occurs.</li> |
| </ul></li> |
| <li>Update UART BRR calculation for ROM size gain</li> |
| </ul></li> |
| <li><strong>HAL/LL USART</strong> driver |
| <ul> |
| <li>Update USART interruption handler to manage correctly the overrun interrupt |
| <ul> |
| <li>Add in the HAL_USART_IRQHandler() API a check on USART_CR1_RXNEIE bit when an overrun interrupt occurs.</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL SMARTCARD</strong> driver |
| <ul> |
| <li>Update SMARTCARD interruption handler to manage correctly the overrun interrupt |
| <ul> |
| <li>Add in the HAL_SMARTCARD_IRQHandler() API a check on USART_CR1_RXNEIE bit when an overrun interrupt occurs.</li> |
| </ul></li> |
| <li>Update SMARTCARD transmission and reception API to handle memory corruption |
| <ul> |
| <li>HAL_SMARTCARD_Transmit(), HAL_SMARTCARD_Receive(), HAL_SMARTCARD_Transmit_IT() and HAL_SMARTCARD_Receive_IT()</li> |
| </ul></li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section1_1_5" aria-hidden="true"> <label for="collapse-section1_1_5" aria-hidden="true"><strong>V1.1.5 / 30-July-2020</strong></label> |
| <div> |
| <h2 id="main-changes-3">Main Changes</h2> |
| <ul> |
| <li>General updates to fix known defects and enhancements implementation</li> |
| </ul> |
| <h2 id="contents-3">Contents</h2> |
| <ul> |
| <li><strong>HAL</strong> driver |
| <ul> |
| <li>Enhance HAL_SetTickFreq() API robustness |
| <ul> |
| <li>Restore previous tick frequency when a wrong tick initialization occurs.</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL/LL I2C</strong> update |
| <ul> |
| <li>Update HAL_I2C_ER_IRQHandler() API to fix acknowledge failure issue with I2C memory IT processes |
| <ul> |
| <li>Add stop condition generation when NACK occurs.</li> |
| </ul></li> |
| <li>Update I2C_DMAXferCplt(), I2C_DMAError() and I2C_DMAAbort() APIs to fix hardfault issue when hdmatx and hdmarx parameters in i2c handle aren’t initialized (NULL pointer). |
| <ul> |
| <li>Add additional check on hi2c->hdmtx and hi2c->hdmarx before resetting DMA Tx/Rx complete callbacks</li> |
| </ul></li> |
| <li>Update HAL_I2C_ER_IRQHandler() API to fix acknowledge failure issue with I2C memory IT processes |
| <ul> |
| <li>Add stop condition generation when NACK occursHAL SMBUS</li> |
| </ul></li> |
| <li>Update HAL_I2C_Init() API to force software reset before setting new I2C configuration.</li> |
| <li>Update HAL I2C processes to report ErrorCode when wrong I2C start condition occurs |
| <ul> |
| <li>Add new ErrorCode define: HAL_I2C_WRONG_START</li> |
| <li>Set ErrorCode parameter in I2C handle to HAL_I2C_WRONG_START</li> |
| </ul></li> |
| <li>Update sequential APIs to avoid requesting a START when a STOP condition is not fully treated |
| <ul> |
| <li>Wait the end of STOP treatment by polling (with a timeout) the STOP bit on Control register CR1</li> |
| </ul></li> |
| <li>Update I2C_MasterReceiveRXNE() static API to avoid set the STOP bit again after the bit clearing by Hardware during the masking operation |
| <ul> |
| <li>Add new API I2C_WaitOnSTOPRequestThroughIT() to wait for stop bit.</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL/LL USB</strong> driver |
| <ul> |
| <li>Bug fix: USB_ReadPMA() and USB_WritePMA() by ensuring 16-bits access to USB PMA memory</li> |
| <li>Bug fix: correct USB RX count calculation</li> |
| <li>Fix USB Bulk transfer double buffer mode</li> |
| <li>Remove register keyword from USB defined macros as no more supported by C++ compiler</li> |
| <li>Minor rework on USBD_Start() and USBD_Stop() APIs: stopping device will be handled by HAL_PCD_DeInit() API.</li> |
| <li>Remove non used API for USB device mode.</li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section11" aria-hidden="true"> <label for="collapse-section11" aria-hidden="true"><strong>V1.1.4 / 26-June-2019</strong></label> |
| <div> |
| <h2 id="main-changes-4">Main Changes</h2> |
| <ul> |
| <li>General updates to fix known defects and enhancements implementation</li> |
| <li>Add support of HAL callback registration feature</li> |
| <li>Add new <strong>HAL EXTI</strong> driver</li> |
| <li>General updates to fix CodeSonar compilation warnings</li> |
| <li>General updates to fix the user manual .chm files</li> |
| <li><strong>The following changes done on the HAL drivers require an update on the application code based on older HAL versions</strong> |
| <ul> |
| <li><strong>HAL/LL Generic</strong> update |
| <ul> |
| <li>Add support of <strong>HAL callback registration</strong> feature |
| <ul> |
| <li>The feature disabled by default is available for the following HAL drivers: |
| <ul> |
| <li><strong>ADC, CEC, CAN, DAC, ETH, HCD, UART, USART, IRDA, SMARTCARD,</strong></li> |
| <li><strong>MMC, NAND, NOR, PCCARD, PCD, RTC, SD, SRAM, SPI, I2S, TIM and WWDG</strong></li> |
| </ul></li> |
| <li>The feature may be enabled individually per HAL PPP driver by setting the corresponding definition USE_HAL_PPP_REGISTER_CALLBACKS to 1U in stm32f1xx_hal_conf.h project configuration file (template file stm32f1xx_hal_conf_template.h available from Drivers/STM32F1xx_HAL_Driver/Inc)</li> |
| <li>Once enabled , the user application may resort to HAL_PPP_RegisterCallback() to register specific callback function(s) and unregister it(them) with HAL_PPP_UnRegisterCallback()</li> |
| </ul></li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL/LL Generic</strong> update |
| <ul> |
| <li>General updates to fix MISRA 2012 compilation errors |
| <ul> |
| <li>“stdio.h” include updated with “stddef.h”</li> |
| </ul></li> |
| <li>Add HAL_GetUIDw0(), HAL_GetUIDw1() and HAL_GetUIDw2() API in order to returns the unique device identifier</li> |
| </ul></li> |
| <li><strong>HAL CAN</strong> update |
| <ul> |
| <li>Update HAL_CAN_GetRxMessage() API to correct the remote CAN transmission request.</li> |
| </ul></li> |
| <li><strong>HAL CEC</strong> update |
| <ul> |
| <li>Update HAL CEC State management method: |
| <ul> |
| <li>Remove HAL_CEC_StateTypeDef structure parameters</li> |
| <li>Add new defines for CEC states</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL CRC</strong> update |
| <ul> |
| <li>Update HAL_CRC_DeInit() API to be more safe</li> |
| <li>Remove lock mechanism on the followings API’s: |
| <ul> |
| <li>HAL_CRC_Accumulate()</li> |
| <li>HAL_CRC_Calculate()</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL DAC</strong> update |
| <ul> |
| <li>General updates for more efficiency implementation</li> |
| <li>Update HAL_DAC_IRQHandler() to manage DAC Under-run error only once DAC DMAUDR interrupt is enabled</li> |
| </ul></li> |
| <li><strong>HAL GPIO</strong> update |
| <ul> |
| <li>HAL_GPIO_TogglePin() API implementation update: to improve robustness</li> |
| <li>HAL_GPIO_DeInit() API update to ensure clear all GPIO EXTI pending interrupts.</li> |
| </ul></li> |
| <li><strong>HAL IRDA</strong> driver |
| <ul> |
| <li>Align HAL IRDA driver with latest updates and enhancements</li> |
| <li>Add callback registration feature |
| <ul> |
| <li>Add HAL_IRDA_RegisterCallback() and HAL_IRDA_UnRegisterCallback() APIs</li> |
| <li>Add callback identifiers in HAL_IRDA_CallbackIDTypeDef enumerated typedef</li> |
| </ul></li> |
| <li>Review IRDA state machine to avoid cases where IRDA state is overwritten by IRDA IRQ</li> |
| <li>Implement new APIs for HAL IRDA Abort management: |
| <ul> |
| <li>HAL_IRDA_Abort(), HAL_IRDA_AbortTransmit(), HAL_IRDA_AbortReceive(), HAL_IRDA_Abort_IT(), HAL_IRDA_AbortTransmit_IT(), HAL_IRDA_AbortReceive_IT()</li> |
| </ul></li> |
| <li>Optimize WaitOnFlag management in IRDA_Transmit() function</li> |
| <li>Optimize all HAL IRQ Handler routines</li> |
| <li>Optimize HAL IRDA to avoid using macros as argument of function calls</li> |
| </ul></li> |
| <li><strong>HAL SMARTCARD</strong> driver |
| <ul> |
| <li>Align HAL SMARTCARD driver with latest updates and enhancements</li> |
| <li>Add callback registration feature |
| <ul> |
| <li>Add HAL_SMARTCARD_RegisterCallback() and HAL_SMARTCARD_UnRegisterCallback() APIs</li> |
| <li>Add callback identifiers in HAL_SMARTCARD_CallbackIDTypeDef enumerated typedef</li> |
| </ul></li> |
| <li>Review SMARTCARD state machine to avoid cases where SMARTCARD state is overwritten by SMARTCARD IRQ</li> |
| <li>Implement new APIs for HAL SMARTCARD Abort management: |
| <ul> |
| <li>HAL_SMARTCARD_Abort(), HAL_SMARTCARD_AbortTransmit(), HAL_SMARTCARD_AbortReceive(), HAL_SMARTCARD_Abort_IT(), HAL_SMARTCARD_AbortTransmit_IT(), HAL_SMARTCARD_AbortReceive_IT()</li> |
| </ul></li> |
| <li>Optimize WaitOnFlag management in SMARTCARD_Transmit() function</li> |
| <li>Optimize all HAL IRQ Handler routines</li> |
| <li>Optimize HAL SMARTCARD to avoid using macros as argument of function calls</li> |
| </ul></li> |
| <li><strong>HAL UART/USART</strong> driver |
| <ul> |
| <li>Align HAL UART/USART driver with latest updates and enhancements</li> |
| <li>Add callback registration feature |
| <ul> |
| <li>Add HAL_UART/USART_RegisterCallback() and HAL_UART/USART_UnRegisterCallback() APIs</li> |
| <li>Add callback identifiers in HAL_UART/USART_CallbackIDTypeDef enumerated typedef</li> |
| </ul></li> |
| <li>Add missing __IO in UART/USART_HandleTypeDef definition (for TxXferCount and RxXferCount)</li> |
| <li>Review UART/USART state machine to avoid cases where UART/USART state is overwritten by UART/USART IRQ</li> |
| <li>Implement new APIs for HAL UART/USART Abort management: |
| <ul> |
| <li>HAL_UART/USART_Abort(), HAL_UART/USART_AbortTransmit(), HAL_UART/USART_AbortReceive(), HAL_UART/USART_Abort_IT(), HAL_UART/USART_AbortTransmit_IT(), HAL_UART/USART_AbortReceive_IT()</li> |
| </ul></li> |
| <li>Optimize WaitOnFlag management in UART/USART_Transmit() function</li> |
| <li>Optimize all HAL IRQ Handler routines</li> |
| <li>Align __HAL_UART_GET_IT and __HAL_UART_GET_IT_SOURCE with other series</li> |
| <li>Optimize HAL UART/USART to avoid using macros as argument of function calls</li> |
| <li>Update USART BRR calculation</li> |
| </ul></li> |
| <li><strong>HAL SDMMC</strong> update |
| <ul> |
| <li>Align HAL SDMMC driver with latest updates and enhancements</li> |
| <li>Due to limitation SDIO hardware flow control indicated in Errata Sheet : |
| <ul> |
| <li>In 4-bits bus wide mode, do not use the HAL_SD_WriteBlocks_IT() or HAL_SD_WriteBlocks() APIs otherwise underrun will occur and there is not possibility to activate the flow control</li> |
| <li>Use DMA mode when using 4-bits bus wide mode or decrease the frequency</li> |
| </ul></li> |
| <li>Add callback registration feature |
| <ul> |
| <li>Add HAL_SD_RegisterCallback(),HAL_SD_UnRegisterCallback(), HAL_SD_RegisterTransceiverCallback() and HAL_SD_UnRegisterTransceiverCallback APIs</li> |
| <li>Add callback identifiers in HAL_SD_CallbackIDTypeDef enumerated typedef</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL SPI</strong> update |
| <ul> |
| <li>Align HAL/LL SPI driver with latest updates and enhancements</li> |
| <li>Fix issue in HAL_SPI_Transmit() and HAL_SPI_TransmitReceive() functions</li> |
| <li>Add SPI Abort transfer API’s: |
| <ul> |
| <li>HAL_SPI_Abort()</li> |
| <li>HAL_SPI_Abort_IT()</li> |
| </ul></li> |
| <li>Update HAL/LL SPI driver to manage TI mode not supported by all STM32F1xx devices</li> |
| <li>Add callback registration feature |
| <ul> |
| <li>Add HAL_SPI_RegisterCallback() and HAL_SPI_UnRegisterCallback() APIs</li> |
| <li>Add callback identifiers in HAL_SPI_CallbackIDTypeDef enumerated typedef</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL I2S</strong> update |
| <ul> |
| <li>Align HAL I2S driver with latest updates and enhancements</li> |
| <li>Add callback registration feature |
| <ul> |
| <li>Add HAL_I2S_RegisterCallback() and HAL_I2S_UnRegisterCallback() APIs</li> |
| <li>Add callback identifiers in HAL_I2S_CallbackIDTypeDef enumerated typedef</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL/LL TIM</strong> update |
| <ul> |
| <li>Move the following TIM structures from stm32f1xx_hal_tim_ex.h into stm32f1xx_hal_tim.h |
| <ul> |
| <li>TIM_MasterConfigTypeDef()</li> |
| <li>TIM_BreakDeadTimeConfigTypeDef()</li> |
| </ul></li> |
| <li>Add new TIM Callbacks API’s: |
| <ul> |
| <li>HAL_TIM_PeriodElapsedHalfCpltCallback()</li> |
| <li>HAL_TIM_IC_CaptureHalfCpltCallback()</li> |
| <li>HAL_TIM_PWM_PulseFinishedHalfCpltCallback()</li> |
| <li>HAL_TIM_TriggerHalfCpltCallback()</li> |
| </ul></li> |
| <li>TIM API changes for MISRA-C 2012 compliance: |
| <ul> |
| <li>Rename HAL_TIM_SlaveConfigSynchronization to HAL_TIM_SlaveConfigSynchro</li> |
| <li>Rename HAL_TIM_SlaveConfigSynchronization_IT to HAL_TIM_SlaveConfigSynchro_IT</li> |
| <li>Rename HAL_TIMEx_ConfigCommutationEvent to HAL_TIMEx_ConfigCommutEvent</li> |
| <li>Rename HAL_TIMEx_ConfigCommutationEvent_IT to HAL_TIMEx_ConfigCommutEvent_IT</li> |
| <li>Rename HAL_TIMEx_ConfigCommutationEvent_DMA to HAL_TIMEx_ConfigCommutEvent_DMA</li> |
| <li>Rename HAL_TIMEx_CommutationCallback to HAL_TIMEx_CommutCallback</li> |
| <li>Rename HAL_TIMEx_DMACommutationCplt to TIMEx_DMACommutationCplt</li> |
| </ul></li> |
| <li>Add a call to HAL_DMA_Abort_IT from HAL_TIM_XXX_Stop_DMA</li> |
| </ul></li> |
| <li><strong>HAL/LL USB</strong> update |
| <ul> |
| <li>Rework USB interrupt handler and improve HS DMA support in Device mode</li> |
| <li>Fix BCD handling of OTG instance in device mode</li> |
| <li>cleanup reference to low speed in device mode</li> |
| <li>Allow writing TX FIFO when transfer length is equal to available space in the TX FIFO</li> |
| <li>Fix Toggle OUT interrupt channel in host mode</li> |
| <li>Add new callback to be used to handle the usb device connection/disconnection |
| <ul> |
| <li>HAL_HCD_PortEnabled_Callback()</li> |
| <li>HAL_HCD_PortDisabled_Callback()</li> |
| </ul></li> |
| <li>Update to prevent reactivate host interrupt channel</li> |
| <li>Updated USB_WritePacket(), USB_ReadPacket()APIs to prevent compilation warning with GCC GNU v8.2.0</li> |
| <li>Rework USB_EPStartXfer() API to enable theUSB endpoint before unmasking the TX FiFo empty interrupt in case DMA is not used</li> |
| <li>Update USB HAL_HCD_Init() and HAL_PCD_Init() APIs to avoid enabling USB DMA feature for OTG FS instance, USB DMAfeature is available only on OTG HS Instance</li> |
| <li>Remove duplicated line in hal_hcd.c header file comment section</li> |
| <li>Rework USB HAL driver to use instancePCD_SPEED_xxx, HCD_SPEED_xx instead of OTG register Core speed definition during the instance initialization</li> |
| <li>Software Quality improvement with a fix of CodeSonar warnings on PCD_Port_IRQHandler() and HCD_Port_IRQHandler()interrupt handlers</li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section10" aria-hidden="true"> <label for="collapse-section10" aria-hidden="true"><strong>V1.1.3 / 09-October-2018</strong></label> |
| <div> |
| <h2 id="main-changes-5">Main Changes</h2> |
| <ul> |
| <li><strong>Maintenance release to fix known defects and enhancements implementation</strong></li> |
| <li><strong>Generic drivers changes</strong></li> |
| <li>Some global variables on stm32xxx_hal.c updated to be declared as extern</li> |
| <li><strong>HAL drivers changes</strong></li> |
| <li><strong>The following changes done on the HAL drivers require an update on the application code based on older HAL versions</strong> |
| <ul> |
| <li><strong>Rework of HAL CAN driver (compatibility break)</strong> |
| <ul> |
| <li>A new HAL CAN driver has been redesigned with new APIs, to bypass limitations on CAN Tx/Rx FIFO management present with previous HAL CAN driver version.</li> |
| <li>The new HAL CAN driver is the recommended version. It is located as usual in Drivers/STM32F1xx_HAL_Driver/Src and Drivers/STM32f1xx_HAL_Driver/Inc folders. It can be enabled through switch HAL_CAN_MODULE_ENABLED in stm32f1xx_hal_conf.h</li> |
| <li>The legacy HAL CAN driver is also present in the release in Drivers/STM32F1xx_HAL_Driver/Src/Legacy and Drivers/STM32F1xx_HAL_Driver/Inc/Legacy folders for software compatibility reasons. Its usage is not recommended as deprecated. It can however be enabled through switch HAL_CAN_LEGACY_MODULE_ENABLED in stm32f1xx_hal_conf.h</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL</strong> update |
| <ul> |
| <li>Add definiton of HAL_CAN_LEGACY_MODULE_ENABLED swith in stm32f1xx_hal_conf_template.h</li> |
| </ul></li> |
| <li><strong>HAL CAN</strong> update |
| <ul> |
| <li>Fields of CAN_InitTypeDef structure are reworked: |
| <ul> |
| <li>SJW to SyncJumpWidth, BS1 to TimeSeg1, BS2 to TimeSeg2, TTCM to TimeTriggeredMode, ABOM to AutoBusOff, AWUM to AutoWakeUp, NART to AutoRetransmission (inversed), RFLM to ReceiveFifoLocked and TXFP to TransmitFifoPriority</li> |
| </ul></li> |
| <li>HAL_CAN_Init() is split into both HAL_CAN_Init() and HAL_CAN_Start() API’s</li> |
| <li>HAL_CAN_Transmit() is replaced by HAL_CAN_AddTxMessage() to place Tx Request, then HAL_CAN_GetTxMailboxesFreeLevel() for polling until completion.</li> |
| <li>HAL_CAN_Transmit_IT() is replaced by HAL_CAN_ActivateNotification() to enable transmit IT, then HAL_CAN_AddTxMessage() for place Tx request.</li> |
| <li>HAL_CAN_Receive() is replaced by HAL_CAN_GetRxFifoFillLevel() for polling until reception, then HAL_CAN_GetRxMessage()</li> |
| <li>to get Rx message.</li> |
| <li>HAL_CAN_Receive_IT() is replaced by HAL_CAN_ActivateNotification() to enable receive IT, then HAL_CAN_GetRxMessage()</li> |
| <li>in the receivecallback to get Rx message</li> |
| <li>HAL_CAN_Slepp() is renamed as HAL_CAN_RequestSleep()</li> |
| <li>HAL_CAN_TxCpltCallback() is split into HAL_CAN_TxMailbox0CompleteCallback(), HAL_CAN_TxMailbox1CompleteCallback() and HAL_CAN_TxMailbox2CompleteCallback().</li> |
| <li>HAL_CAN_RxCpltCallback is split into HAL_CAN_RxFifo0MsgPendingCallback() and HAL_CAN_RxFifo1MsgPendingCallback().</li> |
| <li>More complete “How to use the new driver” is detailed in the driver header section itself.</li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section9" aria-hidden="true"> <label for="collapse-section9" aria-hidden="true"><strong>V1.1.2 / 09-March-2018</strong></label> |
| <div> |
| <h2 id="main-changes-6">Main Changes</h2> |
| <ul> |
| <li>General updates to fix known defects and enhancements implementation</li> |
| <li>Remove Date and version from header files</li> |
| <li><strong>HAL Generic</strong> update |
| <ul> |
| <li>stm32f1xx_hal_def.h file changes: |
| <ul> |
| <li>Update UNUSED() macro implementation to avoid GCC warning |
| <ul> |
| <li>The warning is detected when the UNUSED() macro is called from C++ file</li> |
| </ul></li> |
| <li>Update __weak and __packed defined values for ARM compiler</li> |
| <li>Update __ALIGN_BEGIN and __ALIGN_END defined values for ARM compiler</li> |
| <li>Update to make RAMFUNC define as generic type instead of HAL_StatusTypdef type</li> |
| </ul></li> |
| </ul></li> |
| <li>stm32f1xx_hal.c/.h file changes: |
| <ul> |
| <li>Update HAL driver to allow user to change systick period to 1ms, 10 ms or 100 ms: |
| <ul> |
| <li>Add the following APIs: |
| <ul> |
| <li>HAL_GetTickPrio(): Returns a tick priority</li> |
| <li>HAL_SetTickFreq(): Sets new tick frequency</li> |
| <li>HAL_GetTickFreq(): Returns tick frequency</li> |
| </ul></li> |
| </ul></li> |
| <li>Add HAL_TickFreqTypeDef enumeration for the different Tick Frequencies: 10 Hz, 100 Hz and 1KHz (default)</li> |
| </ul></li> |
| <li>stm32f1xx_hal_conf_template.h file changes: |
| <ul> |
| <li>Fix wrong defined value of LSI</li> |
| </ul></li> |
| <li><strong>HAL GPIO</strong> update |
| <ul> |
| <li>Rework AFIO remap macros to avoid issue with Read-modify-write sequence on AFIO_MAPR register</li> |
| </ul></li> |
| <li><strong>HAL I2C</strong> update |
| <ul> |
| <li>Fix wrong check of data size in HAL_I2C_Slave Receive() API</li> |
| <li>Add a check on the minimum allowed PCLK1 frequency in HAL_I2C_Init() API</li> |
| <li>Fix I2C_SPEED_FAST() and I2C_SPEED_STANDARD() speed calculation macros to not let I2C SCL to go beyond 400KHz in some conditions</li> |
| </ul></li> |
| <li><strong>HAL RCC</strong> update |
| <ul> |
| <li>Update HAL_RCC_DeInit() and LL_RCC_DeInit() APIs to |
| <ul> |
| <li>Be able to return HAL/LL status</li> |
| <li>Add checks for HSI, PLL and PLLI2S ready before modifying RCC CFGR registers</li> |
| <li>Clear all interrupt flags</li> |
| <li>Initialize systick interrupt period</li> |
| </ul></li> |
| <li>Update HAL_RCC_GetSysClockFreq() to avoid risk of rounding error which may leads to a wrong returned value.</li> |
| </ul></li> |
| <li><strong>HAL SMARTCARD</strong> update |
| <ul> |
| <li>Update data processing in HAL smartcard transmit/receive processes(Polling/IT) to fix memory corruption issue.</li> |
| </ul></li> |
| <li><strong>LL GPIO</strong> update |
| <ul> |
| <li>Fix wrong management of GPIO pin position in LL_GPIO_Init() API when configuring GPIOx_CRH register</li> |
| <li>Fix wrong check conditions on GPIO mode in LL_GPIO_Init() API</li> |
| </ul></li> |
| <li>LL I2C update |
| <ul> |
| <li>Rename IS_I2C_CLOCK_SPEED() and IS_I2C_DUTY_CYCLE() respectively to IS_LL_I2C_CLOCK_SPEED() and IS_LL_I2C_DUTY_CYCLE() to avoid incompatible macros redefinition.</li> |
| </ul></li> |
| <li><strong>LL RCC</strong> update |
| <ul> |
| <li>Add LL_RCC_PLL_SetMainSource() macro to configure PLL main clock source</li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section8" aria-hidden="true"> <label for="collapse-section8" aria-hidden="true"><strong>V1.1.1 / 12-May-2017</strong></label> |
| <div> |
| <h2 id="main-changes-7">Main Changes</h2> |
| <ul> |
| <li>General updates to fix known defects and enhancements implementation</li> |
| <li><strong>HAL Generic</strong> update |
| <ul> |
| <li>stm32f1xx_hal_conf_template.h fix typo: update to refer to stm32f1xx_hal_mmc.h instead of stm32f4xx_hal_mmc.h</li> |
| </ul></li> |
| <li><strong>LL SYSTEM</strong> update |
| <ul> |
| <li>LL_DBGMCU_APB1_GRP1_I2C1_STOP and LL_DBGMCU_APB1_GRP1_I2C2_STOP literals are retarget to an available literals</li> |
| <li>LL_DBGMCU_APB1_GRP1_RTC_STOP literal is not available for all STM32F1 devices</li> |
| </ul></li> |
| <li><strong>HAL MMC</strong> update |
| <ul> |
| <li>Add missing () to fix compilation warning detected with SW4STM32 when extra feature is enabled.</li> |
| </ul></li> |
| <li><strong>HAL I2C</strong> update |
| <ul> |
| <li>Update HAL I2C processes to manage correctly the I2C state to allow the possibility to call HAL_I2C_Master_Sequential_Receive_IT() followed by a call HAL_I2C_Master_Sequential_Transmit_IT()</li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section7" aria-hidden="true"> <label for="collapse-section7" aria-hidden="true"><strong>V1.1.0 / 14-April-2017</strong></label> |
| <div> |
| <h2 id="main-changes-8">Main Changes</h2> |
| <ul> |
| <li><strong>Add Low Layer drivers allowing performance and footprint optimization</strong> |
| <ul> |
| <li>Low Layer drivers APIs provide register level programming: require deep knowledge of peripherals described in STM32F1xx Reference Manuals</li> |
| <li>Low Layer drivers are available for: ADC, Cortex, CRC, DAC, DMA, EXTI, GPIO, I2C, IWDG, PWR, RCC, RTC, SPI, TIM, USART, WWDG peripherals and additionnal Low Level Bus, System and Utilities APIs.</li> |
| <li>Low Layer drivers APIs are implemented as static inline function in new Inc/stm32f1xx_ll_ppp.h files for PPP peripherals, there is no configuration file and each stm32f1xx_ll_ppp.h file must be included in user code.</li> |
| </ul></li> |
| <li>Add new <strong>HAL MMC</strong> driver</li> |
| <li>General updates to fix known defects and enhancements implementation</li> |
| <li>Enhance HAL delay and time base implementation: |
| <ul> |
| <li>Add new drivers stm32f1xx_hal_timebase_rtc_alarm_template.c and stm32f1xx_hal_timebase_tim_template.c which override the native HAL time base functions (defined as weak) to either use the RTC/TIM as time base tick source. For more details about the usage of these drivers, please refer to HAL_TimeBase_RTC and HAL_TimeBase_TIM examples and FreeRTOS-based applications</li> |
| </ul></li> |
| <li>Fix extra warnings with GCC compiler</li> |
| <li>HAL drivers clean up: update ‘uint32_t’ cast with ‘U’</li> |
| <li>Update to used the new defined Bit_Pos CMSIS defines insetad of POSITION_VAL() macro</li> |
| <li>Update HAL weak empty callbacks to prevent unused argument compilation warnings with some compilers by calling the following line: |
| <ul> |
| <li>UNUSED(hppp);</li> |
| </ul></li> |
| <li>STM32Fxxx_User_Manual.chm files regenerated for HAL V1.1.0</li> |
| <li><strong>The following changes done on the HAL drivers require an update on the application code based on older HAL versions</strong> |
| <ul> |
| <li>HAL UART, USART, IRDA, SMARTCARD, SPI, I2C (referenced as PPP here below) drivers |
| <ul> |
| <li>Add PPP error management during DMA process. This requires the following updates on user application: |
| <ul> |
| <li>Configure and enable the PPP IRQ in HAL_PPP_MspInit() function</li> |
| <li>In stm32f1xx_it.c file, PPP_IRQHandler() function: add a call to HAL_PPP_IRQHandler() function</li> |
| <li>Add customize the Error Callback API: HAL_PPP_ErrorCallback()</li> |
| </ul></li> |
| </ul></li> |
| <li>HAL SD driver: |
| <ul> |
| <li>Overall rework of the driver for a more efficient implementation |
| <ul> |
| <li>Modify initialization API and structures</li> |
| <li>Modify Read / Write sequences: separate transfer process and SD Cards state management</li> |
| <li>Adding interrupt mode for Read / Write operations</li> |
| <li>Update the HAL_SD_IRQHandler function by optimizing the management of interrupt errors</li> |
| </ul></li> |
| <li>Refer to the following example to identify the changes: BSP example and USB_Device/MSC_Standalone application</li> |
| </ul></li> |
| <li>HAL NAND driver: |
| <ul> |
| <li>Modify NAND_AddressTypeDef, NAND_DeviceConfigTypeDef and NAND_HandleTypeDef structures fields</li> |
| <li>Add new HAL_NAND_ConfigDevice API</li> |
| </ul></li> |
| <li>HAL CEC driver: Overall driver rework with compatibility break versus previous HAL version |
| <ul> |
| <li>Remove HAL CEC polling Process functions: HAL_CEC_Transmit() and HAL_CEC_Receive()</li> |
| <li>Remove HAL CEC receive interrupt process function HAL_CEC_Receive_IT() and enable the “receive” mode during the Init phase</li> |
| <li>Rename HAL_CEC_GetReceivedFrameSize() funtion to HAL_CEC_GetLastReceivedFrameSize()</li> |
| <li>Add new HAL APIs: HAL_CEC_SetDeviceAddress() and HAL_CEC_ChangeRxBuffer()</li> |
| <li>Remove the ‘InitiatorAddress’ field from the CEC_InitTypeDef structure and manage it as a parameter in the HAL_CEC_Transmit_IT() function</li> |
| <li>Add new parameter ‘RxFrameSize’ in HAL_CEC_RxCpltCallback() function</li> |
| <li>Move CEC Rx buffer pointer from CEC_HandleTypeDef structure to CEC_InitTypeDef structure</li> |
| </ul></li> |
| <li>HAL IWDG driver: rework overall driver for better implementation |
| <ul> |
| <li>Remove HAL_IWDG_Start(), HAL_IWDG_MspInit() and HAL_IWDG_GetState() APIs</li> |
| </ul></li> |
| <li>HAL WWDG driver: rework overall driver for better implementation |
| <ul> |
| <li>Remove HAL_WWDG_Start(), HAL_WWDG_Start_IT(), HAL_WWDG_MspDeInit() and HAL_WWDG_GetState() APIs</li> |
| <li>Update the HAL_WWDG_Refresh(WWDG_HandleTypeDef *hwwdg, uint32_t counter) function and API by removing the “counter” parameter</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL GENERIC</strong> update |
| <ul> |
| <li>Modifiy default HAL_Delay implementation to guarantee minimum delay</li> |
| <li>stm32f1xx_hal_conf_template.h |
| <ul> |
| <li>Add new define LSI_VALUE</li> |
| <li>Add new define USE_SPI_CRC for code cleanup when the CRC calculation is disabled.</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL CORTEX</strong> update |
| <ul> |
| <li>Move HAL_MPU_Disable() and HAL_MPU_Enable() from stm32f4xx_hal_cortex.h to stm32f4xx_hal_cortex.c</li> |
| <li>Clear the whole MPU control register in HAL_MPU_Disable() API</li> |
| </ul></li> |
| <li><strong>HAL FLASH</strong> update |
| <ul> |
| <li>HAL_FLASH_OB_Launch(): fix static code analyzer warning: The removed code will not execute under any circumstances</li> |
| </ul></li> |
| <li><strong>HAL GPIO</strong> update |
| <ul> |
| <li>Update IS_GPIO_PIN() macro implementation to be more safe</li> |
| <li>Update remap macros implementation to use CLEAR_BIT()/SET_BIT() macros instead of MODIFY_REG() macro.</li> |
| </ul></li> |
| <li>HAL RCC update |
| <ul> |
| <li>Update LSI workaround delay to use CPU cycles instead of systick</li> |
| <li>Move LSI_VALUE define from RCC HAL driver to stm32f1xx_hal_conf.h file</li> |
| <li>Adjust defined PLL MUL values in aPLLMULFactorTable[]</li> |
| </ul></li> |
| <li><strong>HAL ADC</strong> update |
| <ul> |
| <li>HAL_ADCEx_MultiModeStart_DMA() and HAL_ADCEx_MultiModeStop_DMA() API’s update to fix code static analyzer warning: Redundant Condition / Unreachable Computation</li> |
| </ul></li> |
| <li><strong>HAL DMA</strong> update |
| <ul> |
| <li>HAL_DMA_Init(): update to check compatibility between FIFO threshold level and size of the memory burst</li> |
| <li>Global driver code optimization to reduce memory footprint</li> |
| <li>New APIs HAL_DMA_RegisterCallback() and HAL_DMA_UnRegisterCallback() to register/unregister the different possible callbacks identified by enum typedef HAL_DMA_CallbackIDTypeDef</li> |
| <li>Add new Error Codes: HAL_DMA_ERROR_NO_XFER and HAL_DMA_ERROR_NOT_SUPPORTED</li> |
| </ul></li> |
| <li><strong>HAL USART</strong> update |
| <ul> |
| <li>Add Transfer abort functions and callbacks</li> |
| <li>DMA Receive process; the code has been updated to clear the USART OVR flag before enabling DMA receive request.</li> |
| <li>Update HAL_USART_IRQHandler() to add a check on interrupt source before managing the error</li> |
| </ul></li> |
| <li><strong>HAL UART</strong> update |
| <ul> |
| <li>Several update on HAL UART driver to implement the new UART state machine: |
| <ul> |
| <li>Add new field in UART_HandleTypeDef structure: “rxState”, UART state information related to Rx Operations</li> |
| <li>Rename “state” field in UART_HandleTypeDef structure by “gstate”: UART state information related to global Handle management and Tx Operations</li> |
| <li>Update UART process to manage the new UART states.</li> |
| <li>Update __HAL_UART_RESET_HANDLE_STATE() macro to handle the new UART state parameters (gState, rxState)</li> |
| </ul></li> |
| <li>Add Transfer abort functions and callbacks</li> |
| <li>Update HAL_UART_IRQHandler() to add a check on interrupt source before managing the error</li> |
| <li>DMA Receive process; the code has been updated to clear the USART OVR flag before enabling DMA receive request.</li> |
| </ul></li> |
| <li><strong>HAL IRDA</strong> update |
| <ul> |
| <li>Several update on HAL IRDA driver to implement the new UART state machine: |
| <ul> |
| <li>Add new field in IRDA_HandleTypeDef structure: “rxState”, IRDA state information related to Rx Operations</li> |
| <li>Rename “state” field in UART_HandleTypeDef structure by “gstate”: IRDA state information related to global Handle management and Tx Operations</li> |
| <li>Update IRDA process to manage the new UART states.</li> |
| <li>Update __HAL_IRDA_RESET_HANDLE_STATE() macro to handle the new IRDA state parameters (gState, rxState)</li> |
| </ul></li> |
| <li>Removal of IRDA_TIMEOUT_VALUE define</li> |
| <li>Add Transfer abort functions and callbacks</li> |
| <li>Update HAL_IRDA_IRQHandler() to add a check on interrupt source before managing the error</li> |
| <li>DMA Receive process; the code has been updated to clear the USART OVR flag before enabling DMA receive request.</li> |
| </ul></li> |
| <li><strong>HAL SMARTCARD</strong> update |
| <ul> |
| <li>Several update on HAL SMARTCARD driver to implement the new UART state machine: |
| <ul> |
| <li>Add new field in SMARTCARD_HandleTypeDef structure: “rxState”, SMARTCARDstate information related to Rx Operations</li> |
| <li>Rename “state” field in UART_HandleTypeDef structure by “gstate”: SMARTCARDstate information related to global Handle management and Tx Operations</li> |
| <li>Update SMARTCARD process to manage the new UART states.</li> |
| <li>Update __HAL_SMARTCARD_RESET_HANDLE_STATE() macro to handle the new SMARTCARD state parameters (gState, rxState)</li> |
| </ul></li> |
| <li>Add Transfer abort functions and callbacks</li> |
| <li>Update HAL_SMARTCARD_IRQHandler() to add a check on interrupt source before managing the error</li> |
| <li>DMA Receive process; the code has been updated to clear the USART OVR flag before enabling DMA receive request.</li> |
| </ul></li> |
| <li><strong>HAL CAN</strong> update |
| <ul> |
| <li>Add management of overrun error.</li> |
| <li>Allow possibility to receive messages from the 2 RX FIFOs in parallel via interrupt.</li> |
| <li>Fix message lost issue with specific sequence of transmit requests.</li> |
| <li>Handle transmission failure with error callback, when NART is enabled.</li> |
| <li>Add __HAL_CAN_CANCEL_TRANSMIT() call to abort transmission when timeout is reached</li> |
| </ul></li> |
| <li><strong>HAL TIM</strong> update |
| <ul> |
| <li>Add __HAL_TIM_MOE_DISABLE_UNCONDITIONALLY() macro to disable Master output without check on TIM channel state.</li> |
| <li>Update HAL_TIMEx_ConfigBreakDeadTime() to fix TIM BDTR register corruption.</li> |
| <li>Update Input Capture polarity by removing non-supported “TIM_INPUTCHANNELPOLARITY_BOTHEDGE” define.</li> |
| <li>Update HAL_TIM_ConfigOCrefClear() API by removing the usage of non-existant SMCR OCCS bit.</li> |
| <li>Add “AutoReloadPreload” field to TIM_Base_InitTypeDef structure and corresponding macros __HAL_TIM_ENABLE_OCxPRELOAD() and __HAL_TIM_DISABLE_OCxPRELOAD() .</li> |
| <li>Update TIM_Base_SetConfig() API to set the auto-reload preload.</li> |
| </ul></li> |
| <li><strong>HAL I2C</strong> update |
| <ul> |
| <li>Update HAL_I2C_Master_Transmit() and HAL_I2C_Slave_Transmit() to avoid sending extra bytes at the end of the transmit processes</li> |
| <li>Update HAL_I2C_Mem_Read() API to fix wrong check on misused parameter “Size”</li> |
| <li>Update I2C_MasterReceive_RXNE() and I2C_MasterReceive_BTF() static APIs to enhance Master sequential reception process.</li> |
| </ul></li> |
| <li><strong>HAL SPI</strong> update |
| <ul> |
| <li>Major Update to improve performance in polling/interrupt mode to reach max frequency: |
| <ul> |
| <li>Polling mode : |
| <ul> |
| <li>Replace use of SPI_WaitOnFlagUnitTimeout() funnction by “if” statement to check on RXNE/TXE flage while transferring data.</li> |
| <li>Use API data pointer instead of SPI handle data pointer.</li> |
| </ul></li> |
| <li>Use a Goto implementation instead of “if..else” statements</li> |
| <li>Interrupt mode |
| <ul> |
| <li>Minimize access on SPI registers.</li> |
| <li>Split the SPI modes into dedicated static functions to minimize checking statements under HAL_IRQHandler(): |
| <ul> |
| <li>1lines/2lines modes</li> |
| <li>8 bit/ 16 bits data formats</li> |
| <li>CRC calculation enabled/disabled.</li> |
| </ul></li> |
| </ul></li> |
| <li>Remove waiting loop under ISR when closing the communication.</li> |
| <li>All modes: |
| <ul> |
| <li>Adding switch USE_SPI_CRC to minimize number of statements when CRC calculation is disabled.</li> |
| <li>Update Timeout management to check on global process.</li> |
| <li>Update Error code management in all processes.</li> |
| </ul></li> |
| </ul></li> |
| <li>Add note to the max frequencies reached in all modes.</li> |
| <li>Add note about Master Receive mode restrictions :</li> |
| <li>Master Receive mode restriction: |
| <ul> |
| <li><ol> |
| <li>In Master unidirectional receive-only mode (MSTR =1, BIDIMODE=0, RXONLY=0) or</li> |
| </ol></li> |
| <li>bidirectional receive mode (MSTR=1, BIDIMODE=1, BIDIOE=0), to ensure that the SPI</li> |
| </ul></li> |
| <li>does not initiate a new transfer the following procedure has to be respected: |
| <ul> |
| <li>(##) HAL_SPI_DeInit()</li> |
| <li>(##) HAL_SPI_Init()</li> |
| </ul></li> |
| <li>Add transfer abort APIs and associated callbacks in interrupt mode |
| <ul> |
| <li>HAL_SPI_Abort()</li> |
| <li>HAL_SPI_Abort_IT()</li> |
| <li>HAL_SPI_AbortCpltCallback()</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL CEC</strong> update |
| <ul> |
| <li>Overall driver rework with break of compatibility with HAL V1.0.5 |
| <ul> |
| <li>Remove the HAL CEC polling Process: HAL_CEC_Transmit() and HAL_CEC_Receive()</li> |
| <li>Remove the HAL CEC receive interrupt process (HAL_CEC_Receive_IT()) and manage the “Receive” mode enable within the Init phase</li> |
| <li>Rename HAL_CEC_GetReceivedFrameSize() function to HAL_CEC_GetLastReceivedFrameSize() function</li> |
| <li>Add new HAL APIs: HAL_CEC_SetDeviceAddress() and HAL_CEC_ChangeRxBuffer()</li> |
| <li>Remove the ‘InitiatorAddress’ field from the CEC_InitTypeDef structure and manage it as a parameter in the HAL_CEC_Transmit_IT() function</li> |
| <li>Add new parameter ‘RxFrameSize’ in HAL_CEC_RxCpltCallback() function</li> |
| <li>Move CEC Rx buffer pointer from CEC_HandleTypeDef structure to CEC_InitTypeDef structure</li> |
| </ul></li> |
| <li>Update driver to implement the new CEC state machine: |
| <ul> |
| <li>Add new “rxState” field in CEC_HandleTypeDef structure to provide the CEC state information related to Rx Operations</li> |
| <li>Rename “state” field in CEC_HandleTypeDef structure to “gstate”: CEC state information related to global Handle management and Tx Operations</li> |
| <li>Update CEC process to manage the new CEC states.</li> |
| <li>Update __HAL_CEC_RESET_HANDLE_STATE() macro to handle the new CEC state parameters (gState, rxState)</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL I2S</strong> update |
| <ul> |
| <li>Update I2S Transmit/Receive polling process to manage Overrun and Underrun errors</li> |
| <li>HAL I2S driver ovall clean-up and optimization</li> |
| <li>HAL_I2S_Init() API updated to |
| <ul> |
| <li>Fix wrong I2S clock calculation when PCM mode is used.</li> |
| <li>Return state HAL_I2S_ERROR_PRESCALER when the I2S clock is wrongly configured</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL NAND</strong> update |
| <ul> |
| <li>Modify NAND_AddressTypeDef, NAND_DeviceConfigTypeDef and NAND_HandleTypeDef structures fields</li> |
| <li>Add new HAL_NAND_ConfigDevice API</li> |
| </ul></li> |
| <li><strong>HAL USB PCD</strong> update |
| <ul> |
| <li>Flush all TX FIFOs on USB Reset</li> |
| <li>Remove Lock mechanism from HAL_PCD_EP_Transmit() and HAL_PCD_EP_Receive() API’s</li> |
| </ul></li> |
| <li><strong>LL USB</strong> update |
| <ul> |
| <li>Enable DMA Burst mode for USB OTG HS</li> |
| <li>Fix SD card detection issue</li> |
| </ul></li> |
| <li><strong>LL SDMMC</strong> update |
| <ul> |
| <li>Add new SDMMC_CmdSDEraseStartAdd, SDMMC_CmdSDEraseEndAdd, SDMMC_CmdOpCondition and SDMMC_CmdSwitch functions</li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="true"><strong>V1.0.5 / 06-December-2016</strong></label> |
| <div> |
| <h2 id="main-changes-9">Main Changes</h2> |
| <ul> |
| <li>General updates to fix mainly known I2C defects and enhancements implementation</li> |
| <li><strong>The following changes done on the HAL drivers require an update on the application code based on HAL V1.0.4</strong> |
| <ul> |
| <li>HAL I2C driver:</li> |
| <li>Add I2C error management during DMA process. This requires the following updates on user application: |
| <ul> |
| <li>Configure and enable the I2C IRQ in HAL_I2C_MspInit() function</li> |
| <li>In stm32f1xx_it.c file, I2C _IRQHandler() function: add a call to HAL_I2C_IRQHandler() function</li> |
| <li>Add and customize the Error Callback API: HAL_I2C_ErrorCallback()</li> |
| </ul></li> |
| <li>Update to avoid waiting on STOPF/BTF/AF flag under DMA ISR by using the I2C end of transfer interrupt in the DMA transfer process. This requires the following updates on user application:</li> |
| <li>Configure and enable the I2C IRQ in HAL_I2C_MspInit() function</li> |
| <li>In stm32f1xx_it.c file, I2C_IRQHandler() function: add a call to HAL_I2C_IRQHandler() function</li> |
| <li>I2C transfer processes IT update: NACK during addressing phase is managed through I2C Error interrupt instead of HAL state</li> |
| </ul></li> |
| <li><strong>HAL I2C</strong> update |
| <ul> |
| <li>Add support of I2C repeated start feature:</li> |
| <li>With the following new API’s |
| <ul> |
| <li>HAL_I2C_Master_Sequential_Transmit_IT()</li> |
| <li>HAL_I2C_Master_Sequential_Receive_IT()</li> |
| <li>HAL_I2C_Master_Abort_IT()</li> |
| <li>HAL_I2C_Slave_Sequential_Transmit_IT()</li> |
| <li>HAL_I2C_Slave_Sequential_Receive_IT()</li> |
| <li>HAL_I2C_EnableListen_IT()</li> |
| <li>HAL_I2C_DisableListen_IT()</li> |
| </ul></li> |
| <li>Add new user callbacks: |
| <ul> |
| <li>HAL_I2C_ListenCpltCallback()</li> |
| <li>HAL_I2C_AddrCallback()</li> |
| </ul></li> |
| <li>IRQ handler optimization: read registers status only once</li> |
| <li>I2C addressing phase is updated to be managed using interrupt instead of polling |
| <ul> |
| <li>Add new static functions to manage I2C SB, ADDR and ADD10 flags</li> |
| </ul></li> |
| <li>I2C IT transfer processes update: NACK during addressing phase is managed through I2C Error interrupt instead of HAL state</li> |
| <li>Update to generate STOP condition when a acknowledge failure error is detected</li> |
| <li>Update I2C_WaitOnFlagUntilTimeout() to manage the NACK feature.</li> |
| <li>Update I2C transmission process to support the case data size equal 0</li> |
| <li>Update Polling management: |
| <ul> |
| <li>The Timeout value must be estimated for the overall process duration: the Timeout measurement is cumulative</li> |
| </ul></li> |
| <li>Add the management of Abort service: Abort DMA transfer through interrupt |
| <ul> |
| <li>In the case of Master Abort IT transfer usage: |
| <ul> |
| <li>Add new user HAL_I2C_AbortCpltCallback() to inform user of the end of abort process</li> |
| <li>A new abort state is defined in the HAL_I2C_StateTypeDef structure</li> |
| </ul></li> |
| </ul></li> |
| <li>Add the management of I2C peripheral errors, ACK failure and STOP condition detection during DMA process. This requires the following updates on user application: |
| <ul> |
| <li>Configure and enable the I2C IRQ in HAL_I2C_MspInit() function</li> |
| <li>In stm32f1xx_it.c file, I2C_IRQHandler() function: add a call to HAL_I2C_IRQHandler() function</li> |
| <li>Add and customize the Error Callback API: HAL_I2C_ErrorCallback()</li> |
| </ul></li> |
| <li>Update to avoid waiting on STOPF/BTF/AF flag under DMA ISR by using the I2C end of transfer interrupt in the DMA transfer process. This requires the following updates on user application: |
| <ul> |
| <li>Configure and enable the I2C IRQ in HAL_I2C_MspInit() function</li> |
| <li>In stm32f1xx_it.c file, I2C_IRQHandler() function: add a call to HAL_I2C_IRQHandler() function</li> |
| </ul></li> |
| <li>Add a check if the I2C is already enabled at start of all I2C API’s.</li> |
| <li>Update I2C API’s (Polling, IT, DMA interfaces) to use hi2c->XferSize and hi2c->XferCount instead of size</li> |
| <li>parameter to help user to get information of counter in case of error</li> |
| </ul></li> |
| <li><strong>HAL DMA</strong> update |
| <ul> |
| <li>Add new API HAL_DMA_Abort_IT() to abort DMA transfer under interrupt context |
| <ul> |
| <li>The new registered Abort callback is called when DMA transfer abortion is completed</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL ETH</strong> update |
| <ul> |
| <li>Remove ETH MAC debug register defines</li> |
| </ul></li> |
| <li><strong>HAL DAC</strong> update |
| <ul> |
| <li>Clean up: remove the following literals that aren’t used |
| <ul> |
| <li>DAC_WAVE_NOISE</li> |
| <li>DAC_WAVE_TRIANGLE</li> |
| </ul></li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true"><strong>V1.0.4 / 29-April-2016</strong></label> |
| <div> |
| <h2 id="main-changes-10">Main Changes</h2> |
| <ul> |
| <li>General updates to fix known defects and enhancements implementation.</li> |
| <li><strong>HAL RCC</strong> |
| <ul> |
| <li>Add suffix U for defines equals to 0xFFFFFFFF (fix MISRA error 10.6)</li> |
| <li>Optimization of HAL_RCC_ClockConfig().</li> |
| <li>Replace aAPBAHBPrescTable by APBPrescTable and AHBPrescTable defined inside system_stm32f1xx.c.</li> |
| <li>When using HAL_RCC_OscConfig to activate LSE, if LSE is already ON, it remains in its state ON. Previously, it was turned OFF then ON in all cases.</li> |
| <li>The backup domain is no more reset when changing the RTC clock source from reset value.</li> |
| <li>Correct strange behavior in HAL_RCCEx_PeriphCLKConfig.</li> |
| </ul></li> |
| <li><strong>HAL UART</strong> |
| <ul> |
| <li>Correct the macro UART_BRR_SAMPLING16</li> |
| </ul></li> |
| <li><strong>HAL SMARTCARD</strong> |
| <ul> |
| <li>Correct the macro SMARTCARD_BRR</li> |
| </ul></li> |
| <li><strong>HAL IRDA</strong> |
| <ul> |
| <li>Correct the macro IRDA_BRR</li> |
| <li>EIE bit is no more activated in transmit (this bit only triggers errors in reception)</li> |
| <li>EIE bit is reset at the end of the reception.</li> |
| </ul></li> |
| <li><strong>HAL DMA</strong> |
| <ul> |
| <li>Add macro __HAL_DMA_GET_COUNTER to get the number of remaining data units in the current channel.</li> |
| </ul></li> |
| <li><strong>HAL FSMC</strong> |
| <ul> |
| <li>Adapt FSMC_NAND_Init behavior to the others STM32 series by reseting the bit FSMC_PCRx_PBKEN.</li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" aria-hidden="true"><strong>V1.0.3 / 11-January-2016</strong></label> |
| <div> |
| <h2 id="main-changes-11">Main Changes</h2> |
| <ul> |
| <li>Remove the #if defined(USE_HAL_LEGACY) condition to include Legacy/stm32_hal_legacy.h by default, in stm32f1xx_hal_def.h.</li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true"><strong>V1.0.2 / 18-December-2015</strong></label> |
| <div> |
| <h2 id="main-changes-12">Main Changes</h2> |
| <ul> |
| <li>General updates to fix known defects and enhancements implementation.</li> |
| <li><strong>HAL generic</strong> |
| <ul> |
| <li>Insure that do {} while(0) are used in in multi statement macros. (hal eth and pcd)</li> |
| <li>Manage simultaneous errors in IRQHandler. (hal uart, smartcard, usart and uart)</li> |
| <li>To ensure the full compatibility of the GPIO interfaces across all the STM32 families, the gpio speed definition have been renamed: |
| <ul> |
| <li>GPIO_SPEED_LOW to GPIO_SPEED_FREQ_LOW</li> |
| <li>GPIO_SPEED_MEDIUM to GPIO_SPEED_FREQ_MEDIUM</li> |
| <li>GPIO_SPEED_HIGH to GPIO_SPEED_FREQ_HIGH</li> |
| <li>aliases are created to keep backward compatibility</li> |
| </ul></li> |
| <li>Reduce the default timeout value for the startup of the HSE form 5s to 100ms.</li> |
| <li>Update HAL weak empty callbacks to prevent unused argument compilation warnings with some compilers.</li> |
| </ul></li> |
| <li><strong>HAL ADC</strong> |
| <ul> |
| <li>Remove useless state HAL_ADC_STATE_REG_OVR and HAL_ADC_STATE_REG_EOSMP.</li> |
| <li>Add an error case if init is done with both continuous and discontinuous modes.</li> |
| <li>HAL_ADC_PollForEvent returns HAL_TIMEOUT if a timeout occurs instead of HAL_ERROR.</li> |
| <li>Trigger the assert_param of the number of discontinuous conversion only if the discontinuous mode is enabled.</li> |
| <li>Enhance the check for ScanConvMode in HAL_ADC_Init.</li> |
| </ul></li> |
| <li><strong>HAL CAN</strong> |
| <ul> |
| <li>Clear the ERRI bit in HAL_CAN_IRQHandler.</li> |
| </ul></li> |
| <li><strong>HAL CORTEX</strong> |
| <ul> |
| <li>Remove the macro __HAL_CORTEX_SYSTICKCLK_CONFIG as duplicated by HAL_SYSTICK_CLKSourceConfig. |
| <ul> |
| <li>Create an alias to HAL_SYSTICK_CLKSourceConfig for backward compatibility.</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL FLASH</strong> |
| <ul> |
| <li>The parameter ReturnValue of HAL_FLASH_EndOfOperationCallback, in the case of Pages Erase, now take the value of 0xFFFFFFFF if all the selected pages have been erased.</li> |
| <li>Add a new interface HAL_FLASHEx_OBGetUserData to get the option byte user data.</li> |
| </ul></li> |
| <li><strong>HAL GPIO</strong> |
| <ul> |
| <li>Remove a useless assert_param on the pull mode in HAL_GPIO_Init.</li> |
| </ul></li> |
| <li><strong>HAL I2C</strong> |
| <ul> |
| <li>Correct issue at reception of 2 bytes using memory polling and IT interface.</li> |
| <li>Correct a wrong management of the AF flag.</li> |
| </ul></li> |
| <li><strong>HAL RCC</strong> |
| <ul> |
| <li>Reduce the timeout of HSI, LSI and PLL to be closer to HW specifications: |
| <ul> |
| <li>HSI_TIMEOUT_VALUE reduced from 100ms to 2ms</li> |
| <li>LSI_TIMEOUT_VALUE reduced from 100ms to 2ms</li> |
| <li>PLL_TIMEOUT_VALUE reduced from 100ms to 2ms</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL SD</strong> |
| <ul> |
| <li>Correct wrong calculation of the capacity for High Capacity cards.</li> |
| </ul></li> |
| <li><strong>HAL SPI</strong> |
| <ul> |
| <li>Remove incorrect reset of DMA parameter in HAL_SPI_Receive_DMA and HAL_SPI_Transmit_DMA.</li> |
| </ul></li> |
| <li><strong>HAL TIM</strong> |
| <ul> |
| <li>Remove useless assert_param.</li> |
| <li>Rewrite the assert_param when setting clock source.</li> |
| </ul></li> |
| <li><strong>HAL UART</strong> |
| <ul> |
| <li>Manage the case of reception of a character while the driver is not expecting one. This was causing a crash of the driver.</li> |
| </ul></li> |
| <li><strong>LL USB</strong> |
| <ul> |
| <li>Remove the NoVbusSensing feature from driver. (feature not present on STM32F1xx)</li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true"><strong>V1.0.1 / 31-July-2015</strong></label> |
| <div> |
| <h2 id="main-changes-13">Main Changes</h2> |
| <ul> |
| <li>General updates to fix known defects and enhancements implementation.</li> |
| <li><strong>HAL generic</strong> |
| <ul> |
| <li>stm32f1xx_hal_def.h |
| <ul> |
| <li>Update NULL definition to fix C++ compilation issue.</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL ADC</strong> |
| <ul> |
| <li>Optimization of macro __HAL_ADC_CLEAR_FLAG.</li> |
| <li>ADC poll for conversion now return error status in case of ADC-DMA mode.</li> |
| <li>ADC polling functions now return HAL_TIMEOUT (or HAL_ERROR in case of configuration error).</li> |
| <li>Removing field NbrOfConversionRank of ADC_HandleTypeDef. This field was useless on STM32F1xx.</li> |
| <li>Improving the ADC state machine.</li> |
| </ul></li> |
| <li><strong>HAL CAN</strong> |
| <ul> |
| <li>Field Data of CanRxMsgTypeDef and CanTxMsgTypeDef is changed from uint32_t to uint8_t.</li> |
| </ul></li> |
| <li><strong>HAL Cortex</strong> |
| <ul> |
| <li>Add MPU APIs in Cortex HAL driver.</li> |
| </ul></li> |
| <li><strong>HAL CRC</strong> |
| <ul> |
| <li>Correcting a wrong definition of __HAL_CRC_SET_IDR macro.</li> |
| </ul></li> |
| <li><strong>HAL DAC</strong> |
| <ul> |
| <li>HAL_IS_BIT_SET is nowused properly in HAL_DAC_Start.</li> |
| <li>Add 2 defines: DAC_WAVEGENERATION_NOISE and DAC_WAVEGENERATION_TRIANGLE.</li> |
| <li>HAL_DAC_Stop now disable DAC software conversion.</li> |
| </ul></li> |
| <li><strong>HAL DMA</strong> |
| <ul> |
| <li>Minor typographic updates.</li> |
| </ul></li> |
| <li><strong>HAL ETH</strong> |
| <ul> |
| <li>ETH_MAC_READCONTROLLER_FLUSHING: Removing a space in the middle of the name.</li> |
| <li>Removing some duplicated macros.</li> |
| </ul></li> |
| <li><strong>HAL FLASH</strong> |
| <ul> |
| <li>FLASH_OB_GetRDP returns uint32_t instead of FlagStatus. (internal function). This permit a more coherent use for HAL_FLASHEx_OBGetConfig and HAL_FLASHEx_OBProgram.</li> |
| <li>Correct an issue making impossible to set Flash read protection level1 and level2.</li> |
| <li>The activation of backup domain in RCC is systematic.</li> |
| </ul></li> |
| <li><strong>HAL I2C</strong> |
| <ul> |
| <li>Correct an issue depending of APB/I2C frequency which was preventing the STOP bit to be cleared. |
| <ul> |
| <li>The POS bit is now cleared at the beginning of each I2C API.</li> |
| <li>The POS bit is no more cleared near STOP generation.</li> |
| </ul></li> |
| </ul></li> |
| <li><strong>HAL I2S</strong> |
| <ul> |
| <li>HAL_I2S_Transmit() API is updated to keep the check on busy flag only for the slave.</li> |
| </ul></li> |
| <li><strong>HAL NAND</strong> |
| <ul> |
| <li>Review __ARRAY_ADDRESS macro and adapt tests to detect bad blocks</li> |
| </ul></li> |
| <li><strong>HAL RCC</strong> |
| <ul> |
| <li>In HAL_RCCEx_PeriphCLKConfig, Reset backup domain only if RTC clock source has been changed.</li> |
| <li>Update of HAL_RCC_OscConfig functionto correctly check LSEState.</li> |
| <li>Rework __HAL_RCC_LSE_CONFIG macro to manage correctly LSE_Bypass.</li> |
| <li>New HAL RCC macro to configure the SYSCLK clock source: __HAL_RCC_SYSCLK_CONFIG(<strong>RCC_SYSCLKSOURCE</strong>).</li> |
| <li>Adding macro: __HAL_RCC_MCO_CONFIG.</li> |
| <li>For some RPN, the prediv source management in HAL_RCC_OscConfig function was not used.</li> |
| </ul></li> |
| <li><strong>HAL RTC</strong> |
| <ul> |
| <li>CMSIS mask definition used instead of hardcoded values.</li> |
| </ul></li> |
| <li><strong>HAL SMARTCARD</strong> |
| <ul> |
| <li>Improve documentation</li> |
| </ul></li> |
| <li><strong>HAL TIM</strong> |
| <ul> |
| <li>All STM32F101xx and STM32F102xx defines were missing in the file stm32f1xx_hal_tim_ex.h.</li> |
| <li>The assert on trigger polarity for TI1F_ED is removed.</li> |
| </ul></li> |
| <li><strong>HAL USB</strong> |
| <ul> |
| <li>Correct issue preventing USB Device double-buffering mode for IN endpoints to correctly behave.</li> |
| <li>Correct a bad configuration of Turnaround Time.</li> |
| <li>Correct USB_FlushTxFifo function which was leading to a GRSTCTL register corruption.</li> |
| <li>Replaced the access to USB_OTG_HCCHAR_CHDIS and USB_OTG_HCCHAR_CHENA from a sequencial access to a simultaneous access.</li> |
| </ul></li> |
| </ul> |
| </div> |
| </div> |
| <div class="collapse"> |
| <input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true"><strong>V1.0.0 / 15-December-2014</strong></label> |
| <div> |
| <h2 id="main-changes-14">Main Changes</h2> |
| <ul> |
| <li>First Official release of <strong>STM32F1xx HAL Drivers</strong> for all STM32F1 devices.</li> |
| <li>This release is in line with <strong>STM32Cube Firmware specification Rev1.0</strong> document</li> |
| </ul> |
| </div> |
| </div> |
| </div> |
| </div> |
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