Release v1.2.4
diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md index 775518a..9ef03ba 100644 --- a/CONTRIBUTING.md +++ b/CONTRIBUTING.md
@@ -5,9 +5,9 @@ This guide mainly focuses on the proper use of Git. ### 1. Before opening an issue -To report a bug/request please file an issue in the right repository -(example for [stm32f2xx_hal_driver](https://github.com/STMicroelectronics/stm32f2xx_hal_driver/issues/new/choose)). -But check the following boxes before posting an issue: +In order to centralize your bug reports and requests and to ease their tracking please file an issue into the firmware repository [STM32CubeF2](https://github.com/STMicroelectronics/STM32CubeF2/issues/new/choose). + +Please check the following boxes before posting an issue: - [ ] `Make sure you are using the latest commit (major releases are Tagged, but corrections are available as new commits).` - [ ] `Make sure your issue is a question/feedback/suggestions RELATED TO the software provided in this repo.` Otherwise, it should be discussed on the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus). @@ -15,7 +15,7 @@ ### 2. Posting the issue -When you have checked the previous boxes. You will find two templates Issues (Bug Report or Other Issue) available in the **Issues** tab of the repo +Once you have checked the previous boxes, you will find two templates for issues (Bug Report or Other Issue) available in the **Issues** tab of the firmware repository. ### 3. Pull Requests -For the moment, the Pull Request feature is not deployed. STMicrolectronics is working on a Contributor License Agreement procedure +For the moment, the Pull Request feature is not deployed. STMicrolectronics is working on a Contributor License Agreement (CLA) procedure.
diff --git a/Inc/Legacy/stm32_hal_legacy.h b/Inc/Legacy/stm32_hal_legacy.h index 52c9d6c..90767ed 100644 --- a/Inc/Legacy/stm32_hal_legacy.h +++ b/Inc/Legacy/stm32_hal_legacy.h
@@ -236,12 +236,12 @@ #define DAC_WAVEGENERATION_NOISE DAC_WAVE_NOISE #define DAC_WAVEGENERATION_TRIANGLE DAC_WAVE_TRIANGLE -#if defined(STM32G4) -#define DAC_CHIPCONNECT_DISABLE (DAC_CHIPCONNECT_EXTERNAL | DAC_CHIPCONNECT_BOTH) -#define DAC_CHIPCONNECT_ENABLE (DAC_CHIPCONNECT_INTERNAL | DAC_CHIPCONNECT_BOTH) +#if defined(STM32G4) || defined(STM32H7) +#define DAC_CHIPCONNECT_DISABLE DAC_CHIPCONNECT_EXTERNAL +#define DAC_CHIPCONNECT_ENABLE DAC_CHIPCONNECT_INTERNAL #endif -#if defined(STM32L1) || defined(STM32L4) || defined(STM32G0) +#if defined(STM32L1) || defined(STM32L4) || defined(STM32G0) || defined(STM32L5) || defined(STM32H7) || defined(STM32F4) #define HAL_DAC_MSP_INIT_CB_ID HAL_DAC_MSPINIT_CB_ID #define HAL_DAC_MSP_DEINIT_CB_ID HAL_DAC_MSPDEINIT_CB_ID #endif @@ -306,8 +306,17 @@ #define HAL_DMAMUX_REQUEST_GEN_FALLING HAL_DMAMUX_REQ_GEN_FALLING #define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING HAL_DMAMUX_REQ_GEN_RISING_FALLING +#if defined(STM32L4R5xx) || defined(STM32L4R9xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) +#define DMA_REQUEST_DCMI_PSSI DMA_REQUEST_DCMI +#endif + #endif /* STM32L4 */ +#if defined(STM32G0) +#define DMA_REQUEST_DAC1_CHANNEL1 DMA_REQUEST_DAC1_CH1 +#define DMA_REQUEST_DAC1_CHANNEL2 DMA_REQUEST_DAC1_CH2 +#endif + #if defined(STM32H7) #define DMA_REQUEST_DAC1 DMA_REQUEST_DAC1_CH1 @@ -365,6 +374,9 @@ #define DFSDM_FILTER_EXT_TRIG_LPTIM2 DFSDM_FILTER_EXT_TRIG_LPTIM2_OUT #define DFSDM_FILTER_EXT_TRIG_LPTIM3 DFSDM_FILTER_EXT_TRIG_LPTIM3_OUT +#define DAC_TRIGGER_LP1_OUT DAC_TRIGGER_LPTIM1_OUT +#define DAC_TRIGGER_LP2_OUT DAC_TRIGGER_LPTIM2_OUT + #endif /* STM32H7 */ /** @@ -460,7 +472,9 @@ #define FLASH_FLAG_SNECCE_BANK2RR FLASH_FLAG_SNECCERR_BANK2 #define FLASH_FLAG_DBECCE_BANK2RR FLASH_FLAG_DBECCERR_BANK2 #define FLASH_FLAG_STRBER_BANK2R FLASH_FLAG_STRBERR_BANK2 -#endif +#define FLASH_FLAG_WDW FLASH_FLAG_WBNE +#define OB_WRP_SECTOR_All OB_WRP_SECTOR_ALL +#endif /* STM32H7 */ /** * @} @@ -564,7 +578,14 @@ #define GPIO_AF9_SDIO2 GPIO_AF9_SDMMC2 #define GPIO_AF10_SDIO2 GPIO_AF10_SDMMC2 #define GPIO_AF11_SDIO2 GPIO_AF11_SDMMC2 -#endif + +#if defined (STM32H743xx) || defined (STM32H753xx) || defined (STM32H750xx) || defined (STM32H742xx) || \ + defined (STM32H745xx) || defined (STM32H755xx) || defined (STM32H747xx) || defined (STM32H757xx) +#define GPIO_AF10_OTG2_HS GPIO_AF10_OTG2_FS +#define GPIO_AF10_OTG1_FS GPIO_AF10_OTG1_HS +#define GPIO_AF12_OTG2_FS GPIO_AF12_OTG1_FS +#endif /*STM32H743xx || STM32H753xx || STM32H750xx || STM32H742xx || STM32H745xx || STM32H755xx || STM32H747xx || STM32H757xx */ +#endif /* STM32H7 */ #define GPIO_AF0_LPTIM GPIO_AF0_LPTIM1 #define GPIO_AF1_LPTIM GPIO_AF1_LPTIM1 @@ -735,6 +756,66 @@ #define HRTIM_OUTPUTRESET_TIMFEV8_TIMECMP2 HRTIM_OUTPUTSET_TIMEV_8 #define HRTIM_OUTPUTRESET_TIMFEV9_TIMECMP3 HRTIM_OUTPUTSET_TIMEV_9 #endif /* STM32H7 */ + +#if defined(STM32F3) +/** @brief Constants defining available sources associated to external events. + */ +#define HRTIM_EVENTSRC_1 (0x00000000U) +#define HRTIM_EVENTSRC_2 (HRTIM_EECR1_EE1SRC_0) +#define HRTIM_EVENTSRC_3 (HRTIM_EECR1_EE1SRC_1) +#define HRTIM_EVENTSRC_4 (HRTIM_EECR1_EE1SRC_1 | HRTIM_EECR1_EE1SRC_0) + +/** @brief Constants defining the events that can be selected to configure the + * set/reset crossbar of a timer output + */ +#define HRTIM_OUTPUTSET_TIMEV_1 (HRTIM_SET1R_TIMEVNT1) +#define HRTIM_OUTPUTSET_TIMEV_2 (HRTIM_SET1R_TIMEVNT2) +#define HRTIM_OUTPUTSET_TIMEV_3 (HRTIM_SET1R_TIMEVNT3) +#define HRTIM_OUTPUTSET_TIMEV_4 (HRTIM_SET1R_TIMEVNT4) +#define HRTIM_OUTPUTSET_TIMEV_5 (HRTIM_SET1R_TIMEVNT5) +#define HRTIM_OUTPUTSET_TIMEV_6 (HRTIM_SET1R_TIMEVNT6) +#define HRTIM_OUTPUTSET_TIMEV_7 (HRTIM_SET1R_TIMEVNT7) +#define HRTIM_OUTPUTSET_TIMEV_8 (HRTIM_SET1R_TIMEVNT8) +#define HRTIM_OUTPUTSET_TIMEV_9 (HRTIM_SET1R_TIMEVNT9) + +#define HRTIM_OUTPUTRESET_TIMEV_1 (HRTIM_RST1R_TIMEVNT1) +#define HRTIM_OUTPUTRESET_TIMEV_2 (HRTIM_RST1R_TIMEVNT2) +#define HRTIM_OUTPUTRESET_TIMEV_3 (HRTIM_RST1R_TIMEVNT3) +#define HRTIM_OUTPUTRESET_TIMEV_4 (HRTIM_RST1R_TIMEVNT4) +#define HRTIM_OUTPUTRESET_TIMEV_5 (HRTIM_RST1R_TIMEVNT5) +#define HRTIM_OUTPUTRESET_TIMEV_6 (HRTIM_RST1R_TIMEVNT6) +#define HRTIM_OUTPUTRESET_TIMEV_7 (HRTIM_RST1R_TIMEVNT7) +#define HRTIM_OUTPUTRESET_TIMEV_8 (HRTIM_RST1R_TIMEVNT8) +#define HRTIM_OUTPUTRESET_TIMEV_9 (HRTIM_RST1R_TIMEVNT9) + +/** @brief Constants defining the event filtering applied to external events + * by a timer + */ +#define HRTIM_TIMEVENTFILTER_NONE (0x00000000U) +#define HRTIM_TIMEVENTFILTER_BLANKINGCMP1 (HRTIM_EEFR1_EE1FLTR_0) +#define HRTIM_TIMEVENTFILTER_BLANKINGCMP2 (HRTIM_EEFR1_EE1FLTR_1) +#define HRTIM_TIMEVENTFILTER_BLANKINGCMP3 (HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0) +#define HRTIM_TIMEVENTFILTER_BLANKINGCMP4 (HRTIM_EEFR1_EE1FLTR_2) +#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR1 (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_0) +#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR2 (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1) +#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR3 (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0) +#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR4 (HRTIM_EEFR1_EE1FLTR_3) +#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR5 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_0) +#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR6 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_1) +#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR7 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0) +#define HRTIM_TIMEVENTFILTER_BLANKINGFLTR8 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2) +#define HRTIM_TIMEVENTFILTER_WINDOWINGCMP2 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_0) +#define HRTIM_TIMEVENTFILTER_WINDOWINGCMP3 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1) +#define HRTIM_TIMEVENTFILTER_WINDOWINGTIM (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0) + +/** @brief Constants defining the DLL calibration periods (in micro seconds) + */ +#define HRTIM_CALIBRATIONRATE_7300 0x00000000U +#define HRTIM_CALIBRATIONRATE_910 (HRTIM_DLLCR_CALRTE_0) +#define HRTIM_CALIBRATIONRATE_114 (HRTIM_DLLCR_CALRTE_1) +#define HRTIM_CALIBRATIONRATE_14 (HRTIM_DLLCR_CALRTE_1 | HRTIM_DLLCR_CALRTE_0) + +#endif /* STM32F3 */ /** * @} */ @@ -874,7 +955,7 @@ #define OPAMP_PGACONNECT_VM0 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0 #define OPAMP_PGACONNECT_VM1 OPAMP_PGA_CONNECT_INVERTINGINPUT_IO1 -#if defined(STM32L1) || defined(STM32L4) +#if defined(STM32L1) || defined(STM32L4) || defined(STM32L5) || defined(STM32H7) #define HAL_OPAMP_MSP_INIT_CB_ID HAL_OPAMP_MSPINIT_CB_ID #define HAL_OPAMP_MSP_DEINIT_CB_ID HAL_OPAMP_MSPDEINIT_CB_ID #endif @@ -965,6 +1046,16 @@ #define RTC_TAMPERPIN_PA0 RTC_TAMPERPIN_POS1 #define RTC_TAMPERPIN_PI8 RTC_TAMPERPIN_POS1 +#if defined(STM32H7) +#define RTC_TAMPCR_TAMPXE RTC_TAMPER_X +#define RTC_TAMPCR_TAMPXIE RTC_TAMPER_X_INTERRUPT + +#define RTC_TAMPER1_INTERRUPT RTC_IT_TAMP1 +#define RTC_TAMPER2_INTERRUPT RTC_IT_TAMP2 +#define RTC_TAMPER3_INTERRUPT RTC_IT_TAMP3 +#define RTC_ALL_TAMPER_INTERRUPT RTC_IT_TAMPALL +#endif /* STM32H7 */ + /** * @} */ @@ -1358,6 +1449,30 @@ #define HASH_HMACKeyType_ShortKey HASH_HMAC_KEYTYPE_SHORTKEY #define HASH_HMACKeyType_LongKey HASH_HMAC_KEYTYPE_LONGKEY + +#if defined(STM32L4) || defined(STM32F4) || defined(STM32F7) || defined(STM32H7) + +#define HAL_HASH_MD5_Accumulate HAL_HASH_MD5_Accmlt +#define HAL_HASH_MD5_Accumulate_End HAL_HASH_MD5_Accmlt_End +#define HAL_HASH_MD5_Accumulate_IT HAL_HASH_MD5_Accmlt_IT +#define HAL_HASH_MD5_Accumulate_End_IT HAL_HASH_MD5_Accmlt_End_IT + +#define HAL_HASH_SHA1_Accumulate HAL_HASH_SHA1_Accmlt +#define HAL_HASH_SHA1_Accumulate_End HAL_HASH_SHA1_Accmlt_End +#define HAL_HASH_SHA1_Accumulate_IT HAL_HASH_SHA1_Accmlt_IT +#define HAL_HASH_SHA1_Accumulate_End_IT HAL_HASH_SHA1_Accmlt_End_IT + +#define HAL_HASHEx_SHA224_Accumulate HAL_HASHEx_SHA224_Accmlt +#define HAL_HASHEx_SHA224_Accumulate_End HAL_HASHEx_SHA224_Accmlt_End +#define HAL_HASHEx_SHA224_Accumulate_IT HAL_HASHEx_SHA224_Accmlt_IT +#define HAL_HASHEx_SHA224_Accumulate_End_IT HAL_HASHEx_SHA224_Accmlt_End_IT + +#define HAL_HASHEx_SHA256_Accumulate HAL_HASHEx_SHA256_Accmlt +#define HAL_HASHEx_SHA256_Accumulate_End HAL_HASHEx_SHA256_Accmlt_End +#define HAL_HASHEx_SHA256_Accumulate_IT HAL_HASHEx_SHA256_Accmlt_IT +#define HAL_HASHEx_SHA256_Accumulate_End_IT HAL_HASHEx_SHA256_Accmlt_End_IT + +#endif /* STM32L4 || STM32F4 || STM32F7 || STM32H7 */ /** * @} */ @@ -1380,6 +1495,13 @@ #endif #define HAL_ADC_EnableBuffer_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINT() : HAL_ADCEx_DisableVREFINT()) #define HAL_ADC_EnableBufferSensor_Cmd(cmd) (((cmd)==ENABLE) ? HAL_ADCEx_EnableVREFINTTempSensor() : HAL_ADCEx_DisableVREFINTTempSensor()) +#if defined(STM32H7A3xx) || defined(STM32H7B3xx) || defined(STM32H7B0xx) || defined(STM32H7A3xxQ) || defined(STM32H7B3xxQ) || defined(STM32H7B0xxQ) +#define HAL_EnableSRDomainDBGStopMode HAL_EnableDomain3DBGStopMode +#define HAL_DisableSRDomainDBGStopMode HAL_DisableDomain3DBGStopMode +#define HAL_EnableSRDomainDBGStandbyMode HAL_EnableDomain3DBGStandbyMode +#define HAL_DisableSRDomainDBGStandbyMode HAL_DisableDomain3DBGStandbyMode +#endif /* STM32H7A3xx || STM32H7B3xx || STM32H7B0xx || STM32H7A3xxQ || STM32H7B3xxQ || STM32H7B0xxQ */ + /** * @} */ @@ -1409,16 +1531,18 @@ #define HAL_I2CFastModePlusConfig(SYSCFG_I2CFastModePlus, cmd) (((cmd)==ENABLE)? HAL_I2CEx_EnableFastModePlus(SYSCFG_I2CFastModePlus): HAL_I2CEx_DisableFastModePlus(SYSCFG_I2CFastModePlus)) -#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32G4) +#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4) #define HAL_I2C_Master_Sequential_Transmit_IT HAL_I2C_Master_Seq_Transmit_IT #define HAL_I2C_Master_Sequential_Receive_IT HAL_I2C_Master_Seq_Receive_IT #define HAL_I2C_Slave_Sequential_Transmit_IT HAL_I2C_Slave_Seq_Transmit_IT #define HAL_I2C_Slave_Sequential_Receive_IT HAL_I2C_Slave_Seq_Receive_IT +#endif /* STM32H7 || STM32WB || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 */ +#if defined(STM32H7) || defined(STM32WB) || defined(STM32G0) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) || defined(STM32L5) || defined(STM32G4) #define HAL_I2C_Master_Sequential_Transmit_DMA HAL_I2C_Master_Seq_Transmit_DMA #define HAL_I2C_Master_Sequential_Receive_DMA HAL_I2C_Master_Seq_Receive_DMA #define HAL_I2C_Slave_Sequential_Transmit_DMA HAL_I2C_Slave_Seq_Transmit_DMA #define HAL_I2C_Slave_Sequential_Receive_DMA HAL_I2C_Slave_Seq_Receive_DMA -#endif /* STM32H7 || STM32WB || STM32G0 || STM32F4 || STM32F7 || STM32L0 || STM32L4 */ +#endif /* STM32H7 || STM32WB || STM32G0 || STM32F4 || STM32F7 || STM32L0 || STM32L4 || STM32L5 || STM32G4 */ #if defined(STM32F4) #define HAL_FMPI2C_Master_Sequential_Transmit_IT HAL_FMPI2C_Master_Seq_Transmit_IT @@ -1437,6 +1561,13 @@ /** @defgroup HAL_PWR_Aliased HAL PWR Aliased maintained for legacy purpose * @{ */ + +#if defined(STM32G0) +#define HAL_PWR_ConfigPVD HAL_PWREx_ConfigPVD +#define HAL_PWR_EnablePVD HAL_PWREx_EnablePVD +#define HAL_PWR_DisablePVD HAL_PWREx_DisablePVD +#define HAL_PWR_PVD_IRQHandler HAL_PWREx_PVD_IRQHandler +#endif #define HAL_PWR_PVDConfig HAL_PWR_ConfigPVD #define HAL_PWR_DisableBkUpReg HAL_PWREx_DisableBkUpReg #define HAL_PWR_DisableFlashPowerDown HAL_PWREx_DisableFlashPowerDown @@ -1509,14 +1640,14 @@ #define HAL_TIM_DMAError TIM_DMAError #define HAL_TIM_DMACaptureCplt TIM_DMACaptureCplt #define HAL_TIMEx_DMACommutationCplt TIMEx_DMACommutationCplt -#if defined(STM32H7) || defined(STM32G0) || defined(STM32F7) || defined(STM32F4) || defined(STM32L0) || defined(STM32L4) +#if defined(STM32H7) || defined(STM32G0) || defined(STM32F0) || defined(STM32F1) || defined(STM32F2) || defined(STM32F3) || defined(STM32F4) || defined(STM32F7) || defined(STM32L0) || defined(STM32L4) #define HAL_TIM_SlaveConfigSynchronization HAL_TIM_SlaveConfigSynchro #define HAL_TIM_SlaveConfigSynchronization_IT HAL_TIM_SlaveConfigSynchro_IT #define HAL_TIMEx_CommutationCallback HAL_TIMEx_CommutCallback #define HAL_TIMEx_ConfigCommutationEvent HAL_TIMEx_ConfigCommutEvent #define HAL_TIMEx_ConfigCommutationEvent_IT HAL_TIMEx_ConfigCommutEvent_IT #define HAL_TIMEx_ConfigCommutationEvent_DMA HAL_TIMEx_ConfigCommutEvent_DMA -#endif /* STM32H7 || STM32G0 || STM32F7 || STM32F4 || STM32L0 */ +#endif /* STM32H7 || STM32G0 || STM32F0 || STM32F1 || STM32F2 || STM32F3 || STM32F4 || STM32F7 || STM32L0 */ /** * @} */ @@ -3114,7 +3245,7 @@ #if defined(STM32L4) #define RCC_RTCCLKSOURCE_NO_CLK RCC_RTCCLKSOURCE_NONE -#elif defined(STM32WB) || defined(STM32G0) || defined(STM32G4) +#elif defined(STM32WB) || defined(STM32G0) || defined(STM32G4) || defined(STM32L5) #else #define RCC_RTCCLKSOURCE_NONE RCC_RTCCLKSOURCE_NO_CLK #endif @@ -3242,7 +3373,7 @@ /** @defgroup HAL_RTC_Aliased_Macros HAL RTC Aliased Macros maintained for legacy purpose * @{ */ -#if defined (STM32G0) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32G4) +#if defined (STM32G0) || defined (STM32L5) || defined (STM32L412xx) || defined (STM32L422xx) || defined (STM32L4P5xx) || defined (STM32L4Q5xx) || defined (STM32G4) #else #define __HAL_RTC_CLEAR_FLAG __HAL_RTC_EXTI_CLEAR_FLAG #endif @@ -3365,7 +3496,7 @@ #define HAL_SD_CardStateTypedef HAL_SD_CardStateTypeDef #endif -#if defined(STM32H7) +#if defined(STM32H7) || defined(STM32L5) #define HAL_MMCEx_Read_DMADoubleBuffer0CpltCallback HAL_MMCEx_Read_DMADoubleBuf0CpltCallback #define HAL_MMCEx_Read_DMADoubleBuffer1CpltCallback HAL_MMCEx_Read_DMADoubleBuf1CpltCallback #define HAL_MMCEx_Write_DMADoubleBuffer0CpltCallback HAL_MMCEx_Write_DMADoubleBuf0CpltCallback @@ -3606,12 +3737,12 @@ * @{ */ #if defined (STM32H7) || defined (STM32G4) || defined (STM32F3) -#define HAL_HRTIM_WaveformCounterStart_IT HAL_HRTIM_WaveformCountStart_IT -#define HAL_HRTIM_WaveformCounterStart_DMA HAL_HRTIM_WaveformCountStart_DMA -#define HAL_HRTIM_WaveformCounterStart HAL_HRTIM_WaveformCountStart -#define HAL_HRTIM_WaveformCounterStop_IT HAL_HRTIM_WaveformCountStop_IT -#define HAL_HRTIM_WaveformCounterStop_DMA HAL_HRTIM_WaveformCountStop_DMA -#define HAL_HRTIM_WaveformCounterStop HAL_HRTIM_WaveformCountStop +#define HAL_HRTIM_WaveformCounterStart_IT HAL_HRTIM_WaveformCountStart_IT +#define HAL_HRTIM_WaveformCounterStart_DMA HAL_HRTIM_WaveformCountStart_DMA +#define HAL_HRTIM_WaveformCounterStart HAL_HRTIM_WaveformCountStart +#define HAL_HRTIM_WaveformCounterStop_IT HAL_HRTIM_WaveformCountStop_IT +#define HAL_HRTIM_WaveformCounterStop_DMA HAL_HRTIM_WaveformCountStop_DMA +#define HAL_HRTIM_WaveformCounterStop HAL_HRTIM_WaveformCountStop #endif /** * @} @@ -3620,9 +3751,9 @@ /** @defgroup HAL_QSPI_Aliased_Macros HAL QSPI Aliased Macros maintained for legacy purpose * @{ */ -#if defined (STM32L4) +#if defined (STM32L4) || defined (STM32F4) || defined (STM32F7) #define HAL_QPSI_TIMEOUT_DEFAULT_VALUE HAL_QSPI_TIMEOUT_DEFAULT_VALUE -#endif +#endif /* STM32L4 || STM32F4 || STM32F7 */ /** * @} */
diff --git a/Inc/stm32_assert_template.h b/Inc/stm32_assert_template.h index 5dd07bc..fb61382 100644 --- a/Inc/stm32_assert_template.h +++ b/Inc/stm32_assert_template.h
@@ -40,9 +40,9 @@ * If expr is true, it returns no value. * @retval None */ - #define assert_param(expr) ((expr) ? (void)0U : assert_failed((char *)__FILE__, __LINE__)) + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) /* Exported functions ------------------------------------------------------- */ - void assert_failed(char* file, uint32_t line); + void assert_failed(uint8_t* file, uint32_t line); #else #define assert_param(expr) ((void)0U) #endif /* USE_FULL_ASSERT */
diff --git a/Inc/stm32f2xx_hal_conf_template.h b/Inc/stm32f2xx_hal_conf_template.h index 2b01413..c26dc66 100644 --- a/Inc/stm32f2xx_hal_conf_template.h +++ b/Inc/stm32f2xx_hal_conf_template.h
@@ -404,9 +404,9 @@ * If expr is true, it returns no value. * @retval None */ - #define assert_param(expr) ((expr) ? (void)0U : assert_failed((char *)__FILE__, __LINE__)) + #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__)) /* Exported functions ------------------------------------------------------- */ - void assert_failed(char* file, uint32_t line); + void assert_failed(uint8_t* file, uint32_t line); #else #define assert_param(expr) ((void)0U) #endif /* USE_FULL_ASSERT */
diff --git a/Inc/stm32f2xx_hal_i2c.h b/Inc/stm32f2xx_hal_i2c.h index 4aeed36..e1f83fb 100644 --- a/Inc/stm32f2xx_hal_i2c.h +++ b/Inc/stm32f2xx_hal_i2c.h
@@ -170,6 +170,7 @@ #define HAL_I2C_ERROR_TIMEOUT 0x00000020U /*!< Timeout Error */ #define HAL_I2C_ERROR_SIZE 0x00000040U /*!< Size Management error */ #define HAL_I2C_ERROR_DMA_PARAM 0x00000080U /*!< DMA Parameter Error */ +#define HAL_I2C_WRONG_START 0x00000200U /*!< Wrong start Error */ #if (USE_HAL_I2C_REGISTER_CALLBACKS == 1) #define HAL_I2C_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid Callback error */ #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */
diff --git a/Inc/stm32f2xx_hal_irda.h b/Inc/stm32f2xx_hal_irda.h index 0737aad..4529d24 100644 --- a/Inc/stm32f2xx_hal_irda.h +++ b/Inc/stm32f2xx_hal_irda.h
@@ -646,7 +646,7 @@ #define IRDA_DIVMANT(_PCLK_, _BAUD_) (IRDA_DIV((_PCLK_), (_BAUD_))/100U) -#define IRDA_DIVFRAQ(_PCLK_, _BAUD_) (((IRDA_DIV((_PCLK_), (_BAUD_)) - (IRDA_DIVMANT((_PCLK_), (_BAUD_)) * 100U)) * 16U + 50U) / 100U) +#define IRDA_DIVFRAQ(_PCLK_, _BAUD_) ((((IRDA_DIV((_PCLK_), (_BAUD_)) - (IRDA_DIVMANT((_PCLK_), (_BAUD_)) * 100U)) * 16U) + 50U) / 100U) /* UART BRR = mantissa + overflow + fraction = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */
diff --git a/Inc/stm32f2xx_hal_smartcard.h b/Inc/stm32f2xx_hal_smartcard.h index f2cdfb8..25cd0ab 100644 --- a/Inc/stm32f2xx_hal_smartcard.h +++ b/Inc/stm32f2xx_hal_smartcard.h
@@ -720,7 +720,7 @@ #define SMARTCARD_DIV(__PCLK__, __BAUD__) (((__PCLK__)*25U)/(4U*(__BAUD__))) #define SMARTCARD_DIVMANT(__PCLK__, __BAUD__) (SMARTCARD_DIV((__PCLK__), (__BAUD__))/100U) -#define SMARTCARD_DIVFRAQ(__PCLK__, __BAUD__) (((SMARTCARD_DIV((__PCLK__), (__BAUD__)) - (SMARTCARD_DIVMANT((__PCLK__), (__BAUD__)) * 100U)) * 16U + 50U) / 100U) +#define SMARTCARD_DIVFRAQ(__PCLK__, __BAUD__) ((((SMARTCARD_DIV((__PCLK__), (__BAUD__)) - (SMARTCARD_DIVMANT((__PCLK__), (__BAUD__)) * 100U)) * 16U) + 50U) / 100U) /* SMARTCARD BRR = mantissa + overflow + fraction = (SMARTCARD DIVMANT << 4) + (SMARTCARD DIVFRAQ & 0xF0) + (SMARTCARD DIVFRAQ & 0x0FU) */ #define SMARTCARD_BRR(__PCLK__, __BAUD__) (((SMARTCARD_DIVMANT((__PCLK__), (__BAUD__)) << 4U) + \
diff --git a/Inc/stm32f2xx_hal_uart.h b/Inc/stm32f2xx_hal_uart.h index 6b723a7..306dacc 100644 --- a/Inc/stm32f2xx_hal_uart.h +++ b/Inc/stm32f2xx_hal_uart.h
@@ -535,7 +535,7 @@ (((__INTERRUPT__) >> 28U) == UART_CR2_REG_INDEX)? ((__HANDLE__)->Instance->CR2 &= ~((__INTERRUPT__) & UART_IT_MASK)): \ ((__HANDLE__)->Instance->CR3 &= ~ ((__INTERRUPT__) & UART_IT_MASK))) -/** @brief Checks whether the specified UART interrupt has occurred or not. +/** @brief Checks whether the specified UART interrupt source is enabled or not. * @param __HANDLE__ specifies the UART Handle. * UART Handle selects the USARTx or UARTy peripheral * (USART,UART availability and x,y values depending on device). @@ -800,7 +800,7 @@ #define UART_DIV_SAMPLING16(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(4U*(_BAUD_))) #define UART_DIVMANT_SAMPLING16(_PCLK_, _BAUD_) (UART_DIV_SAMPLING16((_PCLK_), (_BAUD_))/100U) -#define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U + 50U) / 100U) +#define UART_DIVFRAQ_SAMPLING16(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING16((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) * 100U)) * 16U) + 50U) / 100U) /* UART BRR = mantissa + overflow + fraction = (UART DIVMANT << 4) + (UART DIVFRAQ & 0xF0) + (UART DIVFRAQ & 0x0FU) */ #define UART_BRR_SAMPLING16(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING16((_PCLK_), (_BAUD_)) << 4U) + \ @@ -809,7 +809,7 @@ #define UART_DIV_SAMPLING8(_PCLK_, _BAUD_) (((_PCLK_)*25U)/(2U*(_BAUD_))) #define UART_DIVMANT_SAMPLING8(_PCLK_, _BAUD_) (UART_DIV_SAMPLING8((_PCLK_), (_BAUD_))/100U) -#define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U + 50U) / 100U) +#define UART_DIVFRAQ_SAMPLING8(_PCLK_, _BAUD_) ((((UART_DIV_SAMPLING8((_PCLK_), (_BAUD_)) - (UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) * 100U)) * 8U) + 50U) / 100U) /* UART BRR = mantissa + overflow + fraction = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */ #define UART_BRR_SAMPLING8(_PCLK_, _BAUD_) (((UART_DIVMANT_SAMPLING8((_PCLK_), (_BAUD_)) << 4U) + \
diff --git a/Inc/stm32f2xx_hal_usart.h b/Inc/stm32f2xx_hal_usart.h index a2d21ee..2d046e4 100644 --- a/Inc/stm32f2xx_hal_usart.h +++ b/Inc/stm32f2xx_hal_usart.h
@@ -607,7 +607,7 @@ #define USART_DIVMANT(_PCLK_, _BAUD_) (USART_DIV((_PCLK_), (_BAUD_))/100U) -#define USART_DIVFRAQ(_PCLK_, _BAUD_) (((USART_DIV((_PCLK_), (_BAUD_)) - (USART_DIVMANT((_PCLK_), (_BAUD_)) * 100U)) * 8U + 50U) / 100U) +#define USART_DIVFRAQ(_PCLK_, _BAUD_) ((((USART_DIV((_PCLK_), (_BAUD_)) - (USART_DIVMANT((_PCLK_), (_BAUD_)) * 100U)) * 8U) + 50U) / 100U) /* UART BRR = mantissa + overflow + fraction = (UART DIVMANT << 4) + ((UART DIVFRAQ & 0xF8) << 1) + (UART DIVFRAQ & 0x07U) */
diff --git a/Inc/stm32f2xx_ll_usart.h b/Inc/stm32f2xx_ll_usart.h index 8dbf5ee..864d8a3 100644 --- a/Inc/stm32f2xx_ll_usart.h +++ b/Inc/stm32f2xx_ll_usart.h
@@ -375,7 +375,7 @@ */ #define __LL_USART_DIV_SAMPLING16_100(__PERIPHCLK__, __BAUDRATE__) (((__PERIPHCLK__)*25)/(4*(__BAUDRATE__))) #define __LL_USART_DIVMANT_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__))/100) -#define __LL_USART_DIVFRAQ_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 16 + 50) / 100) +#define __LL_USART_DIVFRAQ_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) ((((__LL_USART_DIV_SAMPLING16_100((__PERIPHCLK__), (__BAUDRATE__)) - (__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) * 100)) * 16) + 50) / 100) /* USART BRR = mantissa + overflow + fraction = (USART DIVMANT << 4) + (USART DIVFRAQ & 0xF0) + (USART DIVFRAQ & 0x0F) */ #define __LL_USART_DIV_SAMPLING16(__PERIPHCLK__, __BAUDRATE__) (((__LL_USART_DIVMANT_SAMPLING16((__PERIPHCLK__), (__BAUDRATE__)) << 4) + \
diff --git a/License.md b/License.md index 62f908f..84a7fc4 100644 --- a/License.md +++ b/License.md
@@ -1,3 +1,3 @@ # Copyright (c) 2016 STMicroelectronics -This software component is licensed by STMicroelectronics under the **BSD 3-Clause** license. You may not use this file except in compliance with this license. You may obtain a copy of the license [here](https://opensource.org/licenses/BSD-3-Clause). +This software component is licensed by STMicroelectronics under the **BSD-3-Clause** license. You may not use this file except in compliance with this license. You may obtain a copy of the license [here](https://opensource.org/licenses/BSD-3-Clause).
diff --git a/README.md b/README.md index b490c08..8394085 100644 --- a/README.md +++ b/README.md
@@ -5,11 +5,11 @@ **STM32Cube** is an STMicroelectronics original initiative to ease the developers life by reducing efforts, time and cost. **STM32Cube** covers the overall STM32 products portfolio. It includes a comprehensive embedded software platform, delivered for each STM32 series. - * The CMSIS modules (core and device) corresponding to the ARM(tm) core implemented in this STM32 product - * The STM32 HAL-LL drivers : an abstraction drivers layer, the API ensuring maximized portability across the STM32 portfolio - * The BSP Drivers of each evaluation or demonstration board provided by this STM32 series - * A consistent set of middlewares components such as RTOS, USB, FatFS, Graphics, STM32_TouchSensing_Library ... - * A full set of software projects (basic examples, applications or demonstrations) for each board provided by this STM32 series + * The CMSIS modules (core and device) corresponding to the ARM(tm) core implemented in this STM32 product. + * The STM32 HAL-LL drivers : an abstraction drivers layer, the API ensuring maximized portability across the STM32 portfolio. + * The BSP Drivers of each evaluation or demonstration board provided by this STM32 series. + * A consistent set of middlewares components such as RTOS, USB, FatFS, Graphics, STM32_TouchSensing_Library... + * A full set of software projects (basic examples, applications or demonstrations) for each board provided by this STM32 series. Two models of publication are proposed for the STM32Cube embedded software: * The monolithic **MCU Package** : all STM32Cube software modules of one STM32 series are present (Drivers, Middlewares, Projects, Utilities) in the repo (usual name **STM32Cubexx**, xx corresponding to the STM32 series) @@ -23,9 +23,13 @@ Copyright (c) 2016 STMicroelectronics. -This software component is licensed by STMicroelectronics under BSD 3-Clause license. You may not use this file except in compliance with the License. +This software component is licensed by STMicroelectronics under BSD-3-Clause license. You may not use this file except in compliance with the License. You may obtain a copy of the License [here](https://opensource.org/licenses/BSD-3-Clause). +## Release note + +Details about the content of this release are available in the release note [here](https://htmlpreview.github.io/?https://github.com/STMicroelectronics/stm32f2xx_hal_driver/blob/master/Release_Notes.html). + ## Compatibility information In this table, you can find the successive versions of this HAL-LL Driver component, in line with the corresponding versions of the full MCU package: @@ -34,12 +38,13 @@ HAL Driver F2 | CMSIS Device F2 | CMSIS Core | Was delivered in the full MCU package ------------- | --------------- | ---------- | ------------------------------------- -Tag v1.2.3 | Tag v2.2.2 | Tag v5.4.0_cm3 | Tag v1.8.0 (and following, if any, till next new tag) +Tag v1.2.3 | Tag v2.2.2 | Tag v5.4.0_cm3 | Tag v1.8.0 (and following, if any, till next tag) +Tag v1.2.4 | Tag v2.2.3 | Tag v5.4.0_cm3 | Tag v1.9.0 (and following, if any, till next tag) The full **STM32CubeF2** MCU package is available [here](https://github.com/STMicroelectronics/STM32CubeF2). ## Troubleshooting -If you have any issue with the **Software content** of this repo, you can [file an issue on Github](https://github.com/STMicroelectronics/stm32f2xx_hal_driver/issues/new). +If you have any issue with the **Software content** of this repository, you can file an issue into the firmware repository [STM32CubeF2](https://github.com/STMicroelectronics/STM32CubeF2/issues/new/choose). For any other question related to the product, the tools, the environment, you can submit a topic on the [ST Community/STM32 MCUs forum](https://community.st.com/s/group/0F90X000000AXsASAW/stm32-mcus).
diff --git a/Release_Notes.html b/Release_Notes.html index f2fe263..eec31af 100644 --- a/Release_Notes.html +++ b/Release_Notes.html
@@ -38,15 +38,82 @@ <div class="col-sm-12 col-lg-8"> <h1 id="update-history"><strong>Update History</strong></h1> <div class="collapse"> -<input type="checkbox" id="collapse-section10" aria-hidden="true"> <label for="collapse-section10" aria-hidden="true"><strong>V1.2.3 / 26-June-2019</strong></label> +<input type="checkbox" id="collapse-section10" aria-hidden="true"> <label for="collapse-section10" aria-hidden="true"><strong>V1.2.4 / 31-December-2019</strong></label> <div> <h2 id="main-changes">Main Changes</h2> <ul> <li>General updates to fix known defects and enhancements implementation</li> -<li>Add support of HAL callback registration feature</li> -<li>Add new <strong>HAL EXTI</strong> driver</li> +<li><strong>HAL/LL GPIO</strong> update +<ul> +<li>Update GPIO initialization sequence to avoid unwanted pulse on GPIO Pin’s</li> +</ul></li> +<li><strong>HAL I2C</strong> update +<ul> +<li>Update HAL_I2C_EV_IRQHandler() API to fix I2C send break issue +<ul> +<li>Add additional check on hi2c->hdmatx, hdmatx->XferCpltCallback, hi2c->hdmarx, hdmarx->XferCpltCallback in I2C_Master_SB() API to avoid enabling DMA request when IT mode is used.</li> +</ul></li> +<li>Update HAL_I2C_ER_IRQHandler() API to fix acknowledge failure issue with I2C memory IT processes +<ul> +<li>Add stop condition generation when NACK occurs.</li> +</ul></li> +<li>Update HAL_I2C_Init() API to force software reset before setting new I2C configuration.</li> +<li>Update HAL I2C processes to report ErrorCode when wrong I2C start condition occurs +<ul> +<li>Add new ErrorCode define: HAL_I2C_WRONG_START</li> +<li>Set ErrorCode parameter in I2C handle to HAL_I2C_WRONG_START</li> +</ul></li> +<li>Update I2C_DMAXferCplt(), I2C_DMAError() and I2C_DMAAbort() APIs to fix hardfault issue when hdmatx and hdmarx parameters in i2c handle aren’t initialized (NULL pointer). +<ul> +<li>Add additional check on hi2c->hdmtx and hi2c->hdmarx before resetting DMA Tx/Rx complete callbacks.</li> +</ul></li> +</ul></li> +<li><strong>HAL IRDA</strong> update +<ul> +<li>Update IRDA interruption handler to manage correctly the overrun interrupt +<ul> +<li>Add in the HAL_IRDA_IRQHandler() API a check on USART_CR1_RXNEIE bit when an overrun interrupt occurs.</li> +</ul></li> +</ul></li> +<li><strong>HAL SMARTCARD</strong> update +<ul> +<li>Update SMARTCARD interruption handler to manage correctly the overrun interrupt. +<ul> +<li>Add in the HAL_SMARTCARD_IRQHandler() API a check on USART_CR1_RXNEIE bit when an overrun interrupt occurs.</li> +</ul></li> +</ul></li> +<li><strong>HAL UART</strong> update +<ul> +<li>Update UART polling processes to handle efficiently the Lock mechanism +<ul> +<li>Move the process unlock at the top of the HAL_UART_Receive() and HAL_UART_Transmit() API.</li> +</ul></li> +<li>Update UART interruption handler to manage correctly the overrun interrupt +<ul> +<li>Add in the HAL_UART_IRQHandler() API a check on USART_CR1_RXNEIE bit when an overrun interrupt occurs.</li> +</ul></li> +</ul></li> +<li><strong>HAL USART</strong> update +<ul> +<li>Update USART interruption handler to manage correctly the overrun interrupt +<ul> +<li>Add in the HAL_USART_IRQHandler() API a check on USART_CR1_RXNEIE bit when an overrun interrupt occurs.</li> +</ul></li> +</ul></li> +</ul> +</div> +</div> +<div class="collapse"> +<input type="checkbox" id="collapse-section10" aria-hidden="true"> <label for="collapse-section10" aria-hidden="true"><strong>V1.2.3 / 26-June-2019</strong></label> +<div> +<h2 id="main-changes-1">Main Changes</h2> +<ul> +<li>General updates to fix known defects and enhancements implementation</li> +<li>HAL drivers clean up: remove double casting ‘uint32_t’ and ‘U’</li> <li>General updates to fix CodeSonar compilation warnings</li> <li>General updates to fix the user manual .chm files</li> +<li>Add support of HAL callback registration feature</li> +<li>Add new <strong>HAL EXTI</strong> driver</li> <li><strong>The following changes done on the HAL drivers require an update on the application code based on older HAL versions</strong> <ul> <li><strong>HAL/LL Generic</strong> update @@ -96,7 +163,7 @@ <li>HAL_IS_BIT_SET()/HAL_IS_BIT_CLR() macros implementation update</li> <li>“stdio.h” include updated with “stddef.h”</li> </ul></li> -<li>Add HAL_GetUIDw0(), HAL_GetUIDw1() and HAL_GetUIDw2() API in order to return the unique device identifier</li> +<li>Add HAL_GetUIDw0(), HAL_GetUIDw1() and HAL_GetUIDw2() API in order to returns the unique device identifier</li> </ul></li> <li><strong>HAL CAN</strong> update <ul> @@ -104,25 +171,47 @@ <ul> <li>SJW to SyncJumpWidth, BS1 to TimeSeg1, BS2 to TimeSeg2, TTCM to TimeTriggeredMode, ABOM to AutoBusOff, AWUM to AutoWakeUp, NART to AutoRetransmission (inversed), RFLM to ReceiveFifoLocked and TXFP to TransmitFifoPriority</li> </ul></li> +<li>Rename CAN_FilterConfTypeDef structure to CAN_FilterTypeDef and update some fields: +<ul> +<li>FilterNumber to FilterBank</li> +<li>BankNumber to SlaveStartFilterBank</li> +</ul></li> +<li>Rename CanTxMsgTypeDef structure to CAN_TxHeaderTypeDef and update some fields: +<ul> +<li>Data to TransmitGlobalTime</li> +</ul></li> +<li>Rename CanRxMsgTypeDef structure to CAN_RxHeaderTypeDef and update some fields: +<ul> +<li>Data to Timestamp</li> +<li>FMI to FilterMatchIndex</li> +</ul></li> <li>Update possible values list for FilterActivation parameter in CAN_FilterTypeDef structure <ul> <li>CAN_FILTER_ENABLE instead of ENABLE</li> <li>CAN_FILTER_DISABLE instead of DISABLE</li> </ul></li> -<li>HAL_CAN_Init() is split into HAL_CAN_Init() and HAL_CAN_Start() APIs</li> +<li>HAL_CAN_Init() is split into both HAL_CAN_Init() and HAL_CAN_Start() API’s</li> <li>HAL_CAN_Transmit() is replaced by HAL_CAN_AddTxMessage() to place Tx Request, then HAL_CAN_GetTxMailboxesFreeLevel() for polling until completion.</li> -<li>HAL_CAN_Transmit_IT() is replaced by HAL_CAN_ActivateNotification() to enable transmit IT, then HAL_CAN_AddTxMessage() to place Tx request.</li> -<li>HAL_CAN_Receive() is replaced by HAL_CAN_GetRxFifoFillLevel() for polling until reception, then HAL_CAN_GetRxMessage() to get Rx message.</li> -<li>HAL_CAN_Receive_IT() is replaced by HAL_CAN_ActivateNotification() to enable receive IT, then HAL_CAN_GetRxMessage() in the receive callback to get Rx message</li> +<li>HAL_CAN_Transmit_IT() is replaced by HAL_CAN_ActivateNotification() to enable transmit IT, then HAL_CAN_AddTxMessage() for place Tx request.</li> +<li>HAL_CAN_Receive() is replaced by HAL_CAN_GetRxFifoFillLevel() for polling until reception, then HAL_CAN_GetRxMessage()</li> +<li>to get Rx message.</li> +<li>HAL_CAN_Receive_IT() is replaced by HAL_CAN_ActivateNotification() to enable receive IT, then HAL_CAN_GetRxMessage()</li> +<li>in the receive callback to get Rx message</li> <li>HAL_CAN_Slepp() is renamed as HAL_CAN_RequestSleep()</li> <li>HAL_CAN_TxCpltCallback() is split into HAL_CAN_TxMailbox0CompleteCallback(), HAL_CAN_TxMailbox1CompleteCallback() and HAL_CAN_TxMailbox2CompleteCallback().</li> <li>HAL_CAN_RxCpltCallback is split into HAL_CAN_RxFifo0MsgPendingCallback() and HAL_CAN_RxFifo1MsgPendingCallback().</li> <li>More complete “How to use the new driver” is detailed in the driver header section itself.</li> +<li><em>Refer to the following example to identify the changes</em></li> </ul></li> <li><strong>HAL CRC</strong> update <ul> -<li>Update HAL_CRC_DeInit() API to be more safe</li> -<li>Remove lock mechanism on the followings API’s: +<li>Update __HAL_CRC_DR_RESET() macro</li> +<li>Update HAL_CRC_DeInit() API to +<ul> +<li>Be able to return HAL status when CRC is is already busy</li> +<li>DeInit the low level hardware after reset IDR register content</li> +</ul></li> +<li>Remove extra call to HAL_LOCK/HAL_UNLOCK from the followings API’s: <ul> <li>HAL_CRC_Accumulate()</li> <li>HAL_CRC_Calculate()</li> @@ -130,7 +219,8 @@ </ul></li> <li><strong>HAL CRYP</strong> update <ul> -<li><strong>The CRYP_InitTypeDef</strong> is no more supported, changed by <strong>CRYP_ConfigTypedef</strong> to allow parameters change using HAL_CRYP_setConfig() API without reinitializing the CRYP IP using the HAL_CRYP_Init() API</li> +<li><strong>The CRYP_InitTypeDef</strong> is no more supported, changed by <strong>CRYP_ConfigTypedef</strong> to allow changing parameters</li> +<li>Using HAL_CRYP_setConfig() API without reinitialize the CRYP IP using the HAL_CRYP_Init() API</li> <li>New parameters added in the <strong>CRYP_ConfigTypeDef</strong> structure: <strong>B0</strong> and <strong>DataWidthUnit</strong></li> <li>Input data size and error code parameters are added in the <strong>CRYP_HandleTypeDef</strong> structure</li> <li>Add new APIs to manage the CRYP configuration: @@ -147,32 +237,49 @@ <li>HAL_CRYP_Encypt_DMA()</li> <li>HAL_CRYP_Decypt_DMA()</li> </ul></li> +<li>More complete “How to use the new driver” is detailed in the driver header section itself.</li> +<li><em>Refer to the following example to identify the changes</em></li> </ul></li> <li><strong>HAL DAC</strong> update <ul> -<li>General updates for more efficiency implementation</li> -<li>Update HAL_DAC_IRQHandler() to manage DAC Under-run error only once DAC DMAUDR interrupt is enabled</li> +<li>Overall rework of the driver for a more efficient implementation +<ul> +<li>Update HAL_DAC_Start(), HAL_DAC_Start_DMA(), HAL_DAC_Stop_DMA() and HAL_DAC_ConfigChannel() API to +<ul> +<li>Update lock mechanism for DAC process</li> +<li>Optimize code by using direct register read</li> +</ul></li> +<li>Update HAL_DAC_IRQHandler() function to +<ul> +<li>Add error management in case DMA errors through HAL_DAC_DMAUnderrunCallbackCh1() and HAL_DACEx_DMAUnderrunCallbackCh2()</li> +<li>Optimize code by using direct register read</li> +</ul></li> +</ul></li> </ul></li> <li><strong>HAL DCMI</strong> update <ul> +<li>Update HAL_DCMI_Start_DMA() function to Enable the DCMI peripheral</li> <li>Add new timeout implementation based on cpu cycles for DCMI stop</li> -<li>Update HAL_DCMI_IRQHandler() API to clear the End of Frame flag in case of Frame error</li> -<li>The extension files stm32f2xx_hal_dcmi_ex.c/.h is added and kept empty for compatibility reason with other STM32 series</li> +<li>Update lock mechanism for DCMI process</li> +<li>Update HAL_DCMI_IRQHandler() function to: +<ul> +<li>Optimize code by using direct register read</li> +</ul></li> +<li>The extension files stm32f2xx_hal_dcmi_ex.c/.h is added and kept empty for projects compatibility reason</li> <li>Add DCMI_SyncUnmaskTypeDef structure and HAL_DCMI_ConfigSyncUnmask() API to manage embedded synchronization delimiters unmasks</li> <li>HAL DCMI driver clean-up: remove non referenced callback APIs: HAL_DCMI_VsyncCallback() and HAL_DCMI_HsyncCallback()</li> </ul></li> <li><strong>HAL DMA</strong> update <ul> -<li>HAL_DMA_DeInit() API: Add clean of DMA handler callbacks</li> -<li>HAL_DMA_Start_IT API: Remove FIFO error management +<li>Add clean of callbacks in HAL_DMA_DeInit() API</li> +<li>Remove FIFO error enabling in “HAL_DMA_Start_IT” <ul> -<li>when FIFO error monitoring is requested in IT mode, the macro __HAL_DMA_ENABLE_IT can be used to enable the FIFO error IT in user application</li> +<li>when FIFO error monitoring is requested in IT model, the macro __HAL_DMA_ENABLE_IT can be used to enable the FIFO error IT at the user Msp functio</li> </ul></li> </ul></li> <li><strong>HAL FLASH</strong> update <ul> -<li>HAL_FLASH_Unlock() update to return state error when flash is still locked.</li> -<li>FLASH_Program_DoubleWord() updated to fix Program DoubleWord fails (PGAERR) when using STRD assembly instruction.</li> +<li>HAL_FLASH_Unlock() update to return state error when the FLASH is already unlocked</li> </ul></li> <li><strong>HAL GPIO</strong> update <ul> @@ -183,6 +290,7 @@ <ul> <li>Overall rework of the driver for a more efficient implementation <ul> +<li>HASH API changes for MISRA-C 2012 compliance</li> <li>Update HASH_Start_DMA() to add check on HASH_CR_MDMAT bit before checking input buffer length in case of multi-buffer processing</li> <li>Fill-up empty statement in HAL_HASH_DMAFeed_ProcessSuspend() to correct CodeSonar warning</li> </ul></li> @@ -210,62 +318,17 @@ </ul></li> <li>Fix I2C send break issue in IT processes <ul> -<li>Add additional check on hi2c->hdmatx and hi2c->hdmarx to avoid the DMA request enable when ITmode is used.</li> +<li>Add additional check on hi2c->hdmatxand hi2c->hdmarx to avoid the DMA request enable when ITmode is used.</li> </ul></li> </ul></li> -<li><strong>HAL IRDA</strong> driver +<li><strong>HAL UART/USART/IrDA/SMARTCARD</strong> update <ul> -<li>Align HAL IRDA driver with latest updates and enhancements</li> -<li>Add callback registration feature +<li>Overall rework of the driver for a more efficient implementation <ul> -<li>Add HAL_IRDA_RegisterCallback() and HAL_IRDA_UnRegisterCallback() APIs</li> -<li>Add callback identifiers in HAL_IRDA_CallbackIDTypeDef enumerated typedef</li> +<li>Improve I/O operation functions: separate transfer process and <em>PPP</em> state management</li> +<li>Update the HAL_<em>PPP</em>_IRQHandler function by optimizing the management of interrupt errors</li> +<li>Align driver with the Reference Manual regarding registers and bit definition naming</li> </ul></li> -<li>Review IRDA state machine to avoid cases where IRDA state is overwritten by IRDA IRQ</li> -<li>Implement new APIs for HAL IRDA Abort management: -<ul> -<li>HAL_IRDA_Abort(), HAL_IRDA_AbortTransmit(), HAL_IRDA_AbortReceive(), HAL_IRDA_Abort_IT(), HAL_IRDA_AbortTransmit_IT(), HAL_IRDA_AbortReceive_IT()</li> -</ul></li> -<li>Optimize WaitOnFlag management in IRDA_Transmit() function</li> -<li>Optimize all HAL IRQ Handler routines</li> -<li>Optimize HAL IRDA to avoid using macros as argument of function calls</li> -</ul></li> -<li><strong>HAL SMARTCARD</strong> driver -<ul> -<li>Align HAL SMARTCARD driver with latest updates and enhancements</li> -<li>Add callback registration feature -<ul> -<li>Add HAL_SMARTCARD_RegisterCallback() and HAL_SMARTCARD_UnRegisterCallback() APIs</li> -<li>Add callback identifiers in HAL_SMARTCARD_CallbackIDTypeDef enumerated typedef</li> -</ul></li> -<li>Review SMARTCARD state machine to avoid cases where SMARTCARD state is overwritten by SMARTCARD IRQ</li> -<li>Implement new APIs for HAL SMARTCARD Abort management: -<ul> -<li>HAL_SMARTCARD_Abort(), HAL_SMARTCARD_AbortTransmit(), HAL_SMARTCARD_AbortReceive(), HAL_SMARTCARD_Abort_IT(), HAL_SMARTCARD_AbortTransmit_IT(), HAL_SMARTCARD_AbortReceive_IT()</li> -</ul></li> -<li>Optimize WaitOnFlag management in SMARTCARD_Transmit() function</li> -<li>Optimize all HAL IRQ Handler routines</li> -<li>Optimize HAL SMARTCARD to avoid using macros as argument of function calls</li> -</ul></li> -<li><strong>HAL UART/USART</strong> driver -<ul> -<li>Align HAL UART/USART driver with latest updates and enhancements</li> -<li>Add callback registration feature -<ul> -<li>Add HAL_UART/USART_RegisterCallback() and HAL_UART/USART_UnRegisterCallback() APIs</li> -<li>Add callback identifiers in HAL_UART/USART_CallbackIDTypeDef enumerated typedef</li> -</ul></li> -<li>Add missing __IO in UART/USART_HandleTypeDef definition (for TxXferCount and RxXferCount)</li> -<li>Review UART/USART state machine to avoid cases where UART/USART state is overwritten by UART/USART IRQ</li> -<li>Implement new APIs for HAL UART/USART Abort management: -<ul> -<li>HAL_UART/USART_Abort(), HAL_UART/USART_AbortTransmit(), HAL_UART/USART_AbortReceive(), HAL_UART/USART_Abort_IT(), HAL_UART/USART_AbortTransmit_IT(), HAL_UART/USART_AbortReceive_IT()</li> -</ul></li> -<li>Optimize WaitOnFlag management in UART/USART_Transmit() function</li> -<li>Optimize all HAL IRQ Handler routines</li> -<li>Align __HAL_UART_GET_IT and __HAL_UART_GET_IT_SOURCE with other series</li> -<li>Optimize HAL UART/USART to avoid using macros as argument of function calls</li> -<li>Update USART BRR calculation</li> </ul></li> <li><strong>LL IWDG</strong> update <ul> @@ -273,12 +336,9 @@ </ul></li> <li><strong>HAL RNG</strong> update <ul> -<li>Update to manage RNG error: -<ul> <li>Add ErrorCode parameter in HAL RNG Handler structure</li> <li>Add HAL_RNG_GetError() API</li> -</ul></li> -<li>Remove lock mechanism from HAL_RNG_GenerateRandomNumber_IT() API</li> +<li>HAL Lock/Unlock mecanism update</li> </ul></li> <li><strong>HAL/LL RTC</strong> update <ul> @@ -293,39 +353,37 @@ <li>Update HAL_RCC_DeInit() and LL_RCC_DeInit() APIs to <ul> <li>Be able to return HAL/LL status</li> -<li>Add checks on HSI, PLL and PLLI2S ready flags before modifying RCC CFGR registers</li> -<li>Clear all RCC interrupt flags</li> +<li>Add checks for HSI, PLL and PLLI2S ready before modifying RCC CFGR registers</li> +<li>Clear all interrupt flags</li> <li>Initialize systick interrupt period</li> </ul></li> </ul></li> <li><strong>HAL SDMMC</strong> update <ul> -<li>Align HAL SDMMC driver with latest updates and enhancements</li> -<li>Due to limitation SDIO hardware flow control indicated in Errata Sheet : -<ul> -<li>In 4-bits bus wide mode, do not use the HAL_SD_WriteBlocks_IT() or HAL_SD_WriteBlocks() APIs otherwise underrun will occur and there is not possibility to activate the flow control</li> -<li>Use DMA mode when using 4-bits bus wide mode or decrease the frequency</li> -</ul></li> -<li>Add callback registration feature -<ul> -<li>Add HAL_SD_RegisterCallback(),HAL_SD_UnRegisterCallback(), HAL_SD_RegisterTransceiverCallback() and HAL_SD_UnRegisterTransceiverCallback APIs</li> -<li>Add callback identifiers in HAL_SD_CallbackIDTypeDef enumerated typedef</li> -</ul></li> +<li>Add API HAL_SD_ConfigSpeedBusOperation() to configure the SD card speed bus mode</li> +<li>Fix and improve state and error management</li> +<li>Fix preprocessing compilation issue with SDIO STA STBITERR interrupt</li> +<li>Align driver with the Reference Manual regarding registers and bit definition naming</li> </ul></li> <li><strong>HAL SPI</strong> update <ul> -<li>Align HAL/LL SPI driver with latest updates and enhancements</li> -<li>Fix issue in HAL_SPI_Transmit() and HAL_SPI_TransmitReceive() functions</li> -<li>Add SPI Abort transfer API’s: +<li>Overall rework of the driver for a more efficient implementation <ul> -<li>HAL_SPI_Abort()</li> -<li>HAL_SPI_Abort_IT()</li> +<li>Add the following new macros: +<ul> +<li>SPI_CHECK_FLAG()</li> +<li>SPI_CHECK_IT_SOURCE()</li> </ul></li> -<li>Update HAL/LL SPI driver to manage TI mode not supported by all STM32F2xx devices</li> -<li>Add callback registration feature +<li>Update HAL_SPI_StateTypeDef structure to add new state: HAL_SPI_STATE_ABORT</li> +<li>Add HAL_SPI_Abort() to manage abort issue in SPI TX or Rx mode only</li> +<li>Update HAL_SPI_Transmit()/HAL_SPI_Receive() API’s to fix memory overflow issue.</li> +<li>Update HAL_SPI_Transmit_DMA : checking hmdtx instead of hdmrx.</li> +<li>Update HAL_SPI_IRQHandler() function to <ul> -<li>Add HAL_SPI_RegisterCallback() and HAL_SPI_UnRegisterCallback() APIs</li> -<li>Add callback identifiers in HAL_SPI_CallbackIDTypeDef enumerated typedef</li> +<li>Add error management in case DMA errors through HAL_DMA_Abort_IT() and ErrorCallback()</li> +<li>Optimize code by using direct register read</li> +</ul></li> +<li>Align driver with the Reference Manual regarding registers and bit definition naming</li> </ul></li> </ul></li> <li><strong>HAL I2S</strong> update @@ -357,7 +415,7 @@ </ul></li> <li><strong>HAL/LL TIM</strong> update <ul> -<li>Move the following TIM structures from stm32f2xx_hal_tim_ex.h into stm32f2xx_hal_tim.h +<li>Move the following TIM structures from stm32f4xx_hal_tim_ex.h into stm32f4xx_hal_tim.h <ul> <li>TIM_MasterConfigTypeDef()</li> <li>TIM_BreakDeadTimeConfigTypeDef()</li> @@ -384,11 +442,11 @@ <li><strong>HAL/LL USB</strong> update <ul> <li>Rework USB interrupt handler and improve HS DMA support in Device mode</li> -<li>Fix BCD handling of OTG instance in device mode</li> +<li>Fix BCD handling for OTG instance in device mode</li> <li>cleanup reference to low speed in device mode</li> -<li>Allow writing TX FIFO when transfer length is equal to available space in the TX FIFO</li> +<li>Allow writing TX FIFO in case of transfer length is equal to available space in the TX FIFO</li> <li>Fix Toggle OUT interrupt channel in host mode</li> -<li>Add new callback to be used to handle the usb device connection/disconnection +<li>Add new callback to be used to handle usb device connection/disconnection <ul> <li>HAL_HCD_PortEnabled_Callback()</li> <li>HAL_HCD_PortDisabled_Callback()</li> @@ -396,10 +454,10 @@ <li>Update to prevent reactivate host interrupt channel</li> <li>Updated USB_WritePacket(), USB_ReadPacket()APIs to prevent compilation warning with GCC GNU v8.2.0</li> <li>Rework USB_EPStartXfer() API to enable theUSB endpoint before unmasking the TX FiFo empty interrupt in case DMA is not used</li> -<li>Update USB HAL_HCD_Init() and HAL_PCD_Init() APIs to avoid enabling USB DMA feature for OTG FS instance, USB DMAfeature is available only on OTG HS Instance</li> +<li>USB HAL_HCD_Init() and HAL_PCD_Init() APIsupdated to avoid enabling USB DMA feature for OTG FS instance, USB DMAfeature is available only on OTG HS Instance</li> <li>Remove duplicated line in hal_hcd.c header file comment section</li> -<li>Rework USB HAL driver to use instancePCD_SPEED_xxx, HCD_SPEED_xx instead of OTG register Core speed definition during the instance initialization</li> -<li>Software Quality improvement with a fix of CodeSonar warnings on PCD_Port_IRQHandler() and HCD_Port_IRQHandler()interrupt handlers</li> +<li>Rework USB HAL driver to use instancePCD_SPEED_xxx, HCD_SPEED_xx speeds instead of OTG register Core speed definition during the instance initialization</li> +<li>Software Quality improvement with a fix ofCodeSonar warning on PCD_Port_IRQHandler() and HCD_Port_IRQHandler()interrupt handlers</li> </ul></li> <li><strong>HAL UTILS</strong> update <ul> @@ -411,7 +469,7 @@ <div class="collapse"> <input type="checkbox" id="collapse-section9" aria-hidden="true"> <label for="collapse-section9" aria-hidden="true"><strong>V1.2.2 / 29-September-2017</strong></label> <div> -<h2 id="main-changes-1">Main Changes</h2> +<h2 id="main-changes-2">Main Changes</h2> <ul> <li>General updates to fix known defects and enhancements implementation</li> <li>Fix compilation warning with GCC compiler</li> @@ -477,7 +535,7 @@ <div class="collapse"> <input type="checkbox" id="collapse-section8" aria-hidden="true"> <label for="collapse-section8" aria-hidden="true"><strong>V1.2.1 / 14-April-2017</strong></label> <div> -<h2 id="main-changes-2">Main Changes</h2> +<h2 id="main-changes-3">Main Changes</h2> <ul> <li>General updates to fix known defects and enhancements implementation</li> <li><strong>HAL CONF Template</strong> update @@ -498,7 +556,7 @@ <div class="collapse"> <input type="checkbox" id="collapse-section7" aria-hidden="true"> <label for="collapse-section7" aria-hidden="true"><strong>V1.2.0 / 17-March-2017</strong></label> <div> -<h2 id="main-changes-3">Main Changes</h2> +<h2 id="main-changes-4">Main Changes</h2> <ul> <li><strong>Add Low Layer drivers allowing performance and footprint optimization</strong> <ul> @@ -616,7 +674,7 @@ <div class="collapse"> <input type="checkbox" id="collapse-section6" aria-hidden="true"> <label for="collapse-section6" aria-hidden="true"><strong>V1.1.3 / 29-June-2016</strong></label> <div> -<h2 id="main-changes-4">Main Changes</h2> +<h2 id="main-changes-5">Main Changes</h2> <ul> <li>General updates to fix known defects and enhancements implementation</li> <li>Enhance HAL delay and time base implementation: @@ -970,7 +1028,7 @@ <div class="collapse"> <input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true"><strong>V1.1.2 / 11-December-2015</strong></label> <div> -<h2 id="main-changes-5">Main Changes</h2> +<h2 id="main-changes-6">Main Changes</h2> <ul> <li><strong>HAL RCC</strong> update <ul> @@ -986,7 +1044,7 @@ <div class="collapse"> <input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" aria-hidden="true"><strong>V1.1.1 / 20-November-2015</strong></label> <div> -<h2 id="main-changes-6">Main Changes</h2> +<h2 id="main-changes-7">Main Changes</h2> <ul> <li>General updates to fix known defects and enhancements implementation</li> <li><strong>One change done on the HAL CRYP requires an update on the application code based on HAL V1.1.0</strong> @@ -1049,7 +1107,7 @@ <div class="collapse"> <input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true"><strong>V1.1.0 / 09-October-2015</strong></label> <div> -<h2 id="main-changes-7">Main Changes</h2> +<h2 id="main-changes-8">Main Changes</h2> <ul> <li><strong>Maintenance release to fix known defects and enhancements implementation</strong></li> <li><strong>Macros and literals renaming to ensure compatibles across STM32 series</strong>, backward compatibility maintained thanks to new added file stm32_hal_legacy.h under /Inc/Legacy</li> @@ -1879,7 +1937,7 @@ <div class="collapse"> <input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true"><strong>V1.0.1 / 25-March-2014</strong></label> <div> -<h2 id="main-changes-8">Main Changes</h2> +<h2 id="main-changes-9">Main Changes</h2> <ul> <li>Patch release : moved macros related to RNG from hal_rcc_ex.h to hal_rcc.h as RNG is present in all versions of the STM32F2</li> </ul> @@ -1888,7 +1946,7 @@ <div class="collapse"> <input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true"><strong>V1.0.0 / 07-March-2014</strong></label> <div> -<h2 id="main-changes-9">Main Changes</h2> +<h2 id="main-changes-10">Main Changes</h2> <ul> <li>First official release</li> </ul>
diff --git a/Src/stm32f2xx_hal.c b/Src/stm32f2xx_hal.c index dd6e4d1..767b393 100644 --- a/Src/stm32f2xx_hal.c +++ b/Src/stm32f2xx_hal.c
@@ -50,11 +50,11 @@ * @{ */ /** - * @brief STM32F2xx HAL Driver version number V1.2.3 + * @brief STM32F2xx HAL Driver version number V1.2.4 */ #define __STM32F2xx_HAL_VERSION_MAIN 0x01U /*!< [31:24] main version */ #define __STM32F2xx_HAL_VERSION_SUB1 0x02U /*!< [23:16] sub1 version */ -#define __STM32F2xx_HAL_VERSION_SUB2 0x03U /*!< [15:8] sub2 version */ +#define __STM32F2xx_HAL_VERSION_SUB2 0x04U /*!< [15:8] sub2 version */ #define __STM32F2xx_HAL_VERSION_RC 0x00U /*!< [7:0] release candidate */ #define __STM32F2xx_HAL_VERSION ((__STM32F2xx_HAL_VERSION_MAIN << 24U)\ |(__STM32F2xx_HAL_VERSION_SUB1 << 16U)\
diff --git a/Src/stm32f2xx_hal_adc_ex.c b/Src/stm32f2xx_hal_adc_ex.c index 30cc2f6..e2ded61 100644 --- a/Src/stm32f2xx_hal_adc_ex.c +++ b/Src/stm32f2xx_hal_adc_ex.c
@@ -5,7 +5,7 @@ * @brief This file provides firmware functions to manage the following * functionalities of the ADC extension peripheral: * + Extended features functions - * + * @verbatim ============================================================================== ##### How to use this driver ##### @@ -15,8 +15,8 @@ (##) Enable the ADC interface clock using __HAL_RCC_ADC_CLK_ENABLE() (##) ADC pins configuration (+++) Enable the clock for the ADC GPIOs using the following function: - __HAL_RCC_GPIOx_CLK_ENABLE() - (+++) Configure these ADC pins in analog mode using HAL_GPIO_Init() + __HAL_RCC_GPIOx_CLK_ENABLE() + (+++) Configure these ADC pins in analog mode using HAL_GPIO_Init() (##) In case of using interrupts (e.g. HAL_ADC_Start_IT()) (+++) Configure the ADC interrupt priority using HAL_NVIC_SetPriority() (+++) Enable the ADC IRQ handler using HAL_NVIC_EnableIRQ() @@ -32,54 +32,43 @@ priority than the input stream. (#) Configure the ADC Prescaler, conversion resolution and data alignment using the HAL_ADC_Init() function. - + (#) Configure the ADC Injected channels group features, use HAL_ADC_Init() and HAL_ADC_ConfigChannel() functions. - - (#) Three operation modes are available within this driver : - + + (#) Three operation modes are available within this driver: + *** Polling mode IO operation *** ================================= - [..] - (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart() + [..] + (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart() (+) Wait for end of conversion using HAL_ADC_PollForConversion(), at this stage - user can specify the value of timeout according to his end application + user can specify the value of timeout according to his end application (+) To read the ADC converted values, use the HAL_ADCEx_InjectedGetValue() function. (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop() - - *** Interrupt mode IO operation *** + + *** Interrupt mode IO operation *** =================================== - [..] - (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart_IT() + [..] + (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart_IT() (+) Use HAL_ADC_IRQHandler() called under ADC_IRQHandler() Interrupt subroutine - (+) At ADC end of conversion HAL_ADCEx_InjectedConvCpltCallback() function is executed and user can - add his own code by customization of function pointer HAL_ADCEx_InjectedConvCpltCallback - (+) In case of ADC Error, HAL_ADCEx_InjectedErrorCallback() function is executed and user can + (+) At ADC end of conversion HAL_ADCEx_InjectedConvCpltCallback() function is executed and user can + add his own code by customization of function pointer HAL_ADCEx_InjectedConvCpltCallback + (+) In case of ADC Error, HAL_ADCEx_InjectedErrorCallback() function is executed and user can add his own code by customization of function pointer HAL_ADCEx_InjectedErrorCallback (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop_IT() - - - *** DMA mode IO operation *** - ============================== - [..] - (+) Start the ADC peripheral using HAL_ADCEx_InjectedStart_DMA(), at this stage the user specify the length - of data to be transferred at each end of conversion - (+) At The end of data transfer ba HAL_ADCEx_InjectedConvCpltCallback() function is executed and user can - add his own code by customization of function pointer HAL_ADCEx_InjectedConvCpltCallback - (+) In case of transfer Error, HAL_ADCEx_InjectedErrorCallback() function is executed and user can - add his own code by customization of function pointer HAL_ADCEx_InjectedErrorCallback - (+) Stop the ADC peripheral using HAL_ADCEx_InjectedStop_DMA() - + + *** Multi mode ADCs Regular channels configuration *** ====================================================== - [..] - (+) Select the Multi mode ADC regular channels features (dual or triple mode) - and configure the DMA mode using HAL_ADCEx_MultiModeConfigChannel() functions. - (+) Start the ADC peripheral using HAL_ADCEx_MultiModeStart_DMA(), at this stage the user specify the length - of data to be transferred at each end of conversion + [..] + (+) Select the Multi mode ADC regular channels features (dual or triple mode) + and configure the DMA mode using HAL_ADCEx_MultiModeConfigChannel() functions. + (+) Start the ADC peripheral using HAL_ADCEx_MultiModeStart_DMA(), at this stage the user specify the length + of data to be transferred at each end of conversion (+) Read the ADCs converted values using the HAL_ADCEx_MultiModeGetValue() function. - - + + @endverbatim ****************************************************************************** * @attention
diff --git a/Src/stm32f2xx_hal_gpio.c b/Src/stm32f2xx_hal_gpio.c index cf8caaf..4f80e5d 100644 --- a/Src/stm32f2xx_hal_gpio.c +++ b/Src/stm32f2xx_hal_gpio.c
@@ -194,27 +194,6 @@ if (iocurrent != 0x00u) { - /*--------------------- GPIO Mode Configuration ------------------------*/ - /* In case of Alternate function mode selection */ - if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) - { - /* Check the Alternate function parameters */ - assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); - assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); - - /* Configure Alternate function mapped with the current IO */ - temp = GPIOx->AFR[position >> 3u]; - temp &= ~(0xFu << ((position & 0x07u) * 4u)); - temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); - GPIOx->AFR[position >> 3u] = temp; - } - - /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ - temp = GPIOx->MODER; - temp &= ~(GPIO_MODER_MODE0 << (position * 2u)); - temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); - GPIOx->MODER = temp; - /* In case of Output or Alternate function mode selection */ if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) @@ -240,6 +219,27 @@ temp |= ((GPIO_Init->Pull) << (position * 2u)); GPIOx->PUPDR = temp; + /*--------------------- GPIO Mode Configuration ------------------------*/ + /* In case of Alternate function mode selection */ + if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD)) + { + /* Check the Alternate function parameters */ + assert_param(IS_GPIO_AF_INSTANCE(GPIOx)); + assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); + + /* Configure Alternate function mapped with the current IO */ + temp = GPIOx->AFR[position >> 3u]; + temp &= ~(0xFu << ((position & 0x07u) * 4u)); + temp |= ((GPIO_Init->Alternate) << ((position & 0x07u) * 4u)); + GPIOx->AFR[position >> 3u] = temp; + } + + /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ + temp = GPIOx->MODER; + temp &= ~(GPIO_MODER_MODE0 << (position * 2u)); + temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2u)); + GPIOx->MODER = temp; + /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE) @@ -327,7 +327,7 @@ /* Clear EXTI line configuration */ EXTI->IMR &= ~((uint32_t)iocurrent); EXTI->EMR &= ~((uint32_t)iocurrent); - + /* Clear Rising Falling edge configuration */ EXTI->RTSR &= ~((uint32_t)iocurrent); EXTI->FTSR &= ~((uint32_t)iocurrent); @@ -342,16 +342,16 @@ GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (position * 2u)); /* Configure the default Alternate Function in current IO */ - GPIOx->AFR[position >> 3u] &= ~(0xFu << ((uint32_t)(position & 0x07u) * 4u)) ; - - /* Configure the default value for IO Speed */ - GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); - - /* Configure the default value IO Output Type */ - GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position) ; + GPIOx->AFR[position >> 3u] &= ~(0xFu << ((uint32_t)(position & 0x07u) * 4u)); /* Deactivate the Pull-up and Pull-down resistor for the current IO */ GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U)); + + /* Configure the default value IO Output Type */ + GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position); + + /* Configure the default value for IO Speed */ + GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2u)); } position++;
diff --git a/Src/stm32f2xx_hal_i2c.c b/Src/stm32f2xx_hal_i2c.c index 7610867..fe95bd5 100644 --- a/Src/stm32f2xx_hal_i2c.c +++ b/Src/stm32f2xx_hal_i2c.c
@@ -378,6 +378,8 @@ static void I2C_Slave_STOPF(I2C_HandleTypeDef *hi2c); static void I2C_Slave_AF(I2C_HandleTypeDef *hi2c); +static void I2C_MemoryTransmit_TXE_BTF(I2C_HandleTypeDef *hi2c); + /* Private function to Convert Specific options */ static void I2C_ConvertOtherXferOptions(I2C_HandleTypeDef *hi2c); /** @@ -486,6 +488,10 @@ /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); + /*Reset I2C*/ + hi2c->Instance->CR1 |= I2C_CR1_SWRST; + hi2c->Instance->CR1 &= ~I2C_CR1_SWRST; + /* Get PCLK1 frequency */ pclk1 = HAL_RCC_GetPCLK1Freq(); @@ -3303,7 +3309,11 @@ /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, tickstart) != HAL_OK) { - return HAL_ERROR; + if (hi2c->Instance->CR1 & I2C_CR1_START) + { + hi2c->ErrorCode = HAL_I2C_WRONG_START; + } + return HAL_TIMEOUT; } /* Send slave address */ @@ -4718,6 +4728,7 @@ uint32_t sr1itflags = READ_REG(hi2c->Instance->SR1); uint32_t itsources = READ_REG(hi2c->Instance->CR2); uint32_t error = HAL_I2C_ERROR_NONE; + HAL_I2C_ModeTypeDef CurrentMode = hi2c->Mode; /* I2C Bus error interrupt occurred ----------------------------------------*/ if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_BERR) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET)) @@ -4740,7 +4751,7 @@ /* I2C Acknowledge failure error interrupt occurred ------------------------*/ if ((I2C_CHECK_FLAG(sr1itflags, I2C_FLAG_AF) != RESET) && (I2C_CHECK_IT_SOURCE(itsources, I2C_IT_ERR) != RESET)) { - tmp1 = hi2c->Mode; + tmp1 = CurrentMode; tmp2 = hi2c->XferCount; tmp3 = hi2c->State; tmp4 = hi2c->PreviousState; @@ -4758,7 +4769,7 @@ error |= HAL_I2C_ERROR_AF; /* Do not generate a STOP in case of Slave receive non acknowledge during transfer (mean not at the end of transfer) */ - if (hi2c->Mode == HAL_I2C_MODE_MASTER) + if ((CurrentMode == HAL_I2C_MODE_MASTER) || (CurrentMode == HAL_I2C_MODE_MEM)) { /* Generate Stop */ SET_BIT(hi2c->Instance->CR1, I2C_CR1_STOP); @@ -5083,59 +5094,7 @@ { if (hi2c->Mode == HAL_I2C_MODE_MEM) { - if (hi2c->EventCount == 0U) - { - /* If Memory address size is 8Bit */ - if (hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT) - { - /* Send Memory Address */ - hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress); - - hi2c->EventCount += 2U; - } - /* If Memory address size is 16Bit */ - else - { - /* Send MSB of Memory Address */ - hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress); - - hi2c->EventCount++; - } - } - else if (hi2c->EventCount == 1U) - { - /* Send LSB of Memory Address */ - hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress); - - hi2c->EventCount++; - } - else if (hi2c->EventCount == 2U) - { - if (hi2c->State == HAL_I2C_STATE_BUSY_RX) - { - /* Generate Restart */ - hi2c->Instance->CR1 |= I2C_CR1_START; - } - else if (hi2c->State == HAL_I2C_STATE_BUSY_TX) - { - /* Write data to DR */ - hi2c->Instance->DR = *hi2c->pBuffPtr; - - /* Increment Buffer pointer */ - hi2c->pBuffPtr++; - - /* Update counter */ - hi2c->XferCount--; - } - else - { - /* Do nothing */ - } - } - else - { - /* Do nothing */ - } + I2C_MemoryTransmit_TXE_BTF(hi2c); } else { @@ -5230,6 +5189,77 @@ } } } + else if (hi2c->Mode == HAL_I2C_MODE_MEM) + { + I2C_MemoryTransmit_TXE_BTF(hi2c); + } + else + { + /* Do nothing */ + } +} + +/** + * @brief Handle TXE and BTF flag for Memory transmitter + * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains + * the configuration information for I2C module + * @retval None + */ +static void I2C_MemoryTransmit_TXE_BTF(I2C_HandleTypeDef *hi2c) +{ + if (hi2c->EventCount == 0U) + { + /* If Memory address size is 8Bit */ + if (hi2c->MemaddSize == I2C_MEMADD_SIZE_8BIT) + { + /* Send Memory Address */ + hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress); + + hi2c->EventCount += 2U; + } + /* If Memory address size is 16Bit */ + else + { + /* Send MSB of Memory Address */ + hi2c->Instance->DR = I2C_MEM_ADD_MSB(hi2c->Memaddress); + + hi2c->EventCount++; + } + } + else if (hi2c->EventCount == 1U) + { + /* Send LSB of Memory Address */ + hi2c->Instance->DR = I2C_MEM_ADD_LSB(hi2c->Memaddress); + + hi2c->EventCount++; + } + else if (hi2c->EventCount == 2U) + { + if (hi2c->State == HAL_I2C_STATE_BUSY_RX) + { + /* Generate Restart */ + hi2c->Instance->CR1 |= I2C_CR1_START; + } + else if (hi2c->State == HAL_I2C_STATE_BUSY_TX) + { + /* Write data to DR */ + hi2c->Instance->DR = *hi2c->pBuffPtr; + + /* Increment Buffer pointer */ + hi2c->pBuffPtr++; + + /* Update counter */ + hi2c->XferCount--; + } + else + { + /* Do nothing */ + } + } + else + { + /* Do nothing */ + } } /** @@ -5473,13 +5503,11 @@ hi2c->Instance->DR = I2C_7BIT_ADD_READ(hi2c->Devaddress); } - if ((hi2c->hdmatx != NULL) || (hi2c->hdmarx != NULL)) + if (((hi2c->hdmatx != NULL) && (hi2c->hdmatx->XferCpltCallback != NULL)) + || ((hi2c->hdmarx != NULL) && (hi2c->hdmarx->XferCpltCallback != NULL))) { - if ((hi2c->hdmatx->XferCpltCallback != NULL) || (hi2c->hdmarx->XferCpltCallback != NULL)) - { - /* Enable DMA Request */ - SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); - } + /* Enable DMA Request */ + SET_BIT(hi2c->Instance->CR2, I2C_CR2_DMAEN); } } else @@ -6089,6 +6117,7 @@ { /* Declaration of temporary variable to prevent undefined behavior of volatile usage */ HAL_I2C_StateTypeDef CurrentState = hi2c->State; + uint32_t CurrentError; if ((hi2c->Mode == HAL_I2C_MODE_MASTER) && (CurrentState == HAL_I2C_STATE_BUSY_RX)) { @@ -6208,15 +6237,24 @@ HAL_I2C_ErrorCallback(hi2c); #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } - /* STOP Flag is not set after a NACK reception */ + + /* STOP Flag is not set after a NACK reception, BusError, ArbitrationLost, OverRun */ + CurrentError = hi2c->ErrorCode; + + if (((CurrentError & HAL_I2C_ERROR_BERR) == HAL_I2C_ERROR_BERR) || \ + ((CurrentError & HAL_I2C_ERROR_ARLO) == HAL_I2C_ERROR_ARLO) || \ + ((CurrentError & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF) || \ + ((CurrentError & HAL_I2C_ERROR_OVR) == HAL_I2C_ERROR_OVR)) + { + /* Disable EVT, BUF and ERR interrupt */ + __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); + } + /* So may inform upper layer that listen phase is stopped */ /* during NACK error treatment */ CurrentState = hi2c->State; if (((hi2c->ErrorCode & HAL_I2C_ERROR_AF) == HAL_I2C_ERROR_AF) && (CurrentState == HAL_I2C_STATE_LISTEN)) { - /* Disable EVT, BUF and ERR interrupt */ - __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR); - hi2c->XferOptions = I2C_NO_OPTION_FRAME; hi2c->PreviousState = I2C_STATE_NONE; hi2c->State = HAL_I2C_STATE_READY; @@ -6264,7 +6302,11 @@ /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) { - return HAL_ERROR; + if (hi2c->Instance->CR1 & I2C_CR1_START) + { + hi2c->ErrorCode = HAL_I2C_WRONG_START; + } + return HAL_TIMEOUT; } if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) @@ -6333,7 +6375,11 @@ /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) { - return HAL_ERROR; + if (hi2c->Instance->CR1 & I2C_CR1_START) + { + hi2c->ErrorCode = HAL_I2C_WRONG_START; + } + return HAL_TIMEOUT; } if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) @@ -6370,7 +6416,11 @@ /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) { - return HAL_ERROR; + if (hi2c->Instance->CR1 & I2C_CR1_START) + { + hi2c->ErrorCode = HAL_I2C_WRONG_START; + } + return HAL_TIMEOUT; } /* Send header of slave address */ @@ -6406,7 +6456,11 @@ /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) { - return HAL_ERROR; + if (hi2c->Instance->CR1 & I2C_CR1_START) + { + hi2c->ErrorCode = HAL_I2C_WRONG_START; + } + return HAL_TIMEOUT; } /* Send slave address */ @@ -6485,7 +6539,11 @@ /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) { - return HAL_ERROR; + if (hi2c->Instance->CR1 & I2C_CR1_START) + { + hi2c->ErrorCode = HAL_I2C_WRONG_START; + } + return HAL_TIMEOUT; } /* Send slave address */ @@ -6555,7 +6613,11 @@ /* Wait until SB flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_SB, RESET, Timeout, Tickstart) != HAL_OK) { - return HAL_ERROR; + if (hi2c->Instance->CR1 & I2C_CR1_START) + { + hi2c->ErrorCode = HAL_I2C_WRONG_START; + } + return HAL_TIMEOUT; } /* Send slave address */ @@ -6588,8 +6650,14 @@ __HAL_I2C_DISABLE_IT(hi2c, I2C_IT_EVT | I2C_IT_ERR); /* Clear Complete callback */ - hi2c->hdmatx->XferCpltCallback = NULL; - hi2c->hdmarx->XferCpltCallback = NULL; + if (hi2c->hdmatx != NULL) + { + hi2c->hdmatx->XferCpltCallback = NULL; + } + if (hi2c->hdmarx != NULL) + { + hi2c->hdmarx->XferCpltCallback = NULL; + } if ((((uint32_t)CurrentState & (uint32_t)HAL_I2C_STATE_BUSY_TX) == (uint32_t)HAL_I2C_STATE_BUSY_TX) || ((((uint32_t)CurrentState & (uint32_t)HAL_I2C_STATE_BUSY_RX) == (uint32_t)HAL_I2C_STATE_BUSY_RX) && (CurrentMode == HAL_I2C_MODE_SLAVE))) { @@ -6712,8 +6780,14 @@ I2C_HandleTypeDef *hi2c = (I2C_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent; /* Derogation MISRAC2012-Rule-11.5 */ /* Clear Complete callback */ - hi2c->hdmatx->XferCpltCallback = NULL; - hi2c->hdmarx->XferCpltCallback = NULL; + if (hi2c->hdmatx != NULL) + { + hi2c->hdmatx->XferCpltCallback = NULL; + } + if (hi2c->hdmarx != NULL) + { + hi2c->hdmarx->XferCpltCallback = NULL; + } /* Ignore DMA FIFO error */ if (HAL_DMA_GetError(hdma) != HAL_DMA_ERROR_FE) @@ -6750,8 +6824,14 @@ HAL_I2C_StateTypeDef CurrentState = hi2c->State; /* Clear Complete callback */ - hi2c->hdmatx->XferCpltCallback = NULL; - hi2c->hdmarx->XferCpltCallback = NULL; + if (hi2c->hdmatx != NULL) + { + hi2c->hdmatx->XferCpltCallback = NULL; + } + if (hi2c->hdmarx != NULL) + { + hi2c->hdmarx->XferCpltCallback = NULL; + } /* Disable Acknowledge */ CLEAR_BIT(hi2c->Instance->CR1, I2C_CR1_ACK); @@ -6759,8 +6839,14 @@ hi2c->XferCount = 0U; /* Reset XferAbortCallback */ - hi2c->hdmatx->XferAbortCallback = NULL; - hi2c->hdmarx->XferAbortCallback = NULL; + if (hi2c->hdmatx != NULL) + { + hi2c->hdmatx->XferAbortCallback = NULL; + } + if (hi2c->hdmarx != NULL) + { + hi2c->hdmarx->XferAbortCallback = NULL; + } /* Disable I2C peripheral to prevent dummy data in buffer */ __HAL_I2C_DISABLE(hi2c);
diff --git a/Src/stm32f2xx_hal_irda.c b/Src/stm32f2xx_hal_irda.c index c31e697..bfcc32d 100644 --- a/Src/stm32f2xx_hal_irda.c +++ b/Src/stm32f2xx_hal_irda.c
@@ -1763,7 +1763,7 @@ } /* IRDA Over-Run interrupt occurred -----------------------------------*/ - if (((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) + if (((isrflags & USART_SR_ORE) != RESET) && (((cr1its & USART_CR1_RXNEIE) != RESET) || ((cr3its & USART_CR3_EIE) != RESET))) { hirda->ErrorCode |= HAL_IRDA_ERROR_ORE; }
diff --git a/Src/stm32f2xx_hal_smartcard.c b/Src/stm32f2xx_hal_smartcard.c index 3e0e015..70718b5 100644 --- a/Src/stm32f2xx_hal_smartcard.c +++ b/Src/stm32f2xx_hal_smartcard.c
@@ -1566,7 +1566,7 @@ } /* SMARTCARD Over-Run interrupt occurred -------------------------------*/ - if(((isrflags & SMARTCARD_FLAG_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) + if(((isrflags & SMARTCARD_FLAG_ORE) != RESET) && (((cr1its & USART_CR1_RXNEIE) != RESET) || ((cr3its & USART_CR3_EIE) != RESET))) { hsc->ErrorCode |= HAL_SMARTCARD_ERROR_ORE; }
diff --git a/Src/stm32f2xx_hal_uart.c b/Src/stm32f2xx_hal_uart.c index d064c6f..51bc8a3 100644 --- a/Src/stm32f2xx_hal_uart.c +++ b/Src/stm32f2xx_hal_uart.c
@@ -1039,6 +1039,10 @@ huart->TxXferSize = Size; huart->TxXferCount = Size; + + /* Process Unlocked */ + __HAL_UNLOCK(huart); + while (huart->TxXferCount > 0U) { huart->TxXferCount--; @@ -1077,9 +1081,6 @@ /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; - /* Process Unlocked */ - __HAL_UNLOCK(huart); - return HAL_OK; } else @@ -1125,6 +1126,9 @@ huart->RxXferSize = Size; huart->RxXferCount = Size; + /* Process Unlocked */ + __HAL_UNLOCK(huart); + /* Check the remain data to be received */ while (huart->RxXferCount > 0U) { @@ -1169,9 +1173,6 @@ /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; - /* Process Unlocked */ - __HAL_UNLOCK(huart); - return HAL_OK; } else @@ -2051,7 +2052,7 @@ } /* UART Over-Run interrupt occurred --------------------------------------*/ - if (((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) + if (((isrflags & USART_SR_ORE) != RESET) && (((cr1its & USART_CR1_RXNEIE) != RESET) || ((cr3its & USART_CR3_EIE) != RESET))) { huart->ErrorCode |= HAL_UART_ERROR_ORE; }
diff --git a/Src/stm32f2xx_hal_usart.c b/Src/stm32f2xx_hal_usart.c index ac5b65b..81ca145 100644 --- a/Src/stm32f2xx_hal_usart.c +++ b/Src/stm32f2xx_hal_usart.c
@@ -1788,7 +1788,7 @@ } /* USART Over-Run interrupt occurred -----------------------------------*/ - if (((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET)) + if (((isrflags & USART_SR_ORE) != RESET) && (((cr1its & USART_CR1_RXNEIE) != RESET) || ((cr3its & USART_CR3_EIE) != RESET))) { husart->ErrorCode |= HAL_USART_ERROR_ORE; }
diff --git a/Src/stm32f2xx_ll_adc.c b/Src/stm32f2xx_ll_adc.c index c95d2dc..eaa0724 100644 --- a/Src/stm32f2xx_ll_adc.c +++ b/Src/stm32f2xx_ll_adc.c
@@ -264,7 +264,9 @@ #endif /* ADC_MULTIMODE_SUPPORT */ +#ifndef UNUSED #define UNUSED(x) ((void)(x)) +#endif /** * @}
diff --git a/Src/stm32f2xx_ll_gpio.c b/Src/stm32f2xx_ll_gpio.c index 553f218..b5ae92f 100644 --- a/Src/stm32f2xx_ll_gpio.c +++ b/Src/stm32f2xx_ll_gpio.c
@@ -223,9 +223,6 @@ if (currentpin != 0x00u) { - /* Pin Mode configuration */ - LL_GPIO_SetPinMode(GPIOx, currentpin, GPIO_InitStruct->Mode); - if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)) { /* Check Speed mode parameters */ @@ -233,6 +230,12 @@ /* Speed mode configuration */ LL_GPIO_SetPinSpeed(GPIOx, currentpin, GPIO_InitStruct->Speed); + + /* Check Output mode parameters */ + assert_param(IS_LL_GPIO_OUTPUT_TYPE(GPIO_InitStruct->OutputType)); + + /* Output mode configuration*/ + LL_GPIO_SetPinOutputType(GPIOx, GPIO_InitStruct->Pin, GPIO_InitStruct->OutputType); } /* Pull-up Pull down resistor configuration*/ @@ -253,19 +256,12 @@ LL_GPIO_SetAFPin_8_15(GPIOx, currentpin, GPIO_InitStruct->Alternate); } } + + /* Pin Mode configuration */ + LL_GPIO_SetPinMode(GPIOx, currentpin, GPIO_InitStruct->Mode); } pinpos++; } - - if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)) - { - /* Check Output mode parameters */ - assert_param(IS_LL_GPIO_OUTPUT_TYPE(GPIO_InitStruct->OutputType)); - - /* Output mode configuration*/ - LL_GPIO_SetPinOutputType(GPIOx, GPIO_InitStruct->Pin, GPIO_InitStruct->OutputType); - - } return (SUCCESS); }